1 1.1 riastrad /* $NetBSD: virtgpu_display.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright (C) 2015 Red Hat, Inc. 5 1.1 riastrad * All Rights Reserved. 6 1.1 riastrad * 7 1.1 riastrad * Authors: 8 1.1 riastrad * Dave Airlie 9 1.1 riastrad * Alon Levy 10 1.1 riastrad * 11 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 12 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 13 1.1 riastrad * to deal in the Software without restriction, including without limitation 14 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 15 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 16 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 17 1.1 riastrad * 18 1.1 riastrad * The above copyright notice and this permission notice shall be included in 19 1.1 riastrad * all copies or substantial portions of the Software. 20 1.1 riastrad * 21 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24 1.1 riastrad * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 25 1.1 riastrad * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 26 1.1 riastrad * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 27 1.1 riastrad * OTHER DEALINGS IN THE SOFTWARE. 28 1.1 riastrad */ 29 1.1 riastrad 30 1.1 riastrad #include <sys/cdefs.h> 31 1.1 riastrad __KERNEL_RCSID(0, "$NetBSD: virtgpu_display.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $"); 32 1.1 riastrad 33 1.3 riastrad #include <drm/drm_atomic_helper.h> 34 1.3 riastrad #include <drm/drm_damage_helper.h> 35 1.3 riastrad #include <drm/drm_fourcc.h> 36 1.3 riastrad #include <drm/drm_gem_framebuffer_helper.h> 37 1.3 riastrad #include <drm/drm_probe_helper.h> 38 1.3 riastrad #include <drm/drm_vblank.h> 39 1.3 riastrad 40 1.1 riastrad #include "virtgpu_drv.h" 41 1.1 riastrad 42 1.3 riastrad #define XRES_MIN 32 43 1.3 riastrad #define YRES_MIN 32 44 1.1 riastrad 45 1.1 riastrad #define XRES_DEF 1024 46 1.1 riastrad #define YRES_DEF 768 47 1.1 riastrad 48 1.1 riastrad #define XRES_MAX 8192 49 1.1 riastrad #define YRES_MAX 8192 50 1.1 riastrad 51 1.3 riastrad #define drm_connector_to_virtio_gpu_output(x) \ 52 1.3 riastrad container_of(x, struct virtio_gpu_output, conn) 53 1.1 riastrad 54 1.1 riastrad static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = { 55 1.1 riastrad .set_config = drm_atomic_helper_set_config, 56 1.1 riastrad .destroy = drm_crtc_cleanup, 57 1.1 riastrad 58 1.3 riastrad .page_flip = drm_atomic_helper_page_flip, 59 1.1 riastrad .reset = drm_atomic_helper_crtc_reset, 60 1.1 riastrad .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 61 1.1 riastrad .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 62 1.1 riastrad }; 63 1.1 riastrad 64 1.1 riastrad static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = { 65 1.3 riastrad .create_handle = drm_gem_fb_create_handle, 66 1.3 riastrad .destroy = drm_gem_fb_destroy, 67 1.3 riastrad .dirty = drm_atomic_helper_dirtyfb, 68 1.1 riastrad }; 69 1.1 riastrad 70 1.3 riastrad static int 71 1.1 riastrad virtio_gpu_framebuffer_init(struct drm_device *dev, 72 1.1 riastrad struct virtio_gpu_framebuffer *vgfb, 73 1.3 riastrad const struct drm_mode_fb_cmd2 *mode_cmd, 74 1.1 riastrad struct drm_gem_object *obj) 75 1.1 riastrad { 76 1.1 riastrad int ret; 77 1.1 riastrad 78 1.3 riastrad vgfb->base.obj[0] = obj; 79 1.3 riastrad 80 1.3 riastrad drm_helper_mode_fill_fb_struct(dev, &vgfb->base, mode_cmd); 81 1.1 riastrad 82 1.1 riastrad ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs); 83 1.1 riastrad if (ret) { 84 1.3 riastrad vgfb->base.obj[0] = NULL; 85 1.1 riastrad return ret; 86 1.1 riastrad } 87 1.1 riastrad return 0; 88 1.1 riastrad } 89 1.1 riastrad 90 1.1 riastrad static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc) 91 1.1 riastrad { 92 1.1 riastrad struct drm_device *dev = crtc->dev; 93 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 94 1.1 riastrad struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); 95 1.1 riastrad 96 1.1 riastrad virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 97 1.1 riastrad crtc->mode.hdisplay, 98 1.1 riastrad crtc->mode.vdisplay, 0, 0); 99 1.1 riastrad } 100 1.1 riastrad 101 1.3 riastrad static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc, 102 1.3 riastrad struct drm_crtc_state *old_state) 103 1.1 riastrad { 104 1.3 riastrad struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); 105 1.3 riastrad 106 1.3 riastrad output->enabled = true; 107 1.1 riastrad } 108 1.1 riastrad 109 1.3 riastrad static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc, 110 1.3 riastrad struct drm_crtc_state *old_state) 111 1.1 riastrad { 112 1.1 riastrad struct drm_device *dev = crtc->dev; 113 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 114 1.1 riastrad struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); 115 1.1 riastrad 116 1.1 riastrad virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0); 117 1.3 riastrad output->enabled = false; 118 1.1 riastrad } 119 1.1 riastrad 120 1.1 riastrad static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, 121 1.1 riastrad struct drm_crtc_state *state) 122 1.1 riastrad { 123 1.1 riastrad return 0; 124 1.1 riastrad } 125 1.1 riastrad 126 1.3 riastrad static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc, 127 1.3 riastrad struct drm_crtc_state *old_state) 128 1.3 riastrad { 129 1.3 riastrad unsigned long flags; 130 1.3 riastrad 131 1.3 riastrad spin_lock_irqsave(&crtc->dev->event_lock, flags); 132 1.3 riastrad if (crtc->state->event) 133 1.3 riastrad drm_crtc_send_vblank_event(crtc, crtc->state->event); 134 1.3 riastrad crtc->state->event = NULL; 135 1.3 riastrad spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 136 1.3 riastrad } 137 1.3 riastrad 138 1.1 riastrad static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = { 139 1.1 riastrad .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb, 140 1.1 riastrad .atomic_check = virtio_gpu_crtc_atomic_check, 141 1.3 riastrad .atomic_flush = virtio_gpu_crtc_atomic_flush, 142 1.3 riastrad .atomic_enable = virtio_gpu_crtc_atomic_enable, 143 1.3 riastrad .atomic_disable = virtio_gpu_crtc_atomic_disable, 144 1.1 riastrad }; 145 1.1 riastrad 146 1.1 riastrad static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder, 147 1.1 riastrad struct drm_display_mode *mode, 148 1.1 riastrad struct drm_display_mode *adjusted_mode) 149 1.1 riastrad { 150 1.1 riastrad } 151 1.1 riastrad 152 1.1 riastrad static void virtio_gpu_enc_enable(struct drm_encoder *encoder) 153 1.1 riastrad { 154 1.1 riastrad } 155 1.1 riastrad 156 1.1 riastrad static void virtio_gpu_enc_disable(struct drm_encoder *encoder) 157 1.1 riastrad { 158 1.1 riastrad } 159 1.1 riastrad 160 1.1 riastrad static int virtio_gpu_conn_get_modes(struct drm_connector *connector) 161 1.1 riastrad { 162 1.1 riastrad struct virtio_gpu_output *output = 163 1.1 riastrad drm_connector_to_virtio_gpu_output(connector); 164 1.1 riastrad struct drm_display_mode *mode = NULL; 165 1.1 riastrad int count, width, height; 166 1.1 riastrad 167 1.3 riastrad if (output->edid) { 168 1.3 riastrad count = drm_add_edid_modes(connector, output->edid); 169 1.3 riastrad if (count) 170 1.3 riastrad return count; 171 1.3 riastrad } 172 1.3 riastrad 173 1.1 riastrad width = le32_to_cpu(output->info.r.width); 174 1.1 riastrad height = le32_to_cpu(output->info.r.height); 175 1.1 riastrad count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX); 176 1.1 riastrad 177 1.1 riastrad if (width == 0 || height == 0) { 178 1.1 riastrad width = XRES_DEF; 179 1.1 riastrad height = YRES_DEF; 180 1.1 riastrad drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF); 181 1.1 riastrad } else { 182 1.1 riastrad DRM_DEBUG("add mode: %dx%d\n", width, height); 183 1.1 riastrad mode = drm_cvt_mode(connector->dev, width, height, 60, 184 1.1 riastrad false, false, false); 185 1.1 riastrad mode->type |= DRM_MODE_TYPE_PREFERRED; 186 1.1 riastrad drm_mode_probed_add(connector, mode); 187 1.1 riastrad count++; 188 1.1 riastrad } 189 1.1 riastrad 190 1.1 riastrad return count; 191 1.1 riastrad } 192 1.1 riastrad 193 1.3 riastrad static enum drm_mode_status virtio_gpu_conn_mode_valid(struct drm_connector *connector, 194 1.1 riastrad struct drm_display_mode *mode) 195 1.1 riastrad { 196 1.1 riastrad struct virtio_gpu_output *output = 197 1.1 riastrad drm_connector_to_virtio_gpu_output(connector); 198 1.1 riastrad int width, height; 199 1.1 riastrad 200 1.1 riastrad width = le32_to_cpu(output->info.r.width); 201 1.1 riastrad height = le32_to_cpu(output->info.r.height); 202 1.1 riastrad 203 1.1 riastrad if (!(mode->type & DRM_MODE_TYPE_PREFERRED)) 204 1.1 riastrad return MODE_OK; 205 1.1 riastrad if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) 206 1.1 riastrad return MODE_OK; 207 1.1 riastrad if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && 208 1.1 riastrad mode->vdisplay <= height && mode->vdisplay >= height - 16) 209 1.1 riastrad return MODE_OK; 210 1.1 riastrad 211 1.1 riastrad DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); 212 1.1 riastrad return MODE_BAD; 213 1.1 riastrad } 214 1.1 riastrad 215 1.1 riastrad static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = { 216 1.1 riastrad .mode_set = virtio_gpu_enc_mode_set, 217 1.1 riastrad .enable = virtio_gpu_enc_enable, 218 1.1 riastrad .disable = virtio_gpu_enc_disable, 219 1.1 riastrad }; 220 1.1 riastrad 221 1.1 riastrad static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = { 222 1.1 riastrad .get_modes = virtio_gpu_conn_get_modes, 223 1.1 riastrad .mode_valid = virtio_gpu_conn_mode_valid, 224 1.1 riastrad }; 225 1.1 riastrad 226 1.1 riastrad static enum drm_connector_status virtio_gpu_conn_detect( 227 1.1 riastrad struct drm_connector *connector, 228 1.1 riastrad bool force) 229 1.1 riastrad { 230 1.1 riastrad struct virtio_gpu_output *output = 231 1.1 riastrad drm_connector_to_virtio_gpu_output(connector); 232 1.1 riastrad 233 1.1 riastrad if (output->info.enabled) 234 1.1 riastrad return connector_status_connected; 235 1.1 riastrad else 236 1.1 riastrad return connector_status_disconnected; 237 1.1 riastrad } 238 1.1 riastrad 239 1.1 riastrad static void virtio_gpu_conn_destroy(struct drm_connector *connector) 240 1.1 riastrad { 241 1.1 riastrad drm_connector_unregister(connector); 242 1.1 riastrad drm_connector_cleanup(connector); 243 1.1 riastrad } 244 1.1 riastrad 245 1.1 riastrad static const struct drm_connector_funcs virtio_gpu_connector_funcs = { 246 1.1 riastrad .detect = virtio_gpu_conn_detect, 247 1.3 riastrad .fill_modes = drm_helper_probe_single_connector_modes, 248 1.1 riastrad .destroy = virtio_gpu_conn_destroy, 249 1.1 riastrad .reset = drm_atomic_helper_connector_reset, 250 1.1 riastrad .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 251 1.1 riastrad .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 252 1.1 riastrad }; 253 1.1 riastrad 254 1.1 riastrad static const struct drm_encoder_funcs virtio_gpu_enc_funcs = { 255 1.1 riastrad .destroy = drm_encoder_cleanup, 256 1.1 riastrad }; 257 1.1 riastrad 258 1.1 riastrad static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index) 259 1.1 riastrad { 260 1.1 riastrad struct drm_device *dev = vgdev->ddev; 261 1.1 riastrad struct virtio_gpu_output *output = vgdev->outputs + index; 262 1.1 riastrad struct drm_connector *connector = &output->conn; 263 1.1 riastrad struct drm_encoder *encoder = &output->enc; 264 1.1 riastrad struct drm_crtc *crtc = &output->crtc; 265 1.3 riastrad struct drm_plane *primary, *cursor; 266 1.1 riastrad 267 1.1 riastrad output->index = index; 268 1.1 riastrad if (index == 0) { 269 1.1 riastrad output->info.enabled = cpu_to_le32(true); 270 1.1 riastrad output->info.r.width = cpu_to_le32(XRES_DEF); 271 1.1 riastrad output->info.r.height = cpu_to_le32(YRES_DEF); 272 1.1 riastrad } 273 1.1 riastrad 274 1.3 riastrad primary = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_PRIMARY, index); 275 1.3 riastrad if (IS_ERR(primary)) 276 1.3 riastrad return PTR_ERR(primary); 277 1.3 riastrad cursor = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_CURSOR, index); 278 1.3 riastrad if (IS_ERR(cursor)) 279 1.3 riastrad return PTR_ERR(cursor); 280 1.3 riastrad drm_crtc_init_with_planes(dev, crtc, primary, cursor, 281 1.3 riastrad &virtio_gpu_crtc_funcs, NULL); 282 1.1 riastrad drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs); 283 1.1 riastrad 284 1.1 riastrad drm_connector_init(dev, connector, &virtio_gpu_connector_funcs, 285 1.1 riastrad DRM_MODE_CONNECTOR_VIRTUAL); 286 1.1 riastrad drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs); 287 1.3 riastrad if (vgdev->has_edid) 288 1.3 riastrad drm_connector_attach_edid_property(connector); 289 1.1 riastrad 290 1.1 riastrad drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs, 291 1.3 riastrad DRM_MODE_ENCODER_VIRTUAL, NULL); 292 1.1 riastrad drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs); 293 1.1 riastrad encoder->possible_crtcs = 1 << index; 294 1.1 riastrad 295 1.3 riastrad drm_connector_attach_encoder(connector, encoder); 296 1.1 riastrad drm_connector_register(connector); 297 1.1 riastrad return 0; 298 1.1 riastrad } 299 1.1 riastrad 300 1.1 riastrad static struct drm_framebuffer * 301 1.1 riastrad virtio_gpu_user_framebuffer_create(struct drm_device *dev, 302 1.1 riastrad struct drm_file *file_priv, 303 1.3 riastrad const struct drm_mode_fb_cmd2 *mode_cmd) 304 1.1 riastrad { 305 1.1 riastrad struct drm_gem_object *obj = NULL; 306 1.1 riastrad struct virtio_gpu_framebuffer *virtio_gpu_fb; 307 1.1 riastrad int ret; 308 1.1 riastrad 309 1.3 riastrad if (mode_cmd->pixel_format != DRM_FORMAT_HOST_XRGB8888 && 310 1.3 riastrad mode_cmd->pixel_format != DRM_FORMAT_HOST_ARGB8888) 311 1.3 riastrad return ERR_PTR(-ENOENT); 312 1.3 riastrad 313 1.1 riastrad /* lookup object associated with res handle */ 314 1.3 riastrad obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); 315 1.1 riastrad if (!obj) 316 1.1 riastrad return ERR_PTR(-EINVAL); 317 1.1 riastrad 318 1.1 riastrad virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL); 319 1.1 riastrad if (virtio_gpu_fb == NULL) 320 1.1 riastrad return ERR_PTR(-ENOMEM); 321 1.1 riastrad 322 1.1 riastrad ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj); 323 1.1 riastrad if (ret) { 324 1.1 riastrad kfree(virtio_gpu_fb); 325 1.3 riastrad drm_gem_object_put_unlocked(obj); 326 1.1 riastrad return NULL; 327 1.1 riastrad } 328 1.1 riastrad 329 1.1 riastrad return &virtio_gpu_fb->base; 330 1.1 riastrad } 331 1.1 riastrad 332 1.3 riastrad static void vgdev_atomic_commit_tail(struct drm_atomic_state *state) 333 1.3 riastrad { 334 1.3 riastrad struct drm_device *dev = state->dev; 335 1.3 riastrad 336 1.3 riastrad drm_atomic_helper_commit_modeset_disables(dev, state); 337 1.3 riastrad drm_atomic_helper_commit_modeset_enables(dev, state); 338 1.3 riastrad drm_atomic_helper_commit_planes(dev, state, 0); 339 1.3 riastrad 340 1.3 riastrad drm_atomic_helper_commit_hw_done(state); 341 1.3 riastrad 342 1.3 riastrad drm_atomic_helper_wait_for_vblanks(dev, state); 343 1.3 riastrad drm_atomic_helper_cleanup_planes(dev, state); 344 1.3 riastrad } 345 1.3 riastrad 346 1.3 riastrad static const struct drm_mode_config_helper_funcs virtio_mode_config_helpers = { 347 1.3 riastrad .atomic_commit_tail = vgdev_atomic_commit_tail, 348 1.3 riastrad }; 349 1.3 riastrad 350 1.1 riastrad static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = { 351 1.1 riastrad .fb_create = virtio_gpu_user_framebuffer_create, 352 1.1 riastrad .atomic_check = drm_atomic_helper_check, 353 1.1 riastrad .atomic_commit = drm_atomic_helper_commit, 354 1.1 riastrad }; 355 1.1 riastrad 356 1.3 riastrad void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev) 357 1.1 riastrad { 358 1.1 riastrad int i; 359 1.1 riastrad 360 1.1 riastrad drm_mode_config_init(vgdev->ddev); 361 1.3 riastrad vgdev->ddev->mode_config.quirk_addfb_prefer_host_byte_order = true; 362 1.3 riastrad vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs; 363 1.3 riastrad vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers; 364 1.1 riastrad 365 1.1 riastrad /* modes will be validated against the framebuffer size */ 366 1.1 riastrad vgdev->ddev->mode_config.min_width = XRES_MIN; 367 1.1 riastrad vgdev->ddev->mode_config.min_height = YRES_MIN; 368 1.1 riastrad vgdev->ddev->mode_config.max_width = XRES_MAX; 369 1.1 riastrad vgdev->ddev->mode_config.max_height = YRES_MAX; 370 1.1 riastrad 371 1.1 riastrad for (i = 0 ; i < vgdev->num_scanouts; ++i) 372 1.1 riastrad vgdev_output_init(vgdev, i); 373 1.1 riastrad 374 1.3 riastrad drm_mode_config_reset(vgdev->ddev); 375 1.1 riastrad } 376 1.1 riastrad 377 1.1 riastrad void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev) 378 1.1 riastrad { 379 1.3 riastrad int i; 380 1.3 riastrad 381 1.3 riastrad for (i = 0 ; i < vgdev->num_scanouts; ++i) 382 1.3 riastrad kfree(vgdev->outputs[i].edid); 383 1.3 riastrad drm_atomic_helper_shutdown(vgdev->ddev); 384 1.1 riastrad drm_mode_config_cleanup(vgdev->ddev); 385 1.1 riastrad } 386