1 1.1 riastrad /* $NetBSD: virtgpu_drv.h,v 1.3 2021/12/18 23:45:45 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright (C) 2015 Red Hat, Inc. 5 1.1 riastrad * All Rights Reserved. 6 1.1 riastrad * 7 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining 8 1.1 riastrad * a copy of this software and associated documentation files (the 9 1.1 riastrad * "Software"), to deal in the Software without restriction, including 10 1.1 riastrad * without limitation the rights to use, copy, modify, merge, publish, 11 1.1 riastrad * distribute, sublicense, and/or sell copies of the Software, and to 12 1.1 riastrad * permit persons to whom the Software is furnished to do so, subject to 13 1.1 riastrad * the following conditions: 14 1.1 riastrad * 15 1.1 riastrad * The above copyright notice and this permission notice (including the 16 1.1 riastrad * next paragraph) shall be included in all copies or substantial 17 1.1 riastrad * portions of the Software. 18 1.1 riastrad * 19 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20 1.1 riastrad * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 1.1 riastrad * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 22 1.1 riastrad * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 23 1.1 riastrad * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 24 1.1 riastrad * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 25 1.1 riastrad * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 1.1 riastrad */ 27 1.1 riastrad 28 1.1 riastrad #ifndef VIRTIO_DRV_H 29 1.1 riastrad #define VIRTIO_DRV_H 30 1.1 riastrad 31 1.1 riastrad #include <linux/virtio.h> 32 1.1 riastrad #include <linux/virtio_ids.h> 33 1.1 riastrad #include <linux/virtio_config.h> 34 1.1 riastrad #include <linux/virtio_gpu.h> 35 1.1 riastrad 36 1.3 riastrad #include <drm/drm_atomic.h> 37 1.3 riastrad #include <drm/drm_encoder.h> 38 1.3 riastrad #include <drm/drm_fb_helper.h> 39 1.1 riastrad #include <drm/drm_gem.h> 40 1.3 riastrad #include <drm/drm_gem_shmem_helper.h> 41 1.3 riastrad #include <drm/drm_ioctl.h> 42 1.3 riastrad #include <drm/drm_probe_helper.h> 43 1.3 riastrad #include <drm/virtgpu_drm.h> 44 1.1 riastrad 45 1.1 riastrad #define DRIVER_NAME "virtio_gpu" 46 1.1 riastrad #define DRIVER_DESC "virtio GPU" 47 1.1 riastrad #define DRIVER_DATE "0" 48 1.1 riastrad 49 1.1 riastrad #define DRIVER_MAJOR 0 50 1.3 riastrad #define DRIVER_MINOR 1 51 1.3 riastrad #define DRIVER_PATCHLEVEL 0 52 1.1 riastrad 53 1.3 riastrad struct virtio_gpu_object_params { 54 1.3 riastrad uint32_t format; 55 1.3 riastrad uint32_t width; 56 1.3 riastrad uint32_t height; 57 1.3 riastrad unsigned long size; 58 1.3 riastrad bool dumb; 59 1.3 riastrad /* 3d */ 60 1.3 riastrad bool virgl; 61 1.3 riastrad uint32_t target; 62 1.3 riastrad uint32_t bind; 63 1.3 riastrad uint32_t depth; 64 1.3 riastrad uint32_t array_size; 65 1.3 riastrad uint32_t last_level; 66 1.3 riastrad uint32_t nr_samples; 67 1.3 riastrad uint32_t flags; 68 1.3 riastrad }; 69 1.1 riastrad 70 1.1 riastrad struct virtio_gpu_object { 71 1.3 riastrad struct drm_gem_shmem_object base; 72 1.1 riastrad uint32_t hw_res_handle; 73 1.1 riastrad 74 1.1 riastrad struct sg_table *pages; 75 1.3 riastrad uint32_t mapped; 76 1.1 riastrad bool dumb; 77 1.3 riastrad bool created; 78 1.1 riastrad }; 79 1.1 riastrad #define gem_to_virtio_gpu_obj(gobj) \ 80 1.3 riastrad container_of((gobj), struct virtio_gpu_object, base.base) 81 1.3 riastrad 82 1.3 riastrad struct virtio_gpu_object_array { 83 1.3 riastrad struct ww_acquire_ctx ticket; 84 1.3 riastrad struct list_head next; 85 1.3 riastrad u32 nents, total; 86 1.3 riastrad struct drm_gem_object *objs[]; 87 1.3 riastrad }; 88 1.1 riastrad 89 1.1 riastrad struct virtio_gpu_vbuffer; 90 1.1 riastrad struct virtio_gpu_device; 91 1.1 riastrad 92 1.1 riastrad typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 93 1.1 riastrad struct virtio_gpu_vbuffer *vbuf); 94 1.1 riastrad 95 1.1 riastrad struct virtio_gpu_fence_driver { 96 1.1 riastrad atomic64_t last_seq; 97 1.1 riastrad uint64_t sync_seq; 98 1.3 riastrad uint64_t context; 99 1.1 riastrad struct list_head fences; 100 1.1 riastrad spinlock_t lock; 101 1.1 riastrad }; 102 1.1 riastrad 103 1.1 riastrad struct virtio_gpu_fence { 104 1.3 riastrad struct dma_fence f; 105 1.1 riastrad struct virtio_gpu_fence_driver *drv; 106 1.1 riastrad struct list_head node; 107 1.1 riastrad }; 108 1.1 riastrad 109 1.1 riastrad struct virtio_gpu_vbuffer { 110 1.1 riastrad char *buf; 111 1.1 riastrad int size; 112 1.1 riastrad 113 1.1 riastrad void *data_buf; 114 1.1 riastrad uint32_t data_size; 115 1.1 riastrad 116 1.1 riastrad char *resp_buf; 117 1.1 riastrad int resp_size; 118 1.1 riastrad virtio_gpu_resp_cb resp_cb; 119 1.1 riastrad 120 1.3 riastrad struct virtio_gpu_object_array *objs; 121 1.1 riastrad struct list_head list; 122 1.1 riastrad }; 123 1.1 riastrad 124 1.1 riastrad struct virtio_gpu_output { 125 1.1 riastrad int index; 126 1.1 riastrad struct drm_crtc crtc; 127 1.1 riastrad struct drm_connector conn; 128 1.1 riastrad struct drm_encoder enc; 129 1.1 riastrad struct virtio_gpu_display_one info; 130 1.1 riastrad struct virtio_gpu_update_cursor cursor; 131 1.3 riastrad struct edid *edid; 132 1.1 riastrad int cur_x; 133 1.1 riastrad int cur_y; 134 1.3 riastrad bool enabled; 135 1.1 riastrad }; 136 1.1 riastrad #define drm_crtc_to_virtio_gpu_output(x) \ 137 1.1 riastrad container_of(x, struct virtio_gpu_output, crtc) 138 1.1 riastrad 139 1.1 riastrad struct virtio_gpu_framebuffer { 140 1.1 riastrad struct drm_framebuffer base; 141 1.3 riastrad struct virtio_gpu_fence *fence; 142 1.1 riastrad }; 143 1.1 riastrad #define to_virtio_gpu_framebuffer(x) \ 144 1.1 riastrad container_of(x, struct virtio_gpu_framebuffer, base) 145 1.1 riastrad 146 1.1 riastrad struct virtio_gpu_queue { 147 1.1 riastrad struct virtqueue *vq; 148 1.1 riastrad spinlock_t qlock; 149 1.1 riastrad wait_queue_head_t ack_queue; 150 1.1 riastrad struct work_struct dequeue_work; 151 1.1 riastrad }; 152 1.1 riastrad 153 1.1 riastrad struct virtio_gpu_drv_capset { 154 1.1 riastrad uint32_t id; 155 1.1 riastrad uint32_t max_version; 156 1.1 riastrad uint32_t max_size; 157 1.1 riastrad }; 158 1.1 riastrad 159 1.1 riastrad struct virtio_gpu_drv_cap_cache { 160 1.1 riastrad struct list_head head; 161 1.1 riastrad void *caps_cache; 162 1.1 riastrad uint32_t id; 163 1.1 riastrad uint32_t version; 164 1.1 riastrad uint32_t size; 165 1.1 riastrad atomic_t is_valid; 166 1.1 riastrad }; 167 1.1 riastrad 168 1.1 riastrad struct virtio_gpu_device { 169 1.1 riastrad struct device *dev; 170 1.1 riastrad struct drm_device *ddev; 171 1.1 riastrad 172 1.1 riastrad struct virtio_device *vdev; 173 1.1 riastrad 174 1.1 riastrad struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 175 1.1 riastrad uint32_t num_scanouts; 176 1.1 riastrad 177 1.1 riastrad struct virtio_gpu_queue ctrlq; 178 1.1 riastrad struct virtio_gpu_queue cursorq; 179 1.3 riastrad struct kmem_cache *vbufs; 180 1.1 riastrad bool vqs_ready; 181 1.1 riastrad 182 1.3 riastrad bool disable_notify; 183 1.3 riastrad bool pending_notify; 184 1.3 riastrad 185 1.3 riastrad struct ida resource_ida; 186 1.1 riastrad 187 1.1 riastrad wait_queue_head_t resp_wq; 188 1.1 riastrad /* current display info */ 189 1.1 riastrad spinlock_t display_info_lock; 190 1.1 riastrad bool display_info_pending; 191 1.1 riastrad 192 1.1 riastrad struct virtio_gpu_fence_driver fence_drv; 193 1.1 riastrad 194 1.3 riastrad struct ida ctx_id_ida; 195 1.1 riastrad 196 1.1 riastrad bool has_virgl_3d; 197 1.3 riastrad bool has_edid; 198 1.1 riastrad 199 1.1 riastrad struct work_struct config_changed_work; 200 1.1 riastrad 201 1.3 riastrad struct work_struct obj_free_work; 202 1.3 riastrad spinlock_t obj_free_lock; 203 1.3 riastrad struct list_head obj_free_list; 204 1.3 riastrad 205 1.1 riastrad struct virtio_gpu_drv_capset *capsets; 206 1.1 riastrad uint32_t num_capsets; 207 1.1 riastrad struct list_head cap_cache; 208 1.1 riastrad }; 209 1.1 riastrad 210 1.1 riastrad struct virtio_gpu_fpriv { 211 1.1 riastrad uint32_t ctx_id; 212 1.1 riastrad }; 213 1.1 riastrad 214 1.1 riastrad /* virtio_ioctl.c */ 215 1.1 riastrad #define DRM_VIRTIO_NUM_IOCTLS 10 216 1.1 riastrad extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 217 1.1 riastrad 218 1.1 riastrad /* virtio_kms.c */ 219 1.3 riastrad int virtio_gpu_init(struct drm_device *dev); 220 1.3 riastrad void virtio_gpu_deinit(struct drm_device *dev); 221 1.1 riastrad int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 222 1.1 riastrad void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 223 1.1 riastrad 224 1.1 riastrad /* virtio_gem.c */ 225 1.1 riastrad void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj); 226 1.1 riastrad int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev); 227 1.1 riastrad void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev); 228 1.1 riastrad int virtio_gpu_gem_create(struct drm_file *file, 229 1.1 riastrad struct drm_device *dev, 230 1.3 riastrad struct virtio_gpu_object_params *params, 231 1.1 riastrad struct drm_gem_object **obj_p, 232 1.1 riastrad uint32_t *handle_p); 233 1.1 riastrad int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 234 1.1 riastrad struct drm_file *file); 235 1.1 riastrad void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 236 1.1 riastrad struct drm_file *file); 237 1.1 riastrad int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 238 1.1 riastrad struct drm_device *dev, 239 1.1 riastrad struct drm_mode_create_dumb *args); 240 1.1 riastrad int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 241 1.1 riastrad struct drm_device *dev, 242 1.1 riastrad uint32_t handle, uint64_t *offset_p); 243 1.1 riastrad 244 1.3 riastrad struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 245 1.3 riastrad struct virtio_gpu_object_array* 246 1.3 riastrad virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 247 1.3 riastrad void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 248 1.3 riastrad struct drm_gem_object *obj); 249 1.3 riastrad int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 250 1.3 riastrad void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 251 1.3 riastrad void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 252 1.3 riastrad struct dma_fence *fence); 253 1.3 riastrad void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 254 1.3 riastrad void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 255 1.3 riastrad struct virtio_gpu_object_array *objs); 256 1.3 riastrad void virtio_gpu_array_put_free_work(struct work_struct *work); 257 1.3 riastrad 258 1.1 riastrad /* virtio vg */ 259 1.1 riastrad int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 260 1.1 riastrad void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 261 1.1 riastrad void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 262 1.3 riastrad struct virtio_gpu_object *bo, 263 1.3 riastrad struct virtio_gpu_object_params *params, 264 1.3 riastrad struct virtio_gpu_object_array *objs, 265 1.3 riastrad struct virtio_gpu_fence *fence); 266 1.1 riastrad void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 267 1.1 riastrad uint32_t resource_id); 268 1.1 riastrad void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 269 1.3 riastrad uint64_t offset, 270 1.3 riastrad uint32_t width, uint32_t height, 271 1.3 riastrad uint32_t x, uint32_t y, 272 1.3 riastrad struct virtio_gpu_object_array *objs, 273 1.3 riastrad struct virtio_gpu_fence *fence); 274 1.1 riastrad void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 275 1.1 riastrad uint32_t resource_id, 276 1.1 riastrad uint32_t x, uint32_t y, 277 1.1 riastrad uint32_t width, uint32_t height); 278 1.1 riastrad void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 279 1.1 riastrad uint32_t scanout_id, uint32_t resource_id, 280 1.1 riastrad uint32_t width, uint32_t height, 281 1.1 riastrad uint32_t x, uint32_t y); 282 1.1 riastrad int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 283 1.1 riastrad struct virtio_gpu_object *obj, 284 1.3 riastrad struct virtio_gpu_fence *fence); 285 1.3 riastrad void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev, 286 1.3 riastrad struct virtio_gpu_object *obj); 287 1.1 riastrad int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 288 1.1 riastrad int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 289 1.1 riastrad void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 290 1.1 riastrad struct virtio_gpu_output *output); 291 1.1 riastrad int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 292 1.1 riastrad int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 293 1.1 riastrad int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 294 1.1 riastrad int idx, int version, 295 1.1 riastrad struct virtio_gpu_drv_cap_cache **cache_p); 296 1.3 riastrad int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 297 1.1 riastrad void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 298 1.1 riastrad uint32_t nlen, const char *name); 299 1.1 riastrad void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 300 1.1 riastrad uint32_t id); 301 1.1 riastrad void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 302 1.1 riastrad uint32_t ctx_id, 303 1.3 riastrad struct virtio_gpu_object_array *objs); 304 1.1 riastrad void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 305 1.1 riastrad uint32_t ctx_id, 306 1.3 riastrad struct virtio_gpu_object_array *objs); 307 1.1 riastrad void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 308 1.1 riastrad void *data, uint32_t data_size, 309 1.3 riastrad uint32_t ctx_id, 310 1.3 riastrad struct virtio_gpu_object_array *objs, 311 1.3 riastrad struct virtio_gpu_fence *fence); 312 1.1 riastrad void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 313 1.3 riastrad uint32_t ctx_id, 314 1.1 riastrad uint64_t offset, uint32_t level, 315 1.3 riastrad struct drm_virtgpu_3d_box *box, 316 1.3 riastrad struct virtio_gpu_object_array *objs, 317 1.3 riastrad struct virtio_gpu_fence *fence); 318 1.1 riastrad void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 319 1.3 riastrad uint32_t ctx_id, 320 1.1 riastrad uint64_t offset, uint32_t level, 321 1.3 riastrad struct drm_virtgpu_3d_box *box, 322 1.3 riastrad struct virtio_gpu_object_array *objs, 323 1.3 riastrad struct virtio_gpu_fence *fence); 324 1.1 riastrad void 325 1.1 riastrad virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 326 1.3 riastrad struct virtio_gpu_object *bo, 327 1.3 riastrad struct virtio_gpu_object_params *params, 328 1.3 riastrad struct virtio_gpu_object_array *objs, 329 1.3 riastrad struct virtio_gpu_fence *fence); 330 1.1 riastrad void virtio_gpu_ctrl_ack(struct virtqueue *vq); 331 1.1 riastrad void virtio_gpu_cursor_ack(struct virtqueue *vq); 332 1.1 riastrad void virtio_gpu_fence_ack(struct virtqueue *vq); 333 1.1 riastrad void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 334 1.1 riastrad void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 335 1.1 riastrad void virtio_gpu_dequeue_fence_func(struct work_struct *work); 336 1.1 riastrad 337 1.3 riastrad void virtio_gpu_disable_notify(struct virtio_gpu_device *vgdev); 338 1.3 riastrad void virtio_gpu_enable_notify(struct virtio_gpu_device *vgdev); 339 1.3 riastrad 340 1.1 riastrad /* virtio_gpu_display.c */ 341 1.3 riastrad void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 342 1.1 riastrad void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 343 1.1 riastrad 344 1.1 riastrad /* virtio_gpu_plane.c */ 345 1.3 riastrad uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 346 1.1 riastrad struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 347 1.3 riastrad enum drm_plane_type type, 348 1.1 riastrad int index); 349 1.1 riastrad 350 1.1 riastrad /* virtio_gpu_fence.c */ 351 1.3 riastrad struct virtio_gpu_fence *virtio_gpu_fence_alloc( 352 1.3 riastrad struct virtio_gpu_device *vgdev); 353 1.3 riastrad void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 354 1.1 riastrad struct virtio_gpu_ctrl_hdr *cmd_hdr, 355 1.3 riastrad struct virtio_gpu_fence *fence); 356 1.1 riastrad void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 357 1.1 riastrad u64 last_seq); 358 1.1 riastrad 359 1.1 riastrad /* virtio_gpu_object */ 360 1.3 riastrad struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 361 1.3 riastrad size_t size); 362 1.1 riastrad int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 363 1.3 riastrad struct virtio_gpu_object_params *params, 364 1.3 riastrad struct virtio_gpu_object **bo_ptr, 365 1.3 riastrad struct virtio_gpu_fence *fence); 366 1.1 riastrad /* virtgpu_prime.c */ 367 1.1 riastrad struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 368 1.3 riastrad struct drm_device *dev, struct dma_buf_attachment *attach, 369 1.3 riastrad struct sg_table *sgt); 370 1.1 riastrad 371 1.3 riastrad /* virgl debugfs */ 372 1.1 riastrad int virtio_gpu_debugfs_init(struct drm_minor *minor); 373 1.1 riastrad 374 1.1 riastrad #endif 375