1 1.1 riastrad /* $NetBSD: virtgpu_ioctl.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $ */ 2 1.1 riastrad 3 1.1 riastrad /* 4 1.1 riastrad * Copyright (C) 2015 Red Hat, Inc. 5 1.1 riastrad * All Rights Reserved. 6 1.1 riastrad * 7 1.1 riastrad * Authors: 8 1.1 riastrad * Dave Airlie 9 1.1 riastrad * Alon Levy 10 1.1 riastrad * 11 1.1 riastrad * Permission is hereby granted, free of charge, to any person obtaining a 12 1.1 riastrad * copy of this software and associated documentation files (the "Software"), 13 1.1 riastrad * to deal in the Software without restriction, including without limitation 14 1.1 riastrad * the rights to use, copy, modify, merge, publish, distribute, sublicense, 15 1.1 riastrad * and/or sell copies of the Software, and to permit persons to whom the 16 1.1 riastrad * Software is furnished to do so, subject to the following conditions: 17 1.1 riastrad * 18 1.1 riastrad * The above copyright notice and this permission notice shall be included in 19 1.1 riastrad * all copies or substantial portions of the Software. 20 1.1 riastrad * 21 1.1 riastrad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 1.1 riastrad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 1.1 riastrad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24 1.1 riastrad * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 25 1.1 riastrad * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 26 1.1 riastrad * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 27 1.1 riastrad * OTHER DEALINGS IN THE SOFTWARE. 28 1.1 riastrad */ 29 1.1 riastrad 30 1.1 riastrad #include <sys/cdefs.h> 31 1.1 riastrad __KERNEL_RCSID(0, "$NetBSD: virtgpu_ioctl.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $"); 32 1.1 riastrad 33 1.3 riastrad #include <linux/file.h> 34 1.3 riastrad #include <linux/sync_file.h> 35 1.3 riastrad 36 1.3 riastrad #include <drm/drm_file.h> 37 1.1 riastrad #include <drm/virtgpu_drm.h> 38 1.1 riastrad 39 1.3 riastrad #include "virtgpu_drv.h" 40 1.1 riastrad 41 1.1 riastrad static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data, 42 1.1 riastrad struct drm_file *file_priv) 43 1.1 riastrad { 44 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 45 1.1 riastrad struct drm_virtgpu_map *virtio_gpu_map = data; 46 1.1 riastrad 47 1.1 riastrad return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev, 48 1.1 riastrad virtio_gpu_map->handle, 49 1.1 riastrad &virtio_gpu_map->offset); 50 1.1 riastrad } 51 1.1 riastrad 52 1.3 riastrad /* 53 1.3 riastrad * Usage of execbuffer: 54 1.3 riastrad * Relocations need to take into account the full VIRTIO_GPUDrawable size. 55 1.3 riastrad * However, the command as passed from user space must *not* contain the initial 56 1.3 riastrad * VIRTIO_GPUReleaseInfo struct (first XXX bytes) 57 1.3 riastrad */ 58 1.3 riastrad static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, 59 1.1 riastrad struct drm_file *drm_file) 60 1.1 riastrad { 61 1.3 riastrad struct drm_virtgpu_execbuffer *exbuf = data; 62 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 63 1.1 riastrad struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv; 64 1.3 riastrad struct virtio_gpu_fence *out_fence; 65 1.1 riastrad int ret; 66 1.1 riastrad uint32_t *bo_handles = NULL; 67 1.1 riastrad void __user *user_bo_handles = NULL; 68 1.3 riastrad struct virtio_gpu_object_array *buflist = NULL; 69 1.3 riastrad struct sync_file *sync_file; 70 1.3 riastrad int in_fence_fd = exbuf->fence_fd; 71 1.3 riastrad int out_fence_fd = -1; 72 1.1 riastrad void *buf; 73 1.1 riastrad 74 1.1 riastrad if (vgdev->has_virgl_3d == false) 75 1.1 riastrad return -ENOSYS; 76 1.1 riastrad 77 1.3 riastrad if ((exbuf->flags & ~VIRTGPU_EXECBUF_FLAGS)) 78 1.3 riastrad return -EINVAL; 79 1.3 riastrad 80 1.3 riastrad exbuf->fence_fd = -1; 81 1.3 riastrad 82 1.3 riastrad if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) { 83 1.3 riastrad struct dma_fence *in_fence; 84 1.3 riastrad 85 1.3 riastrad in_fence = sync_file_get_fence(in_fence_fd); 86 1.3 riastrad 87 1.3 riastrad if (!in_fence) 88 1.3 riastrad return -EINVAL; 89 1.3 riastrad 90 1.3 riastrad /* 91 1.3 riastrad * Wait if the fence is from a foreign context, or if the fence 92 1.3 riastrad * array contains any fence from a foreign context. 93 1.3 riastrad */ 94 1.3 riastrad ret = 0; 95 1.3 riastrad if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context)) 96 1.3 riastrad ret = dma_fence_wait(in_fence, true); 97 1.3 riastrad 98 1.3 riastrad dma_fence_put(in_fence); 99 1.3 riastrad if (ret) 100 1.3 riastrad return ret; 101 1.3 riastrad } 102 1.3 riastrad 103 1.3 riastrad if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_OUT) { 104 1.3 riastrad out_fence_fd = get_unused_fd_flags(O_CLOEXEC); 105 1.3 riastrad if (out_fence_fd < 0) 106 1.3 riastrad return out_fence_fd; 107 1.3 riastrad } 108 1.3 riastrad 109 1.1 riastrad if (exbuf->num_bo_handles) { 110 1.3 riastrad bo_handles = kvmalloc_array(exbuf->num_bo_handles, 111 1.3 riastrad sizeof(uint32_t), GFP_KERNEL); 112 1.3 riastrad if (!bo_handles) { 113 1.3 riastrad ret = -ENOMEM; 114 1.3 riastrad goto out_unused_fd; 115 1.1 riastrad } 116 1.1 riastrad 117 1.3 riastrad user_bo_handles = u64_to_user_ptr(exbuf->bo_handles); 118 1.1 riastrad if (copy_from_user(bo_handles, user_bo_handles, 119 1.1 riastrad exbuf->num_bo_handles * sizeof(uint32_t))) { 120 1.1 riastrad ret = -EFAULT; 121 1.3 riastrad goto out_unused_fd; 122 1.1 riastrad } 123 1.1 riastrad 124 1.3 riastrad buflist = virtio_gpu_array_from_handles(drm_file, bo_handles, 125 1.3 riastrad exbuf->num_bo_handles); 126 1.3 riastrad if (!buflist) { 127 1.3 riastrad ret = -ENOENT; 128 1.3 riastrad goto out_unused_fd; 129 1.1 riastrad } 130 1.3 riastrad kvfree(bo_handles); 131 1.3 riastrad bo_handles = NULL; 132 1.1 riastrad } 133 1.1 riastrad 134 1.3 riastrad if (buflist) { 135 1.3 riastrad ret = virtio_gpu_array_lock_resv(buflist); 136 1.3 riastrad if (ret) 137 1.3 riastrad goto out_unused_fd; 138 1.3 riastrad } 139 1.1 riastrad 140 1.3 riastrad buf = vmemdup_user(u64_to_user_ptr(exbuf->command), exbuf->size); 141 1.3 riastrad if (IS_ERR(buf)) { 142 1.3 riastrad ret = PTR_ERR(buf); 143 1.1 riastrad goto out_unresv; 144 1.1 riastrad } 145 1.3 riastrad 146 1.3 riastrad out_fence = virtio_gpu_fence_alloc(vgdev); 147 1.3 riastrad if(!out_fence) { 148 1.3 riastrad ret = -ENOMEM; 149 1.3 riastrad goto out_memdup; 150 1.1 riastrad } 151 1.1 riastrad 152 1.3 riastrad if (out_fence_fd >= 0) { 153 1.3 riastrad sync_file = sync_file_create(&out_fence->f); 154 1.3 riastrad if (!sync_file) { 155 1.3 riastrad dma_fence_put(&out_fence->f); 156 1.3 riastrad ret = -ENOMEM; 157 1.3 riastrad goto out_memdup; 158 1.3 riastrad } 159 1.3 riastrad 160 1.3 riastrad exbuf->fence_fd = out_fence_fd; 161 1.3 riastrad fd_install(out_fence_fd, sync_file->file); 162 1.3 riastrad } 163 1.1 riastrad 164 1.3 riastrad virtio_gpu_cmd_submit(vgdev, buf, exbuf->size, 165 1.3 riastrad vfpriv->ctx_id, buflist, out_fence); 166 1.1 riastrad return 0; 167 1.1 riastrad 168 1.3 riastrad out_memdup: 169 1.3 riastrad kvfree(buf); 170 1.1 riastrad out_unresv: 171 1.3 riastrad if (buflist) 172 1.3 riastrad virtio_gpu_array_unlock_resv(buflist); 173 1.3 riastrad out_unused_fd: 174 1.3 riastrad kvfree(bo_handles); 175 1.3 riastrad if (buflist) 176 1.3 riastrad virtio_gpu_array_put_free(buflist); 177 1.3 riastrad 178 1.3 riastrad if (out_fence_fd >= 0) 179 1.3 riastrad put_unused_fd(out_fence_fd); 180 1.3 riastrad 181 1.1 riastrad return ret; 182 1.1 riastrad } 183 1.1 riastrad 184 1.1 riastrad static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data, 185 1.1 riastrad struct drm_file *file_priv) 186 1.1 riastrad { 187 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 188 1.1 riastrad struct drm_virtgpu_getparam *param = data; 189 1.1 riastrad int value; 190 1.1 riastrad 191 1.1 riastrad switch (param->param) { 192 1.1 riastrad case VIRTGPU_PARAM_3D_FEATURES: 193 1.1 riastrad value = vgdev->has_virgl_3d == true ? 1 : 0; 194 1.1 riastrad break; 195 1.1 riastrad case VIRTGPU_PARAM_CAPSET_QUERY_FIX: 196 1.1 riastrad value = 1; 197 1.1 riastrad break; 198 1.1 riastrad default: 199 1.1 riastrad return -EINVAL; 200 1.1 riastrad } 201 1.3 riastrad if (copy_to_user(u64_to_user_ptr(param->value), &value, sizeof(int))) 202 1.1 riastrad return -EFAULT; 203 1.3 riastrad 204 1.1 riastrad return 0; 205 1.1 riastrad } 206 1.1 riastrad 207 1.1 riastrad static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data, 208 1.1 riastrad struct drm_file *file_priv) 209 1.1 riastrad { 210 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 211 1.1 riastrad struct drm_virtgpu_resource_create *rc = data; 212 1.3 riastrad struct virtio_gpu_fence *fence; 213 1.1 riastrad int ret; 214 1.1 riastrad struct virtio_gpu_object *qobj; 215 1.1 riastrad struct drm_gem_object *obj; 216 1.1 riastrad uint32_t handle = 0; 217 1.3 riastrad struct virtio_gpu_object_params params = { 0 }; 218 1.1 riastrad 219 1.1 riastrad if (vgdev->has_virgl_3d == false) { 220 1.1 riastrad if (rc->depth > 1) 221 1.1 riastrad return -EINVAL; 222 1.1 riastrad if (rc->nr_samples > 1) 223 1.1 riastrad return -EINVAL; 224 1.1 riastrad if (rc->last_level > 1) 225 1.1 riastrad return -EINVAL; 226 1.1 riastrad if (rc->target != 2) 227 1.1 riastrad return -EINVAL; 228 1.1 riastrad if (rc->array_size > 1) 229 1.1 riastrad return -EINVAL; 230 1.1 riastrad } 231 1.1 riastrad 232 1.3 riastrad params.format = rc->format; 233 1.3 riastrad params.width = rc->width; 234 1.3 riastrad params.height = rc->height; 235 1.3 riastrad params.size = rc->size; 236 1.3 riastrad if (vgdev->has_virgl_3d) { 237 1.3 riastrad params.virgl = true; 238 1.3 riastrad params.target = rc->target; 239 1.3 riastrad params.bind = rc->bind; 240 1.3 riastrad params.depth = rc->depth; 241 1.3 riastrad params.array_size = rc->array_size; 242 1.3 riastrad params.last_level = rc->last_level; 243 1.3 riastrad params.nr_samples = rc->nr_samples; 244 1.3 riastrad params.flags = rc->flags; 245 1.3 riastrad } 246 1.1 riastrad /* allocate a single page size object */ 247 1.3 riastrad if (params.size == 0) 248 1.3 riastrad params.size = PAGE_SIZE; 249 1.1 riastrad 250 1.3 riastrad fence = virtio_gpu_fence_alloc(vgdev); 251 1.3 riastrad if (!fence) 252 1.3 riastrad return -ENOMEM; 253 1.3 riastrad ret = virtio_gpu_object_create(vgdev, ¶ms, &qobj, fence); 254 1.3 riastrad dma_fence_put(&fence->f); 255 1.3 riastrad if (ret < 0) 256 1.3 riastrad return ret; 257 1.3 riastrad obj = &qobj->base.base; 258 1.1 riastrad 259 1.1 riastrad ret = drm_gem_handle_create(file_priv, obj, &handle); 260 1.1 riastrad if (ret) { 261 1.1 riastrad drm_gem_object_release(obj); 262 1.1 riastrad return ret; 263 1.1 riastrad } 264 1.3 riastrad drm_gem_object_put_unlocked(obj); 265 1.1 riastrad 266 1.3 riastrad rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */ 267 1.1 riastrad rc->bo_handle = handle; 268 1.1 riastrad return 0; 269 1.1 riastrad } 270 1.1 riastrad 271 1.1 riastrad static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data, 272 1.1 riastrad struct drm_file *file_priv) 273 1.1 riastrad { 274 1.1 riastrad struct drm_virtgpu_resource_info *ri = data; 275 1.1 riastrad struct drm_gem_object *gobj = NULL; 276 1.1 riastrad struct virtio_gpu_object *qobj = NULL; 277 1.1 riastrad 278 1.3 riastrad gobj = drm_gem_object_lookup(file_priv, ri->bo_handle); 279 1.1 riastrad if (gobj == NULL) 280 1.1 riastrad return -ENOENT; 281 1.1 riastrad 282 1.1 riastrad qobj = gem_to_virtio_gpu_obj(gobj); 283 1.1 riastrad 284 1.3 riastrad ri->size = qobj->base.base.size; 285 1.1 riastrad ri->res_handle = qobj->hw_res_handle; 286 1.3 riastrad drm_gem_object_put_unlocked(gobj); 287 1.1 riastrad return 0; 288 1.1 riastrad } 289 1.1 riastrad 290 1.1 riastrad static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev, 291 1.1 riastrad void *data, 292 1.1 riastrad struct drm_file *file) 293 1.1 riastrad { 294 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 295 1.1 riastrad struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 296 1.1 riastrad struct drm_virtgpu_3d_transfer_from_host *args = data; 297 1.3 riastrad struct virtio_gpu_object_array *objs; 298 1.1 riastrad struct virtio_gpu_fence *fence; 299 1.1 riastrad int ret; 300 1.1 riastrad u32 offset = args->offset; 301 1.1 riastrad 302 1.1 riastrad if (vgdev->has_virgl_3d == false) 303 1.1 riastrad return -ENOSYS; 304 1.1 riastrad 305 1.3 riastrad objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1); 306 1.3 riastrad if (objs == NULL) 307 1.1 riastrad return -ENOENT; 308 1.1 riastrad 309 1.3 riastrad ret = virtio_gpu_array_lock_resv(objs); 310 1.3 riastrad if (ret != 0) 311 1.3 riastrad goto err_put_free; 312 1.1 riastrad 313 1.3 riastrad fence = virtio_gpu_fence_alloc(vgdev); 314 1.3 riastrad if (!fence) { 315 1.3 riastrad ret = -ENOMEM; 316 1.3 riastrad goto err_unlock; 317 1.3 riastrad } 318 1.3 riastrad virtio_gpu_cmd_transfer_from_host_3d 319 1.3 riastrad (vgdev, vfpriv->ctx_id, offset, args->level, 320 1.3 riastrad &args->box, objs, fence); 321 1.3 riastrad dma_fence_put(&fence->f); 322 1.3 riastrad return 0; 323 1.1 riastrad 324 1.3 riastrad err_unlock: 325 1.3 riastrad virtio_gpu_array_unlock_resv(objs); 326 1.3 riastrad err_put_free: 327 1.3 riastrad virtio_gpu_array_put_free(objs); 328 1.1 riastrad return ret; 329 1.1 riastrad } 330 1.1 riastrad 331 1.1 riastrad static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data, 332 1.1 riastrad struct drm_file *file) 333 1.1 riastrad { 334 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 335 1.1 riastrad struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 336 1.1 riastrad struct drm_virtgpu_3d_transfer_to_host *args = data; 337 1.3 riastrad struct virtio_gpu_object_array *objs; 338 1.1 riastrad struct virtio_gpu_fence *fence; 339 1.1 riastrad int ret; 340 1.1 riastrad u32 offset = args->offset; 341 1.1 riastrad 342 1.3 riastrad objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1); 343 1.3 riastrad if (objs == NULL) 344 1.1 riastrad return -ENOENT; 345 1.1 riastrad 346 1.1 riastrad if (!vgdev->has_virgl_3d) { 347 1.1 riastrad virtio_gpu_cmd_transfer_to_host_2d 348 1.3 riastrad (vgdev, offset, 349 1.3 riastrad args->box.w, args->box.h, args->box.x, args->box.y, 350 1.3 riastrad objs, NULL); 351 1.1 riastrad } else { 352 1.3 riastrad ret = virtio_gpu_array_lock_resv(objs); 353 1.3 riastrad if (ret != 0) 354 1.3 riastrad goto err_put_free; 355 1.3 riastrad 356 1.3 riastrad ret = -ENOMEM; 357 1.3 riastrad fence = virtio_gpu_fence_alloc(vgdev); 358 1.3 riastrad if (!fence) 359 1.3 riastrad goto err_unlock; 360 1.3 riastrad 361 1.1 riastrad virtio_gpu_cmd_transfer_to_host_3d 362 1.3 riastrad (vgdev, 363 1.1 riastrad vfpriv ? vfpriv->ctx_id : 0, offset, 364 1.3 riastrad args->level, &args->box, objs, fence); 365 1.3 riastrad dma_fence_put(&fence->f); 366 1.1 riastrad } 367 1.3 riastrad return 0; 368 1.1 riastrad 369 1.3 riastrad err_unlock: 370 1.3 riastrad virtio_gpu_array_unlock_resv(objs); 371 1.3 riastrad err_put_free: 372 1.3 riastrad virtio_gpu_array_put_free(objs); 373 1.1 riastrad return ret; 374 1.1 riastrad } 375 1.1 riastrad 376 1.1 riastrad static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data, 377 1.3 riastrad struct drm_file *file) 378 1.1 riastrad { 379 1.1 riastrad struct drm_virtgpu_3d_wait *args = data; 380 1.3 riastrad struct drm_gem_object *obj; 381 1.3 riastrad long timeout = 15 * HZ; 382 1.1 riastrad int ret; 383 1.1 riastrad 384 1.3 riastrad obj = drm_gem_object_lookup(file, args->handle); 385 1.3 riastrad if (obj == NULL) 386 1.1 riastrad return -ENOENT; 387 1.1 riastrad 388 1.3 riastrad if (args->flags & VIRTGPU_WAIT_NOWAIT) { 389 1.3 riastrad ret = dma_resv_test_signaled_rcu(obj->resv, true); 390 1.3 riastrad } else { 391 1.3 riastrad ret = dma_resv_wait_timeout_rcu(obj->resv, true, true, 392 1.3 riastrad timeout); 393 1.3 riastrad } 394 1.3 riastrad if (ret == 0) 395 1.3 riastrad ret = -EBUSY; 396 1.3 riastrad else if (ret > 0) 397 1.3 riastrad ret = 0; 398 1.1 riastrad 399 1.3 riastrad drm_gem_object_put_unlocked(obj); 400 1.1 riastrad return ret; 401 1.1 riastrad } 402 1.1 riastrad 403 1.1 riastrad static int virtio_gpu_get_caps_ioctl(struct drm_device *dev, 404 1.1 riastrad void *data, struct drm_file *file) 405 1.1 riastrad { 406 1.1 riastrad struct virtio_gpu_device *vgdev = dev->dev_private; 407 1.1 riastrad struct drm_virtgpu_get_caps *args = data; 408 1.1 riastrad unsigned size, host_caps_size; 409 1.1 riastrad int i; 410 1.1 riastrad int found_valid = -1; 411 1.1 riastrad int ret; 412 1.1 riastrad struct virtio_gpu_drv_cap_cache *cache_ent; 413 1.1 riastrad void *ptr; 414 1.3 riastrad 415 1.1 riastrad if (vgdev->num_capsets == 0) 416 1.1 riastrad return -ENOSYS; 417 1.1 riastrad 418 1.1 riastrad /* don't allow userspace to pass 0 */ 419 1.1 riastrad if (args->size == 0) 420 1.1 riastrad return -EINVAL; 421 1.1 riastrad 422 1.1 riastrad spin_lock(&vgdev->display_info_lock); 423 1.1 riastrad for (i = 0; i < vgdev->num_capsets; i++) { 424 1.1 riastrad if (vgdev->capsets[i].id == args->cap_set_id) { 425 1.1 riastrad if (vgdev->capsets[i].max_version >= args->cap_set_ver) { 426 1.1 riastrad found_valid = i; 427 1.1 riastrad break; 428 1.1 riastrad } 429 1.1 riastrad } 430 1.1 riastrad } 431 1.1 riastrad 432 1.1 riastrad if (found_valid == -1) { 433 1.1 riastrad spin_unlock(&vgdev->display_info_lock); 434 1.1 riastrad return -EINVAL; 435 1.1 riastrad } 436 1.1 riastrad 437 1.1 riastrad host_caps_size = vgdev->capsets[found_valid].max_size; 438 1.1 riastrad /* only copy to user the minimum of the host caps size or the guest caps size */ 439 1.1 riastrad size = min(args->size, host_caps_size); 440 1.1 riastrad 441 1.1 riastrad list_for_each_entry(cache_ent, &vgdev->cap_cache, head) { 442 1.1 riastrad if (cache_ent->id == args->cap_set_id && 443 1.1 riastrad cache_ent->version == args->cap_set_ver) { 444 1.1 riastrad spin_unlock(&vgdev->display_info_lock); 445 1.1 riastrad goto copy_exit; 446 1.1 riastrad } 447 1.1 riastrad } 448 1.1 riastrad spin_unlock(&vgdev->display_info_lock); 449 1.1 riastrad 450 1.1 riastrad /* not in cache - need to talk to hw */ 451 1.1 riastrad virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver, 452 1.1 riastrad &cache_ent); 453 1.1 riastrad 454 1.3 riastrad copy_exit: 455 1.1 riastrad ret = wait_event_timeout(vgdev->resp_wq, 456 1.1 riastrad atomic_read(&cache_ent->is_valid), 5 * HZ); 457 1.3 riastrad if (!ret) 458 1.3 riastrad return -EBUSY; 459 1.3 riastrad 460 1.3 riastrad /* is_valid check must proceed before copy of the cache entry. */ 461 1.3 riastrad smp_rmb(); 462 1.1 riastrad 463 1.1 riastrad ptr = cache_ent->caps_cache; 464 1.1 riastrad 465 1.3 riastrad if (copy_to_user(u64_to_user_ptr(args->addr), ptr, size)) 466 1.1 riastrad return -EFAULT; 467 1.1 riastrad 468 1.1 riastrad return 0; 469 1.1 riastrad } 470 1.1 riastrad 471 1.1 riastrad struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = { 472 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl, 473 1.3 riastrad DRM_RENDER_ALLOW), 474 1.1 riastrad 475 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl, 476 1.3 riastrad DRM_RENDER_ALLOW), 477 1.1 riastrad 478 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl, 479 1.3 riastrad DRM_RENDER_ALLOW), 480 1.1 riastrad 481 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE, 482 1.1 riastrad virtio_gpu_resource_create_ioctl, 483 1.3 riastrad DRM_RENDER_ALLOW), 484 1.1 riastrad 485 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl, 486 1.3 riastrad DRM_RENDER_ALLOW), 487 1.1 riastrad 488 1.1 riastrad /* make transfer async to the main ring? - no sure, can we 489 1.3 riastrad * thread these in the underlying GL 490 1.3 riastrad */ 491 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST, 492 1.1 riastrad virtio_gpu_transfer_from_host_ioctl, 493 1.3 riastrad DRM_RENDER_ALLOW), 494 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST, 495 1.1 riastrad virtio_gpu_transfer_to_host_ioctl, 496 1.3 riastrad DRM_RENDER_ALLOW), 497 1.1 riastrad 498 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl, 499 1.3 riastrad DRM_RENDER_ALLOW), 500 1.1 riastrad 501 1.1 riastrad DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl, 502 1.3 riastrad DRM_RENDER_ALLOW), 503 1.1 riastrad }; 504