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      1  1.11       tnn /*	$NetBSD: drm_cache.h,v 1.11 2022/05/21 23:42:13 tnn Exp $	*/
      2   1.2  riastrad 
      3   1.1  riastrad /**************************************************************************
      4   1.1  riastrad  *
      5   1.1  riastrad  * Copyright 2009 Red Hat Inc.
      6   1.1  riastrad  * All Rights Reserved.
      7   1.1  riastrad  *
      8   1.1  riastrad  * Permission is hereby granted, free of charge, to any person obtaining a
      9   1.1  riastrad  * copy of this software and associated documentation files (the
     10   1.1  riastrad  * "Software"), to deal in the Software without restriction, including
     11   1.1  riastrad  * without limitation the rights to use, copy, modify, merge, publish,
     12   1.1  riastrad  * distribute, sub license, and/or sell copies of the Software, and to
     13   1.1  riastrad  * permit persons to whom the Software is furnished to do so, subject to
     14   1.1  riastrad  * the following conditions:
     15   1.1  riastrad  *
     16   1.1  riastrad  * The above copyright notice and this permission notice (including the
     17   1.1  riastrad  * next paragraph) shall be included in all copies or substantial portions
     18   1.1  riastrad  * of the Software.
     19   1.1  riastrad  *
     20   1.1  riastrad  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     21   1.1  riastrad  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     22   1.1  riastrad  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     23   1.1  riastrad  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
     24   1.1  riastrad  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     25   1.1  riastrad  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     26   1.1  riastrad  * USE OR OTHER DEALINGS IN THE SOFTWARE.
     27   1.1  riastrad  *
     28   1.1  riastrad  *
     29   1.1  riastrad  **************************************************************************/
     30   1.1  riastrad /*
     31   1.1  riastrad  * Authors:
     32   1.1  riastrad  * Dave Airlie <airlied (at) redhat.com>
     33   1.1  riastrad  */
     34   1.1  riastrad 
     35   1.1  riastrad #ifndef _DRM_CACHE_H_
     36   1.1  riastrad #define _DRM_CACHE_H_
     37   1.1  riastrad 
     38   1.5  riastrad #include <linux/scatterlist.h>
     39   1.4  jmcneill 
     40   1.7  riastrad struct page;
     41   1.7  riastrad 
     42   1.1  riastrad void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
     43   1.5  riastrad void drm_clflush_sg(struct sg_table *st);
     44   1.5  riastrad void drm_clflush_virt_range(void *addr, unsigned long length);
     45   1.5  riastrad bool drm_need_swiotlb(int dma_bits);
     46   1.5  riastrad 
     47   1.1  riastrad 
     48   1.2  riastrad static inline bool drm_arch_can_wc_memory(void)
     49   1.2  riastrad {
     50   1.2  riastrad #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
     51   1.2  riastrad 	return false;
     52   1.5  riastrad #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON64)
     53   1.5  riastrad 	return false;
     54   1.5  riastrad #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
     55   1.5  riastrad 	/*
     56   1.5  riastrad 	 * The DRM driver stack is designed to work with cache coherent devices
     57   1.5  riastrad 	 * only, but permits an optimization to be enabled in some cases, where
     58   1.5  riastrad 	 * for some buffers, both the CPU and the GPU use uncached mappings,
     59   1.5  riastrad 	 * removing the need for DMA snooping and allocation in the CPU caches.
     60   1.5  riastrad 	 *
     61   1.5  riastrad 	 * The use of uncached GPU mappings relies on the correct implementation
     62   1.5  riastrad 	 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
     63   1.5  riastrad 	 * will use cached mappings nonetheless. On x86 platforms, this does not
     64   1.5  riastrad 	 * seem to matter, as uncached CPU mappings will snoop the caches in any
     65   1.5  riastrad 	 * case. However, on ARM and arm64, enabling this optimization on a
     66   1.5  riastrad 	 * platform where NoSnoop is ignored results in loss of coherency, which
     67   1.5  riastrad 	 * breaks correct operation of the device. Since we have no way of
     68   1.5  riastrad 	 * detecting whether NoSnoop works or not, just disable this
     69   1.5  riastrad 	 * optimization entirely for ARM and arm64.
     70   1.5  riastrad 	 */
     71   1.2  riastrad 	return false;
     72   1.2  riastrad #else
     73   1.2  riastrad 	return true;
     74   1.2  riastrad #endif
     75   1.2  riastrad }
     76   1.2  riastrad 
     77   1.1  riastrad #endif
     78