gpu_scheduler.h revision 1.3 1 /* $NetBSD: gpu_scheduler.h,v 1.3 2021/12/19 10:59:03 riastradh Exp $ */
2
3 /*
4 * Copyright 2015 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #ifndef _DRM_GPU_SCHEDULER_H_
27 #define _DRM_GPU_SCHEDULER_H_
28
29 #include <drm/spsc_queue.h>
30 #include <drm/drm_wait_netbsd.h>
31 #include <linux/dma-fence.h>
32 #include <linux/completion.h>
33 #include <linux/workqueue.h>
34
35 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
36
37 struct drm_gpu_scheduler;
38 struct drm_sched_rq;
39
40 enum drm_sched_priority {
41 DRM_SCHED_PRIORITY_MIN,
42 DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN,
43 DRM_SCHED_PRIORITY_NORMAL,
44 DRM_SCHED_PRIORITY_HIGH_SW,
45 DRM_SCHED_PRIORITY_HIGH_HW,
46 DRM_SCHED_PRIORITY_KERNEL,
47 DRM_SCHED_PRIORITY_MAX,
48 DRM_SCHED_PRIORITY_INVALID = -1,
49 DRM_SCHED_PRIORITY_UNSET = -2
50 };
51
52 /**
53 * struct drm_sched_entity - A wrapper around a job queue (typically
54 * attached to the DRM file_priv).
55 *
56 * @list: used to append this struct to the list of entities in the
57 * runqueue.
58 * @rq: runqueue on which this entity is currently scheduled.
59 * @sched_list: A list of schedulers (drm_gpu_schedulers).
60 * Jobs from this entity can be scheduled on any scheduler
61 * on this list.
62 * @num_sched_list: number of drm_gpu_schedulers in the sched_list.
63 * @rq_lock: lock to modify the runqueue to which this entity belongs.
64 * @job_queue: the list of jobs of this entity.
65 * @fence_seq: a linearly increasing seqno incremented with each
66 * new &drm_sched_fence which is part of the entity.
67 * @fence_context: a unique context for all the fences which belong
68 * to this entity.
69 * The &drm_sched_fence.scheduled uses the
70 * fence_context but &drm_sched_fence.finished uses
71 * fence_context + 1.
72 * @dependency: the dependency fence of the job which is on the top
73 * of the job queue.
74 * @cb: callback for the dependency fence above.
75 * @guilty: points to ctx's guilty.
76 * @fini_status: contains the exit status in case the process was signalled.
77 * @last_scheduled: points to the finished fence of the last scheduled job.
78 * @last_user: last group leader pushing a job into the entity.
79 * @stopped: Marks the enity as removed from rq and destined for termination.
80 * @entity_idle: Signals when enityt is not in use
81 *
82 * Entities will emit jobs in order to their corresponding hardware
83 * ring, and the scheduler will alternate between entities based on
84 * scheduling policy.
85 */
86 struct drm_sched_entity {
87 struct list_head list;
88 struct drm_sched_rq *rq;
89 struct drm_gpu_scheduler **sched_list;
90 unsigned int num_sched_list;
91 enum drm_sched_priority priority;
92 spinlock_t rq_lock;
93
94 struct spsc_queue job_queue;
95
96 atomic_t fence_seq;
97 uint64_t fence_context;
98
99 struct dma_fence *dependency;
100 struct dma_fence_cb cb;
101 atomic_t *guilty;
102 struct dma_fence *last_scheduled;
103 struct task_struct *last_user;
104 bool stopped;
105 struct completion entity_idle;
106 };
107
108 /**
109 * struct drm_sched_rq - queue of entities to be scheduled.
110 *
111 * @lock: to modify the entities list.
112 * @sched: the scheduler to which this rq belongs to.
113 * @entities: list of the entities to be scheduled.
114 * @current_entity: the entity which is to be scheduled.
115 *
116 * Run queue is a set of entities scheduling command submissions for
117 * one specific ring. It implements the scheduling policy that selects
118 * the next entity to emit commands from.
119 */
120 struct drm_sched_rq {
121 spinlock_t lock;
122 struct drm_gpu_scheduler *sched;
123 struct list_head entities;
124 struct drm_sched_entity *current_entity;
125 };
126
127 /**
128 * struct drm_sched_fence - fences corresponding to the scheduling of a job.
129 */
130 struct drm_sched_fence {
131 /**
132 * @scheduled: this fence is what will be signaled by the scheduler
133 * when the job is scheduled.
134 */
135 struct dma_fence scheduled;
136
137 /**
138 * @finished: this fence is what will be signaled by the scheduler
139 * when the job is completed.
140 *
141 * When setting up an out fence for the job, you should use
142 * this, since it's available immediately upon
143 * drm_sched_job_init(), and the fence returned by the driver
144 * from run_job() won't be created until the dependencies have
145 * resolved.
146 */
147 struct dma_fence finished;
148
149 /**
150 * @parent: the fence returned by &drm_sched_backend_ops.run_job
151 * when scheduling the job on hardware. We signal the
152 * &drm_sched_fence.finished fence once parent is signalled.
153 */
154 struct dma_fence *parent;
155 /**
156 * @sched: the scheduler instance to which the job having this struct
157 * belongs to.
158 */
159 struct drm_gpu_scheduler *sched;
160 /**
161 * @lock: the lock used by the scheduled and the finished fences.
162 */
163 spinlock_t lock;
164 /**
165 * @owner: job owner for debugging
166 */
167 void *owner;
168 };
169
170 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);
171
172 /**
173 * struct drm_sched_job - A job to be run by an entity.
174 *
175 * @queue_node: used to append this struct to the queue of jobs in an entity.
176 * @sched: the scheduler instance on which this job is scheduled.
177 * @s_fence: contains the fences for the scheduling of job.
178 * @finish_cb: the callback for the finished fence.
179 * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list.
180 * @id: a unique id assigned to each job scheduled on the scheduler.
181 * @karma: increment on every hang caused by this job. If this exceeds the hang
182 * limit of the scheduler then the job is marked guilty and will not
183 * be scheduled further.
184 * @s_priority: the priority of the job.
185 * @entity: the entity to which this job belongs.
186 * @cb: the callback for the parent fence in s_fence.
187 *
188 * A job is created by the driver using drm_sched_job_init(), and
189 * should call drm_sched_entity_push_job() once it wants the scheduler
190 * to schedule the job.
191 */
192 struct drm_sched_job {
193 struct spsc_node queue_node;
194 struct drm_gpu_scheduler *sched;
195 struct drm_sched_fence *s_fence;
196 struct dma_fence_cb finish_cb;
197 struct list_head node;
198 uint64_t id;
199 atomic_t karma;
200 enum drm_sched_priority s_priority;
201 struct drm_sched_entity *entity;
202 struct dma_fence_cb cb;
203 };
204
205 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
206 int threshold)
207 {
208 return (s_job && atomic_inc_return(&s_job->karma) > threshold);
209 }
210
211 /**
212 * struct drm_sched_backend_ops
213 *
214 * Define the backend operations called by the scheduler,
215 * these functions should be implemented in driver side.
216 */
217 struct drm_sched_backend_ops {
218 /**
219 * @dependency: Called when the scheduler is considering scheduling
220 * this job next, to get another struct dma_fence for this job to
221 * block on. Once it returns NULL, run_job() may be called.
222 */
223 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
224 struct drm_sched_entity *s_entity);
225
226 /**
227 * @run_job: Called to execute the job once all of the dependencies
228 * have been resolved. This may be called multiple times, if
229 * timedout_job() has happened and drm_sched_job_recovery()
230 * decides to try it again.
231 */
232 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);
233
234 /**
235 * @timedout_job: Called when a job has taken too long to execute,
236 * to trigger GPU recovery.
237 */
238 void (*timedout_job)(struct drm_sched_job *sched_job);
239
240 /**
241 * @free_job: Called once the job's finished fence has been signaled
242 * and it's time to clean it up.
243 */
244 void (*free_job)(struct drm_sched_job *sched_job);
245 };
246
247 /**
248 * struct drm_gpu_scheduler
249 *
250 * @ops: backend operations provided by the driver.
251 * @hw_submission_limit: the max size of the hardware queue.
252 * @timeout: the time after which a job is removed from the scheduler.
253 * @name: name of the ring for which this scheduler is being used.
254 * @sched_rq: priority wise array of run queues.
255 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job
256 * is ready to be scheduled.
257 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
258 * waits on this wait queue until all the scheduled jobs are
259 * finished.
260 * @hw_rq_count: the number of jobs currently in the hardware queue.
261 * @job_id_count: used to assign unique id to the each job.
262 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
263 * timeout interval is over.
264 * @thread: the kthread on which the scheduler which run.
265 * @ring_mirror_list: the list of jobs which are currently in the job queue.
266 * @job_list_lock: lock to protect the ring_mirror_list.
267 * @hang_limit: once the hangs by a job crosses this limit then it is marked
268 * guilty and it will be considered for scheduling further.
269 * @score: score to help loadbalancer pick a idle sched
270 * @ready: marks if the underlying HW is ready to work
271 * @free_guilty: A hit to time out handler to free the guilty job.
272 *
273 * One scheduler is implemented for each hardware ring.
274 */
275 struct drm_gpu_scheduler {
276 const struct drm_sched_backend_ops *ops;
277 uint32_t hw_submission_limit;
278 long timeout;
279 const char *name;
280 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX];
281 #ifdef __NetBSD__
282 drm_waitqueue_t wake_up_worker;
283 drm_waitqueue_t job_scheduled;
284 #else
285 wait_queue_head_t wake_up_worker;
286 wait_queue_head_t job_scheduled;
287 #endif
288 atomic_t hw_rq_count;
289 atomic64_t job_id_count;
290 struct delayed_work work_tdr;
291 struct task_struct *thread;
292 struct list_head ring_mirror_list;
293 spinlock_t job_list_lock;
294 int hang_limit;
295 atomic_t score;
296 bool ready;
297 bool free_guilty;
298 };
299
300 int drm_sched_init(struct drm_gpu_scheduler *sched,
301 const struct drm_sched_backend_ops *ops,
302 uint32_t hw_submission, unsigned hang_limit, long timeout,
303 const char *name);
304
305 void drm_sched_fini(struct drm_gpu_scheduler *sched);
306 int drm_sched_job_init(struct drm_sched_job *job,
307 struct drm_sched_entity *entity,
308 void *owner);
309 void drm_sched_job_cleanup(struct drm_sched_job *job);
310 void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
311 void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
312 void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
313 void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
314 void drm_sched_increase_karma(struct drm_sched_job *bad);
315 bool drm_sched_dependency_optimized(struct dma_fence* fence,
316 struct drm_sched_entity *entity);
317 void drm_sched_fault(struct drm_gpu_scheduler *sched);
318 void drm_sched_job_kickout(struct drm_sched_job *s_job);
319
320 void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
321 struct drm_sched_entity *entity);
322 void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
323 struct drm_sched_entity *entity);
324
325 int drm_sched_entity_init(struct drm_sched_entity *entity,
326 enum drm_sched_priority priority,
327 struct drm_gpu_scheduler **sched_list,
328 unsigned int num_sched_list,
329 atomic_t *guilty);
330 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
331 void drm_sched_entity_fini(struct drm_sched_entity *entity);
332 void drm_sched_entity_destroy(struct drm_sched_entity *entity);
333 void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
334 struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
335 void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
336 struct drm_sched_entity *entity);
337 void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
338 enum drm_sched_priority priority);
339 bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
340
341 struct drm_sched_fence *drm_sched_fence_create(
342 struct drm_sched_entity *s_entity, void *owner);
343 void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
344 void drm_sched_fence_finished(struct drm_sched_fence *fence);
345
346 unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
347 void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
348 unsigned long remaining);
349
350 #endif
351