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intel-gtt.h revision 1.3 
      1 /*	$NetBSD: intel-gtt.h,v 1.3 2014/05/28 16:13:02 riastradh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Taylor R. Campbell.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _DRM_INTEL_GTT_H_
     33 #define _DRM_INTEL_GTT_H_
     34 
     35 #include <sys/bus.h>
     36 
     37 #include "drm/bus_dma_hacks.h"
     38 
     39 #include <linux/pci.h>
     40 
     41 #include <drm/drm_agp_netbsd.h>
     42 
     43 struct intel_gtt {
     44 	/*
     45 	 * GMADR, graphics memory address, a.k.a. the `aperture'.
     46 	 * Access to bus addresses in the region starting here are
     47 	 * remapped to physical system memory addresses programmed into
     48 	 * the GTT (or GPU-local memory, for i810 chipsets, depending
     49 	 * on the GTT entries).  This corresponds to a prefix of the
     50 	 * GPU's virtual address space.  The virtual address space may
     51 	 * be larger: in that case, there will be more GTT entries than
     52 	 * pages in the aperture.
     53 	 */
     54 	paddr_t			gma_bus_addr;
     55 
     56 	/*
     57 	 * Number of bytes of system memory stolen by the graphics
     58 	 * device for frame buffer memory (but not for the GTT).  These
     59 	 * pages in memory -- if you know where they are -- can't be
     60 	 * used by the CPU, but they can be programmed into the GTT for
     61 	 * access from the GPU.
     62 	 */
     63 	unsigned int		stolen_size;
     64 
     65 	/*
     66 	 * Total number of GTT entries, including entries for the GPU's
     67 	 * virtual address space beyond the aperture.
     68 	 */
     69 	unsigned int		gtt_total_entries;
     70 
     71 	/*
     72 	 * Number of GTT entries for pages that we can actually map
     73 	 * into the aperture.
     74 	 */
     75 	unsigned int		gtt_mappable_entries;
     76 
     77 	/* Scratch page for unbound GTT entries.  */
     78 	bus_dma_segment_t	gtt_scratch_seg;
     79 	bus_dmamap_t		gtt_scratch_map;
     80 
     81 	/* Bus space handle for the GTT itself.  */
     82 	bus_space_handle_t	gtt_bsh;
     83 
     84 	/* IOMMU-related quirk for certain chipsets.  */
     85 	bool			do_idle_maps;
     86 };
     87 
     88 struct intel_gtt *
     89 	intel_gtt_get(void);
     90 int	intel_gmch_probe(struct pci_dev *, struct pci_dev *,
     91 	    struct agp_bridge_data *);
     92 void	intel_gmch_remove(void);
     93 bool	intel_enable_gtt(void);
     94 void	intel_gtt_chipset_flush(void);
     95 #ifndef __NetBSD__
     96 void	intel_gtt_insert_sg_entries(struct sg_table *, unsigned int,
     97 	    unsigned int);
     98 #endif
     99 void	intel_gtt_clear_range(unsigned int, unsigned int);
    100 
    101 #define	AGP_DCACHE_MEMORY	1
    102 #define	AGP_PHYS_MEMORY		2
    103 
    104 #define	AGP_USER_CACHED_MEMORY_GFDT	__BIT(3)
    105 
    106 extern int	intel_iommu_gfx_mapped;
    107 
    108 #endif  /* _DRM_INTEL_GTT_H_ */
    109