i915_trace.h revision 1.17
1 /* $NetBSD: i915_trace.h,v 1.17 2021/12/19 11:13:06 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2013, 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _I915_TRACE_H_ 33 #define _I915_TRACE_H_ 34 35 #include <sys/types.h> 36 #include <sys/sdt.h> 37 38 #include "i915_request.h" 39 #include "i915_drv.h" 40 41 /* Must come last. */ 42 #include <drm/drm_trace_netbsd.h> 43 44 DEFINE_TRACE3(i915,, cpu__fifo__underrun, 45 "enum pipe_drmhack"/*pipe*/, 46 "uint32_t"/*frame*/, 47 "uint32_t"/*scanline*/); 48 static inline void 49 trace_intel_cpu_fifo_underrun(struct drm_i915_private *dev_priv, 50 enum pipe pipe) 51 { 52 TRACE3(i915,, cpu__fifo__underrun, 53 pipe, 54 dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe), 55 intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe))); 56 } 57 58 DEFINE_TRACE3(i915,, pch__fifo__underrun, 59 "enum pipe_drmhack"/*pipe*/, 60 "uint32_t"/*frame*/, 61 "uint32_t"/*scanline*/); 62 static inline void 63 trace_intel_pch_fifo_underrun(struct drm_i915_private *dev_priv, 64 enum pipe pipe) 65 { 66 TRACE3(i915,, pch__fifo__underrun, 67 pipe, 68 dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe), 69 intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe))); 70 } 71 72 DEFINE_TRACE5(i915,, gem__evict, 73 "int"/*devno*/, 74 "struct i915_address_space *"/*vm*/, 75 "uint64_t"/*size*/, 76 "uint64_t"/*align*/, 77 "unsigned"/*flags*/); 78 static inline void 79 trace_i915_gem_evict(struct i915_address_space *vm, 80 uint64_t size, uint64_t align, unsigned flags) 81 { 82 TRACE5(i915,, gem__evict, 83 vm->i915->drm.primary->index, vm, size, align, flags); 84 } 85 86 DEFINE_TRACE6(i915,, gem__evict__node, 87 "int"/*devno*/, 88 "struct i915_address_space *"/*vm*/, 89 "uint64_t"/*start*/, 90 "uint64_t"/*size*/, 91 "unsigned long"/*color*/, 92 "unsigned"/*flags*/); 93 static inline void 94 trace_i915_gem_evict_node(struct i915_address_space *vm, 95 struct drm_mm_node *node, unsigned flags) 96 { 97 TRACE6(i915,, gem__evict__node, 98 vm->i915->drm.primary->index, vm, 99 node->start, node->size, node->color, 100 flags); 101 } 102 103 DEFINE_TRACE2(i915,, gem__evict__vm, 104 "int"/*devno*/, 105 "struct i915_address_space *"/*vm*/); 106 static inline void 107 trace_i915_gem_evict_vm(struct i915_address_space *vm) 108 { 109 TRACE2(i915,, gem__evict__vm, vm->i915->drm.primary->index, vm); 110 } 111 112 DEFINE_TRACE1(i915,, gem__object__clflush, 113 "struct drm_i915_gem_object *"/*obj*/); 114 static inline void 115 trace_i915_gem_object_clflush(struct drm_i915_gem_object *obj) 116 { 117 TRACE1(i915,, gem__object__clflush, obj); 118 } 119 120 DEFINE_TRACE2(i915,, gem__object__create, 121 "struct drm_i915_gem_object *"/*obj*/, 122 "size_t"/*size*/); 123 static inline void 124 trace_i915_gem_object_create(struct drm_i915_gem_object *obj) 125 { 126 TRACE2(i915,, gem__object__create, obj, obj->base.size); 127 } 128 129 DEFINE_TRACE1(i915,, gem__object__destroy, 130 "struct drm_i915_gem_object *"/*obj*/); 131 static inline void 132 trace_i915_gem_object_destroy(struct drm_i915_gem_object *obj) 133 { 134 TRACE1(i915,, gem__object__destroy, obj); 135 } 136 137 DEFINE_TRACE4(i915,, gem__object__fault, 138 "struct drm_i915_gem_object *"/*obj*/, 139 "pgoff_t"/*page_offset*/, 140 "bool"/*gtt*/, 141 "bool"/*write*/); 142 static inline void 143 trace_i915_gem_object_fault(struct drm_i915_gem_object *obj, 144 pgoff_t page_offset, bool gtt, bool write) 145 { 146 TRACE4(i915,, gem__object__fault, obj, page_offset, gtt, write); 147 } 148 149 /* XXX Not sure about size/offset types here. */ 150 DEFINE_TRACE3(i915,, gem__object__pread, 151 "struct drm_i915_gem_object *"/*obj*/, 152 "off_t"/*offset*/, 153 "size_t"/*size*/); 154 static inline void 155 trace_i915_gem_object_pread(struct drm_i915_gem_object *obj, off_t offset, 156 size_t size) 157 { 158 TRACE3(i915,, gem__object__pread, obj, offset, size); 159 } 160 161 DEFINE_TRACE3(i915,, gem__object__write, 162 "struct drm_i915_gem_object *"/*obj*/, 163 "off_t"/*offset*/, 164 "size_t"/*size*/); 165 static inline void 166 trace_i915_gem_object_pwrite(struct drm_i915_gem_object *obj, off_t offset, 167 size_t size) 168 { 169 TRACE3(i915,, gem__object__write, obj, offset, size); 170 } 171 172 #define I915_DEFINE_TRACE_REQ(M, F, N) \ 173 DEFINE_TRACE7(M, F, N, \ 174 "int"/*devno*/, \ 175 "unsigned"/*hw_id*/, \ 176 "uint8_t"/*uabi_class*/, \ 177 "uint8_t"/*instance*/, \ 178 "unsigned"/*context*/, \ 179 "unsigned"/*seqno*/, \ 180 "unsigned"/*global*/) 181 182 #define I915_TRACE_REQ(M, F, N, R) \ 183 TRACE7(M, F, N, \ 184 (R)->i915->drm.primary->index, \ 185 (R)->gem_context->hw_id, \ 186 (R)->engine->uabi_class, \ 187 (R)->engine->instance, \ 188 (R)->fence.context, \ 189 (R)->fence.seqno, \ 190 (R)->global_seqno) 191 192 I915_DEFINE_TRACE_REQ(i915,, request__queue); 193 static inline void 194 trace_i915_request_queue(struct i915_request *request, uint32_t flags) 195 { 196 __USE(flags); /* XXX too many trace operands */ 197 I915_TRACE_REQ(i915,, request__queue, request); 198 } 199 200 I915_DEFINE_TRACE_REQ(i915,, request__add); 201 static inline void 202 trace_i915_request_add(struct i915_request *request) 203 { 204 I915_TRACE_REQ(i915,, request__add, request); 205 } 206 207 I915_DEFINE_TRACE_REQ(i915,, request__submit); 208 static inline void 209 trace_i915_request_submit(struct i915_request *request) 210 { 211 I915_TRACE_REQ(i915,, request__submit, request); 212 } 213 214 I915_DEFINE_TRACE_REQ(i915,, request__execute); 215 static inline void 216 trace_i915_request_execute(struct i915_request *request) 217 { 218 I915_TRACE_REQ(i915,, request__execute, request); 219 } 220 221 I915_DEFINE_TRACE_REQ(i915,, request__in); 222 static inline void 223 trace_i915_request_in(struct i915_request *request, unsigned port) 224 { 225 __USE(port); /* XXX too many trace operands */ 226 I915_TRACE_REQ(i915,, request__in, request); 227 } 228 229 I915_DEFINE_TRACE_REQ(i915,, request__out); 230 static inline void 231 trace_i915_request_out(struct i915_request *request) 232 { 233 /* XXX i915_request_completed(request) */ 234 I915_TRACE_REQ(i915,, request__out, request); 235 } 236 237 I915_DEFINE_TRACE_REQ(i915,, request__retire); 238 static inline void 239 trace_i915_request_retire(struct i915_request *request) 240 { 241 I915_TRACE_REQ(i915,, request__retire, request); 242 } 243 244 I915_DEFINE_TRACE_REQ(i915,, request__wait__begin); 245 static inline void 246 trace_i915_request_wait_begin(struct i915_request *request) 247 { 248 I915_TRACE_REQ(i915,, request__wait__begin, request); 249 } 250 251 I915_DEFINE_TRACE_REQ(i915,, request__wait__end); 252 static inline void 253 trace_i915_request_wait_end(struct i915_request *request) 254 { 255 I915_TRACE_REQ(i915,, request__wait__end, request); 256 } 257 258 DEFINE_TRACE5(i915,, engine__notify, 259 "int"/*devno*/, 260 "uint8_t"/*uabi_class*/, 261 "uint8_t"/*instance*/, 262 "unsigned"/*seqno*/, 263 "bool"/*waiters*/); 264 static inline void 265 trace_intel_engine_notify(struct intel_engine_cs *engine, bool waiters) 266 { 267 TRACE5(i915,, engine__notify, 268 engine->i915->drm.primary->index, 269 engine->uabi_class, 270 engine->instance, 271 intel_engine_get_seqno(engine), 272 waiters); 273 } 274 275 DEFINE_TRACE6(i915,, gem__ring__sync__to, 276 "int"/*devno*/, 277 "uint8_t"/*from_class*/, 278 "uint8_t"/*from_instance*/, 279 "uint8_t"/*to_class*/, 280 "uint8_t"/*to_instance*/, 281 "unsigned"/*seqno*/); 282 static inline void 283 trace_i915_gem_ring_sync_to(struct i915_request *to, struct i915_request *from) 284 { 285 TRACE6(i915,, gem__ring__sync__to, 286 from->i915->drm.primary->index, 287 from->engine->uabi_class, 288 from->engine->instance, 289 to->engine->uabi_class, 290 to->engine->instance, 291 from->global_seqno); 292 } 293 294 DEFINE_TRACE3(i915,, register__read, 295 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/); 296 DEFINE_TRACE3(i915,, register__write, 297 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/); 298 static inline void 299 trace_i915_reg_rw(bool write, i915_reg_t reg, uint64_t value, size_t len, 300 bool trace) 301 { 302 uint32_t regoff = i915_mmio_reg_offset(reg); 303 304 if (!trace) 305 return; 306 if (write) { 307 TRACE3(i915,, register__read, regoff, value, len); 308 } else { 309 TRACE3(i915,, register__write, regoff, value, len); 310 } 311 } 312 313 DEFINE_TRACE5(i915,, vma__bind, 314 "struct drm_i915_gem_object *"/*obj*/, 315 "struct i915_address_space *"/*vm*/, 316 "uint64_t"/*offset*/, 317 "uint64_t"/*size*/, 318 "uint64_t"/*flags*/); 319 static inline void 320 trace_i915_vma_bind(struct i915_vma *vma, uint64_t flags) 321 { 322 TRACE5(i915,, vma__bind, 323 vma->obj, vma->vm, vma->node.start, vma->node.size, flags); 324 } 325 326 DEFINE_TRACE4(i915,, vma__unbind, 327 "struct drm_i915_gem_object *"/*obj*/, 328 "struct i915_address_space *"/*vm*/, 329 "uint64_t"/*offset*/, 330 "uint64_t"/*size*/); 331 static inline void 332 trace_i915_vma_unbind(struct i915_vma *vma) 333 { 334 TRACE4(i915,, vma__unbind, 335 vma->obj, vma->vm, vma->node.start, vma->node.size); 336 } 337 338 DEFINE_TRACE1(i915,, gpu__freq__change, 339 "int"/*freq*/); 340 static inline void 341 trace_intel_gpu_freq_change(int freq) 342 { 343 TRACE1(i915,, gpu__freq__change, freq); 344 } 345 346 DEFINE_TRACE4(i915,, context__create, 347 "int"/*devno*/, 348 "struct i915_gem_context *"/*ctx*/, 349 "unsigned"/*hw_id*/, 350 "struct i915_address_space *"/*vm*/); 351 static inline void 352 trace_i915_context_create(struct i915_gem_context *ctx) 353 { 354 TRACE4(i915,, context__create, 355 ctx->i915->drm.primary->index, 356 ctx, 357 ctx->hw_id, 358 (ctx->ppgtt ? &ctx->ppgtt->vm : NULL)); 359 } 360 361 DEFINE_TRACE4(i915,, context__free, 362 "int"/*devno*/, 363 "struct i915_gem_context *"/*ctx*/, 364 "unsigned"/*hw_id*/, 365 "struct i915_address_space *"/*vm*/); 366 static inline void 367 trace_i915_context_free(struct i915_gem_context *ctx) 368 { 369 TRACE4(i915,, context__free, 370 ctx->i915->drm.primary->index, 371 ctx, 372 ctx->hw_id, 373 (ctx->ppgtt ? &ctx->ppgtt->vm : NULL)); 374 } 375 376 DEFINE_TRACE4(i915,, page_directory_entry_alloc, 377 "struct i915_address_space *"/*vm*/, 378 "uint32_t"/*pdpe*/, 379 "uint64_t"/*start*/, 380 "uint64_t"/*pde_shift*/); 381 static inline void 382 trace_i915_page_directory_entry_alloc(struct i915_address_space *vm, 383 uint32_t pdpe, uint64_t start, uint64_t pde_shift) 384 { 385 TRACE4(i915,, page_directory_entry_alloc, vm, pdpe, start, pde_shift); 386 } 387 388 DEFINE_TRACE4(i915,, page_directory_pointer_entry_alloc, 389 "struct i915_address_space *"/*vm*/, 390 "uint32_t"/*pml4e*/, 391 "uint64_t"/*start*/, 392 "uint64_t"/*pde_shift*/); 393 static inline void 394 trace_i915_page_directory_pointer_entry_alloc(struct i915_address_space *vm, 395 uint32_t pml4e, uint64_t start, uint64_t pde_shift) 396 { 397 TRACE4(i915,, page_directory_pointer_entry_alloc, 398 vm, pml4e, start, pde_shift); 399 } 400 401 DEFINE_TRACE4(i915,, page_table_entry_alloc, 402 "struct i915_address_space *"/*vm*/, 403 "uint32_t"/*pde*/, 404 "uint64_t"/*start*/, 405 "uint64_t"/*pde_shift*/); 406 static inline void 407 trace_i915_page_table_entry_alloc(struct i915_address_space *vm, uint32_t pde, 408 uint64_t start, uint64_t pde_shift) 409 { 410 TRACE4(i915,, page_table_entry_alloc, vm, pde, start, pde_shift); 411 } 412 413 DEFINE_TRACE6(i915,, page_table_entry_map, 414 "struct i915_address_space *"/*vm*/, 415 "uint32_t"/*pde*/, 416 "struct i915_page_table *"/*pt*/, 417 "uint32_t"/*first*/, 418 "uint32_t"/*count*/, 419 "uint32_t"/*bits*/); 420 static inline void 421 trace_i915_page_table_entry_map(struct i915_address_space *vm, uint32_t pde, 422 struct i915_page_table *pt, uint32_t first, uint32_t count, uint32_t bits) 423 { 424 TRACE6(i915,, page_table_entry_map, vm, pde, pt, first, count, bits); 425 } 426 427 DEFINE_TRACE2(i915,, ppgtt__create, 428 "int"/*devno*/, 429 "struct i915_address_space *"/*vm*/); 430 static inline void 431 trace_i915_ppgtt_create(struct i915_address_space *vm) 432 { 433 TRACE2(i915,, ppgtt__create, vm->i915->drm.primary->index, vm); 434 } 435 436 DEFINE_TRACE2(i915,, ppgtt__release, 437 "int"/*devno*/, 438 "struct i915_address_space *"/*vm*/); 439 static inline void 440 trace_i915_ppgtt_release(struct i915_address_space *vm) 441 { 442 TRACE2(i915,, ppgtt__release, vm->i915->drm.primary->index, vm); 443 } 444 445 #define VM_TO_TRACE_NAME(vm) (i915_is_ggtt(vm) ? "G" : "P") 446 447 DEFINE_TRACE4(i915,, va__alloc, 448 "struct i915_address_space *"/*vm*/, 449 "uint64_t"/*start*/, 450 "uint64_t"/*end*/, 451 "const char *"/*name*/); 452 static inline void 453 trace_i915_va_alloc(struct i915_address_space *vm, uint64_t start, 454 uint64_t length, const char *name) 455 { 456 /* XXX Why start/end upstream? */ 457 TRACE4(i915,, va__alloc, vm, start, start + length - 1, name); 458 } 459 460 DEFINE_TRACE3(i915,, gem__shrink, 461 "int"/*devno*/, 462 "unsigned long"/*target*/, 463 "unsigned"/*flags*/); 464 static inline void 465 trace_i915_gem_shrink(struct drm_i915_private *dev_priv, unsigned long target, 466 unsigned flags) 467 { 468 TRACE3(i915,, gem__shrink, 469 dev_priv->drm.primary->index, target, flags); 470 } 471 472 DEFINE_TRACE5(i915,, pipe__update__start, 473 "enum pipe_drmhack"/*pipe*/, 474 "uint32_t"/*frame*/, 475 "int"/*scanline*/, 476 "uint32_t"/*min*/, 477 "uint32_t"/*max*/); 478 static inline void 479 trace_i915_pipe_update_start(struct intel_crtc *crtc) 480 { 481 TRACE5(i915,, pipe__update__start, 482 crtc->pipe, 483 crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, 484 crtc->pipe), 485 intel_get_crtc_scanline(crtc), 486 crtc->debug.min_vbl, 487 crtc->debug.max_vbl); 488 } 489 490 DEFINE_TRACE5(i915,, pipe__update__vblank__evaded, 491 "enum pipe_drmhack"/*pipe*/, 492 "uint32_t"/*frame*/, 493 "int"/*scanline*/, 494 "uint32_t"/*min*/, 495 "uint32_t"/*max*/); 496 static inline void 497 trace_i915_pipe_update_vblank_evaded(struct intel_crtc *crtc) 498 { 499 TRACE5(i915,, pipe__update__vblank__evaded, 500 crtc->pipe, 501 crtc->debug.start_vbl_count, 502 crtc->debug.scanline_start, 503 crtc->debug.min_vbl, 504 crtc->debug.max_vbl); 505 } 506 507 DEFINE_TRACE3(i915,, pipe__update__end, 508 "enum pipe_drmhack"/*pipe*/, 509 "uint32_t"/*frame*/, 510 "int"/*scanline*/); 511 static inline void 512 trace_i915_pipe_update_end(struct intel_crtc *crtc, uint32_t frame, 513 int scanline) 514 { 515 TRACE3(i915,, pipe__update__end, crtc->pipe, frame, scanline); 516 } 517 518 #endif /* _I915_TRACE_H_ */ 519
Indexes created Sun Sep 28 16:09:52 GMT 2025