i915_trace.h revision 1.3.28.1
1 /* $NetBSD: i915_trace.h,v 1.3.28.1 2018/09/06 06:56:36 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _I915_TRACE_H_ 33 #define _I915_TRACE_H_ 34 35 #include <sys/types.h> 36 #include <sys/sdt.h> 37 38 #include "intel_drv.h" 39 40 /* Must come last. */ 41 #include <drm/drm_trace_netbsd.h> 42 43 DEFINE_TRACE2(i915,, flip__request, 44 "enum plane"/*plane*/, "struct drm_i915_gem_object *"/*obj*/); 45 static inline void 46 trace_i915_flip_request(enum plane plane, struct drm_i915_gem_object *obj) 47 { 48 TRACE2(i915,, flip__request, plane, obj); 49 } 50 51 DEFINE_TRACE2(i915,, flip__complete, 52 "enum plane"/*plane*/, "struct drm_i915_gem_object *"/*obj*/); 53 static inline void 54 trace_i915_flip_complete(enum plane plane, struct drm_i915_gem_object *obj) 55 { 56 TRACE2(i915,, flip__complete, plane, obj); 57 } 58 59 DEFINE_TRACE4(i915,, gem__evict, 60 "int"/*devno*/, 61 "int"/*min_size*/, "unsigned"/*alignment*/, "unsigned"/*flags*/); 62 static inline void 63 trace_i915_gem_evict(struct drm_device *dev, int min_size, unsigned alignment, 64 unsigned flags) 65 { 66 TRACE4(i915,, gem__evict, 67 dev->primary->index, min_size, alignment, flags); 68 } 69 70 DEFINE_TRACE2(i915,, gem__evict__vm, 71 "int"/*devno*/, "struct i915_address_space *"/*vm*/); 72 static inline void 73 trace_i915_gem_evict_vm(struct i915_address_space *vm) 74 { 75 TRACE2(i915,, gem__evict__vm, vm->dev->primary->index, vm); 76 } 77 78 DEFINE_TRACE3(i915,, gem__object__change__domain, 79 "struct drm_i915_gem_object *"/*obj*/, 80 "uint32_t"/*read_domains*/, 81 "uint32_t"/*write_domain*/); 82 static inline void 83 trace_i915_gem_object_change_domain(struct drm_i915_gem_object *obj, 84 uint32_t old_read_domains, uint32_t old_write_domain) 85 { 86 TRACE3(i915,, gem__object__change__domain, 87 obj, 88 obj->base.read_domains | (old_read_domains << 16), 89 obj->base.write_domain | (old_write_domain << 16)); 90 } 91 92 DEFINE_TRACE1(i915,, gem__object__clflush, 93 "struct drm_i915_gem_object *"/*obj*/); 94 static inline void 95 trace_i915_gem_object_clflush(struct drm_i915_gem_object *obj) 96 { 97 TRACE1(i915,, gem__object__clflush, obj); 98 } 99 100 DEFINE_TRACE2(i915,, gem__object__create, 101 "struct drm_i915_gem_object *"/*obj*/, 102 "size_t"/*size*/); 103 static inline void 104 trace_i915_gem_object_create(struct drm_i915_gem_object *obj) 105 { 106 TRACE2(i915,, gem__object__create, obj, obj->base.size); 107 } 108 109 DEFINE_TRACE1(i915,, gem__object__destroy, 110 "struct drm_i915_gem_object *"/*obj*/); 111 static inline void 112 trace_i915_gem_object_destroy(struct drm_i915_gem_object *obj) 113 { 114 TRACE1(i915,, gem__object__destroy, obj); 115 } 116 117 DEFINE_TRACE4(i915,, gem__object__fault, 118 "struct drm_i915_gem_object *"/*obj*/, 119 "pgoff_t"/*page_offset*/, 120 "bool"/*gtt*/, 121 "bool"/*write*/); 122 static inline void 123 trace_i915_gem_object_fault(struct drm_i915_gem_object *obj, 124 pgoff_t page_offset, bool gtt, bool write) 125 { 126 TRACE4(i915,, gem__object__fault, obj, page_offset, gtt, write); 127 } 128 129 /* XXX Not sure about size/offset types here. */ 130 DEFINE_TRACE3(i915,, gem__object__pread, 131 "struct drm_i915_gem_object *"/*obj*/, 132 "off_t"/*offset*/, 133 "size_t"/*size*/); 134 static inline void 135 trace_i915_gem_object_pread(struct drm_i915_gem_object *obj, off_t offset, 136 size_t size) 137 { 138 TRACE3(i915,, gem__object__pread, obj, offset, size); 139 } 140 141 DEFINE_TRACE3(i915,, gem__object__write, 142 "struct drm_i915_gem_object *"/*obj*/, 143 "off_t"/*offset*/, 144 "size_t"/*size*/); 145 static inline void 146 trace_i915_gem_object_pwrite(struct drm_i915_gem_object *obj, off_t offset, 147 size_t size) 148 { 149 TRACE3(i915,, gem__object__write, obj, offset, size); 150 } 151 152 DEFINE_TRACE3(i915,, gem__request__add, 153 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/); 154 static inline void 155 trace_i915_gem_request_add(struct drm_i915_gem_request *request) 156 { 157 TRACE3(i915,, gem__request__add, 158 request->ring->dev->primary->index, 159 request->ring->id, 160 request->seqno); 161 } 162 163 DEFINE_TRACE3(i915,, gem__request__retire, 164 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/); 165 static inline void 166 trace_i915_gem_request_retire(struct drm_i915_gem_request *request) 167 { 168 TRACE3(i915,, gem__request__retire, 169 request->ring->dev->primary->index, 170 request->ring->id, 171 request->seqno); 172 } 173 174 DEFINE_TRACE3(i915,, gem__request__wait__begin, 175 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/); 176 static inline void 177 trace_i915_gem_request_wait_begin(struct drm_i915_gem_request *request) 178 { 179 TRACE3(i915,, gem__request__wait__begin, 180 request->ring->dev->primary->index, 181 request->ring->id, 182 request->seqno); 183 } 184 185 DEFINE_TRACE3(i915,, gem__request__wait__end, 186 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/); 187 static inline void 188 trace_i915_gem_request_wait_end(struct drm_i915_gem_request *request) 189 { 190 TRACE3(i915,, gem__request__wait__end, 191 request->ring->dev->primary->index, 192 request->ring->id, 193 request->seqno); 194 } 195 196 DEFINE_TRACE3(i915,, gem__request__notify, 197 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/); 198 static inline void 199 trace_i915_gem_request_notify(struct intel_engine_cs *ring) 200 { 201 TRACE3(i915,, gem__request__notify, 202 ring->dev->primary->index, ring->id, ring->get_seqno(ring, false)); 203 } 204 205 /* XXX Why no request in the trace upstream? */ 206 DEFINE_TRACE4(i915,, gem__ring__dispatch, 207 "int"/*devno*/, "int"/*ringid*/, "uint32_t"/*seqno*/, "uint32_t"/*flags*/); 208 static inline void 209 trace_i915_gem_ring_dispatch(struct drm_i915_gem_request *request, 210 uint32_t flags) 211 { 212 TRACE4(i915,, gem__ring__dispatch, 213 request->ring->dev->primary->index, 214 request->ring->id, 215 request->seqno, 216 flags); 217 /* XXX i915_trace_irq_get? Doesn't seem to be used. */ 218 } 219 220 DEFINE_TRACE4(i915,, gem__ring__flush, 221 "int"/*devno*/, 222 "int"/*ringid*/, 223 "uint32_t"/*invalidate*/, 224 "uint32_t"/*flags*/); 225 static inline void 226 trace_i915_gem_ring_flush(struct drm_i915_gem_request *request, 227 uint32_t invalidate, uint32_t flags) 228 { 229 TRACE4(i915,, gem__ring__flush, 230 request->ring->dev->primary->index, 231 request->ring->id, 232 invalidate, 233 flags); 234 } 235 236 DEFINE_TRACE4(i915,, gem__ring__sync__to, 237 "int"/*devno*/, 238 "int"/*from_ringid*/, 239 "int"/*to_ringid*/, 240 "uint32_t"/*seqno*/); 241 static inline void 242 trace_i915_gem_ring_sync_to(struct drm_i915_gem_request *to_req, 243 struct intel_engine_cs *from, struct drm_i915_gem_request *from_req) 244 { 245 TRACE4(i915,, gem__ring__sync__to, 246 from->dev->primary->index, 247 from->id, 248 to_req->ring->id, 249 i915_gem_request_get_seqno(from_req)); 250 } 251 252 DEFINE_TRACE3(i915,, register__read, 253 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/); 254 DEFINE_TRACE3(i915,, register__write, 255 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/); 256 static inline void 257 trace_i915_reg_rw(bool write, uint32_t reg, uint64_t value, size_t len, 258 bool trace) 259 { 260 if (!trace) 261 return; 262 if (write) { 263 TRACE3(i915,, register__read, reg, value, len); 264 } else { 265 TRACE3(i915,, register__write, reg, value, len); 266 } 267 } 268 269 DEFINE_TRACE5(i915,, vma__bind, 270 "struct drm_i915_gem_object *"/*obj*/, 271 "struct i915_address_space *"/*vm*/, 272 "uint64_t"/*offset*/, 273 "uint64_t"/*size*/, 274 "uint64_t"/*flags*/); 275 static inline void 276 trace_i915_vma_bind(struct i915_vma *vma, uint64_t flags) 277 { 278 TRACE5(i915,, vma__bind, 279 vma->obj, vma->vm, vma->node.start, vma->node.size, flags); 280 } 281 282 DEFINE_TRACE4(i915,, vma__unbind, 283 "struct drm_i915_gem_object *"/*obj*/, 284 "struct i915_address_space *"/*vm*/, 285 "uint64_t"/*offset*/, 286 "uint64_t"/*size*/); 287 static inline void 288 trace_i915_vma_unbind(struct i915_vma *vma) 289 { 290 TRACE4(i915,, vma__unbind, 291 vma->obj, vma->vm, vma->node.start, vma->node.size); 292 } 293 294 DEFINE_TRACE1(i915,, gpu__freq__change, 295 "int"/*freq*/); 296 static inline void 297 trace_intel_gpu_freq_change(int freq) 298 { 299 TRACE1(i915,, gpu__freq__change, freq); 300 } 301 302 DEFINE_TRACE3(i915,, context__create, 303 "int"/*devno*/, 304 "struct intel_context *"/*ctx*/, 305 "struct i915_address_space *"/*vm*/); 306 static inline void 307 trace_i915_context_create(struct intel_context *ctx) 308 { 309 TRACE3(i915,, context__create, 310 ctx->i915->dev->primary->index, 311 ctx, 312 (ctx->ppgtt ? &ctx->ppgtt->base : NULL)); 313 } 314 315 DEFINE_TRACE3(i915,, context__free, 316 "int"/*devno*/, 317 "struct intel_context *"/*ctx*/, 318 "struct i915_address_space *"/*vm*/); 319 static inline void 320 trace_i915_context_free(struct intel_context *ctx) 321 { 322 TRACE3(i915,, context__free, 323 ctx->i915->dev->primary->index, 324 ctx, 325 (ctx->ppgtt ? &ctx->ppgtt->base : NULL)); 326 } 327 328 DEFINE_TRACE4(i915,, page_directory_entry_alloc, 329 "struct i915_address_space *"/*vm*/, 330 "uint32_t"/*pdpe*/, 331 "uint64_t"/*start*/, 332 "uint64_t"/*pde_shift*/); 333 static inline void 334 trace_i915_page_directory_entry_alloc(struct i915_address_space *vm, 335 uint32_t pdpe, uint64_t start, uint64_t pde_shift) 336 { 337 TRACE4(i915,, page_directory_entry_alloc, vm, pdpe, start, pde_shift); 338 } 339 340 DEFINE_TRACE4(i915,, page_directory_pointer_entry_alloc, 341 "struct i915_address_space *"/*vm*/, 342 "uint32_t"/*pml4e*/, 343 "uint64_t"/*start*/, 344 "uint64_t"/*pde_shift*/); 345 static inline void 346 trace_i915_page_directory_pointer_entry_alloc(struct i915_address_space *vm, 347 uint32_t pml4e, uint64_t start, uint64_t pde_shift) 348 { 349 TRACE4(i915,, page_directory_pointer_entry_alloc, 350 vm, pml4e, start, pde_shift); 351 } 352 353 DEFINE_TRACE4(i915,, page_table_entry_alloc, 354 "struct i915_address_space *"/*vm*/, 355 "uint32_t"/*pde*/, 356 "uint64_t"/*start*/, 357 "uint64_t"/*pde_shift*/); 358 static inline void 359 trace_i915_page_table_entry_alloc(struct i915_address_space *vm, uint32_t pde, 360 uint64_t start, uint64_t pde_shift) 361 { 362 TRACE4(i915,, page_table_entry_alloc, vm, pde, start, pde_shift); 363 } 364 365 DEFINE_TRACE6(i915,, page_table_entry_map, 366 "struct i915_address_space *"/*vm*/, 367 "uint32_t"/*pde*/, 368 "struct i915_page_table *"/*pt*/, 369 "uint32_t"/*first*/, 370 "uint32_t"/*count*/, 371 "uint32_t"/*bits*/); 372 static inline void 373 trace_i915_page_table_entry_map(struct i915_address_space *vm, uint32_t pde, 374 struct i915_page_table *pt, uint32_t first, uint32_t count, uint32_t bits) 375 { 376 TRACE6(i915,, page_table_entry_map, vm, pde, pt, first, count, bits); 377 } 378 379 DEFINE_TRACE2(i915,, ppgtt__create, 380 "int"/*devno*/, 381 "struct i915_address_space *"/*vm*/); 382 static inline void 383 trace_i915_ppgtt_create(struct i915_address_space *vm) 384 { 385 TRACE2(i915,, ppgtt__create, vm->dev->primary->index, vm); 386 } 387 388 DEFINE_TRACE2(i915,, ppgtt__release, 389 "int"/*devno*/, 390 "struct i915_address_space *"/*vm*/); 391 static inline void 392 trace_i915_ppgtt_release(struct i915_address_space *vm) 393 { 394 TRACE2(i915,, ppgtt__release, vm->dev->primary->index, vm); 395 } 396 397 #define VM_TO_TRACE_NAME(vm) (i915_is_ggtt(vm) ? "G" : "P") 398 399 DEFINE_TRACE4(i915,, va__alloc, 400 "struct i915_address_space *"/*vm*/, 401 "uint64_t"/*start*/, 402 "uint64_t"/*end*/, 403 "const char *"/*name*/); 404 static inline void 405 trace_i915_va_alloc(struct i915_address_space *vm, uint64_t start, 406 uint64_t length, const char *name) 407 { 408 /* XXX Why start/end upstream? */ 409 TRACE4(i915,, va__alloc, vm, start, start + length - 1, name); 410 } 411 412 DEFINE_TRACE3(i915,, gem__shrink, 413 "int"/*devno*/, 414 "unsigned long"/*target*/, 415 "unsigned"/*flags*/); 416 static inline void 417 trace_i915_gem_shrink(struct drm_i915_private *dev_priv, unsigned long target, 418 unsigned flags) 419 { 420 TRACE3(i915,, gem__shrink, 421 dev_priv->dev->primary->index, target, flags); 422 } 423 424 DEFINE_TRACE5(i915,, pipe__update__start, 425 "enum i915_pipe"/*pipe*/, 426 "uint32_t"/*frame*/, 427 "int"/*scanline*/, 428 "uint32_t"/*min*/, 429 "uint32_t"/*max*/); 430 static inline void 431 trace_i915_pipe_update_start(struct intel_crtc *crtc) 432 { 433 TRACE5(i915,, pipe__update__start, 434 crtc->pipe, 435 crtc->base.dev->driver->get_vblank_counter(crtc->base.dev, 436 crtc->pipe), 437 intel_get_crtc_scanline(crtc), 438 crtc->debug.min_vbl, 439 crtc->debug.max_vbl); 440 } 441 442 DEFINE_TRACE5(i915,, pipe__update__vblank__evaded, 443 "enum i915_pipe"/*pipe*/, 444 "uint32_t"/*frame*/, 445 "int"/*scanline*/, 446 "uint32_t"/*min*/, 447 "uint32_t"/*max*/); 448 static inline void 449 trace_i915_pipe_update_vblank_evaded(struct intel_crtc *crtc) 450 { 451 TRACE5(i915,, pipe__update__vblank__evaded, 452 crtc->pipe, 453 crtc->debug.start_vbl_count, 454 crtc->debug.scanline_start, 455 crtc->debug.min_vbl, 456 crtc->debug.max_vbl); 457 } 458 459 DEFINE_TRACE3(i915,, pipe__update__end, 460 "enum i915_pipe"/*pipe*/, 461 "uint32_t"/*frame*/, 462 "int"/*scanline*/); 463 static inline void 464 trace_i915_pipe_update_end(struct intel_crtc *crtc, uint32_t frame, 465 int scanline) 466 { 467 TRACE3(i915,, pipe__update__end, crtc->pipe, frame, scanline); 468 } 469 470 DEFINE_TRACE4(i915,, switch__mm, 471 "int"/*devno*/, 472 "int"/*ringid*/, 473 "struct intel_context *"/*to*/, 474 "struct i915_address_space *"/*vm*/); 475 static inline void 476 trace_switch_mm(struct intel_engine_cs *ring, struct intel_context *to) 477 { 478 TRACE4(i915,, switch__mm, 479 ring->dev->primary->index, 480 ring->id, 481 to, 482 to->ppgtt ? &to->ppgtt->base : NULL); 483 } 484 485 #endif /* _I915_TRACE_H_ */ 486
Indexes created Fri Oct 17 23:09:53 GMT 2025