pci.h revision 1.1.2.14 1 1.1.2.1 riastrad /* $NetBSD: pci.h,v 1.1.2.14 2013/07/24 03:32:19 riastradh Exp $ */
2 1.1.2.1 riastrad
3 1.1.2.1 riastrad /*-
4 1.1.2.1 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.1.2.1 riastrad * All rights reserved.
6 1.1.2.1 riastrad *
7 1.1.2.1 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.1.2.1 riastrad * by Taylor R. Campbell.
9 1.1.2.1 riastrad *
10 1.1.2.1 riastrad * Redistribution and use in source and binary forms, with or without
11 1.1.2.1 riastrad * modification, are permitted provided that the following conditions
12 1.1.2.1 riastrad * are met:
13 1.1.2.1 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.1.2.1 riastrad * notice, this list of conditions and the following disclaimer.
15 1.1.2.1 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1.2.1 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.1.2.1 riastrad * documentation and/or other materials provided with the distribution.
18 1.1.2.1 riastrad *
19 1.1.2.1 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1.2.1 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1.2.1 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1.2.1 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1.2.1 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1.2.1 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1.2.1 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1.2.1 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1.2.1 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1.2.1 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1.2.1 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.1.2.1 riastrad */
31 1.1.2.1 riastrad
32 1.1.2.1 riastrad #ifndef _LINUX_PCI_H_
33 1.1.2.1 riastrad #define _LINUX_PCI_H_
34 1.1.2.1 riastrad
35 1.1.2.4 riastrad #include <sys/types.h>
36 1.1.2.4 riastrad #include <sys/bus.h>
37 1.1.2.5 riastrad #include <sys/kmem.h>
38 1.1.2.4 riastrad #include <sys/systm.h>
39 1.1.2.4 riastrad
40 1.1.2.10 riastrad #include <dev/pci/pcidevs.h>
41 1.1.2.10 riastrad #include <dev/pci/pcireg.h>
42 1.1.2.2 riastrad #include <dev/pci/pcivar.h>
43 1.1.2.2 riastrad
44 1.1.2.4 riastrad #include <linux/ioport.h>
45 1.1.2.4 riastrad
46 1.1.2.4 riastrad struct pci_bus;
47 1.1.2.10 riastrad
48 1.1.2.10 riastrad struct pci_device_id {
49 1.1.2.10 riastrad uint32_t vendor;
50 1.1.2.10 riastrad uint32_t device;
51 1.1.2.10 riastrad uint32_t subvendor;
52 1.1.2.10 riastrad uint32_t subdevice;
53 1.1.2.10 riastrad uint32_t class;
54 1.1.2.10 riastrad uint32_t class_mask;
55 1.1.2.10 riastrad unsigned long driver_data;
56 1.1.2.10 riastrad };
57 1.1.2.10 riastrad
58 1.1.2.10 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
59 1.1.2.10 riastrad
60 1.1.2.10 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
61 1.1.2.10 riastrad
62 1.1.2.13 riastrad #define PCI_CLASS_BRIDGE_ISA \
63 1.1.2.13 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
64 1.1.2.13 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
65 1.1.2.10 riastrad
66 1.1.2.10 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
67 1.1.2.2 riastrad
68 1.1.2.13 riastrad #define PCI_DEVFN(DEV, FN) \
69 1.1.2.13 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
70 1.1.2.13 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
71 1.1.2.13 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
72 1.1.2.13 riastrad
73 1.1.2.13 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
74 1.1.2.13 riastrad
75 1.1.2.2 riastrad struct pci_dev {
76 1.1.2.10 riastrad struct pci_attach_args pd_pa;
77 1.1.2.14 riastrad int pd_kludges; /* Gotta lose 'em... */
78 1.1.2.14 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
79 1.1.2.14 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
80 1.1.2.14 riastrad bus_space_tag_t pd_rom_bst;
81 1.1.2.14 riastrad bus_space_handle_t pd_rom_bsh;
82 1.1.2.14 riastrad bus_size_t pd_rom_size;
83 1.1.2.14 riastrad void *pd_rom_vaddr;
84 1.1.2.11 riastrad device_t pd_dev;
85 1.1.2.10 riastrad struct pci_bus *bus;
86 1.1.2.10 riastrad uint32_t devfn;
87 1.1.2.10 riastrad uint16_t vendor;
88 1.1.2.10 riastrad uint16_t device;
89 1.1.2.10 riastrad uint16_t subsystem_vendor;
90 1.1.2.10 riastrad uint16_t subsystem_device;
91 1.1.2.10 riastrad uint8_t revision;
92 1.1.2.10 riastrad uint32_t class;
93 1.1.2.10 riastrad bool msi_enabled;
94 1.1.2.2 riastrad };
95 1.1.2.2 riastrad
96 1.1.2.11 riastrad static inline device_t
97 1.1.2.11 riastrad pci_dev_dev(struct pci_dev *pdev)
98 1.1.2.11 riastrad {
99 1.1.2.11 riastrad return pdev->pd_dev;
100 1.1.2.11 riastrad }
101 1.1.2.11 riastrad
102 1.1.2.13 riastrad static inline void
103 1.1.2.13 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
104 1.1.2.14 riastrad const struct pci_attach_args *pa, int kludges)
105 1.1.2.13 riastrad {
106 1.1.2.13 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
107 1.1.2.13 riastrad PCI_SUBSYS_ID_REG);
108 1.1.2.10 riastrad
109 1.1.2.13 riastrad pdev->pd_pa = *pa;
110 1.1.2.14 riastrad pdev->pd_kludges = kludges;
111 1.1.2.14 riastrad pdev->pd_rom_vaddr = NULL;
112 1.1.2.13 riastrad pdev->pd_dev = dev;
113 1.1.2.13 riastrad pdev->bus = NULL; /* XXX struct pci_dev::bus */
114 1.1.2.13 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
115 1.1.2.13 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
116 1.1.2.13 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
117 1.1.2.13 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
118 1.1.2.13 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
119 1.1.2.13 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
120 1.1.2.13 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
121 1.1.2.13 riastrad pdev->msi_enabled = false;
122 1.1.2.13 riastrad }
123 1.1.2.2 riastrad
124 1.1.2.2 riastrad static inline int
125 1.1.2.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
126 1.1.2.2 riastrad {
127 1.1.2.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
128 1.1.2.2 riastrad NULL, NULL);
129 1.1.2.2 riastrad }
130 1.1.2.2 riastrad
131 1.1.2.3 riastrad static inline void
132 1.1.2.4 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
133 1.1.2.3 riastrad {
134 1.1.2.9 riastrad KASSERT(!ISSET(reg, 3));
135 1.1.2.3 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
136 1.1.2.3 riastrad }
137 1.1.2.3 riastrad
138 1.1.2.3 riastrad static inline void
139 1.1.2.12 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
140 1.1.2.3 riastrad {
141 1.1.2.12 riastrad KASSERT(!ISSET(reg, 1));
142 1.1.2.12 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
143 1.1.2.12 riastrad (reg &~ 3)) >> (8 * (reg & 3));
144 1.1.2.3 riastrad }
145 1.1.2.3 riastrad
146 1.1.2.9 riastrad static inline void
147 1.1.2.12 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
148 1.1.2.9 riastrad {
149 1.1.2.9 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
150 1.1.2.12 riastrad (reg &~ 1)) >> (8 * (reg & 1));
151 1.1.2.9 riastrad }
152 1.1.2.9 riastrad
153 1.1.2.9 riastrad static inline void
154 1.1.2.12 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
155 1.1.2.9 riastrad {
156 1.1.2.12 riastrad KASSERT(!ISSET(reg, 3));
157 1.1.2.12 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
158 1.1.2.12 riastrad }
159 1.1.2.12 riastrad
160 1.1.2.12 riastrad static inline void
161 1.1.2.12 riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
162 1.1.2.12 riastrad uint32_t value)
163 1.1.2.12 riastrad {
164 1.1.2.12 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
165 1.1.2.9 riastrad const int reg32 = (reg &~ 3);
166 1.1.2.12 riastrad const unsigned int shift = (8 * (reg & 3));
167 1.1.2.9 riastrad uint32_t value32;
168 1.1.2.9 riastrad
169 1.1.2.12 riastrad KASSERT(bytes <= 4);
170 1.1.2.12 riastrad KASSERT(!ISSET(value, ~mask));
171 1.1.2.9 riastrad pci_read_config_dword(pdev, reg32, &value32);
172 1.1.2.12 riastrad value32 &=~ (mask << shift);
173 1.1.2.9 riastrad value32 |= (value << shift);
174 1.1.2.9 riastrad pci_write_config_dword(pdev, reg32, value32);
175 1.1.2.9 riastrad }
176 1.1.2.9 riastrad
177 1.1.2.12 riastrad static inline void
178 1.1.2.12 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
179 1.1.2.12 riastrad {
180 1.1.2.12 riastrad KASSERT(!ISSET(reg, 1));
181 1.1.2.12 riastrad pci_rmw_config(pdev, reg, 2, value);
182 1.1.2.12 riastrad }
183 1.1.2.12 riastrad
184 1.1.2.12 riastrad static inline void
185 1.1.2.12 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
186 1.1.2.12 riastrad {
187 1.1.2.12 riastrad pci_rmw_config(pdev, reg, 1, value);
188 1.1.2.12 riastrad }
189 1.1.2.12 riastrad
190 1.1.2.7 riastrad /*
191 1.1.2.7 riastrad * XXX pci msi
192 1.1.2.7 riastrad */
193 1.1.2.7 riastrad static inline void
194 1.1.2.7 riastrad pci_enable_msi(struct pci_dev *pdev)
195 1.1.2.7 riastrad {
196 1.1.2.7 riastrad KASSERT(!pdev->msi_enabled);
197 1.1.2.7 riastrad pdev->msi_enabled = true;
198 1.1.2.7 riastrad }
199 1.1.2.7 riastrad
200 1.1.2.7 riastrad static inline void
201 1.1.2.7 riastrad pci_disable_msi(struct pci_dev *pdev)
202 1.1.2.7 riastrad {
203 1.1.2.7 riastrad KASSERT(pdev->msi_enabled);
204 1.1.2.7 riastrad pdev->msi_enabled = false;
205 1.1.2.7 riastrad }
206 1.1.2.7 riastrad
207 1.1.2.8 riastrad static inline void
208 1.1.2.8 riastrad pci_set_master(struct pci_dev *pdev)
209 1.1.2.8 riastrad {
210 1.1.2.8 riastrad pcireg_t csr;
211 1.1.2.8 riastrad
212 1.1.2.8 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
213 1.1.2.8 riastrad PCI_COMMAND_STATUS_REG);
214 1.1.2.8 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
215 1.1.2.8 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
216 1.1.2.8 riastrad PCI_COMMAND_STATUS_REG, csr);
217 1.1.2.8 riastrad }
218 1.1.2.8 riastrad
219 1.1.2.4 riastrad #define PCIBIOS_MIN_MEM 0 /* XXX bogus x86 kludge bollocks */
220 1.1.2.4 riastrad
221 1.1.2.4 riastrad static inline bus_addr_t
222 1.1.2.4 riastrad pcibios_align_resource(void *p, const struct resource *resource,
223 1.1.2.4 riastrad bus_addr_t addr, bus_size_t size)
224 1.1.2.4 riastrad {
225 1.1.2.4 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
226 1.1.2.4 riastrad }
227 1.1.2.4 riastrad
228 1.1.2.4 riastrad static inline int
229 1.1.2.4 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
230 1.1.2.4 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
231 1.1.2.4 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
232 1.1.2.4 riastrad bus_size_t) __unused,
233 1.1.2.4 riastrad struct pci_dev *pdev)
234 1.1.2.4 riastrad {
235 1.1.2.4 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
236 1.1.2.4 riastrad bus_space_tag_t bst;
237 1.1.2.4 riastrad int error;
238 1.1.2.4 riastrad
239 1.1.2.4 riastrad switch (resource->flags) {
240 1.1.2.4 riastrad case IORESOURCE_MEM:
241 1.1.2.4 riastrad bst = pa->pa_memt;
242 1.1.2.4 riastrad break;
243 1.1.2.4 riastrad
244 1.1.2.4 riastrad case IORESOURCE_IO:
245 1.1.2.4 riastrad bst = pa->pa_iot;
246 1.1.2.4 riastrad break;
247 1.1.2.4 riastrad
248 1.1.2.4 riastrad default:
249 1.1.2.4 riastrad panic("I don't know what kind of resource you want!");
250 1.1.2.4 riastrad }
251 1.1.2.4 riastrad
252 1.1.2.4 riastrad resource->r_bst = bst;
253 1.1.2.4 riastrad error = bus_space_alloc(bst, start, 0xffffffffffffffffULL /* XXX */,
254 1.1.2.4 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
255 1.1.2.4 riastrad if (error)
256 1.1.2.4 riastrad return error;
257 1.1.2.4 riastrad
258 1.1.2.4 riastrad resource->size = size;
259 1.1.2.4 riastrad return 0;
260 1.1.2.4 riastrad }
261 1.1.2.4 riastrad
262 1.1.2.5 riastrad /*
263 1.1.2.13 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
264 1.1.2.13 riastrad * defined only for their single purposes in i915drm, in
265 1.1.2.13 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
266 1.1.2.13 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
267 1.1.2.13 riastrad * internally) to pass a cookie through.
268 1.1.2.5 riastrad */
269 1.1.2.5 riastrad
270 1.1.2.13 riastrad static inline int /* XXX inline? */
271 1.1.2.13 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
272 1.1.2.13 riastrad {
273 1.1.2.13 riastrad
274 1.1.2.13 riastrad if (pa->pa_bus != 0)
275 1.1.2.13 riastrad return 0;
276 1.1.2.13 riastrad if (pa->pa_device != 0)
277 1.1.2.13 riastrad return 0;
278 1.1.2.13 riastrad if (pa->pa_function != 0)
279 1.1.2.13 riastrad return 0;
280 1.1.2.13 riastrad
281 1.1.2.13 riastrad return 1;
282 1.1.2.13 riastrad }
283 1.1.2.13 riastrad
284 1.1.2.5 riastrad static inline struct pci_dev *
285 1.1.2.13 riastrad pci_get_bus_and_slot(int bus, int slot)
286 1.1.2.5 riastrad {
287 1.1.2.13 riastrad struct pci_attach_args pa;
288 1.1.2.5 riastrad
289 1.1.2.13 riastrad KASSERT(bus == 0);
290 1.1.2.13 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
291 1.1.2.13 riastrad
292 1.1.2.13 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
293 1.1.2.13 riastrad return NULL;
294 1.1.2.13 riastrad
295 1.1.2.13 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
296 1.1.2.14 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
297 1.1.2.13 riastrad
298 1.1.2.13 riastrad return pdev;
299 1.1.2.13 riastrad }
300 1.1.2.13 riastrad
301 1.1.2.13 riastrad static inline int /* XXX inline? */
302 1.1.2.13 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
303 1.1.2.13 riastrad {
304 1.1.2.13 riastrad
305 1.1.2.13 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
306 1.1.2.13 riastrad return 0;
307 1.1.2.13 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
308 1.1.2.13 riastrad return 0;
309 1.1.2.13 riastrad
310 1.1.2.13 riastrad return 1;
311 1.1.2.13 riastrad }
312 1.1.2.13 riastrad
313 1.1.2.13 riastrad static inline struct pci_dev *
314 1.1.2.13 riastrad pci_get_class(uint32_t class_subclass_shifted __unused,
315 1.1.2.13 riastrad struct pci_dev *from __unused)
316 1.1.2.13 riastrad {
317 1.1.2.13 riastrad struct pci_attach_args pa;
318 1.1.2.13 riastrad
319 1.1.2.13 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
320 1.1.2.13 riastrad KASSERT(from == NULL);
321 1.1.2.13 riastrad
322 1.1.2.13 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
323 1.1.2.13 riastrad return NULL;
324 1.1.2.5 riastrad
325 1.1.2.13 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
326 1.1.2.14 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
327 1.1.2.5 riastrad
328 1.1.2.13 riastrad return pdev;
329 1.1.2.5 riastrad }
330 1.1.2.5 riastrad
331 1.1.2.5 riastrad static inline void
332 1.1.2.5 riastrad pci_dev_put(struct pci_dev *pdev)
333 1.1.2.5 riastrad {
334 1.1.2.5 riastrad
335 1.1.2.14 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
336 1.1.2.5 riastrad kmem_free(pdev, sizeof(*pdev));
337 1.1.2.5 riastrad }
338 1.1.2.5 riastrad
339 1.1.2.14 riastrad #define __pci_rom_iomem
340 1.1.2.14 riastrad
341 1.1.2.14 riastrad static inline void
342 1.1.2.14 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
343 1.1.2.14 riastrad {
344 1.1.2.14 riastrad
345 1.1.2.14 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
346 1.1.2.14 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
347 1.1.2.14 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
348 1.1.2.14 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
349 1.1.2.14 riastrad pdev->pd_rom_vaddr = NULL;
350 1.1.2.14 riastrad }
351 1.1.2.14 riastrad
352 1.1.2.14 riastrad static inline void __pci_rom_iomem *
353 1.1.2.14 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
354 1.1.2.14 riastrad {
355 1.1.2.14 riastrad bus_space_handle_t bsh;
356 1.1.2.14 riastrad bus_size_t size;
357 1.1.2.14 riastrad
358 1.1.2.14 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
359 1.1.2.14 riastrad
360 1.1.2.14 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
361 1.1.2.14 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
362 1.1.2.14 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
363 1.1.2.14 riastrad != 0) {
364 1.1.2.14 riastrad aprint_error_dev(pdev->pd_dev, "unable to map ROM\n");
365 1.1.2.14 riastrad return NULL;
366 1.1.2.14 riastrad }
367 1.1.2.14 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
368 1.1.2.14 riastrad
369 1.1.2.14 riastrad /* XXX This type is obviously wrong in general... */
370 1.1.2.14 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
371 1.1.2.14 riastrad PCI_ROM_CODE_TYPE_X86, &bsh, &size)) {
372 1.1.2.14 riastrad aprint_error_dev(pdev->pd_dev, "unable to find ROM\n");
373 1.1.2.14 riastrad pci_unmap_rom(pdev, NULL);
374 1.1.2.14 riastrad return NULL;
375 1.1.2.14 riastrad }
376 1.1.2.14 riastrad
377 1.1.2.14 riastrad KASSERT(size <= SIZE_T_MAX);
378 1.1.2.14 riastrad *sizep = size;
379 1.1.2.14 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh);
380 1.1.2.14 riastrad return pdev->pd_rom_vaddr;
381 1.1.2.14 riastrad }
382 1.1.2.14 riastrad
383 1.1.2.1 riastrad #endif /* _LINUX_PCI_H_ */
384