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pci.h revision 1.20
      1  1.20  jmcneill /*	$NetBSD: pci.h,v 1.20 2015/10/17 14:54:10 jmcneill Exp $	*/
      2   1.2  riastrad 
      3   1.2  riastrad /*-
      4   1.2  riastrad  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5   1.2  riastrad  * All rights reserved.
      6   1.2  riastrad  *
      7   1.2  riastrad  * This code is derived from software contributed to The NetBSD Foundation
      8   1.2  riastrad  * by Taylor R. Campbell.
      9   1.2  riastrad  *
     10   1.2  riastrad  * Redistribution and use in source and binary forms, with or without
     11   1.2  riastrad  * modification, are permitted provided that the following conditions
     12   1.2  riastrad  * are met:
     13   1.2  riastrad  * 1. Redistributions of source code must retain the above copyright
     14   1.2  riastrad  *    notice, this list of conditions and the following disclaimer.
     15   1.2  riastrad  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.2  riastrad  *    notice, this list of conditions and the following disclaimer in the
     17   1.2  riastrad  *    documentation and/or other materials provided with the distribution.
     18   1.2  riastrad  *
     19   1.2  riastrad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.2  riastrad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.2  riastrad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.2  riastrad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.2  riastrad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.2  riastrad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.2  riastrad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.2  riastrad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.2  riastrad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.2  riastrad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.2  riastrad  * POSSIBILITY OF SUCH DAMAGE.
     30   1.2  riastrad  */
     31   1.2  riastrad 
     32   1.2  riastrad #ifndef _LINUX_PCI_H_
     33   1.2  riastrad #define _LINUX_PCI_H_
     34   1.2  riastrad 
     35  1.11    nonaka #ifdef _KERNEL_OPT
     36  1.10    nonaka #if defined(i386) || defined(amd64)
     37  1.10    nonaka #include "acpica.h"
     38  1.10    nonaka #else	/* !(i386 || amd64) */
     39  1.10    nonaka #define NACPICA	0
     40  1.10    nonaka #endif	/* i386 || amd64 */
     41  1.11    nonaka #endif
     42  1.10    nonaka 
     43   1.2  riastrad #include <sys/types.h>
     44   1.4  riastrad #include <sys/param.h>
     45   1.2  riastrad #include <sys/bus.h>
     46   1.3  riastrad #include <sys/cdefs.h>
     47   1.2  riastrad #include <sys/kmem.h>
     48   1.2  riastrad #include <sys/systm.h>
     49   1.2  riastrad 
     50   1.4  riastrad #include <machine/limits.h>
     51   1.4  riastrad 
     52   1.2  riastrad #include <dev/pci/pcidevs.h>
     53   1.2  riastrad #include <dev/pci/pcireg.h>
     54   1.2  riastrad #include <dev/pci/pcivar.h>
     55   1.4  riastrad #include <dev/pci/agpvar.h>
     56   1.2  riastrad 
     57  1.20  jmcneill #if NACPICA > 0
     58  1.10    nonaka #include <dev/acpi/acpivar.h>
     59  1.10    nonaka #include <dev/acpi/acpi_pci.h>
     60  1.20  jmcneill #else
     61  1.20  jmcneill struct acpi_devnode;
     62  1.20  jmcneill #endif
     63  1.10    nonaka 
     64   1.7  riastrad #include <linux/dma-mapping.h>
     65   1.2  riastrad #include <linux/ioport.h>
     66  1.15  riastrad #include <linux/kernel.h>
     67   1.2  riastrad 
     68  1.10    nonaka struct pci_bus {
     69  1.10    nonaka 	u_int		number;
     70  1.10    nonaka };
     71   1.2  riastrad 
     72   1.2  riastrad struct pci_device_id {
     73   1.2  riastrad 	uint32_t	vendor;
     74   1.2  riastrad 	uint32_t	device;
     75   1.2  riastrad 	uint32_t	subvendor;
     76   1.2  riastrad 	uint32_t	subdevice;
     77   1.2  riastrad 	uint32_t	class;
     78   1.2  riastrad 	uint32_t	class_mask;
     79   1.2  riastrad 	unsigned long	driver_data;
     80   1.2  riastrad };
     81   1.2  riastrad 
     82   1.2  riastrad #define	PCI_ANY_ID		((pcireg_t)-1)
     83   1.2  riastrad 
     84   1.2  riastrad #define	PCI_BASE_CLASS_DISPLAY	PCI_CLASS_DISPLAY
     85   1.2  riastrad 
     86  1.15  riastrad #define	PCI_CLASS_DISPLAY_VGA						\
     87  1.15  riastrad 	((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
     88   1.2  riastrad #define	PCI_CLASS_BRIDGE_ISA						\
     89   1.2  riastrad 	((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
     90   1.2  riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
     91   1.2  riastrad 
     92   1.5  riastrad /* XXX This is getting silly...  */
     93   1.5  riastrad #define	PCI_VENDOR_ID_ASUSTEK	PCI_VENDOR_ASUSTEK
     94   1.5  riastrad #define	PCI_VENDOR_ID_ATI	PCI_VENDOR_ATI
     95   1.5  riastrad #define	PCI_VENDOR_ID_DELL	PCI_VENDOR_DELL
     96   1.5  riastrad #define	PCI_VENDOR_ID_IBM	PCI_VENDOR_IBM
     97   1.5  riastrad #define	PCI_VENDOR_ID_HP	PCI_VENDOR_HP
     98   1.2  riastrad #define	PCI_VENDOR_ID_INTEL	PCI_VENDOR_INTEL
     99   1.7  riastrad #define	PCI_VENDOR_ID_NVIDIA	PCI_VENDOR_NVIDIA
    100   1.5  riastrad #define	PCI_VENDOR_ID_SONY	PCI_VENDOR_SONY
    101   1.5  riastrad #define	PCI_VENDOR_ID_VIA	PCI_VENDOR_VIATECH
    102   1.5  riastrad 
    103   1.5  riastrad #define	PCI_DEVICE_ID_ATI_RADEON_QY	PCI_PRODUCT_ATI_RADEON_RV100_QY
    104   1.2  riastrad 
    105   1.2  riastrad #define	PCI_DEVFN(DEV, FN)						\
    106   1.2  riastrad 	(__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
    107   1.2  riastrad #define	PCI_SLOT(DEVFN)		__SHIFTOUT((DEVFN), __BITS(3, 7))
    108   1.2  riastrad #define	PCI_FUNC(DEVFN)		__SHIFTOUT((DEVFN), __BITS(0, 2))
    109   1.2  riastrad 
    110   1.4  riastrad #define	PCI_NUM_RESOURCES	((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
    111   1.5  riastrad #define	DEVICE_COUNT_RESOURCE	PCI_NUM_RESOURCES
    112   1.4  riastrad 
    113   1.2  riastrad #define	PCI_CAP_ID_AGP	PCI_CAP_AGP
    114   1.2  riastrad 
    115   1.4  riastrad typedef int pci_power_t;
    116   1.4  riastrad 
    117   1.4  riastrad #define	PCI_D0		0
    118   1.4  riastrad #define	PCI_D1		1
    119   1.4  riastrad #define	PCI_D2		2
    120   1.4  riastrad #define	PCI_D3hot	3
    121   1.4  riastrad #define	PCI_D3cold	4
    122   1.4  riastrad 
    123   1.4  riastrad #define	__pci_iomem
    124   1.4  riastrad 
    125   1.2  riastrad struct pci_dev {
    126   1.2  riastrad 	struct pci_attach_args	pd_pa;
    127   1.2  riastrad 	int			pd_kludges;	/* Gotta lose 'em...  */
    128   1.2  riastrad #define	NBPCI_KLUDGE_GET_MUMBLE	0x01
    129   1.2  riastrad #define	NBPCI_KLUDGE_MAP_ROM	0x02
    130   1.2  riastrad 	bus_space_tag_t		pd_rom_bst;
    131   1.2  riastrad 	bus_space_handle_t	pd_rom_bsh;
    132   1.2  riastrad 	bus_size_t		pd_rom_size;
    133  1.18  riastrad 	bus_space_handle_t	pd_rom_found_bsh;
    134  1.19  riastrad 	bus_size_t		pd_rom_found_size;
    135   1.2  riastrad 	void			*pd_rom_vaddr;
    136   1.2  riastrad 	device_t		pd_dev;
    137  1.15  riastrad 	struct drm_device	*pd_drm_dev; /* XXX Nouveau kludge!  */
    138   1.4  riastrad 	struct {
    139   1.4  riastrad 		pcireg_t		type;
    140   1.4  riastrad 		bus_addr_t		addr;
    141   1.4  riastrad 		bus_size_t		size;
    142   1.4  riastrad 		int			flags;
    143   1.4  riastrad 		bus_space_tag_t		bst;
    144   1.4  riastrad 		bus_space_handle_t	bsh;
    145   1.4  riastrad 		void __pci_iomem	*kva;
    146   1.4  riastrad 	}			pd_resources[PCI_NUM_RESOURCES];
    147   1.5  riastrad 	struct pci_conf_state	*pd_saved_state;
    148  1.10    nonaka 	struct acpi_devnode	*pd_ad;
    149   1.2  riastrad 	struct device		dev;		/* XXX Don't believe me!  */
    150   1.2  riastrad 	struct pci_bus		*bus;
    151   1.2  riastrad 	uint32_t		devfn;
    152   1.2  riastrad 	uint16_t		vendor;
    153   1.2  riastrad 	uint16_t		device;
    154   1.2  riastrad 	uint16_t		subsystem_vendor;
    155   1.2  riastrad 	uint16_t		subsystem_device;
    156   1.2  riastrad 	uint8_t			revision;
    157   1.2  riastrad 	uint32_t		class;
    158   1.5  riastrad 	bool			msi_enabled;
    159   1.2  riastrad };
    160   1.2  riastrad 
    161   1.2  riastrad static inline device_t
    162   1.2  riastrad pci_dev_dev(struct pci_dev *pdev)
    163   1.2  riastrad {
    164   1.2  riastrad 	return pdev->pd_dev;
    165   1.2  riastrad }
    166   1.2  riastrad 
    167  1.15  riastrad /* XXX Nouveau kludge!  Don't believe me!  */
    168  1.15  riastrad static inline struct pci_dev *
    169  1.15  riastrad to_pci_dev(struct device *dev)
    170  1.15  riastrad {
    171  1.15  riastrad 
    172  1.15  riastrad 	return container_of(dev, struct pci_dev, dev);
    173  1.15  riastrad }
    174  1.15  riastrad 
    175  1.15  riastrad /* XXX Nouveau kludge!  */
    176  1.15  riastrad static inline struct drm_device *
    177  1.15  riastrad pci_get_drvdata(struct pci_dev *pdev)
    178  1.15  riastrad {
    179  1.15  riastrad 	return pdev->pd_drm_dev;
    180  1.15  riastrad }
    181  1.15  riastrad 
    182   1.2  riastrad static inline void
    183   1.2  riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
    184   1.2  riastrad     const struct pci_attach_args *pa, int kludges)
    185   1.2  riastrad {
    186   1.2  riastrad 	const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
    187   1.2  riastrad 	    PCI_SUBSYS_ID_REG);
    188   1.4  riastrad 	unsigned i;
    189   1.2  riastrad 
    190   1.2  riastrad 	pdev->pd_pa = *pa;
    191   1.2  riastrad 	pdev->pd_kludges = kludges;
    192   1.2  riastrad 	pdev->pd_rom_vaddr = NULL;
    193   1.2  riastrad 	pdev->pd_dev = dev;
    194  1.10    nonaka #if (NACPICA > 0)
    195  1.10    nonaka 	pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
    196  1.10    nonaka 	    pa->pa_device, pa->pa_function);
    197  1.10    nonaka #else
    198  1.10    nonaka 	pdev->pd_ad = NULL;
    199  1.10    nonaka #endif
    200  1.10    nonaka 	pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
    201  1.10    nonaka 	pdev->bus->number = pa->pa_bus;
    202   1.2  riastrad 	pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
    203   1.2  riastrad 	pdev->vendor = PCI_VENDOR(pa->pa_id);
    204   1.2  riastrad 	pdev->device = PCI_PRODUCT(pa->pa_id);
    205   1.2  riastrad 	pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
    206   1.2  riastrad 	pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
    207   1.2  riastrad 	pdev->revision = PCI_REVISION(pa->pa_class);
    208   1.2  riastrad 	pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
    209   1.4  riastrad 
    210   1.4  riastrad 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    211   1.4  riastrad 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    212   1.4  riastrad 		const int reg = PCI_BAR(i);
    213   1.4  riastrad 
    214   1.4  riastrad 		pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
    215   1.4  riastrad 		    pa->pa_tag, reg);
    216   1.4  riastrad 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
    217   1.4  riastrad 			pdev->pd_resources[i].type,
    218   1.4  riastrad 			&pdev->pd_resources[i].addr,
    219   1.4  riastrad 			&pdev->pd_resources[i].size,
    220   1.4  riastrad 			&pdev->pd_resources[i].flags)) {
    221   1.4  riastrad 			pdev->pd_resources[i].addr = 0;
    222   1.4  riastrad 			pdev->pd_resources[i].size = 0;
    223   1.4  riastrad 			pdev->pd_resources[i].flags = 0;
    224   1.4  riastrad 		}
    225   1.4  riastrad 		pdev->pd_resources[i].kva = NULL;
    226   1.4  riastrad 	}
    227   1.2  riastrad }
    228   1.2  riastrad 
    229   1.2  riastrad static inline int
    230   1.2  riastrad pci_find_capability(struct pci_dev *pdev, int cap)
    231   1.2  riastrad {
    232   1.2  riastrad 	return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
    233   1.2  riastrad 	    NULL, NULL);
    234   1.2  riastrad }
    235   1.2  riastrad 
    236   1.4  riastrad static inline int
    237   1.2  riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
    238   1.2  riastrad {
    239   1.2  riastrad 	KASSERT(!ISSET(reg, 3));
    240   1.2  riastrad 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
    241   1.4  riastrad 	return 0;
    242   1.2  riastrad }
    243   1.2  riastrad 
    244   1.4  riastrad static inline int
    245   1.2  riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
    246   1.2  riastrad {
    247   1.2  riastrad 	KASSERT(!ISSET(reg, 1));
    248   1.2  riastrad 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    249   1.8  riastrad 	    (reg &~ 2)) >> (8 * (reg & 2));
    250   1.4  riastrad 	return 0;
    251   1.2  riastrad }
    252   1.2  riastrad 
    253   1.4  riastrad static inline int
    254   1.2  riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
    255   1.2  riastrad {
    256   1.2  riastrad 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    257   1.8  riastrad 	    (reg &~ 3)) >> (8 * (reg & 3));
    258   1.4  riastrad 	return 0;
    259   1.2  riastrad }
    260   1.2  riastrad 
    261   1.4  riastrad static inline int
    262   1.2  riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
    263   1.2  riastrad {
    264   1.2  riastrad 	KASSERT(!ISSET(reg, 3));
    265   1.2  riastrad 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
    266   1.4  riastrad 	return 0;
    267   1.2  riastrad }
    268   1.2  riastrad 
    269   1.2  riastrad static inline void
    270   1.2  riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
    271   1.2  riastrad     uint32_t value)
    272   1.2  riastrad {
    273   1.2  riastrad 	const uint32_t mask = ~((~0UL) << (8 * bytes));
    274   1.2  riastrad 	const int reg32 = (reg &~ 3);
    275   1.2  riastrad 	const unsigned int shift = (8 * (reg & 3));
    276   1.2  riastrad 	uint32_t value32;
    277   1.2  riastrad 
    278   1.2  riastrad 	KASSERT(bytes <= 4);
    279   1.2  riastrad 	KASSERT(!ISSET(value, ~mask));
    280   1.2  riastrad 	pci_read_config_dword(pdev, reg32, &value32);
    281   1.2  riastrad 	value32 &=~ (mask << shift);
    282   1.2  riastrad 	value32 |= (value << shift);
    283   1.2  riastrad 	pci_write_config_dword(pdev, reg32, value32);
    284   1.2  riastrad }
    285   1.2  riastrad 
    286   1.4  riastrad static inline int
    287   1.2  riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
    288   1.2  riastrad {
    289   1.2  riastrad 	KASSERT(!ISSET(reg, 1));
    290   1.2  riastrad 	pci_rmw_config(pdev, reg, 2, value);
    291   1.4  riastrad 	return 0;
    292   1.2  riastrad }
    293   1.2  riastrad 
    294   1.4  riastrad static inline int
    295   1.2  riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
    296   1.2  riastrad {
    297   1.2  riastrad 	pci_rmw_config(pdev, reg, 1, value);
    298   1.4  riastrad 	return 0;
    299   1.2  riastrad }
    300   1.2  riastrad 
    301   1.2  riastrad /*
    302   1.2  riastrad  * XXX pci msi
    303   1.2  riastrad  */
    304   1.5  riastrad static inline int
    305   1.2  riastrad pci_enable_msi(struct pci_dev *pdev)
    306   1.2  riastrad {
    307   1.5  riastrad 	return -ENOSYS;
    308   1.2  riastrad }
    309   1.2  riastrad 
    310   1.2  riastrad static inline void
    311   1.5  riastrad pci_disable_msi(struct pci_dev *pdev __unused)
    312   1.2  riastrad {
    313   1.2  riastrad 	KASSERT(pdev->msi_enabled);
    314   1.2  riastrad }
    315   1.2  riastrad 
    316   1.2  riastrad static inline void
    317   1.2  riastrad pci_set_master(struct pci_dev *pdev)
    318   1.2  riastrad {
    319   1.2  riastrad 	pcireg_t csr;
    320   1.2  riastrad 
    321   1.2  riastrad 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    322   1.2  riastrad 	    PCI_COMMAND_STATUS_REG);
    323   1.2  riastrad 	csr |= PCI_COMMAND_MASTER_ENABLE;
    324   1.2  riastrad 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    325   1.2  riastrad 	    PCI_COMMAND_STATUS_REG, csr);
    326   1.2  riastrad }
    327   1.2  riastrad 
    328   1.5  riastrad static inline void
    329   1.5  riastrad pci_clear_master(struct pci_dev *pdev)
    330   1.5  riastrad {
    331   1.5  riastrad 	pcireg_t csr;
    332   1.5  riastrad 
    333   1.5  riastrad 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    334   1.5  riastrad 	    PCI_COMMAND_STATUS_REG);
    335   1.5  riastrad 	csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
    336   1.5  riastrad 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    337   1.5  riastrad 	    PCI_COMMAND_STATUS_REG, csr);
    338   1.5  riastrad }
    339   1.5  riastrad 
    340  1.17  riastrad #define	PCIBIOS_MIN_MEM	0x100000	/* XXX bogus x86 kludge bollocks */
    341   1.2  riastrad 
    342   1.2  riastrad static inline bus_addr_t
    343   1.2  riastrad pcibios_align_resource(void *p, const struct resource *resource,
    344   1.2  riastrad     bus_addr_t addr, bus_size_t size)
    345   1.2  riastrad {
    346   1.2  riastrad 	panic("pcibios_align_resource has accessed unaligned neurons!");
    347   1.2  riastrad }
    348   1.2  riastrad 
    349   1.2  riastrad static inline int
    350   1.2  riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
    351   1.2  riastrad     bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
    352   1.2  riastrad     bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
    353   1.2  riastrad 	bus_size_t) __unused,
    354   1.2  riastrad     struct pci_dev *pdev)
    355   1.2  riastrad {
    356   1.2  riastrad 	const struct pci_attach_args *const pa = &pdev->pd_pa;
    357   1.2  riastrad 	bus_space_tag_t bst;
    358   1.2  riastrad 	int error;
    359   1.2  riastrad 
    360   1.2  riastrad 	switch (resource->flags) {
    361   1.2  riastrad 	case IORESOURCE_MEM:
    362   1.2  riastrad 		bst = pa->pa_memt;
    363   1.2  riastrad 		break;
    364   1.2  riastrad 
    365   1.2  riastrad 	case IORESOURCE_IO:
    366   1.2  riastrad 		bst = pa->pa_iot;
    367   1.2  riastrad 		break;
    368   1.2  riastrad 
    369   1.2  riastrad 	default:
    370   1.2  riastrad 		panic("I don't know what kind of resource you want!");
    371   1.2  riastrad 	}
    372   1.2  riastrad 
    373   1.2  riastrad 	resource->r_bst = bst;
    374   1.3  riastrad 	error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
    375   1.2  riastrad 	    size, align, 0, 0, &resource->start, &resource->r_bsh);
    376   1.2  riastrad 	if (error)
    377   1.2  riastrad 		return error;
    378   1.2  riastrad 
    379   1.2  riastrad 	resource->size = size;
    380   1.2  riastrad 	return 0;
    381   1.2  riastrad }
    382   1.2  riastrad 
    383   1.2  riastrad /*
    384   1.2  riastrad  * XXX Mega-kludgerific!  pci_get_bus_and_slot and pci_get_class are
    385   1.2  riastrad  * defined only for their single purposes in i915drm, in
    386   1.2  riastrad  * i915_get_bridge_dev and intel_detect_pch.  We can't define them more
    387   1.2  riastrad  * generally without adapting pci_find_device (and pci_enumerate_bus
    388   1.2  riastrad  * internally) to pass a cookie through.
    389   1.2  riastrad  */
    390   1.2  riastrad 
    391   1.2  riastrad static inline int		/* XXX inline?  */
    392   1.2  riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
    393   1.2  riastrad {
    394   1.2  riastrad 
    395   1.2  riastrad 	if (pa->pa_bus != 0)
    396   1.2  riastrad 		return 0;
    397   1.2  riastrad 	if (pa->pa_device != 0)
    398   1.2  riastrad 		return 0;
    399   1.2  riastrad 	if (pa->pa_function != 0)
    400   1.2  riastrad 		return 0;
    401   1.2  riastrad 
    402   1.2  riastrad 	return 1;
    403   1.2  riastrad }
    404   1.2  riastrad 
    405   1.2  riastrad static inline struct pci_dev *
    406   1.2  riastrad pci_get_bus_and_slot(int bus, int slot)
    407   1.2  riastrad {
    408   1.2  riastrad 	struct pci_attach_args pa;
    409   1.2  riastrad 
    410   1.2  riastrad 	KASSERT(bus == 0);
    411   1.2  riastrad 	KASSERT(slot == PCI_DEVFN(0, 0));
    412   1.2  riastrad 
    413   1.2  riastrad 	if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
    414   1.2  riastrad 		return NULL;
    415   1.2  riastrad 
    416   1.2  riastrad 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    417   1.2  riastrad 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    418   1.2  riastrad 
    419   1.2  riastrad 	return pdev;
    420   1.2  riastrad }
    421   1.2  riastrad 
    422   1.2  riastrad static inline int		/* XXX inline?  */
    423   1.2  riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
    424   1.2  riastrad {
    425   1.2  riastrad 
    426   1.2  riastrad 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
    427   1.2  riastrad 		return 0;
    428   1.2  riastrad 	if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
    429   1.2  riastrad 		return 0;
    430   1.2  riastrad 
    431   1.2  riastrad 	return 1;
    432   1.2  riastrad }
    433   1.2  riastrad 
    434   1.4  riastrad static inline void
    435   1.4  riastrad pci_dev_put(struct pci_dev *pdev)
    436   1.4  riastrad {
    437   1.4  riastrad 
    438   1.4  riastrad 	if (pdev == NULL)
    439   1.4  riastrad 		return;
    440   1.4  riastrad 
    441   1.4  riastrad 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
    442   1.4  riastrad 	kmem_free(pdev, sizeof(*pdev));
    443   1.4  riastrad }
    444   1.4  riastrad 
    445   1.2  riastrad static inline struct pci_dev *
    446   1.4  riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
    447   1.2  riastrad {
    448   1.2  riastrad 	struct pci_attach_args pa;
    449   1.2  riastrad 
    450   1.2  riastrad 	KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
    451   1.4  riastrad 
    452   1.4  riastrad 	if (from != NULL) {
    453   1.4  riastrad 		pci_dev_put(from);
    454   1.4  riastrad 		return NULL;
    455   1.4  riastrad 	}
    456   1.2  riastrad 
    457   1.2  riastrad 	if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
    458   1.2  riastrad 		return NULL;
    459   1.2  riastrad 
    460   1.2  riastrad 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    461   1.2  riastrad 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    462   1.2  riastrad 
    463   1.2  riastrad 	return pdev;
    464   1.2  riastrad }
    465   1.2  riastrad 
    466   1.2  riastrad #define	__pci_rom_iomem
    467   1.2  riastrad 
    468   1.2  riastrad static inline void
    469   1.2  riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
    470   1.2  riastrad {
    471   1.2  riastrad 
    472  1.12  riastrad 	/* XXX Disable the ROM address decoder.  */
    473   1.2  riastrad 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    474   1.2  riastrad 	KASSERT(vaddr == pdev->pd_rom_vaddr);
    475   1.2  riastrad 	bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
    476   1.2  riastrad 	pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
    477   1.2  riastrad 	pdev->pd_rom_vaddr = NULL;
    478   1.2  riastrad }
    479   1.2  riastrad 
    480   1.9  riastrad /* XXX Whattakludge!  Should move this in sys/arch/.  */
    481   1.9  riastrad static int
    482   1.9  riastrad pci_map_rom_md(struct pci_dev *pdev)
    483   1.9  riastrad {
    484   1.9  riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
    485   1.9  riastrad 	const bus_addr_t rom_base = 0xc0000;
    486   1.9  riastrad 	const bus_size_t rom_size = 0x20000;
    487   1.9  riastrad 	bus_space_handle_t rom_bsh;
    488   1.9  riastrad 	int error;
    489   1.9  riastrad 
    490   1.9  riastrad 	if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
    491   1.9  riastrad 		return ENXIO;
    492   1.9  riastrad 	if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
    493   1.9  riastrad 		return ENXIO;
    494   1.9  riastrad 	/* XXX Check whether this is the primary VGA card?  */
    495   1.9  riastrad 	error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
    496   1.9  riastrad 	    (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
    497   1.9  riastrad 	if (error)
    498   1.9  riastrad 		return ENXIO;
    499   1.9  riastrad 
    500   1.9  riastrad 	pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
    501   1.9  riastrad 	pdev->pd_rom_bsh = rom_bsh;
    502   1.9  riastrad 	pdev->pd_rom_size = rom_size;
    503   1.9  riastrad 
    504   1.9  riastrad 	return 0;
    505   1.9  riastrad #else
    506   1.9  riastrad 	return ENXIO;
    507   1.9  riastrad #endif
    508   1.9  riastrad }
    509   1.9  riastrad 
    510   1.2  riastrad static inline void __pci_rom_iomem *
    511   1.2  riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
    512   1.2  riastrad {
    513   1.2  riastrad 
    514   1.2  riastrad 	KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    515   1.2  riastrad 
    516   1.2  riastrad 	if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
    517   1.2  riastrad 		(BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
    518   1.2  riastrad 		&pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
    519   1.9  riastrad 	    != 0 &&
    520   1.9  riastrad 	    pci_map_rom_md(pdev) != 0)
    521   1.2  riastrad 		return NULL;
    522   1.2  riastrad 	pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
    523   1.2  riastrad 
    524   1.2  riastrad 	/* XXX This type is obviously wrong in general...  */
    525   1.2  riastrad 	if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
    526  1.18  riastrad 		pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
    527  1.18  riastrad 		&pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
    528   1.2  riastrad 		pci_unmap_rom(pdev, NULL);
    529   1.2  riastrad 		return NULL;
    530   1.2  riastrad 	}
    531   1.2  riastrad 
    532  1.18  riastrad 	KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
    533  1.18  riastrad 	*sizep = pdev->pd_rom_found_size;
    534  1.18  riastrad 	pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
    535  1.18  riastrad 	    pdev->pd_rom_found_bsh);
    536   1.2  riastrad 	return pdev->pd_rom_vaddr;
    537   1.2  riastrad }
    538   1.2  riastrad 
    539  1.13  riastrad static inline void __pci_rom_iomem *
    540  1.14  riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
    541  1.13  riastrad {
    542  1.13  riastrad 
    543  1.14  riastrad 	*sizep = 0;
    544  1.13  riastrad 	return NULL;
    545  1.13  riastrad }
    546  1.13  riastrad 
    547  1.12  riastrad static inline int
    548  1.12  riastrad pci_enable_rom(struct pci_dev *pdev)
    549  1.12  riastrad {
    550  1.12  riastrad 	const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
    551  1.12  riastrad 	const pcitag_t tag = pdev->pd_pa.pa_tag;
    552  1.12  riastrad 	pcireg_t addr;
    553  1.12  riastrad 	int s;
    554  1.12  riastrad 
    555  1.12  riastrad 	/* XXX Don't do anything if the ROM isn't there.  */
    556  1.12  riastrad 
    557  1.12  riastrad 	s = splhigh();
    558  1.12  riastrad 	addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
    559  1.12  riastrad 	addr |= PCI_MAPREG_ROM_ENABLE;
    560  1.12  riastrad 	pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
    561  1.12  riastrad 	splx(s);
    562  1.12  riastrad 
    563  1.12  riastrad 	return 0;
    564  1.12  riastrad }
    565  1.12  riastrad 
    566  1.12  riastrad static inline void
    567  1.12  riastrad pci_disable_rom(struct pci_dev *pdev)
    568  1.12  riastrad {
    569  1.12  riastrad 	const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
    570  1.12  riastrad 	const pcitag_t tag = pdev->pd_pa.pa_tag;
    571  1.12  riastrad 	pcireg_t addr;
    572  1.12  riastrad 	int s;
    573  1.12  riastrad 
    574  1.12  riastrad 	s = splhigh();
    575  1.12  riastrad 	addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
    576  1.12  riastrad 	addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
    577  1.12  riastrad 	pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
    578  1.12  riastrad 	splx(s);
    579  1.12  riastrad }
    580  1.12  riastrad 
    581   1.4  riastrad static inline bus_addr_t
    582   1.4  riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
    583   1.4  riastrad {
    584   1.4  riastrad 
    585   1.4  riastrad 	KASSERT(i < PCI_NUM_RESOURCES);
    586   1.4  riastrad 	return pdev->pd_resources[i].addr;
    587   1.4  riastrad }
    588   1.4  riastrad 
    589   1.4  riastrad static inline bus_size_t
    590   1.4  riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
    591   1.4  riastrad {
    592   1.4  riastrad 
    593   1.4  riastrad 	KASSERT(i < PCI_NUM_RESOURCES);
    594   1.4  riastrad 	return pdev->pd_resources[i].size;
    595   1.4  riastrad }
    596   1.4  riastrad 
    597   1.4  riastrad static inline bus_addr_t
    598   1.4  riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
    599   1.4  riastrad {
    600   1.4  riastrad 
    601   1.4  riastrad 	return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
    602   1.4  riastrad }
    603   1.4  riastrad 
    604   1.4  riastrad static inline int
    605   1.4  riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
    606   1.4  riastrad {
    607   1.4  riastrad 
    608   1.4  riastrad 	KASSERT(i < PCI_NUM_RESOURCES);
    609   1.4  riastrad 	return pdev->pd_resources[i].flags;
    610   1.4  riastrad }
    611   1.4  riastrad 
    612   1.4  riastrad static inline void __pci_iomem *
    613   1.4  riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
    614   1.4  riastrad {
    615   1.4  riastrad 	int error;
    616   1.4  riastrad 
    617   1.4  riastrad 	KASSERT(i < PCI_NUM_RESOURCES);
    618   1.4  riastrad 	KASSERT(pdev->pd_resources[i].kva == NULL);
    619   1.4  riastrad 
    620   1.4  riastrad 	if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
    621   1.4  riastrad 		return NULL;
    622   1.4  riastrad 	if (pdev->pd_resources[i].size < size)
    623   1.4  riastrad 		return NULL;
    624   1.4  riastrad 	error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
    625   1.4  riastrad 	    size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
    626   1.4  riastrad 	    &pdev->pd_resources[i].bsh);
    627   1.4  riastrad 	if (error) {
    628   1.4  riastrad 		/* Horrible hack: try asking the fake AGP device.  */
    629   1.4  riastrad 		if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
    630   1.4  riastrad 			&pdev->pd_resources[i].bsh))
    631   1.4  riastrad 			return NULL;
    632   1.4  riastrad 	}
    633   1.4  riastrad 	pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
    634   1.4  riastrad 	pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
    635   1.4  riastrad 	    pdev->pd_resources[i].bsh);
    636   1.4  riastrad 
    637   1.4  riastrad 	return pdev->pd_resources[i].kva;
    638   1.4  riastrad }
    639   1.4  riastrad 
    640   1.4  riastrad static inline void
    641   1.4  riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
    642   1.4  riastrad {
    643   1.4  riastrad 	unsigned i;
    644   1.4  riastrad 
    645   1.4  riastrad 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    646   1.4  riastrad 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    647   1.4  riastrad 		if (pdev->pd_resources[i].kva == kva)
    648   1.4  riastrad 			break;
    649   1.4  riastrad 	}
    650   1.4  riastrad 	KASSERT(i < PCI_NUM_RESOURCES);
    651   1.4  riastrad 
    652   1.4  riastrad 	pdev->pd_resources[i].kva = NULL;
    653   1.4  riastrad 	bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
    654   1.4  riastrad 	    pdev->pd_resources[i].size);
    655   1.4  riastrad }
    656   1.4  riastrad 
    657   1.5  riastrad static inline void
    658   1.5  riastrad pci_save_state(struct pci_dev *pdev)
    659   1.5  riastrad {
    660   1.5  riastrad 
    661   1.5  riastrad 	KASSERT(pdev->pd_saved_state == NULL);
    662   1.5  riastrad 	pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
    663   1.5  riastrad 	    KM_SLEEP);
    664   1.5  riastrad 	pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    665   1.5  riastrad 	    pdev->pd_saved_state);
    666   1.5  riastrad }
    667   1.5  riastrad 
    668   1.5  riastrad static inline void
    669   1.5  riastrad pci_restore_state(struct pci_dev *pdev)
    670   1.5  riastrad {
    671   1.5  riastrad 
    672   1.5  riastrad 	KASSERT(pdev->pd_saved_state != NULL);
    673   1.5  riastrad 	pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    674   1.5  riastrad 	    pdev->pd_saved_state);
    675   1.5  riastrad 	kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
    676   1.5  riastrad 	pdev->pd_saved_state = NULL;
    677   1.5  riastrad }
    678   1.5  riastrad 
    679   1.5  riastrad static inline bool
    680   1.5  riastrad pci_is_pcie(struct pci_dev *pdev)
    681   1.5  riastrad {
    682   1.5  riastrad 
    683   1.5  riastrad 	return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
    684   1.5  riastrad }
    685   1.5  riastrad 
    686   1.7  riastrad static inline bool
    687   1.7  riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
    688   1.7  riastrad {
    689   1.7  riastrad 
    690   1.7  riastrad 	/* XXX Cop-out.  */
    691   1.7  riastrad 	if (mask > DMA_BIT_MASK(32))
    692   1.7  riastrad 		return pci_dma64_available(&pdev->pd_pa);
    693   1.7  riastrad 	else
    694   1.7  riastrad 		return true;
    695   1.7  riastrad }
    696   1.7  riastrad 
    697   1.2  riastrad #endif  /* _LINUX_PCI_H_ */
    698