pci.h revision 1.23 1 1.23 nonaka /* $NetBSD: pci.h,v 1.23 2017/03/02 04:31:51 nonaka Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.10 nonaka #if defined(i386) || defined(amd64)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.20 jmcneill #if NACPICA > 0
58 1.10 nonaka #include <dev/acpi/acpivar.h>
59 1.10 nonaka #include <dev/acpi/acpi_pci.h>
60 1.20 jmcneill #else
61 1.20 jmcneill struct acpi_devnode;
62 1.20 jmcneill #endif
63 1.10 nonaka
64 1.7 riastrad #include <linux/dma-mapping.h>
65 1.2 riastrad #include <linux/ioport.h>
66 1.15 riastrad #include <linux/kernel.h>
67 1.2 riastrad
68 1.10 nonaka struct pci_bus {
69 1.10 nonaka u_int number;
70 1.10 nonaka };
71 1.2 riastrad
72 1.2 riastrad struct pci_device_id {
73 1.2 riastrad uint32_t vendor;
74 1.2 riastrad uint32_t device;
75 1.2 riastrad uint32_t subvendor;
76 1.2 riastrad uint32_t subdevice;
77 1.2 riastrad uint32_t class;
78 1.2 riastrad uint32_t class_mask;
79 1.2 riastrad unsigned long driver_data;
80 1.2 riastrad };
81 1.2 riastrad
82 1.2 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
83 1.2 riastrad
84 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
85 1.2 riastrad
86 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
87 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
88 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
89 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
90 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
91 1.2 riastrad
92 1.5 riastrad /* XXX This is getting silly... */
93 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
94 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
95 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
96 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
97 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
98 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
99 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
100 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
101 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
102 1.5 riastrad
103 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
104 1.2 riastrad
105 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
106 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
107 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
108 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
109 1.2 riastrad
110 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
111 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
112 1.4 riastrad
113 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
114 1.2 riastrad
115 1.4 riastrad typedef int pci_power_t;
116 1.4 riastrad
117 1.4 riastrad #define PCI_D0 0
118 1.4 riastrad #define PCI_D1 1
119 1.4 riastrad #define PCI_D2 2
120 1.4 riastrad #define PCI_D3hot 3
121 1.4 riastrad #define PCI_D3cold 4
122 1.4 riastrad
123 1.4 riastrad #define __pci_iomem
124 1.4 riastrad
125 1.2 riastrad struct pci_dev {
126 1.2 riastrad struct pci_attach_args pd_pa;
127 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
128 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
129 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
130 1.2 riastrad bus_space_tag_t pd_rom_bst;
131 1.2 riastrad bus_space_handle_t pd_rom_bsh;
132 1.2 riastrad bus_size_t pd_rom_size;
133 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
134 1.19 riastrad bus_size_t pd_rom_found_size;
135 1.2 riastrad void *pd_rom_vaddr;
136 1.2 riastrad device_t pd_dev;
137 1.15 riastrad struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
138 1.4 riastrad struct {
139 1.4 riastrad pcireg_t type;
140 1.4 riastrad bus_addr_t addr;
141 1.4 riastrad bus_size_t size;
142 1.4 riastrad int flags;
143 1.4 riastrad bus_space_tag_t bst;
144 1.4 riastrad bus_space_handle_t bsh;
145 1.4 riastrad void __pci_iomem *kva;
146 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
147 1.5 riastrad struct pci_conf_state *pd_saved_state;
148 1.10 nonaka struct acpi_devnode *pd_ad;
149 1.2 riastrad struct pci_bus *bus;
150 1.2 riastrad uint32_t devfn;
151 1.2 riastrad uint16_t vendor;
152 1.2 riastrad uint16_t device;
153 1.2 riastrad uint16_t subsystem_vendor;
154 1.2 riastrad uint16_t subsystem_device;
155 1.2 riastrad uint8_t revision;
156 1.2 riastrad uint32_t class;
157 1.5 riastrad bool msi_enabled;
158 1.23 nonaka pci_intr_handle_t *intr_handles;
159 1.2 riastrad };
160 1.2 riastrad
161 1.2 riastrad static inline device_t
162 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
163 1.2 riastrad {
164 1.2 riastrad return pdev->pd_dev;
165 1.2 riastrad }
166 1.2 riastrad
167 1.15 riastrad /* XXX Nouveau kludge! */
168 1.15 riastrad static inline struct drm_device *
169 1.15 riastrad pci_get_drvdata(struct pci_dev *pdev)
170 1.15 riastrad {
171 1.15 riastrad return pdev->pd_drm_dev;
172 1.15 riastrad }
173 1.15 riastrad
174 1.2 riastrad static inline void
175 1.2 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
176 1.2 riastrad const struct pci_attach_args *pa, int kludges)
177 1.2 riastrad {
178 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
179 1.2 riastrad PCI_SUBSYS_ID_REG);
180 1.4 riastrad unsigned i;
181 1.2 riastrad
182 1.2 riastrad pdev->pd_pa = *pa;
183 1.2 riastrad pdev->pd_kludges = kludges;
184 1.2 riastrad pdev->pd_rom_vaddr = NULL;
185 1.2 riastrad pdev->pd_dev = dev;
186 1.10 nonaka #if (NACPICA > 0)
187 1.10 nonaka pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
188 1.10 nonaka pa->pa_device, pa->pa_function);
189 1.10 nonaka #else
190 1.10 nonaka pdev->pd_ad = NULL;
191 1.10 nonaka #endif
192 1.10 nonaka pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
193 1.10 nonaka pdev->bus->number = pa->pa_bus;
194 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
195 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
196 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
197 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
198 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
199 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
200 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
201 1.4 riastrad
202 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
203 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
204 1.4 riastrad const int reg = PCI_BAR(i);
205 1.4 riastrad
206 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
207 1.4 riastrad pa->pa_tag, reg);
208 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
209 1.4 riastrad pdev->pd_resources[i].type,
210 1.4 riastrad &pdev->pd_resources[i].addr,
211 1.4 riastrad &pdev->pd_resources[i].size,
212 1.4 riastrad &pdev->pd_resources[i].flags)) {
213 1.4 riastrad pdev->pd_resources[i].addr = 0;
214 1.4 riastrad pdev->pd_resources[i].size = 0;
215 1.4 riastrad pdev->pd_resources[i].flags = 0;
216 1.4 riastrad }
217 1.4 riastrad pdev->pd_resources[i].kva = NULL;
218 1.4 riastrad }
219 1.2 riastrad }
220 1.2 riastrad
221 1.2 riastrad static inline int
222 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
223 1.2 riastrad {
224 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
225 1.2 riastrad NULL, NULL);
226 1.2 riastrad }
227 1.2 riastrad
228 1.4 riastrad static inline int
229 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
230 1.2 riastrad {
231 1.2 riastrad KASSERT(!ISSET(reg, 3));
232 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
233 1.4 riastrad return 0;
234 1.2 riastrad }
235 1.2 riastrad
236 1.4 riastrad static inline int
237 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
238 1.2 riastrad {
239 1.2 riastrad KASSERT(!ISSET(reg, 1));
240 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
241 1.8 riastrad (reg &~ 2)) >> (8 * (reg & 2));
242 1.4 riastrad return 0;
243 1.2 riastrad }
244 1.2 riastrad
245 1.4 riastrad static inline int
246 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
247 1.2 riastrad {
248 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
249 1.8 riastrad (reg &~ 3)) >> (8 * (reg & 3));
250 1.4 riastrad return 0;
251 1.2 riastrad }
252 1.2 riastrad
253 1.4 riastrad static inline int
254 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
255 1.2 riastrad {
256 1.2 riastrad KASSERT(!ISSET(reg, 3));
257 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
258 1.4 riastrad return 0;
259 1.2 riastrad }
260 1.2 riastrad
261 1.2 riastrad static inline void
262 1.2 riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
263 1.2 riastrad uint32_t value)
264 1.2 riastrad {
265 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
266 1.2 riastrad const int reg32 = (reg &~ 3);
267 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
268 1.2 riastrad uint32_t value32;
269 1.2 riastrad
270 1.2 riastrad KASSERT(bytes <= 4);
271 1.2 riastrad KASSERT(!ISSET(value, ~mask));
272 1.2 riastrad pci_read_config_dword(pdev, reg32, &value32);
273 1.2 riastrad value32 &=~ (mask << shift);
274 1.2 riastrad value32 |= (value << shift);
275 1.2 riastrad pci_write_config_dword(pdev, reg32, value32);
276 1.2 riastrad }
277 1.2 riastrad
278 1.4 riastrad static inline int
279 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
280 1.2 riastrad {
281 1.2 riastrad KASSERT(!ISSET(reg, 1));
282 1.2 riastrad pci_rmw_config(pdev, reg, 2, value);
283 1.4 riastrad return 0;
284 1.2 riastrad }
285 1.2 riastrad
286 1.4 riastrad static inline int
287 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
288 1.2 riastrad {
289 1.2 riastrad pci_rmw_config(pdev, reg, 1, value);
290 1.4 riastrad return 0;
291 1.2 riastrad }
292 1.2 riastrad
293 1.5 riastrad static inline int
294 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
295 1.2 riastrad {
296 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
297 1.23 nonaka
298 1.23 nonaka if (pci_msi_alloc_exact(pa, &pdev->intr_handles, 1))
299 1.23 nonaka return -EINVAL;
300 1.23 nonaka
301 1.23 nonaka pdev->msi_enabled = 1;
302 1.23 nonaka return 0;
303 1.2 riastrad }
304 1.2 riastrad
305 1.2 riastrad static inline void
306 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
307 1.2 riastrad {
308 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
309 1.23 nonaka
310 1.23 nonaka if (pdev->intr_handles != NULL) {
311 1.23 nonaka pci_intr_release(pa->pa_pc, pdev->intr_handles, 1);
312 1.23 nonaka pdev->intr_handles = NULL;
313 1.23 nonaka }
314 1.23 nonaka pdev->msi_enabled = 0;
315 1.2 riastrad }
316 1.2 riastrad
317 1.2 riastrad static inline void
318 1.2 riastrad pci_set_master(struct pci_dev *pdev)
319 1.2 riastrad {
320 1.2 riastrad pcireg_t csr;
321 1.2 riastrad
322 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
323 1.2 riastrad PCI_COMMAND_STATUS_REG);
324 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
325 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
326 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
327 1.2 riastrad }
328 1.2 riastrad
329 1.5 riastrad static inline void
330 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
331 1.5 riastrad {
332 1.5 riastrad pcireg_t csr;
333 1.5 riastrad
334 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
335 1.5 riastrad PCI_COMMAND_STATUS_REG);
336 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
337 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
338 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
339 1.5 riastrad }
340 1.5 riastrad
341 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
342 1.2 riastrad
343 1.2 riastrad static inline bus_addr_t
344 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
345 1.2 riastrad bus_addr_t addr, bus_size_t size)
346 1.2 riastrad {
347 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
348 1.2 riastrad }
349 1.2 riastrad
350 1.2 riastrad static inline int
351 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
352 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
353 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
354 1.2 riastrad bus_size_t) __unused,
355 1.2 riastrad struct pci_dev *pdev)
356 1.2 riastrad {
357 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
358 1.2 riastrad bus_space_tag_t bst;
359 1.2 riastrad int error;
360 1.2 riastrad
361 1.2 riastrad switch (resource->flags) {
362 1.2 riastrad case IORESOURCE_MEM:
363 1.2 riastrad bst = pa->pa_memt;
364 1.2 riastrad break;
365 1.2 riastrad
366 1.2 riastrad case IORESOURCE_IO:
367 1.2 riastrad bst = pa->pa_iot;
368 1.2 riastrad break;
369 1.2 riastrad
370 1.2 riastrad default:
371 1.2 riastrad panic("I don't know what kind of resource you want!");
372 1.2 riastrad }
373 1.2 riastrad
374 1.2 riastrad resource->r_bst = bst;
375 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
376 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
377 1.2 riastrad if (error)
378 1.2 riastrad return error;
379 1.2 riastrad
380 1.2 riastrad resource->size = size;
381 1.2 riastrad return 0;
382 1.2 riastrad }
383 1.2 riastrad
384 1.2 riastrad /*
385 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
386 1.2 riastrad * defined only for their single purposes in i915drm, in
387 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
388 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
389 1.2 riastrad * internally) to pass a cookie through.
390 1.2 riastrad */
391 1.2 riastrad
392 1.2 riastrad static inline int /* XXX inline? */
393 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
394 1.2 riastrad {
395 1.2 riastrad
396 1.2 riastrad if (pa->pa_bus != 0)
397 1.2 riastrad return 0;
398 1.2 riastrad if (pa->pa_device != 0)
399 1.2 riastrad return 0;
400 1.2 riastrad if (pa->pa_function != 0)
401 1.2 riastrad return 0;
402 1.2 riastrad
403 1.2 riastrad return 1;
404 1.2 riastrad }
405 1.2 riastrad
406 1.2 riastrad static inline struct pci_dev *
407 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
408 1.2 riastrad {
409 1.2 riastrad struct pci_attach_args pa;
410 1.2 riastrad
411 1.2 riastrad KASSERT(bus == 0);
412 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
413 1.2 riastrad
414 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
415 1.2 riastrad return NULL;
416 1.2 riastrad
417 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
418 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
419 1.2 riastrad
420 1.2 riastrad return pdev;
421 1.2 riastrad }
422 1.2 riastrad
423 1.2 riastrad static inline int /* XXX inline? */
424 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
425 1.2 riastrad {
426 1.2 riastrad
427 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
428 1.2 riastrad return 0;
429 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
430 1.2 riastrad return 0;
431 1.2 riastrad
432 1.2 riastrad return 1;
433 1.2 riastrad }
434 1.2 riastrad
435 1.4 riastrad static inline void
436 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
437 1.4 riastrad {
438 1.4 riastrad
439 1.4 riastrad if (pdev == NULL)
440 1.4 riastrad return;
441 1.4 riastrad
442 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
443 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
444 1.4 riastrad }
445 1.4 riastrad
446 1.2 riastrad static inline struct pci_dev *
447 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
448 1.2 riastrad {
449 1.2 riastrad struct pci_attach_args pa;
450 1.2 riastrad
451 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
452 1.4 riastrad
453 1.4 riastrad if (from != NULL) {
454 1.4 riastrad pci_dev_put(from);
455 1.4 riastrad return NULL;
456 1.4 riastrad }
457 1.2 riastrad
458 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
459 1.2 riastrad return NULL;
460 1.2 riastrad
461 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
462 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
463 1.2 riastrad
464 1.2 riastrad return pdev;
465 1.2 riastrad }
466 1.2 riastrad
467 1.2 riastrad #define __pci_rom_iomem
468 1.2 riastrad
469 1.2 riastrad static inline void
470 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
471 1.2 riastrad {
472 1.2 riastrad
473 1.12 riastrad /* XXX Disable the ROM address decoder. */
474 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
475 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
476 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
477 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
478 1.2 riastrad pdev->pd_rom_vaddr = NULL;
479 1.2 riastrad }
480 1.2 riastrad
481 1.9 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
482 1.9 riastrad static int
483 1.9 riastrad pci_map_rom_md(struct pci_dev *pdev)
484 1.9 riastrad {
485 1.9 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
486 1.9 riastrad const bus_addr_t rom_base = 0xc0000;
487 1.9 riastrad const bus_size_t rom_size = 0x20000;
488 1.9 riastrad bus_space_handle_t rom_bsh;
489 1.9 riastrad int error;
490 1.9 riastrad
491 1.9 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
492 1.9 riastrad return ENXIO;
493 1.9 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
494 1.9 riastrad return ENXIO;
495 1.9 riastrad /* XXX Check whether this is the primary VGA card? */
496 1.9 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
497 1.9 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
498 1.9 riastrad if (error)
499 1.9 riastrad return ENXIO;
500 1.9 riastrad
501 1.9 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
502 1.9 riastrad pdev->pd_rom_bsh = rom_bsh;
503 1.9 riastrad pdev->pd_rom_size = rom_size;
504 1.22 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
505 1.9 riastrad
506 1.9 riastrad return 0;
507 1.9 riastrad #else
508 1.9 riastrad return ENXIO;
509 1.9 riastrad #endif
510 1.9 riastrad }
511 1.9 riastrad
512 1.2 riastrad static inline void __pci_rom_iomem *
513 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
514 1.2 riastrad {
515 1.2 riastrad
516 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
517 1.2 riastrad
518 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
519 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
520 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
521 1.22 riastrad != 0)
522 1.22 riastrad goto fail_mi;
523 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
524 1.2 riastrad
525 1.2 riastrad /* XXX This type is obviously wrong in general... */
526 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
527 1.18 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
528 1.18 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
529 1.2 riastrad pci_unmap_rom(pdev, NULL);
530 1.22 riastrad goto fail_mi;
531 1.22 riastrad }
532 1.22 riastrad goto success;
533 1.22 riastrad
534 1.22 riastrad fail_mi:
535 1.22 riastrad if (pci_map_rom_md(pdev) != 0)
536 1.22 riastrad goto fail_md;
537 1.22 riastrad
538 1.22 riastrad /* XXX This type is obviously wrong in general... */
539 1.22 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
540 1.22 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
541 1.22 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
542 1.22 riastrad pci_unmap_rom(pdev, NULL);
543 1.22 riastrad goto fail_md;
544 1.2 riastrad }
545 1.2 riastrad
546 1.22 riastrad success:
547 1.18 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
548 1.18 riastrad *sizep = pdev->pd_rom_found_size;
549 1.18 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
550 1.18 riastrad pdev->pd_rom_found_bsh);
551 1.2 riastrad return pdev->pd_rom_vaddr;
552 1.22 riastrad
553 1.22 riastrad fail_md:
554 1.22 riastrad return NULL;
555 1.2 riastrad }
556 1.2 riastrad
557 1.13 riastrad static inline void __pci_rom_iomem *
558 1.14 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
559 1.13 riastrad {
560 1.13 riastrad
561 1.14 riastrad *sizep = 0;
562 1.13 riastrad return NULL;
563 1.13 riastrad }
564 1.13 riastrad
565 1.12 riastrad static inline int
566 1.12 riastrad pci_enable_rom(struct pci_dev *pdev)
567 1.12 riastrad {
568 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
569 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
570 1.12 riastrad pcireg_t addr;
571 1.12 riastrad int s;
572 1.12 riastrad
573 1.12 riastrad /* XXX Don't do anything if the ROM isn't there. */
574 1.12 riastrad
575 1.12 riastrad s = splhigh();
576 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
577 1.12 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
578 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
579 1.12 riastrad splx(s);
580 1.12 riastrad
581 1.12 riastrad return 0;
582 1.12 riastrad }
583 1.12 riastrad
584 1.12 riastrad static inline void
585 1.12 riastrad pci_disable_rom(struct pci_dev *pdev)
586 1.12 riastrad {
587 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
588 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
589 1.12 riastrad pcireg_t addr;
590 1.12 riastrad int s;
591 1.12 riastrad
592 1.12 riastrad s = splhigh();
593 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
594 1.12 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
595 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
596 1.12 riastrad splx(s);
597 1.12 riastrad }
598 1.12 riastrad
599 1.4 riastrad static inline bus_addr_t
600 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
601 1.4 riastrad {
602 1.4 riastrad
603 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
604 1.4 riastrad return pdev->pd_resources[i].addr;
605 1.4 riastrad }
606 1.4 riastrad
607 1.4 riastrad static inline bus_size_t
608 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
609 1.4 riastrad {
610 1.4 riastrad
611 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
612 1.4 riastrad return pdev->pd_resources[i].size;
613 1.4 riastrad }
614 1.4 riastrad
615 1.4 riastrad static inline bus_addr_t
616 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
617 1.4 riastrad {
618 1.4 riastrad
619 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
620 1.4 riastrad }
621 1.4 riastrad
622 1.4 riastrad static inline int
623 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
624 1.4 riastrad {
625 1.4 riastrad
626 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
627 1.4 riastrad return pdev->pd_resources[i].flags;
628 1.4 riastrad }
629 1.4 riastrad
630 1.4 riastrad static inline void __pci_iomem *
631 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
632 1.4 riastrad {
633 1.4 riastrad int error;
634 1.4 riastrad
635 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
636 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
637 1.4 riastrad
638 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
639 1.4 riastrad return NULL;
640 1.4 riastrad if (pdev->pd_resources[i].size < size)
641 1.4 riastrad return NULL;
642 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
643 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
644 1.4 riastrad &pdev->pd_resources[i].bsh);
645 1.4 riastrad if (error) {
646 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
647 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
648 1.4 riastrad &pdev->pd_resources[i].bsh))
649 1.4 riastrad return NULL;
650 1.4 riastrad }
651 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
652 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
653 1.4 riastrad pdev->pd_resources[i].bsh);
654 1.4 riastrad
655 1.4 riastrad return pdev->pd_resources[i].kva;
656 1.4 riastrad }
657 1.4 riastrad
658 1.4 riastrad static inline void
659 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
660 1.4 riastrad {
661 1.4 riastrad unsigned i;
662 1.4 riastrad
663 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
664 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
665 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
666 1.4 riastrad break;
667 1.4 riastrad }
668 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
669 1.4 riastrad
670 1.4 riastrad pdev->pd_resources[i].kva = NULL;
671 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
672 1.4 riastrad pdev->pd_resources[i].size);
673 1.4 riastrad }
674 1.4 riastrad
675 1.5 riastrad static inline void
676 1.5 riastrad pci_save_state(struct pci_dev *pdev)
677 1.5 riastrad {
678 1.5 riastrad
679 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
680 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
681 1.5 riastrad KM_SLEEP);
682 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
683 1.5 riastrad pdev->pd_saved_state);
684 1.5 riastrad }
685 1.5 riastrad
686 1.5 riastrad static inline void
687 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
688 1.5 riastrad {
689 1.5 riastrad
690 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
691 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
692 1.5 riastrad pdev->pd_saved_state);
693 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
694 1.5 riastrad pdev->pd_saved_state = NULL;
695 1.5 riastrad }
696 1.5 riastrad
697 1.5 riastrad static inline bool
698 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
699 1.5 riastrad {
700 1.5 riastrad
701 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
702 1.5 riastrad }
703 1.5 riastrad
704 1.7 riastrad static inline bool
705 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
706 1.7 riastrad {
707 1.7 riastrad
708 1.7 riastrad /* XXX Cop-out. */
709 1.7 riastrad if (mask > DMA_BIT_MASK(32))
710 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
711 1.7 riastrad else
712 1.7 riastrad return true;
713 1.7 riastrad }
714 1.7 riastrad
715 1.2 riastrad #endif /* _LINUX_PCI_H_ */
716