pci.h revision 1.25 1 1.25 riastrad /* $NetBSD: pci.h,v 1.25 2018/08/27 06:37:53 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.10 nonaka #if defined(i386) || defined(amd64)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.20 jmcneill #if NACPICA > 0
58 1.10 nonaka #include <dev/acpi/acpivar.h>
59 1.10 nonaka #include <dev/acpi/acpi_pci.h>
60 1.20 jmcneill #else
61 1.20 jmcneill struct acpi_devnode;
62 1.20 jmcneill #endif
63 1.10 nonaka
64 1.7 riastrad #include <linux/dma-mapping.h>
65 1.2 riastrad #include <linux/ioport.h>
66 1.15 riastrad #include <linux/kernel.h>
67 1.2 riastrad
68 1.25 riastrad struct pci_driver;
69 1.25 riastrad
70 1.10 nonaka struct pci_bus {
71 1.10 nonaka u_int number;
72 1.10 nonaka };
73 1.2 riastrad
74 1.2 riastrad struct pci_device_id {
75 1.2 riastrad uint32_t vendor;
76 1.2 riastrad uint32_t device;
77 1.2 riastrad uint32_t subvendor;
78 1.2 riastrad uint32_t subdevice;
79 1.2 riastrad uint32_t class;
80 1.2 riastrad uint32_t class_mask;
81 1.2 riastrad unsigned long driver_data;
82 1.2 riastrad };
83 1.2 riastrad
84 1.2 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
85 1.2 riastrad
86 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
87 1.2 riastrad
88 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
89 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
90 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
91 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
92 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
93 1.2 riastrad
94 1.5 riastrad /* XXX This is getting silly... */
95 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
96 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
97 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
98 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
99 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
100 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
101 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
102 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
103 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
104 1.5 riastrad
105 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
106 1.2 riastrad
107 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
108 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
109 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
110 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
111 1.2 riastrad
112 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
113 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
114 1.4 riastrad
115 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
116 1.2 riastrad
117 1.4 riastrad typedef int pci_power_t;
118 1.4 riastrad
119 1.4 riastrad #define PCI_D0 0
120 1.4 riastrad #define PCI_D1 1
121 1.4 riastrad #define PCI_D2 2
122 1.4 riastrad #define PCI_D3hot 3
123 1.4 riastrad #define PCI_D3cold 4
124 1.4 riastrad
125 1.4 riastrad #define __pci_iomem
126 1.4 riastrad
127 1.2 riastrad struct pci_dev {
128 1.2 riastrad struct pci_attach_args pd_pa;
129 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
130 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
131 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
132 1.2 riastrad bus_space_tag_t pd_rom_bst;
133 1.2 riastrad bus_space_handle_t pd_rom_bsh;
134 1.2 riastrad bus_size_t pd_rom_size;
135 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
136 1.19 riastrad bus_size_t pd_rom_found_size;
137 1.2 riastrad void *pd_rom_vaddr;
138 1.2 riastrad device_t pd_dev;
139 1.15 riastrad struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
140 1.4 riastrad struct {
141 1.4 riastrad pcireg_t type;
142 1.4 riastrad bus_addr_t addr;
143 1.4 riastrad bus_size_t size;
144 1.4 riastrad int flags;
145 1.4 riastrad bus_space_tag_t bst;
146 1.4 riastrad bus_space_handle_t bsh;
147 1.4 riastrad void __pci_iomem *kva;
148 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
149 1.5 riastrad struct pci_conf_state *pd_saved_state;
150 1.10 nonaka struct acpi_devnode *pd_ad;
151 1.2 riastrad struct pci_bus *bus;
152 1.2 riastrad uint32_t devfn;
153 1.2 riastrad uint16_t vendor;
154 1.2 riastrad uint16_t device;
155 1.2 riastrad uint16_t subsystem_vendor;
156 1.2 riastrad uint16_t subsystem_device;
157 1.2 riastrad uint8_t revision;
158 1.2 riastrad uint32_t class;
159 1.5 riastrad bool msi_enabled;
160 1.23 nonaka pci_intr_handle_t *intr_handles;
161 1.2 riastrad };
162 1.2 riastrad
163 1.2 riastrad static inline device_t
164 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
165 1.2 riastrad {
166 1.2 riastrad return pdev->pd_dev;
167 1.2 riastrad }
168 1.2 riastrad
169 1.15 riastrad /* XXX Nouveau kludge! */
170 1.15 riastrad static inline struct drm_device *
171 1.15 riastrad pci_get_drvdata(struct pci_dev *pdev)
172 1.15 riastrad {
173 1.15 riastrad return pdev->pd_drm_dev;
174 1.15 riastrad }
175 1.15 riastrad
176 1.2 riastrad static inline void
177 1.2 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
178 1.2 riastrad const struct pci_attach_args *pa, int kludges)
179 1.2 riastrad {
180 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
181 1.2 riastrad PCI_SUBSYS_ID_REG);
182 1.4 riastrad unsigned i;
183 1.2 riastrad
184 1.2 riastrad pdev->pd_pa = *pa;
185 1.2 riastrad pdev->pd_kludges = kludges;
186 1.2 riastrad pdev->pd_rom_vaddr = NULL;
187 1.2 riastrad pdev->pd_dev = dev;
188 1.10 nonaka #if (NACPICA > 0)
189 1.10 nonaka pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
190 1.10 nonaka pa->pa_device, pa->pa_function);
191 1.10 nonaka #else
192 1.10 nonaka pdev->pd_ad = NULL;
193 1.10 nonaka #endif
194 1.10 nonaka pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
195 1.10 nonaka pdev->bus->number = pa->pa_bus;
196 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
197 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
198 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
199 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
200 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
201 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
202 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
203 1.4 riastrad
204 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
205 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
206 1.4 riastrad const int reg = PCI_BAR(i);
207 1.4 riastrad
208 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
209 1.4 riastrad pa->pa_tag, reg);
210 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
211 1.4 riastrad pdev->pd_resources[i].type,
212 1.4 riastrad &pdev->pd_resources[i].addr,
213 1.4 riastrad &pdev->pd_resources[i].size,
214 1.4 riastrad &pdev->pd_resources[i].flags)) {
215 1.4 riastrad pdev->pd_resources[i].addr = 0;
216 1.4 riastrad pdev->pd_resources[i].size = 0;
217 1.4 riastrad pdev->pd_resources[i].flags = 0;
218 1.4 riastrad }
219 1.4 riastrad pdev->pd_resources[i].kva = NULL;
220 1.4 riastrad }
221 1.2 riastrad }
222 1.2 riastrad
223 1.2 riastrad static inline int
224 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
225 1.2 riastrad {
226 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
227 1.2 riastrad NULL, NULL);
228 1.2 riastrad }
229 1.2 riastrad
230 1.4 riastrad static inline int
231 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
232 1.2 riastrad {
233 1.2 riastrad KASSERT(!ISSET(reg, 3));
234 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
235 1.4 riastrad return 0;
236 1.2 riastrad }
237 1.2 riastrad
238 1.4 riastrad static inline int
239 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
240 1.2 riastrad {
241 1.2 riastrad KASSERT(!ISSET(reg, 1));
242 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
243 1.8 riastrad (reg &~ 2)) >> (8 * (reg & 2));
244 1.4 riastrad return 0;
245 1.2 riastrad }
246 1.2 riastrad
247 1.4 riastrad static inline int
248 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
249 1.2 riastrad {
250 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
251 1.8 riastrad (reg &~ 3)) >> (8 * (reg & 3));
252 1.4 riastrad return 0;
253 1.2 riastrad }
254 1.2 riastrad
255 1.4 riastrad static inline int
256 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
257 1.2 riastrad {
258 1.2 riastrad KASSERT(!ISSET(reg, 3));
259 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
260 1.4 riastrad return 0;
261 1.2 riastrad }
262 1.2 riastrad
263 1.2 riastrad static inline void
264 1.2 riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
265 1.2 riastrad uint32_t value)
266 1.2 riastrad {
267 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
268 1.2 riastrad const int reg32 = (reg &~ 3);
269 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
270 1.2 riastrad uint32_t value32;
271 1.2 riastrad
272 1.2 riastrad KASSERT(bytes <= 4);
273 1.2 riastrad KASSERT(!ISSET(value, ~mask));
274 1.2 riastrad pci_read_config_dword(pdev, reg32, &value32);
275 1.2 riastrad value32 &=~ (mask << shift);
276 1.2 riastrad value32 |= (value << shift);
277 1.2 riastrad pci_write_config_dword(pdev, reg32, value32);
278 1.2 riastrad }
279 1.2 riastrad
280 1.4 riastrad static inline int
281 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
282 1.2 riastrad {
283 1.2 riastrad KASSERT(!ISSET(reg, 1));
284 1.2 riastrad pci_rmw_config(pdev, reg, 2, value);
285 1.4 riastrad return 0;
286 1.2 riastrad }
287 1.2 riastrad
288 1.4 riastrad static inline int
289 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
290 1.2 riastrad {
291 1.2 riastrad pci_rmw_config(pdev, reg, 1, value);
292 1.4 riastrad return 0;
293 1.2 riastrad }
294 1.2 riastrad
295 1.5 riastrad static inline int
296 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
297 1.2 riastrad {
298 1.24 maya #ifdef notyet
299 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
300 1.23 nonaka
301 1.23 nonaka if (pci_msi_alloc_exact(pa, &pdev->intr_handles, 1))
302 1.23 nonaka return -EINVAL;
303 1.23 nonaka
304 1.23 nonaka pdev->msi_enabled = 1;
305 1.23 nonaka return 0;
306 1.24 maya #else
307 1.24 maya return -ENOSYS;
308 1.24 maya #endif
309 1.2 riastrad }
310 1.2 riastrad
311 1.2 riastrad static inline void
312 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
313 1.2 riastrad {
314 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
315 1.23 nonaka
316 1.23 nonaka if (pdev->intr_handles != NULL) {
317 1.23 nonaka pci_intr_release(pa->pa_pc, pdev->intr_handles, 1);
318 1.23 nonaka pdev->intr_handles = NULL;
319 1.23 nonaka }
320 1.23 nonaka pdev->msi_enabled = 0;
321 1.2 riastrad }
322 1.2 riastrad
323 1.2 riastrad static inline void
324 1.2 riastrad pci_set_master(struct pci_dev *pdev)
325 1.2 riastrad {
326 1.2 riastrad pcireg_t csr;
327 1.2 riastrad
328 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
329 1.2 riastrad PCI_COMMAND_STATUS_REG);
330 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
331 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
332 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
333 1.2 riastrad }
334 1.2 riastrad
335 1.5 riastrad static inline void
336 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
337 1.5 riastrad {
338 1.5 riastrad pcireg_t csr;
339 1.5 riastrad
340 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
341 1.5 riastrad PCI_COMMAND_STATUS_REG);
342 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
343 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
344 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
345 1.5 riastrad }
346 1.5 riastrad
347 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
348 1.2 riastrad
349 1.2 riastrad static inline bus_addr_t
350 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
351 1.2 riastrad bus_addr_t addr, bus_size_t size)
352 1.2 riastrad {
353 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
354 1.2 riastrad }
355 1.2 riastrad
356 1.2 riastrad static inline int
357 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
358 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
359 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
360 1.2 riastrad bus_size_t) __unused,
361 1.2 riastrad struct pci_dev *pdev)
362 1.2 riastrad {
363 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
364 1.2 riastrad bus_space_tag_t bst;
365 1.2 riastrad int error;
366 1.2 riastrad
367 1.2 riastrad switch (resource->flags) {
368 1.2 riastrad case IORESOURCE_MEM:
369 1.2 riastrad bst = pa->pa_memt;
370 1.2 riastrad break;
371 1.2 riastrad
372 1.2 riastrad case IORESOURCE_IO:
373 1.2 riastrad bst = pa->pa_iot;
374 1.2 riastrad break;
375 1.2 riastrad
376 1.2 riastrad default:
377 1.2 riastrad panic("I don't know what kind of resource you want!");
378 1.2 riastrad }
379 1.2 riastrad
380 1.2 riastrad resource->r_bst = bst;
381 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
382 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
383 1.2 riastrad if (error)
384 1.2 riastrad return error;
385 1.2 riastrad
386 1.2 riastrad resource->size = size;
387 1.2 riastrad return 0;
388 1.2 riastrad }
389 1.2 riastrad
390 1.2 riastrad /*
391 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
392 1.2 riastrad * defined only for their single purposes in i915drm, in
393 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
394 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
395 1.2 riastrad * internally) to pass a cookie through.
396 1.2 riastrad */
397 1.2 riastrad
398 1.2 riastrad static inline int /* XXX inline? */
399 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
400 1.2 riastrad {
401 1.2 riastrad
402 1.2 riastrad if (pa->pa_bus != 0)
403 1.2 riastrad return 0;
404 1.2 riastrad if (pa->pa_device != 0)
405 1.2 riastrad return 0;
406 1.2 riastrad if (pa->pa_function != 0)
407 1.2 riastrad return 0;
408 1.2 riastrad
409 1.2 riastrad return 1;
410 1.2 riastrad }
411 1.2 riastrad
412 1.2 riastrad static inline struct pci_dev *
413 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
414 1.2 riastrad {
415 1.2 riastrad struct pci_attach_args pa;
416 1.2 riastrad
417 1.2 riastrad KASSERT(bus == 0);
418 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
419 1.2 riastrad
420 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
421 1.2 riastrad return NULL;
422 1.2 riastrad
423 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
424 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
425 1.2 riastrad
426 1.2 riastrad return pdev;
427 1.2 riastrad }
428 1.2 riastrad
429 1.2 riastrad static inline int /* XXX inline? */
430 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
431 1.2 riastrad {
432 1.2 riastrad
433 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
434 1.2 riastrad return 0;
435 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
436 1.2 riastrad return 0;
437 1.2 riastrad
438 1.2 riastrad return 1;
439 1.2 riastrad }
440 1.2 riastrad
441 1.4 riastrad static inline void
442 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
443 1.4 riastrad {
444 1.4 riastrad
445 1.4 riastrad if (pdev == NULL)
446 1.4 riastrad return;
447 1.4 riastrad
448 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
449 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
450 1.4 riastrad }
451 1.4 riastrad
452 1.2 riastrad static inline struct pci_dev *
453 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
454 1.2 riastrad {
455 1.2 riastrad struct pci_attach_args pa;
456 1.2 riastrad
457 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
458 1.4 riastrad
459 1.4 riastrad if (from != NULL) {
460 1.4 riastrad pci_dev_put(from);
461 1.4 riastrad return NULL;
462 1.4 riastrad }
463 1.2 riastrad
464 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
465 1.2 riastrad return NULL;
466 1.2 riastrad
467 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
468 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
469 1.2 riastrad
470 1.2 riastrad return pdev;
471 1.2 riastrad }
472 1.2 riastrad
473 1.2 riastrad #define __pci_rom_iomem
474 1.2 riastrad
475 1.2 riastrad static inline void
476 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
477 1.2 riastrad {
478 1.2 riastrad
479 1.12 riastrad /* XXX Disable the ROM address decoder. */
480 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
481 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
482 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
483 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
484 1.2 riastrad pdev->pd_rom_vaddr = NULL;
485 1.2 riastrad }
486 1.2 riastrad
487 1.9 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
488 1.9 riastrad static int
489 1.9 riastrad pci_map_rom_md(struct pci_dev *pdev)
490 1.9 riastrad {
491 1.9 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
492 1.9 riastrad const bus_addr_t rom_base = 0xc0000;
493 1.9 riastrad const bus_size_t rom_size = 0x20000;
494 1.9 riastrad bus_space_handle_t rom_bsh;
495 1.9 riastrad int error;
496 1.9 riastrad
497 1.9 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
498 1.9 riastrad return ENXIO;
499 1.9 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
500 1.9 riastrad return ENXIO;
501 1.9 riastrad /* XXX Check whether this is the primary VGA card? */
502 1.9 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
503 1.9 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
504 1.9 riastrad if (error)
505 1.9 riastrad return ENXIO;
506 1.9 riastrad
507 1.9 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
508 1.9 riastrad pdev->pd_rom_bsh = rom_bsh;
509 1.9 riastrad pdev->pd_rom_size = rom_size;
510 1.22 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
511 1.9 riastrad
512 1.9 riastrad return 0;
513 1.9 riastrad #else
514 1.9 riastrad return ENXIO;
515 1.9 riastrad #endif
516 1.9 riastrad }
517 1.9 riastrad
518 1.2 riastrad static inline void __pci_rom_iomem *
519 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
520 1.2 riastrad {
521 1.2 riastrad
522 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
523 1.2 riastrad
524 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
525 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
526 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
527 1.22 riastrad != 0)
528 1.22 riastrad goto fail_mi;
529 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
530 1.2 riastrad
531 1.2 riastrad /* XXX This type is obviously wrong in general... */
532 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
533 1.18 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
534 1.18 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
535 1.2 riastrad pci_unmap_rom(pdev, NULL);
536 1.22 riastrad goto fail_mi;
537 1.22 riastrad }
538 1.22 riastrad goto success;
539 1.22 riastrad
540 1.22 riastrad fail_mi:
541 1.22 riastrad if (pci_map_rom_md(pdev) != 0)
542 1.22 riastrad goto fail_md;
543 1.22 riastrad
544 1.22 riastrad /* XXX This type is obviously wrong in general... */
545 1.22 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
546 1.22 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
547 1.22 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
548 1.22 riastrad pci_unmap_rom(pdev, NULL);
549 1.22 riastrad goto fail_md;
550 1.2 riastrad }
551 1.2 riastrad
552 1.22 riastrad success:
553 1.18 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
554 1.18 riastrad *sizep = pdev->pd_rom_found_size;
555 1.18 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
556 1.18 riastrad pdev->pd_rom_found_bsh);
557 1.2 riastrad return pdev->pd_rom_vaddr;
558 1.22 riastrad
559 1.22 riastrad fail_md:
560 1.22 riastrad return NULL;
561 1.2 riastrad }
562 1.2 riastrad
563 1.13 riastrad static inline void __pci_rom_iomem *
564 1.14 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
565 1.13 riastrad {
566 1.13 riastrad
567 1.14 riastrad *sizep = 0;
568 1.13 riastrad return NULL;
569 1.13 riastrad }
570 1.13 riastrad
571 1.12 riastrad static inline int
572 1.12 riastrad pci_enable_rom(struct pci_dev *pdev)
573 1.12 riastrad {
574 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
575 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
576 1.12 riastrad pcireg_t addr;
577 1.12 riastrad int s;
578 1.12 riastrad
579 1.12 riastrad /* XXX Don't do anything if the ROM isn't there. */
580 1.12 riastrad
581 1.12 riastrad s = splhigh();
582 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
583 1.12 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
584 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
585 1.12 riastrad splx(s);
586 1.12 riastrad
587 1.12 riastrad return 0;
588 1.12 riastrad }
589 1.12 riastrad
590 1.12 riastrad static inline void
591 1.12 riastrad pci_disable_rom(struct pci_dev *pdev)
592 1.12 riastrad {
593 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
594 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
595 1.12 riastrad pcireg_t addr;
596 1.12 riastrad int s;
597 1.12 riastrad
598 1.12 riastrad s = splhigh();
599 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
600 1.12 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
601 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
602 1.12 riastrad splx(s);
603 1.12 riastrad }
604 1.12 riastrad
605 1.4 riastrad static inline bus_addr_t
606 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
607 1.4 riastrad {
608 1.4 riastrad
609 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
610 1.4 riastrad return pdev->pd_resources[i].addr;
611 1.4 riastrad }
612 1.4 riastrad
613 1.4 riastrad static inline bus_size_t
614 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
615 1.4 riastrad {
616 1.4 riastrad
617 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
618 1.4 riastrad return pdev->pd_resources[i].size;
619 1.4 riastrad }
620 1.4 riastrad
621 1.4 riastrad static inline bus_addr_t
622 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
623 1.4 riastrad {
624 1.4 riastrad
625 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
626 1.4 riastrad }
627 1.4 riastrad
628 1.4 riastrad static inline int
629 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
630 1.4 riastrad {
631 1.4 riastrad
632 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
633 1.4 riastrad return pdev->pd_resources[i].flags;
634 1.4 riastrad }
635 1.4 riastrad
636 1.4 riastrad static inline void __pci_iomem *
637 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
638 1.4 riastrad {
639 1.4 riastrad int error;
640 1.4 riastrad
641 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
642 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
643 1.4 riastrad
644 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
645 1.4 riastrad return NULL;
646 1.4 riastrad if (pdev->pd_resources[i].size < size)
647 1.4 riastrad return NULL;
648 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
649 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
650 1.4 riastrad &pdev->pd_resources[i].bsh);
651 1.4 riastrad if (error) {
652 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
653 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
654 1.4 riastrad &pdev->pd_resources[i].bsh))
655 1.4 riastrad return NULL;
656 1.4 riastrad }
657 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
658 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
659 1.4 riastrad pdev->pd_resources[i].bsh);
660 1.4 riastrad
661 1.4 riastrad return pdev->pd_resources[i].kva;
662 1.4 riastrad }
663 1.4 riastrad
664 1.4 riastrad static inline void
665 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
666 1.4 riastrad {
667 1.4 riastrad unsigned i;
668 1.4 riastrad
669 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
670 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
671 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
672 1.4 riastrad break;
673 1.4 riastrad }
674 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
675 1.4 riastrad
676 1.4 riastrad pdev->pd_resources[i].kva = NULL;
677 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
678 1.4 riastrad pdev->pd_resources[i].size);
679 1.4 riastrad }
680 1.4 riastrad
681 1.5 riastrad static inline void
682 1.5 riastrad pci_save_state(struct pci_dev *pdev)
683 1.5 riastrad {
684 1.5 riastrad
685 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
686 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
687 1.5 riastrad KM_SLEEP);
688 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
689 1.5 riastrad pdev->pd_saved_state);
690 1.5 riastrad }
691 1.5 riastrad
692 1.5 riastrad static inline void
693 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
694 1.5 riastrad {
695 1.5 riastrad
696 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
697 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
698 1.5 riastrad pdev->pd_saved_state);
699 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
700 1.5 riastrad pdev->pd_saved_state = NULL;
701 1.5 riastrad }
702 1.5 riastrad
703 1.5 riastrad static inline bool
704 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
705 1.5 riastrad {
706 1.5 riastrad
707 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
708 1.5 riastrad }
709 1.5 riastrad
710 1.7 riastrad static inline bool
711 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
712 1.7 riastrad {
713 1.7 riastrad
714 1.7 riastrad /* XXX Cop-out. */
715 1.7 riastrad if (mask > DMA_BIT_MASK(32))
716 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
717 1.7 riastrad else
718 1.7 riastrad return true;
719 1.7 riastrad }
720 1.7 riastrad
721 1.2 riastrad #endif /* _LINUX_PCI_H_ */
722