pci.h revision 1.28 1 1.25 riastrad /* $NetBSD: pci.h,v 1.28 2018/08/27 07:20:05 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.10 nonaka #if defined(i386) || defined(amd64)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.20 jmcneill #if NACPICA > 0
58 1.10 nonaka #include <dev/acpi/acpivar.h>
59 1.10 nonaka #include <dev/acpi/acpi_pci.h>
60 1.20 jmcneill #else
61 1.20 jmcneill struct acpi_devnode;
62 1.20 jmcneill #endif
63 1.10 nonaka
64 1.7 riastrad #include <linux/dma-mapping.h>
65 1.2 riastrad #include <linux/ioport.h>
66 1.15 riastrad #include <linux/kernel.h>
67 1.2 riastrad
68 1.25 riastrad struct pci_driver;
69 1.25 riastrad
70 1.10 nonaka struct pci_bus {
71 1.28 riastrad u_int number;
72 1.28 riastrad pci_chipset_tag_t pb_pc;
73 1.10 nonaka };
74 1.2 riastrad
75 1.2 riastrad struct pci_device_id {
76 1.2 riastrad uint32_t vendor;
77 1.2 riastrad uint32_t device;
78 1.2 riastrad uint32_t subvendor;
79 1.2 riastrad uint32_t subdevice;
80 1.2 riastrad uint32_t class;
81 1.2 riastrad uint32_t class_mask;
82 1.2 riastrad unsigned long driver_data;
83 1.2 riastrad };
84 1.2 riastrad
85 1.2 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
86 1.2 riastrad
87 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
88 1.2 riastrad
89 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
90 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
91 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
92 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
93 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
94 1.2 riastrad
95 1.5 riastrad /* XXX This is getting silly... */
96 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
97 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
98 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
99 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
100 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
101 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
102 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
103 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
104 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
105 1.5 riastrad
106 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
107 1.2 riastrad
108 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
109 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
110 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
111 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
112 1.2 riastrad
113 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
114 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
115 1.4 riastrad
116 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
117 1.2 riastrad
118 1.4 riastrad typedef int pci_power_t;
119 1.4 riastrad
120 1.4 riastrad #define PCI_D0 0
121 1.4 riastrad #define PCI_D1 1
122 1.4 riastrad #define PCI_D2 2
123 1.4 riastrad #define PCI_D3hot 3
124 1.4 riastrad #define PCI_D3cold 4
125 1.4 riastrad
126 1.4 riastrad #define __pci_iomem
127 1.4 riastrad
128 1.2 riastrad struct pci_dev {
129 1.2 riastrad struct pci_attach_args pd_pa;
130 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
131 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
132 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
133 1.2 riastrad bus_space_tag_t pd_rom_bst;
134 1.2 riastrad bus_space_handle_t pd_rom_bsh;
135 1.2 riastrad bus_size_t pd_rom_size;
136 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
137 1.19 riastrad bus_size_t pd_rom_found_size;
138 1.2 riastrad void *pd_rom_vaddr;
139 1.2 riastrad device_t pd_dev;
140 1.15 riastrad struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
141 1.4 riastrad struct {
142 1.4 riastrad pcireg_t type;
143 1.4 riastrad bus_addr_t addr;
144 1.4 riastrad bus_size_t size;
145 1.4 riastrad int flags;
146 1.4 riastrad bus_space_tag_t bst;
147 1.4 riastrad bus_space_handle_t bsh;
148 1.4 riastrad void __pci_iomem *kva;
149 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
150 1.5 riastrad struct pci_conf_state *pd_saved_state;
151 1.10 nonaka struct acpi_devnode *pd_ad;
152 1.27 riastrad pci_intr_handle_t *pd_intr_handles;
153 1.27 riastrad
154 1.27 riastrad /* Linx API only below */
155 1.2 riastrad struct pci_bus *bus;
156 1.2 riastrad uint32_t devfn;
157 1.2 riastrad uint16_t vendor;
158 1.2 riastrad uint16_t device;
159 1.2 riastrad uint16_t subsystem_vendor;
160 1.2 riastrad uint16_t subsystem_device;
161 1.2 riastrad uint8_t revision;
162 1.2 riastrad uint32_t class;
163 1.5 riastrad bool msi_enabled;
164 1.2 riastrad };
165 1.2 riastrad
166 1.2 riastrad static inline device_t
167 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
168 1.2 riastrad {
169 1.2 riastrad return pdev->pd_dev;
170 1.2 riastrad }
171 1.2 riastrad
172 1.15 riastrad /* XXX Nouveau kludge! */
173 1.15 riastrad static inline struct drm_device *
174 1.15 riastrad pci_get_drvdata(struct pci_dev *pdev)
175 1.15 riastrad {
176 1.15 riastrad return pdev->pd_drm_dev;
177 1.15 riastrad }
178 1.15 riastrad
179 1.2 riastrad static inline void
180 1.2 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
181 1.2 riastrad const struct pci_attach_args *pa, int kludges)
182 1.2 riastrad {
183 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
184 1.2 riastrad PCI_SUBSYS_ID_REG);
185 1.4 riastrad unsigned i;
186 1.2 riastrad
187 1.2 riastrad pdev->pd_pa = *pa;
188 1.2 riastrad pdev->pd_kludges = kludges;
189 1.2 riastrad pdev->pd_rom_vaddr = NULL;
190 1.2 riastrad pdev->pd_dev = dev;
191 1.10 nonaka #if (NACPICA > 0)
192 1.10 nonaka pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
193 1.10 nonaka pa->pa_device, pa->pa_function);
194 1.10 nonaka #else
195 1.10 nonaka pdev->pd_ad = NULL;
196 1.10 nonaka #endif
197 1.10 nonaka pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
198 1.10 nonaka pdev->bus->number = pa->pa_bus;
199 1.28 riastrad pdev->bus->pb_pc = pa->pa_pc;
200 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
201 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
202 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
203 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
204 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
205 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
206 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
207 1.4 riastrad
208 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
209 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
210 1.4 riastrad const int reg = PCI_BAR(i);
211 1.4 riastrad
212 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
213 1.4 riastrad pa->pa_tag, reg);
214 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
215 1.4 riastrad pdev->pd_resources[i].type,
216 1.4 riastrad &pdev->pd_resources[i].addr,
217 1.4 riastrad &pdev->pd_resources[i].size,
218 1.4 riastrad &pdev->pd_resources[i].flags)) {
219 1.4 riastrad pdev->pd_resources[i].addr = 0;
220 1.4 riastrad pdev->pd_resources[i].size = 0;
221 1.4 riastrad pdev->pd_resources[i].flags = 0;
222 1.4 riastrad }
223 1.4 riastrad pdev->pd_resources[i].kva = NULL;
224 1.4 riastrad }
225 1.2 riastrad }
226 1.2 riastrad
227 1.2 riastrad static inline int
228 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
229 1.2 riastrad {
230 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
231 1.2 riastrad NULL, NULL);
232 1.2 riastrad }
233 1.2 riastrad
234 1.4 riastrad static inline int
235 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
236 1.2 riastrad {
237 1.2 riastrad KASSERT(!ISSET(reg, 3));
238 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
239 1.4 riastrad return 0;
240 1.2 riastrad }
241 1.2 riastrad
242 1.4 riastrad static inline int
243 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
244 1.2 riastrad {
245 1.2 riastrad KASSERT(!ISSET(reg, 1));
246 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
247 1.8 riastrad (reg &~ 2)) >> (8 * (reg & 2));
248 1.4 riastrad return 0;
249 1.2 riastrad }
250 1.2 riastrad
251 1.4 riastrad static inline int
252 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
253 1.2 riastrad {
254 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
255 1.8 riastrad (reg &~ 3)) >> (8 * (reg & 3));
256 1.4 riastrad return 0;
257 1.2 riastrad }
258 1.2 riastrad
259 1.4 riastrad static inline int
260 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
261 1.2 riastrad {
262 1.2 riastrad KASSERT(!ISSET(reg, 3));
263 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
264 1.4 riastrad return 0;
265 1.2 riastrad }
266 1.2 riastrad
267 1.28 riastrad static inline int
268 1.28 riastrad pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
269 1.28 riastrad uint32_t *valuep)
270 1.28 riastrad {
271 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
272 1.28 riastrad PCI_FUNC(devfn));
273 1.28 riastrad
274 1.28 riastrad KASSERT(!ISSET(reg, 1));
275 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
276 1.28 riastrad
277 1.28 riastrad return 0;
278 1.28 riastrad }
279 1.28 riastrad
280 1.28 riastrad static inline int
281 1.28 riastrad pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
282 1.28 riastrad uint16_t *valuep)
283 1.28 riastrad {
284 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
285 1.28 riastrad PCI_FUNC(devfn));
286 1.28 riastrad KASSERT(!ISSET(reg, 1));
287 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
288 1.28 riastrad return 0;
289 1.28 riastrad }
290 1.28 riastrad
291 1.28 riastrad static inline int
292 1.28 riastrad pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
293 1.28 riastrad uint8_t *valuep)
294 1.28 riastrad {
295 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
296 1.28 riastrad PCI_FUNC(devfn));
297 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
298 1.28 riastrad return 0;
299 1.28 riastrad }
300 1.28 riastrad
301 1.28 riastrad static inline int
302 1.28 riastrad pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
303 1.28 riastrad uint32_t value)
304 1.28 riastrad {
305 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
306 1.28 riastrad PCI_FUNC(devfn));
307 1.28 riastrad KASSERT(!ISSET(reg, 3));
308 1.28 riastrad pci_conf_write(bus->pb_pc, tag, reg, value);
309 1.28 riastrad return 0;
310 1.28 riastrad }
311 1.28 riastrad
312 1.2 riastrad static inline void
313 1.28 riastrad pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
314 1.2 riastrad uint32_t value)
315 1.2 riastrad {
316 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
317 1.2 riastrad const int reg32 = (reg &~ 3);
318 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
319 1.2 riastrad uint32_t value32;
320 1.2 riastrad
321 1.2 riastrad KASSERT(bytes <= 4);
322 1.2 riastrad KASSERT(!ISSET(value, ~mask));
323 1.28 riastrad value32 = pci_conf_read(pc, tag, reg32);
324 1.2 riastrad value32 &=~ (mask << shift);
325 1.2 riastrad value32 |= (value << shift);
326 1.28 riastrad pci_conf_write(pc, tag, reg32, value32);
327 1.2 riastrad }
328 1.2 riastrad
329 1.4 riastrad static inline int
330 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
331 1.2 riastrad {
332 1.2 riastrad KASSERT(!ISSET(reg, 1));
333 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
334 1.4 riastrad return 0;
335 1.2 riastrad }
336 1.2 riastrad
337 1.4 riastrad static inline int
338 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
339 1.2 riastrad {
340 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
341 1.28 riastrad return 0;
342 1.28 riastrad }
343 1.28 riastrad
344 1.28 riastrad static inline int
345 1.28 riastrad pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
346 1.28 riastrad uint16_t value)
347 1.28 riastrad {
348 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
349 1.28 riastrad PCI_FUNC(devfn));
350 1.28 riastrad KASSERT(!ISSET(reg, 1));
351 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
352 1.28 riastrad return 0;
353 1.28 riastrad }
354 1.28 riastrad
355 1.28 riastrad static inline int
356 1.28 riastrad pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
357 1.28 riastrad uint8_t value)
358 1.28 riastrad {
359 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
360 1.28 riastrad PCI_FUNC(devfn));
361 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
362 1.4 riastrad return 0;
363 1.2 riastrad }
364 1.2 riastrad
365 1.5 riastrad static inline int
366 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
367 1.2 riastrad {
368 1.24 maya #ifdef notyet
369 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
370 1.23 nonaka
371 1.27 riastrad if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
372 1.23 nonaka return -EINVAL;
373 1.23 nonaka
374 1.23 nonaka pdev->msi_enabled = 1;
375 1.23 nonaka return 0;
376 1.24 maya #else
377 1.24 maya return -ENOSYS;
378 1.24 maya #endif
379 1.2 riastrad }
380 1.2 riastrad
381 1.2 riastrad static inline void
382 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
383 1.2 riastrad {
384 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
385 1.23 nonaka
386 1.27 riastrad if (pdev->pd_intr_handles != NULL) {
387 1.27 riastrad pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
388 1.27 riastrad pdev->pd_intr_handles = NULL;
389 1.23 nonaka }
390 1.23 nonaka pdev->msi_enabled = 0;
391 1.2 riastrad }
392 1.2 riastrad
393 1.2 riastrad static inline void
394 1.2 riastrad pci_set_master(struct pci_dev *pdev)
395 1.2 riastrad {
396 1.2 riastrad pcireg_t csr;
397 1.2 riastrad
398 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
399 1.2 riastrad PCI_COMMAND_STATUS_REG);
400 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
401 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
402 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
403 1.2 riastrad }
404 1.2 riastrad
405 1.5 riastrad static inline void
406 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
407 1.5 riastrad {
408 1.5 riastrad pcireg_t csr;
409 1.5 riastrad
410 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
411 1.5 riastrad PCI_COMMAND_STATUS_REG);
412 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
413 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
414 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
415 1.5 riastrad }
416 1.5 riastrad
417 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
418 1.2 riastrad
419 1.2 riastrad static inline bus_addr_t
420 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
421 1.2 riastrad bus_addr_t addr, bus_size_t size)
422 1.2 riastrad {
423 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
424 1.2 riastrad }
425 1.2 riastrad
426 1.2 riastrad static inline int
427 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
428 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
429 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
430 1.2 riastrad bus_size_t) __unused,
431 1.2 riastrad struct pci_dev *pdev)
432 1.2 riastrad {
433 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
434 1.2 riastrad bus_space_tag_t bst;
435 1.2 riastrad int error;
436 1.2 riastrad
437 1.2 riastrad switch (resource->flags) {
438 1.2 riastrad case IORESOURCE_MEM:
439 1.2 riastrad bst = pa->pa_memt;
440 1.2 riastrad break;
441 1.2 riastrad
442 1.2 riastrad case IORESOURCE_IO:
443 1.2 riastrad bst = pa->pa_iot;
444 1.2 riastrad break;
445 1.2 riastrad
446 1.2 riastrad default:
447 1.2 riastrad panic("I don't know what kind of resource you want!");
448 1.2 riastrad }
449 1.2 riastrad
450 1.2 riastrad resource->r_bst = bst;
451 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
452 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
453 1.2 riastrad if (error)
454 1.2 riastrad return error;
455 1.2 riastrad
456 1.2 riastrad resource->size = size;
457 1.2 riastrad return 0;
458 1.2 riastrad }
459 1.2 riastrad
460 1.2 riastrad /*
461 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
462 1.2 riastrad * defined only for their single purposes in i915drm, in
463 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
464 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
465 1.2 riastrad * internally) to pass a cookie through.
466 1.2 riastrad */
467 1.2 riastrad
468 1.2 riastrad static inline int /* XXX inline? */
469 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
470 1.2 riastrad {
471 1.2 riastrad
472 1.2 riastrad if (pa->pa_bus != 0)
473 1.2 riastrad return 0;
474 1.2 riastrad if (pa->pa_device != 0)
475 1.2 riastrad return 0;
476 1.2 riastrad if (pa->pa_function != 0)
477 1.2 riastrad return 0;
478 1.2 riastrad
479 1.2 riastrad return 1;
480 1.2 riastrad }
481 1.2 riastrad
482 1.2 riastrad static inline struct pci_dev *
483 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
484 1.2 riastrad {
485 1.2 riastrad struct pci_attach_args pa;
486 1.2 riastrad
487 1.2 riastrad KASSERT(bus == 0);
488 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
489 1.2 riastrad
490 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
491 1.2 riastrad return NULL;
492 1.2 riastrad
493 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
494 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
495 1.2 riastrad
496 1.2 riastrad return pdev;
497 1.2 riastrad }
498 1.2 riastrad
499 1.2 riastrad static inline int /* XXX inline? */
500 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
501 1.2 riastrad {
502 1.2 riastrad
503 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
504 1.2 riastrad return 0;
505 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
506 1.2 riastrad return 0;
507 1.2 riastrad
508 1.2 riastrad return 1;
509 1.2 riastrad }
510 1.2 riastrad
511 1.4 riastrad static inline void
512 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
513 1.4 riastrad {
514 1.4 riastrad
515 1.4 riastrad if (pdev == NULL)
516 1.4 riastrad return;
517 1.4 riastrad
518 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
519 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
520 1.4 riastrad }
521 1.4 riastrad
522 1.2 riastrad static inline struct pci_dev *
523 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
524 1.2 riastrad {
525 1.2 riastrad struct pci_attach_args pa;
526 1.2 riastrad
527 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
528 1.4 riastrad
529 1.4 riastrad if (from != NULL) {
530 1.4 riastrad pci_dev_put(from);
531 1.4 riastrad return NULL;
532 1.4 riastrad }
533 1.2 riastrad
534 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
535 1.2 riastrad return NULL;
536 1.2 riastrad
537 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
538 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
539 1.2 riastrad
540 1.2 riastrad return pdev;
541 1.2 riastrad }
542 1.2 riastrad
543 1.2 riastrad #define __pci_rom_iomem
544 1.2 riastrad
545 1.2 riastrad static inline void
546 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
547 1.2 riastrad {
548 1.2 riastrad
549 1.12 riastrad /* XXX Disable the ROM address decoder. */
550 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
551 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
552 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
553 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
554 1.2 riastrad pdev->pd_rom_vaddr = NULL;
555 1.2 riastrad }
556 1.2 riastrad
557 1.9 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
558 1.9 riastrad static int
559 1.9 riastrad pci_map_rom_md(struct pci_dev *pdev)
560 1.9 riastrad {
561 1.9 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
562 1.9 riastrad const bus_addr_t rom_base = 0xc0000;
563 1.9 riastrad const bus_size_t rom_size = 0x20000;
564 1.9 riastrad bus_space_handle_t rom_bsh;
565 1.9 riastrad int error;
566 1.9 riastrad
567 1.9 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
568 1.9 riastrad return ENXIO;
569 1.9 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
570 1.9 riastrad return ENXIO;
571 1.9 riastrad /* XXX Check whether this is the primary VGA card? */
572 1.9 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
573 1.9 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
574 1.9 riastrad if (error)
575 1.9 riastrad return ENXIO;
576 1.9 riastrad
577 1.9 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
578 1.9 riastrad pdev->pd_rom_bsh = rom_bsh;
579 1.9 riastrad pdev->pd_rom_size = rom_size;
580 1.22 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
581 1.9 riastrad
582 1.9 riastrad return 0;
583 1.9 riastrad #else
584 1.9 riastrad return ENXIO;
585 1.9 riastrad #endif
586 1.9 riastrad }
587 1.9 riastrad
588 1.2 riastrad static inline void __pci_rom_iomem *
589 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
590 1.2 riastrad {
591 1.2 riastrad
592 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
593 1.2 riastrad
594 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
595 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
596 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
597 1.22 riastrad != 0)
598 1.22 riastrad goto fail_mi;
599 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
600 1.2 riastrad
601 1.2 riastrad /* XXX This type is obviously wrong in general... */
602 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
603 1.18 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
604 1.18 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
605 1.2 riastrad pci_unmap_rom(pdev, NULL);
606 1.22 riastrad goto fail_mi;
607 1.22 riastrad }
608 1.22 riastrad goto success;
609 1.22 riastrad
610 1.22 riastrad fail_mi:
611 1.22 riastrad if (pci_map_rom_md(pdev) != 0)
612 1.22 riastrad goto fail_md;
613 1.22 riastrad
614 1.22 riastrad /* XXX This type is obviously wrong in general... */
615 1.22 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
616 1.22 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
617 1.22 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
618 1.22 riastrad pci_unmap_rom(pdev, NULL);
619 1.22 riastrad goto fail_md;
620 1.2 riastrad }
621 1.2 riastrad
622 1.22 riastrad success:
623 1.18 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
624 1.18 riastrad *sizep = pdev->pd_rom_found_size;
625 1.18 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
626 1.18 riastrad pdev->pd_rom_found_bsh);
627 1.2 riastrad return pdev->pd_rom_vaddr;
628 1.22 riastrad
629 1.22 riastrad fail_md:
630 1.22 riastrad return NULL;
631 1.2 riastrad }
632 1.2 riastrad
633 1.13 riastrad static inline void __pci_rom_iomem *
634 1.14 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
635 1.13 riastrad {
636 1.13 riastrad
637 1.14 riastrad *sizep = 0;
638 1.13 riastrad return NULL;
639 1.13 riastrad }
640 1.13 riastrad
641 1.12 riastrad static inline int
642 1.12 riastrad pci_enable_rom(struct pci_dev *pdev)
643 1.12 riastrad {
644 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
645 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
646 1.12 riastrad pcireg_t addr;
647 1.12 riastrad int s;
648 1.12 riastrad
649 1.12 riastrad /* XXX Don't do anything if the ROM isn't there. */
650 1.12 riastrad
651 1.12 riastrad s = splhigh();
652 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
653 1.12 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
654 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
655 1.12 riastrad splx(s);
656 1.12 riastrad
657 1.12 riastrad return 0;
658 1.12 riastrad }
659 1.12 riastrad
660 1.12 riastrad static inline void
661 1.12 riastrad pci_disable_rom(struct pci_dev *pdev)
662 1.12 riastrad {
663 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
664 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
665 1.12 riastrad pcireg_t addr;
666 1.12 riastrad int s;
667 1.12 riastrad
668 1.12 riastrad s = splhigh();
669 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
670 1.12 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
671 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
672 1.12 riastrad splx(s);
673 1.12 riastrad }
674 1.12 riastrad
675 1.4 riastrad static inline bus_addr_t
676 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
677 1.4 riastrad {
678 1.4 riastrad
679 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
680 1.4 riastrad return pdev->pd_resources[i].addr;
681 1.4 riastrad }
682 1.4 riastrad
683 1.4 riastrad static inline bus_size_t
684 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
685 1.4 riastrad {
686 1.4 riastrad
687 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
688 1.4 riastrad return pdev->pd_resources[i].size;
689 1.4 riastrad }
690 1.4 riastrad
691 1.4 riastrad static inline bus_addr_t
692 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
693 1.4 riastrad {
694 1.4 riastrad
695 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
696 1.4 riastrad }
697 1.4 riastrad
698 1.4 riastrad static inline int
699 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
700 1.4 riastrad {
701 1.4 riastrad
702 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
703 1.4 riastrad return pdev->pd_resources[i].flags;
704 1.4 riastrad }
705 1.4 riastrad
706 1.4 riastrad static inline void __pci_iomem *
707 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
708 1.4 riastrad {
709 1.4 riastrad int error;
710 1.4 riastrad
711 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
712 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
713 1.4 riastrad
714 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
715 1.4 riastrad return NULL;
716 1.4 riastrad if (pdev->pd_resources[i].size < size)
717 1.4 riastrad return NULL;
718 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
719 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
720 1.4 riastrad &pdev->pd_resources[i].bsh);
721 1.4 riastrad if (error) {
722 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
723 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
724 1.4 riastrad &pdev->pd_resources[i].bsh))
725 1.4 riastrad return NULL;
726 1.4 riastrad }
727 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
728 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
729 1.4 riastrad pdev->pd_resources[i].bsh);
730 1.4 riastrad
731 1.4 riastrad return pdev->pd_resources[i].kva;
732 1.4 riastrad }
733 1.4 riastrad
734 1.4 riastrad static inline void
735 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
736 1.4 riastrad {
737 1.4 riastrad unsigned i;
738 1.4 riastrad
739 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
740 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
741 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
742 1.4 riastrad break;
743 1.4 riastrad }
744 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
745 1.4 riastrad
746 1.4 riastrad pdev->pd_resources[i].kva = NULL;
747 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
748 1.4 riastrad pdev->pd_resources[i].size);
749 1.4 riastrad }
750 1.4 riastrad
751 1.5 riastrad static inline void
752 1.5 riastrad pci_save_state(struct pci_dev *pdev)
753 1.5 riastrad {
754 1.5 riastrad
755 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
756 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
757 1.5 riastrad KM_SLEEP);
758 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
759 1.5 riastrad pdev->pd_saved_state);
760 1.5 riastrad }
761 1.5 riastrad
762 1.5 riastrad static inline void
763 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
764 1.5 riastrad {
765 1.5 riastrad
766 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
767 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
768 1.5 riastrad pdev->pd_saved_state);
769 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
770 1.5 riastrad pdev->pd_saved_state = NULL;
771 1.5 riastrad }
772 1.5 riastrad
773 1.5 riastrad static inline bool
774 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
775 1.5 riastrad {
776 1.5 riastrad
777 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
778 1.5 riastrad }
779 1.5 riastrad
780 1.7 riastrad static inline bool
781 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
782 1.7 riastrad {
783 1.7 riastrad
784 1.7 riastrad /* XXX Cop-out. */
785 1.7 riastrad if (mask > DMA_BIT_MASK(32))
786 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
787 1.7 riastrad else
788 1.7 riastrad return true;
789 1.7 riastrad }
790 1.7 riastrad
791 1.26 riastrad static inline bool
792 1.26 riastrad pci_is_root_bus(struct pci_bus *bus)
793 1.26 riastrad {
794 1.26 riastrad
795 1.26 riastrad /* XXX Cop-out. */
796 1.26 riastrad return false;
797 1.26 riastrad }
798 1.26 riastrad
799 1.2 riastrad #endif /* _LINUX_PCI_H_ */
800