pci.h revision 1.33 1 1.25 riastrad /* $NetBSD: pci.h,v 1.33 2018/08/27 14:11:46 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.10 nonaka #if defined(i386) || defined(amd64)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.20 jmcneill #if NACPICA > 0
58 1.10 nonaka #include <dev/acpi/acpivar.h>
59 1.10 nonaka #include <dev/acpi/acpi_pci.h>
60 1.20 jmcneill #else
61 1.20 jmcneill struct acpi_devnode;
62 1.20 jmcneill #endif
63 1.10 nonaka
64 1.7 riastrad #include <linux/dma-mapping.h>
65 1.2 riastrad #include <linux/ioport.h>
66 1.15 riastrad #include <linux/kernel.h>
67 1.2 riastrad
68 1.25 riastrad struct pci_driver;
69 1.25 riastrad
70 1.10 nonaka struct pci_bus {
71 1.29 riastrad /* NetBSD private members */
72 1.29 riastrad pci_chipset_tag_t pb_pc;
73 1.29 riastrad device_t pb_dev;
74 1.29 riastrad
75 1.29 riastrad /* Linux API */
76 1.28 riastrad u_int number;
77 1.10 nonaka };
78 1.2 riastrad
79 1.2 riastrad struct pci_device_id {
80 1.2 riastrad uint32_t vendor;
81 1.2 riastrad uint32_t device;
82 1.2 riastrad uint32_t subvendor;
83 1.2 riastrad uint32_t subdevice;
84 1.2 riastrad uint32_t class;
85 1.2 riastrad uint32_t class_mask;
86 1.2 riastrad unsigned long driver_data;
87 1.2 riastrad };
88 1.2 riastrad
89 1.29 riastrad #define PCI_ANY_ID (~0)
90 1.2 riastrad
91 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
92 1.2 riastrad
93 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
94 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
95 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
96 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
97 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
98 1.2 riastrad
99 1.5 riastrad /* XXX This is getting silly... */
100 1.29 riastrad #define PCI_VENDOR_ID_APPLE PCI_VENDOR_APPLE
101 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
102 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
103 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
104 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
105 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
106 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
107 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
108 1.29 riastrad #define PCI_VENDOR_ID_SI PCI_VENDOR_SIS
109 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
110 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
111 1.5 riastrad
112 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
113 1.2 riastrad
114 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
115 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
116 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
117 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
118 1.2 riastrad
119 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
120 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
121 1.4 riastrad
122 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
123 1.2 riastrad
124 1.4 riastrad typedef int pci_power_t;
125 1.4 riastrad
126 1.4 riastrad #define PCI_D0 0
127 1.4 riastrad #define PCI_D1 1
128 1.4 riastrad #define PCI_D2 2
129 1.4 riastrad #define PCI_D3hot 3
130 1.4 riastrad #define PCI_D3cold 4
131 1.4 riastrad
132 1.4 riastrad #define __pci_iomem
133 1.4 riastrad
134 1.2 riastrad struct pci_dev {
135 1.2 riastrad struct pci_attach_args pd_pa;
136 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
137 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
138 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
139 1.2 riastrad bus_space_tag_t pd_rom_bst;
140 1.2 riastrad bus_space_handle_t pd_rom_bsh;
141 1.2 riastrad bus_size_t pd_rom_size;
142 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
143 1.19 riastrad bus_size_t pd_rom_found_size;
144 1.2 riastrad void *pd_rom_vaddr;
145 1.2 riastrad device_t pd_dev;
146 1.15 riastrad struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
147 1.4 riastrad struct {
148 1.4 riastrad pcireg_t type;
149 1.4 riastrad bus_addr_t addr;
150 1.4 riastrad bus_size_t size;
151 1.4 riastrad int flags;
152 1.4 riastrad bus_space_tag_t bst;
153 1.4 riastrad bus_space_handle_t bsh;
154 1.4 riastrad void __pci_iomem *kva;
155 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
156 1.5 riastrad struct pci_conf_state *pd_saved_state;
157 1.10 nonaka struct acpi_devnode *pd_ad;
158 1.27 riastrad pci_intr_handle_t *pd_intr_handles;
159 1.29 riastrad unsigned pd_enablecnt;
160 1.27 riastrad
161 1.27 riastrad /* Linx API only below */
162 1.2 riastrad struct pci_bus *bus;
163 1.2 riastrad uint32_t devfn;
164 1.2 riastrad uint16_t vendor;
165 1.2 riastrad uint16_t device;
166 1.2 riastrad uint16_t subsystem_vendor;
167 1.2 riastrad uint16_t subsystem_device;
168 1.2 riastrad uint8_t revision;
169 1.2 riastrad uint32_t class;
170 1.5 riastrad bool msi_enabled;
171 1.30 riastrad bool no_64bit_msi;
172 1.2 riastrad };
173 1.2 riastrad
174 1.2 riastrad static inline device_t
175 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
176 1.2 riastrad {
177 1.2 riastrad return pdev->pd_dev;
178 1.2 riastrad }
179 1.2 riastrad
180 1.15 riastrad /* XXX Nouveau kludge! */
181 1.15 riastrad static inline struct drm_device *
182 1.15 riastrad pci_get_drvdata(struct pci_dev *pdev)
183 1.15 riastrad {
184 1.15 riastrad return pdev->pd_drm_dev;
185 1.15 riastrad }
186 1.15 riastrad
187 1.2 riastrad static inline void
188 1.33 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev, device_t parent,
189 1.2 riastrad const struct pci_attach_args *pa, int kludges)
190 1.2 riastrad {
191 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
192 1.2 riastrad PCI_SUBSYS_ID_REG);
193 1.4 riastrad unsigned i;
194 1.2 riastrad
195 1.2 riastrad pdev->pd_pa = *pa;
196 1.2 riastrad pdev->pd_kludges = kludges;
197 1.2 riastrad pdev->pd_rom_vaddr = NULL;
198 1.2 riastrad pdev->pd_dev = dev;
199 1.10 nonaka #if (NACPICA > 0)
200 1.10 nonaka pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
201 1.10 nonaka pa->pa_device, pa->pa_function);
202 1.10 nonaka #else
203 1.10 nonaka pdev->pd_ad = NULL;
204 1.10 nonaka #endif
205 1.10 nonaka pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
206 1.29 riastrad pdev->bus->pb_pc = pa->pa_pc;
207 1.33 riastrad pdev->bus->pb_dev = parent;
208 1.10 nonaka pdev->bus->number = pa->pa_bus;
209 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
210 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
211 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
212 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
213 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
214 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
215 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
216 1.4 riastrad
217 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
218 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
219 1.4 riastrad const int reg = PCI_BAR(i);
220 1.4 riastrad
221 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
222 1.4 riastrad pa->pa_tag, reg);
223 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
224 1.4 riastrad pdev->pd_resources[i].type,
225 1.4 riastrad &pdev->pd_resources[i].addr,
226 1.4 riastrad &pdev->pd_resources[i].size,
227 1.4 riastrad &pdev->pd_resources[i].flags)) {
228 1.4 riastrad pdev->pd_resources[i].addr = 0;
229 1.4 riastrad pdev->pd_resources[i].size = 0;
230 1.4 riastrad pdev->pd_resources[i].flags = 0;
231 1.4 riastrad }
232 1.4 riastrad pdev->pd_resources[i].kva = NULL;
233 1.4 riastrad }
234 1.2 riastrad }
235 1.2 riastrad
236 1.2 riastrad static inline int
237 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
238 1.2 riastrad {
239 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
240 1.2 riastrad NULL, NULL);
241 1.2 riastrad }
242 1.2 riastrad
243 1.4 riastrad static inline int
244 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
245 1.2 riastrad {
246 1.2 riastrad KASSERT(!ISSET(reg, 3));
247 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
248 1.4 riastrad return 0;
249 1.2 riastrad }
250 1.2 riastrad
251 1.4 riastrad static inline int
252 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
253 1.2 riastrad {
254 1.2 riastrad KASSERT(!ISSET(reg, 1));
255 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
256 1.8 riastrad (reg &~ 2)) >> (8 * (reg & 2));
257 1.4 riastrad return 0;
258 1.2 riastrad }
259 1.2 riastrad
260 1.4 riastrad static inline int
261 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
262 1.2 riastrad {
263 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
264 1.8 riastrad (reg &~ 3)) >> (8 * (reg & 3));
265 1.4 riastrad return 0;
266 1.2 riastrad }
267 1.2 riastrad
268 1.4 riastrad static inline int
269 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
270 1.2 riastrad {
271 1.2 riastrad KASSERT(!ISSET(reg, 3));
272 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
273 1.4 riastrad return 0;
274 1.2 riastrad }
275 1.2 riastrad
276 1.28 riastrad static inline int
277 1.28 riastrad pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
278 1.28 riastrad uint32_t *valuep)
279 1.28 riastrad {
280 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
281 1.28 riastrad PCI_FUNC(devfn));
282 1.28 riastrad
283 1.28 riastrad KASSERT(!ISSET(reg, 1));
284 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
285 1.28 riastrad
286 1.28 riastrad return 0;
287 1.28 riastrad }
288 1.28 riastrad
289 1.28 riastrad static inline int
290 1.28 riastrad pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
291 1.28 riastrad uint16_t *valuep)
292 1.28 riastrad {
293 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
294 1.28 riastrad PCI_FUNC(devfn));
295 1.28 riastrad KASSERT(!ISSET(reg, 1));
296 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
297 1.28 riastrad return 0;
298 1.28 riastrad }
299 1.28 riastrad
300 1.28 riastrad static inline int
301 1.28 riastrad pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
302 1.28 riastrad uint8_t *valuep)
303 1.28 riastrad {
304 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
305 1.28 riastrad PCI_FUNC(devfn));
306 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
307 1.28 riastrad return 0;
308 1.28 riastrad }
309 1.28 riastrad
310 1.28 riastrad static inline int
311 1.28 riastrad pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
312 1.28 riastrad uint32_t value)
313 1.28 riastrad {
314 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
315 1.28 riastrad PCI_FUNC(devfn));
316 1.28 riastrad KASSERT(!ISSET(reg, 3));
317 1.28 riastrad pci_conf_write(bus->pb_pc, tag, reg, value);
318 1.28 riastrad return 0;
319 1.28 riastrad }
320 1.28 riastrad
321 1.2 riastrad static inline void
322 1.28 riastrad pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
323 1.2 riastrad uint32_t value)
324 1.2 riastrad {
325 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
326 1.2 riastrad const int reg32 = (reg &~ 3);
327 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
328 1.2 riastrad uint32_t value32;
329 1.2 riastrad
330 1.2 riastrad KASSERT(bytes <= 4);
331 1.2 riastrad KASSERT(!ISSET(value, ~mask));
332 1.28 riastrad value32 = pci_conf_read(pc, tag, reg32);
333 1.2 riastrad value32 &=~ (mask << shift);
334 1.2 riastrad value32 |= (value << shift);
335 1.28 riastrad pci_conf_write(pc, tag, reg32, value32);
336 1.2 riastrad }
337 1.2 riastrad
338 1.4 riastrad static inline int
339 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
340 1.2 riastrad {
341 1.2 riastrad KASSERT(!ISSET(reg, 1));
342 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
343 1.4 riastrad return 0;
344 1.2 riastrad }
345 1.2 riastrad
346 1.4 riastrad static inline int
347 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
348 1.2 riastrad {
349 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
350 1.28 riastrad return 0;
351 1.28 riastrad }
352 1.28 riastrad
353 1.28 riastrad static inline int
354 1.28 riastrad pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
355 1.28 riastrad uint16_t value)
356 1.28 riastrad {
357 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
358 1.28 riastrad PCI_FUNC(devfn));
359 1.28 riastrad KASSERT(!ISSET(reg, 1));
360 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
361 1.28 riastrad return 0;
362 1.28 riastrad }
363 1.28 riastrad
364 1.28 riastrad static inline int
365 1.28 riastrad pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
366 1.28 riastrad uint8_t value)
367 1.28 riastrad {
368 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
369 1.28 riastrad PCI_FUNC(devfn));
370 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
371 1.4 riastrad return 0;
372 1.2 riastrad }
373 1.2 riastrad
374 1.5 riastrad static inline int
375 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
376 1.2 riastrad {
377 1.24 maya #ifdef notyet
378 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
379 1.23 nonaka
380 1.27 riastrad if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
381 1.23 nonaka return -EINVAL;
382 1.23 nonaka
383 1.23 nonaka pdev->msi_enabled = 1;
384 1.23 nonaka return 0;
385 1.24 maya #else
386 1.24 maya return -ENOSYS;
387 1.24 maya #endif
388 1.2 riastrad }
389 1.2 riastrad
390 1.2 riastrad static inline void
391 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
392 1.2 riastrad {
393 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
394 1.23 nonaka
395 1.27 riastrad if (pdev->pd_intr_handles != NULL) {
396 1.27 riastrad pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
397 1.27 riastrad pdev->pd_intr_handles = NULL;
398 1.23 nonaka }
399 1.23 nonaka pdev->msi_enabled = 0;
400 1.2 riastrad }
401 1.2 riastrad
402 1.2 riastrad static inline void
403 1.2 riastrad pci_set_master(struct pci_dev *pdev)
404 1.2 riastrad {
405 1.2 riastrad pcireg_t csr;
406 1.2 riastrad
407 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
408 1.2 riastrad PCI_COMMAND_STATUS_REG);
409 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
410 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
411 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
412 1.2 riastrad }
413 1.2 riastrad
414 1.5 riastrad static inline void
415 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
416 1.5 riastrad {
417 1.5 riastrad pcireg_t csr;
418 1.5 riastrad
419 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
420 1.5 riastrad PCI_COMMAND_STATUS_REG);
421 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
422 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
423 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
424 1.5 riastrad }
425 1.5 riastrad
426 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
427 1.2 riastrad
428 1.2 riastrad static inline bus_addr_t
429 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
430 1.2 riastrad bus_addr_t addr, bus_size_t size)
431 1.2 riastrad {
432 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
433 1.2 riastrad }
434 1.2 riastrad
435 1.2 riastrad static inline int
436 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
437 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
438 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
439 1.2 riastrad bus_size_t) __unused,
440 1.2 riastrad struct pci_dev *pdev)
441 1.2 riastrad {
442 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
443 1.2 riastrad bus_space_tag_t bst;
444 1.2 riastrad int error;
445 1.2 riastrad
446 1.2 riastrad switch (resource->flags) {
447 1.2 riastrad case IORESOURCE_MEM:
448 1.2 riastrad bst = pa->pa_memt;
449 1.2 riastrad break;
450 1.2 riastrad
451 1.2 riastrad case IORESOURCE_IO:
452 1.2 riastrad bst = pa->pa_iot;
453 1.2 riastrad break;
454 1.2 riastrad
455 1.2 riastrad default:
456 1.2 riastrad panic("I don't know what kind of resource you want!");
457 1.2 riastrad }
458 1.2 riastrad
459 1.2 riastrad resource->r_bst = bst;
460 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
461 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
462 1.2 riastrad if (error)
463 1.2 riastrad return error;
464 1.2 riastrad
465 1.2 riastrad resource->size = size;
466 1.2 riastrad return 0;
467 1.2 riastrad }
468 1.2 riastrad
469 1.2 riastrad /*
470 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
471 1.2 riastrad * defined only for their single purposes in i915drm, in
472 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
473 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
474 1.2 riastrad * internally) to pass a cookie through.
475 1.2 riastrad */
476 1.2 riastrad
477 1.2 riastrad static inline int /* XXX inline? */
478 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
479 1.2 riastrad {
480 1.2 riastrad
481 1.2 riastrad if (pa->pa_bus != 0)
482 1.2 riastrad return 0;
483 1.2 riastrad if (pa->pa_device != 0)
484 1.2 riastrad return 0;
485 1.2 riastrad if (pa->pa_function != 0)
486 1.2 riastrad return 0;
487 1.2 riastrad
488 1.2 riastrad return 1;
489 1.2 riastrad }
490 1.2 riastrad
491 1.2 riastrad static inline struct pci_dev *
492 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
493 1.2 riastrad {
494 1.2 riastrad struct pci_attach_args pa;
495 1.2 riastrad
496 1.2 riastrad KASSERT(bus == 0);
497 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
498 1.2 riastrad
499 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
500 1.2 riastrad return NULL;
501 1.2 riastrad
502 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
503 1.33 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
504 1.2 riastrad
505 1.2 riastrad return pdev;
506 1.2 riastrad }
507 1.2 riastrad
508 1.2 riastrad static inline int /* XXX inline? */
509 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
510 1.2 riastrad {
511 1.2 riastrad
512 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
513 1.2 riastrad return 0;
514 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
515 1.2 riastrad return 0;
516 1.2 riastrad
517 1.2 riastrad return 1;
518 1.2 riastrad }
519 1.2 riastrad
520 1.4 riastrad static inline void
521 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
522 1.4 riastrad {
523 1.4 riastrad
524 1.4 riastrad if (pdev == NULL)
525 1.4 riastrad return;
526 1.4 riastrad
527 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
528 1.32 riastrad kmem_free(pdev->bus, sizeof(*pdev->bus));
529 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
530 1.4 riastrad }
531 1.4 riastrad
532 1.2 riastrad static inline struct pci_dev *
533 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
534 1.2 riastrad {
535 1.2 riastrad struct pci_attach_args pa;
536 1.2 riastrad
537 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
538 1.4 riastrad
539 1.4 riastrad if (from != NULL) {
540 1.4 riastrad pci_dev_put(from);
541 1.4 riastrad return NULL;
542 1.4 riastrad }
543 1.2 riastrad
544 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
545 1.2 riastrad return NULL;
546 1.2 riastrad
547 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
548 1.33 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
549 1.2 riastrad
550 1.2 riastrad return pdev;
551 1.2 riastrad }
552 1.2 riastrad
553 1.2 riastrad #define __pci_rom_iomem
554 1.2 riastrad
555 1.2 riastrad static inline void
556 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
557 1.2 riastrad {
558 1.2 riastrad
559 1.12 riastrad /* XXX Disable the ROM address decoder. */
560 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
561 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
562 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
563 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
564 1.2 riastrad pdev->pd_rom_vaddr = NULL;
565 1.2 riastrad }
566 1.2 riastrad
567 1.9 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
568 1.9 riastrad static int
569 1.9 riastrad pci_map_rom_md(struct pci_dev *pdev)
570 1.9 riastrad {
571 1.9 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
572 1.9 riastrad const bus_addr_t rom_base = 0xc0000;
573 1.9 riastrad const bus_size_t rom_size = 0x20000;
574 1.9 riastrad bus_space_handle_t rom_bsh;
575 1.9 riastrad int error;
576 1.9 riastrad
577 1.9 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
578 1.9 riastrad return ENXIO;
579 1.9 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
580 1.9 riastrad return ENXIO;
581 1.9 riastrad /* XXX Check whether this is the primary VGA card? */
582 1.9 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
583 1.9 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
584 1.9 riastrad if (error)
585 1.9 riastrad return ENXIO;
586 1.9 riastrad
587 1.9 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
588 1.9 riastrad pdev->pd_rom_bsh = rom_bsh;
589 1.9 riastrad pdev->pd_rom_size = rom_size;
590 1.22 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
591 1.9 riastrad
592 1.9 riastrad return 0;
593 1.9 riastrad #else
594 1.9 riastrad return ENXIO;
595 1.9 riastrad #endif
596 1.9 riastrad }
597 1.9 riastrad
598 1.2 riastrad static inline void __pci_rom_iomem *
599 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
600 1.2 riastrad {
601 1.2 riastrad
602 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
603 1.2 riastrad
604 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
605 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
606 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
607 1.22 riastrad != 0)
608 1.22 riastrad goto fail_mi;
609 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
610 1.2 riastrad
611 1.2 riastrad /* XXX This type is obviously wrong in general... */
612 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
613 1.18 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
614 1.18 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
615 1.2 riastrad pci_unmap_rom(pdev, NULL);
616 1.22 riastrad goto fail_mi;
617 1.22 riastrad }
618 1.22 riastrad goto success;
619 1.22 riastrad
620 1.22 riastrad fail_mi:
621 1.22 riastrad if (pci_map_rom_md(pdev) != 0)
622 1.22 riastrad goto fail_md;
623 1.22 riastrad
624 1.22 riastrad /* XXX This type is obviously wrong in general... */
625 1.22 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
626 1.22 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
627 1.22 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
628 1.22 riastrad pci_unmap_rom(pdev, NULL);
629 1.22 riastrad goto fail_md;
630 1.2 riastrad }
631 1.2 riastrad
632 1.22 riastrad success:
633 1.18 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
634 1.18 riastrad *sizep = pdev->pd_rom_found_size;
635 1.18 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
636 1.18 riastrad pdev->pd_rom_found_bsh);
637 1.2 riastrad return pdev->pd_rom_vaddr;
638 1.22 riastrad
639 1.22 riastrad fail_md:
640 1.22 riastrad return NULL;
641 1.2 riastrad }
642 1.2 riastrad
643 1.13 riastrad static inline void __pci_rom_iomem *
644 1.14 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
645 1.13 riastrad {
646 1.13 riastrad
647 1.14 riastrad *sizep = 0;
648 1.13 riastrad return NULL;
649 1.13 riastrad }
650 1.13 riastrad
651 1.12 riastrad static inline int
652 1.12 riastrad pci_enable_rom(struct pci_dev *pdev)
653 1.12 riastrad {
654 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
655 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
656 1.12 riastrad pcireg_t addr;
657 1.12 riastrad int s;
658 1.12 riastrad
659 1.12 riastrad /* XXX Don't do anything if the ROM isn't there. */
660 1.12 riastrad
661 1.12 riastrad s = splhigh();
662 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
663 1.12 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
664 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
665 1.12 riastrad splx(s);
666 1.12 riastrad
667 1.12 riastrad return 0;
668 1.12 riastrad }
669 1.12 riastrad
670 1.12 riastrad static inline void
671 1.12 riastrad pci_disable_rom(struct pci_dev *pdev)
672 1.12 riastrad {
673 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
674 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
675 1.12 riastrad pcireg_t addr;
676 1.12 riastrad int s;
677 1.12 riastrad
678 1.12 riastrad s = splhigh();
679 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
680 1.12 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
681 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
682 1.12 riastrad splx(s);
683 1.12 riastrad }
684 1.12 riastrad
685 1.4 riastrad static inline bus_addr_t
686 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
687 1.4 riastrad {
688 1.4 riastrad
689 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
690 1.4 riastrad return pdev->pd_resources[i].addr;
691 1.4 riastrad }
692 1.4 riastrad
693 1.4 riastrad static inline bus_size_t
694 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
695 1.4 riastrad {
696 1.4 riastrad
697 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
698 1.4 riastrad return pdev->pd_resources[i].size;
699 1.4 riastrad }
700 1.4 riastrad
701 1.4 riastrad static inline bus_addr_t
702 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
703 1.4 riastrad {
704 1.4 riastrad
705 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
706 1.4 riastrad }
707 1.4 riastrad
708 1.4 riastrad static inline int
709 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
710 1.4 riastrad {
711 1.4 riastrad
712 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
713 1.4 riastrad return pdev->pd_resources[i].flags;
714 1.4 riastrad }
715 1.4 riastrad
716 1.4 riastrad static inline void __pci_iomem *
717 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
718 1.4 riastrad {
719 1.4 riastrad int error;
720 1.4 riastrad
721 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
722 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
723 1.4 riastrad
724 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
725 1.4 riastrad return NULL;
726 1.4 riastrad if (pdev->pd_resources[i].size < size)
727 1.4 riastrad return NULL;
728 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
729 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
730 1.4 riastrad &pdev->pd_resources[i].bsh);
731 1.4 riastrad if (error) {
732 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
733 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
734 1.4 riastrad &pdev->pd_resources[i].bsh))
735 1.4 riastrad return NULL;
736 1.4 riastrad }
737 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
738 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
739 1.4 riastrad pdev->pd_resources[i].bsh);
740 1.4 riastrad
741 1.4 riastrad return pdev->pd_resources[i].kva;
742 1.4 riastrad }
743 1.4 riastrad
744 1.4 riastrad static inline void
745 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
746 1.4 riastrad {
747 1.4 riastrad unsigned i;
748 1.4 riastrad
749 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
750 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
751 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
752 1.4 riastrad break;
753 1.4 riastrad }
754 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
755 1.4 riastrad
756 1.4 riastrad pdev->pd_resources[i].kva = NULL;
757 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
758 1.4 riastrad pdev->pd_resources[i].size);
759 1.4 riastrad }
760 1.4 riastrad
761 1.5 riastrad static inline void
762 1.5 riastrad pci_save_state(struct pci_dev *pdev)
763 1.5 riastrad {
764 1.5 riastrad
765 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
766 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
767 1.5 riastrad KM_SLEEP);
768 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
769 1.5 riastrad pdev->pd_saved_state);
770 1.5 riastrad }
771 1.5 riastrad
772 1.5 riastrad static inline void
773 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
774 1.5 riastrad {
775 1.5 riastrad
776 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
777 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
778 1.5 riastrad pdev->pd_saved_state);
779 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
780 1.5 riastrad pdev->pd_saved_state = NULL;
781 1.5 riastrad }
782 1.5 riastrad
783 1.5 riastrad static inline bool
784 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
785 1.5 riastrad {
786 1.5 riastrad
787 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
788 1.5 riastrad }
789 1.5 riastrad
790 1.7 riastrad static inline bool
791 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
792 1.7 riastrad {
793 1.7 riastrad
794 1.7 riastrad /* XXX Cop-out. */
795 1.7 riastrad if (mask > DMA_BIT_MASK(32))
796 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
797 1.7 riastrad else
798 1.7 riastrad return true;
799 1.7 riastrad }
800 1.7 riastrad
801 1.26 riastrad static inline bool
802 1.26 riastrad pci_is_root_bus(struct pci_bus *bus)
803 1.26 riastrad {
804 1.26 riastrad
805 1.26 riastrad /* XXX Cop-out. */
806 1.26 riastrad return false;
807 1.26 riastrad }
808 1.26 riastrad
809 1.29 riastrad static inline int
810 1.29 riastrad pci_domain_nr(struct pci_bus *bus)
811 1.29 riastrad {
812 1.29 riastrad
813 1.29 riastrad return device_unit(bus->pb_dev);
814 1.29 riastrad }
815 1.29 riastrad
816 1.29 riastrad /*
817 1.29 riastrad * We explicitly rename pci_enable/disable_device so that you have to
818 1.29 riastrad * review each use of them, since NetBSD's PCI API does _not_ respect
819 1.29 riastrad * our local enablecnt here, but there are different parts of NetBSD
820 1.29 riastrad * that automatically enable/disable like PMF, so you have to decide
821 1.29 riastrad * for each one whether to call it or not.
822 1.29 riastrad */
823 1.29 riastrad
824 1.29 riastrad static inline int
825 1.29 riastrad linux_pci_enable_device(struct pci_dev *pdev)
826 1.29 riastrad {
827 1.29 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
828 1.29 riastrad pcireg_t csr;
829 1.29 riastrad int s;
830 1.29 riastrad
831 1.29 riastrad if (pdev->pd_enablecnt++)
832 1.29 riastrad return 0;
833 1.29 riastrad
834 1.29 riastrad s = splhigh();
835 1.29 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
836 1.29 riastrad csr |= PCI_COMMAND_IO_ENABLE;
837 1.29 riastrad csr |= PCI_COMMAND_MEM_ENABLE;
838 1.29 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
839 1.29 riastrad splx(s);
840 1.29 riastrad
841 1.29 riastrad return 0;
842 1.29 riastrad }
843 1.29 riastrad
844 1.29 riastrad static inline void
845 1.29 riastrad linux_pci_disable_device(struct pci_dev *pdev)
846 1.29 riastrad {
847 1.29 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
848 1.29 riastrad pcireg_t csr;
849 1.29 riastrad int s;
850 1.29 riastrad
851 1.29 riastrad if (--pdev->pd_enablecnt)
852 1.29 riastrad return;
853 1.29 riastrad
854 1.29 riastrad s = splhigh();
855 1.29 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
856 1.29 riastrad csr &= ~PCI_COMMAND_IO_ENABLE;
857 1.29 riastrad csr &= ~PCI_COMMAND_MEM_ENABLE;
858 1.29 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
859 1.29 riastrad splx(s);
860 1.29 riastrad }
861 1.29 riastrad
862 1.2 riastrad #endif /* _LINUX_PCI_H_ */
863