pci.h revision 1.36 1 1.25 riastrad /* $NetBSD: pci.h,v 1.36 2018/08/27 14:16:04 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.10 nonaka #if defined(i386) || defined(amd64)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.20 jmcneill #if NACPICA > 0
58 1.10 nonaka #include <dev/acpi/acpivar.h>
59 1.10 nonaka #include <dev/acpi/acpi_pci.h>
60 1.20 jmcneill #else
61 1.20 jmcneill struct acpi_devnode;
62 1.20 jmcneill #endif
63 1.10 nonaka
64 1.7 riastrad #include <linux/dma-mapping.h>
65 1.2 riastrad #include <linux/ioport.h>
66 1.15 riastrad #include <linux/kernel.h>
67 1.2 riastrad
68 1.25 riastrad struct pci_driver;
69 1.25 riastrad
70 1.10 nonaka struct pci_bus {
71 1.29 riastrad /* NetBSD private members */
72 1.29 riastrad pci_chipset_tag_t pb_pc;
73 1.29 riastrad device_t pb_dev;
74 1.29 riastrad
75 1.29 riastrad /* Linux API */
76 1.28 riastrad u_int number;
77 1.10 nonaka };
78 1.2 riastrad
79 1.2 riastrad struct pci_device_id {
80 1.2 riastrad uint32_t vendor;
81 1.2 riastrad uint32_t device;
82 1.2 riastrad uint32_t subvendor;
83 1.2 riastrad uint32_t subdevice;
84 1.2 riastrad uint32_t class;
85 1.2 riastrad uint32_t class_mask;
86 1.2 riastrad unsigned long driver_data;
87 1.2 riastrad };
88 1.2 riastrad
89 1.29 riastrad #define PCI_ANY_ID (~0)
90 1.2 riastrad
91 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
92 1.2 riastrad
93 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
94 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
95 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
96 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
97 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
98 1.2 riastrad
99 1.5 riastrad /* XXX This is getting silly... */
100 1.29 riastrad #define PCI_VENDOR_ID_APPLE PCI_VENDOR_APPLE
101 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
102 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
103 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
104 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
105 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
106 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
107 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
108 1.29 riastrad #define PCI_VENDOR_ID_SI PCI_VENDOR_SIS
109 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
110 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
111 1.5 riastrad
112 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
113 1.2 riastrad
114 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
115 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
116 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
117 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
118 1.2 riastrad
119 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
120 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
121 1.4 riastrad
122 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
123 1.2 riastrad
124 1.4 riastrad typedef int pci_power_t;
125 1.4 riastrad
126 1.4 riastrad #define PCI_D0 0
127 1.4 riastrad #define PCI_D1 1
128 1.4 riastrad #define PCI_D2 2
129 1.4 riastrad #define PCI_D3hot 3
130 1.4 riastrad #define PCI_D3cold 4
131 1.4 riastrad
132 1.4 riastrad #define __pci_iomem
133 1.4 riastrad
134 1.2 riastrad struct pci_dev {
135 1.2 riastrad struct pci_attach_args pd_pa;
136 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
137 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
138 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
139 1.2 riastrad bus_space_tag_t pd_rom_bst;
140 1.2 riastrad bus_space_handle_t pd_rom_bsh;
141 1.2 riastrad bus_size_t pd_rom_size;
142 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
143 1.19 riastrad bus_size_t pd_rom_found_size;
144 1.2 riastrad void *pd_rom_vaddr;
145 1.2 riastrad device_t pd_dev;
146 1.15 riastrad struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
147 1.4 riastrad struct {
148 1.4 riastrad pcireg_t type;
149 1.4 riastrad bus_addr_t addr;
150 1.4 riastrad bus_size_t size;
151 1.4 riastrad int flags;
152 1.4 riastrad bus_space_tag_t bst;
153 1.4 riastrad bus_space_handle_t bsh;
154 1.4 riastrad void __pci_iomem *kva;
155 1.34 riastrad bool mapped;
156 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
157 1.5 riastrad struct pci_conf_state *pd_saved_state;
158 1.10 nonaka struct acpi_devnode *pd_ad;
159 1.27 riastrad pci_intr_handle_t *pd_intr_handles;
160 1.29 riastrad unsigned pd_enablecnt;
161 1.27 riastrad
162 1.27 riastrad /* Linx API only below */
163 1.2 riastrad struct pci_bus *bus;
164 1.2 riastrad uint32_t devfn;
165 1.2 riastrad uint16_t vendor;
166 1.2 riastrad uint16_t device;
167 1.2 riastrad uint16_t subsystem_vendor;
168 1.2 riastrad uint16_t subsystem_device;
169 1.2 riastrad uint8_t revision;
170 1.2 riastrad uint32_t class;
171 1.5 riastrad bool msi_enabled;
172 1.30 riastrad bool no_64bit_msi;
173 1.2 riastrad };
174 1.2 riastrad
175 1.2 riastrad static inline device_t
176 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
177 1.2 riastrad {
178 1.2 riastrad return pdev->pd_dev;
179 1.2 riastrad }
180 1.2 riastrad
181 1.15 riastrad /* XXX Nouveau kludge! */
182 1.15 riastrad static inline struct drm_device *
183 1.15 riastrad pci_get_drvdata(struct pci_dev *pdev)
184 1.15 riastrad {
185 1.15 riastrad return pdev->pd_drm_dev;
186 1.15 riastrad }
187 1.15 riastrad
188 1.2 riastrad static inline void
189 1.33 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev, device_t parent,
190 1.2 riastrad const struct pci_attach_args *pa, int kludges)
191 1.2 riastrad {
192 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
193 1.2 riastrad PCI_SUBSYS_ID_REG);
194 1.4 riastrad unsigned i;
195 1.2 riastrad
196 1.2 riastrad pdev->pd_pa = *pa;
197 1.2 riastrad pdev->pd_kludges = kludges;
198 1.2 riastrad pdev->pd_rom_vaddr = NULL;
199 1.2 riastrad pdev->pd_dev = dev;
200 1.10 nonaka #if (NACPICA > 0)
201 1.10 nonaka pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
202 1.10 nonaka pa->pa_device, pa->pa_function);
203 1.10 nonaka #else
204 1.10 nonaka pdev->pd_ad = NULL;
205 1.10 nonaka #endif
206 1.35 riastrad pdev->pd_saved_state = NULL;
207 1.35 riastrad pdev->pd_intr_handles = NULL;
208 1.34 riastrad pdev->bus = kmem_zalloc(sizeof(*pdev->bus), KM_NOSLEEP);
209 1.29 riastrad pdev->bus->pb_pc = pa->pa_pc;
210 1.33 riastrad pdev->bus->pb_dev = parent;
211 1.10 nonaka pdev->bus->number = pa->pa_bus;
212 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
213 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
214 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
215 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
216 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
217 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
218 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
219 1.4 riastrad
220 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
221 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
222 1.4 riastrad const int reg = PCI_BAR(i);
223 1.4 riastrad
224 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
225 1.4 riastrad pa->pa_tag, reg);
226 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
227 1.4 riastrad pdev->pd_resources[i].type,
228 1.4 riastrad &pdev->pd_resources[i].addr,
229 1.4 riastrad &pdev->pd_resources[i].size,
230 1.4 riastrad &pdev->pd_resources[i].flags)) {
231 1.4 riastrad pdev->pd_resources[i].addr = 0;
232 1.4 riastrad pdev->pd_resources[i].size = 0;
233 1.4 riastrad pdev->pd_resources[i].flags = 0;
234 1.4 riastrad }
235 1.4 riastrad pdev->pd_resources[i].kva = NULL;
236 1.4 riastrad }
237 1.2 riastrad }
238 1.2 riastrad
239 1.2 riastrad static inline int
240 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
241 1.2 riastrad {
242 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
243 1.2 riastrad NULL, NULL);
244 1.2 riastrad }
245 1.2 riastrad
246 1.4 riastrad static inline int
247 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
248 1.2 riastrad {
249 1.2 riastrad KASSERT(!ISSET(reg, 3));
250 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
251 1.4 riastrad return 0;
252 1.2 riastrad }
253 1.2 riastrad
254 1.4 riastrad static inline int
255 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
256 1.2 riastrad {
257 1.2 riastrad KASSERT(!ISSET(reg, 1));
258 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
259 1.8 riastrad (reg &~ 2)) >> (8 * (reg & 2));
260 1.4 riastrad return 0;
261 1.2 riastrad }
262 1.2 riastrad
263 1.4 riastrad static inline int
264 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
265 1.2 riastrad {
266 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
267 1.8 riastrad (reg &~ 3)) >> (8 * (reg & 3));
268 1.4 riastrad return 0;
269 1.2 riastrad }
270 1.2 riastrad
271 1.4 riastrad static inline int
272 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
273 1.2 riastrad {
274 1.2 riastrad KASSERT(!ISSET(reg, 3));
275 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
276 1.4 riastrad return 0;
277 1.2 riastrad }
278 1.2 riastrad
279 1.28 riastrad static inline int
280 1.28 riastrad pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
281 1.28 riastrad uint32_t *valuep)
282 1.28 riastrad {
283 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
284 1.28 riastrad PCI_FUNC(devfn));
285 1.28 riastrad
286 1.28 riastrad KASSERT(!ISSET(reg, 1));
287 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
288 1.28 riastrad
289 1.28 riastrad return 0;
290 1.28 riastrad }
291 1.28 riastrad
292 1.28 riastrad static inline int
293 1.28 riastrad pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
294 1.28 riastrad uint16_t *valuep)
295 1.28 riastrad {
296 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
297 1.28 riastrad PCI_FUNC(devfn));
298 1.28 riastrad KASSERT(!ISSET(reg, 1));
299 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
300 1.28 riastrad return 0;
301 1.28 riastrad }
302 1.28 riastrad
303 1.28 riastrad static inline int
304 1.28 riastrad pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
305 1.28 riastrad uint8_t *valuep)
306 1.28 riastrad {
307 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
308 1.28 riastrad PCI_FUNC(devfn));
309 1.28 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
310 1.28 riastrad return 0;
311 1.28 riastrad }
312 1.28 riastrad
313 1.28 riastrad static inline int
314 1.28 riastrad pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
315 1.28 riastrad uint32_t value)
316 1.28 riastrad {
317 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
318 1.28 riastrad PCI_FUNC(devfn));
319 1.28 riastrad KASSERT(!ISSET(reg, 3));
320 1.28 riastrad pci_conf_write(bus->pb_pc, tag, reg, value);
321 1.28 riastrad return 0;
322 1.28 riastrad }
323 1.28 riastrad
324 1.2 riastrad static inline void
325 1.28 riastrad pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
326 1.2 riastrad uint32_t value)
327 1.2 riastrad {
328 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
329 1.2 riastrad const int reg32 = (reg &~ 3);
330 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
331 1.2 riastrad uint32_t value32;
332 1.2 riastrad
333 1.2 riastrad KASSERT(bytes <= 4);
334 1.2 riastrad KASSERT(!ISSET(value, ~mask));
335 1.28 riastrad value32 = pci_conf_read(pc, tag, reg32);
336 1.2 riastrad value32 &=~ (mask << shift);
337 1.2 riastrad value32 |= (value << shift);
338 1.28 riastrad pci_conf_write(pc, tag, reg32, value32);
339 1.2 riastrad }
340 1.2 riastrad
341 1.4 riastrad static inline int
342 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
343 1.2 riastrad {
344 1.2 riastrad KASSERT(!ISSET(reg, 1));
345 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
346 1.4 riastrad return 0;
347 1.2 riastrad }
348 1.2 riastrad
349 1.4 riastrad static inline int
350 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
351 1.2 riastrad {
352 1.28 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
353 1.28 riastrad return 0;
354 1.28 riastrad }
355 1.28 riastrad
356 1.28 riastrad static inline int
357 1.28 riastrad pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
358 1.28 riastrad uint16_t value)
359 1.28 riastrad {
360 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
361 1.28 riastrad PCI_FUNC(devfn));
362 1.28 riastrad KASSERT(!ISSET(reg, 1));
363 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
364 1.28 riastrad return 0;
365 1.28 riastrad }
366 1.28 riastrad
367 1.28 riastrad static inline int
368 1.28 riastrad pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
369 1.28 riastrad uint8_t value)
370 1.28 riastrad {
371 1.28 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
372 1.28 riastrad PCI_FUNC(devfn));
373 1.28 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
374 1.4 riastrad return 0;
375 1.2 riastrad }
376 1.2 riastrad
377 1.5 riastrad static inline int
378 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
379 1.2 riastrad {
380 1.24 maya #ifdef notyet
381 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
382 1.23 nonaka
383 1.27 riastrad if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
384 1.23 nonaka return -EINVAL;
385 1.23 nonaka
386 1.23 nonaka pdev->msi_enabled = 1;
387 1.23 nonaka return 0;
388 1.24 maya #else
389 1.24 maya return -ENOSYS;
390 1.24 maya #endif
391 1.2 riastrad }
392 1.2 riastrad
393 1.2 riastrad static inline void
394 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
395 1.2 riastrad {
396 1.23 nonaka const struct pci_attach_args *const pa = &pdev->pd_pa;
397 1.23 nonaka
398 1.27 riastrad if (pdev->pd_intr_handles != NULL) {
399 1.27 riastrad pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
400 1.27 riastrad pdev->pd_intr_handles = NULL;
401 1.23 nonaka }
402 1.23 nonaka pdev->msi_enabled = 0;
403 1.2 riastrad }
404 1.2 riastrad
405 1.2 riastrad static inline void
406 1.2 riastrad pci_set_master(struct pci_dev *pdev)
407 1.2 riastrad {
408 1.2 riastrad pcireg_t csr;
409 1.2 riastrad
410 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
411 1.2 riastrad PCI_COMMAND_STATUS_REG);
412 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
413 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
414 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
415 1.2 riastrad }
416 1.2 riastrad
417 1.5 riastrad static inline void
418 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
419 1.5 riastrad {
420 1.5 riastrad pcireg_t csr;
421 1.5 riastrad
422 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
423 1.5 riastrad PCI_COMMAND_STATUS_REG);
424 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
425 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
426 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
427 1.5 riastrad }
428 1.5 riastrad
429 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
430 1.2 riastrad
431 1.2 riastrad static inline bus_addr_t
432 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
433 1.2 riastrad bus_addr_t addr, bus_size_t size)
434 1.2 riastrad {
435 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
436 1.2 riastrad }
437 1.2 riastrad
438 1.2 riastrad static inline int
439 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
440 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
441 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
442 1.2 riastrad bus_size_t) __unused,
443 1.2 riastrad struct pci_dev *pdev)
444 1.2 riastrad {
445 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
446 1.2 riastrad bus_space_tag_t bst;
447 1.2 riastrad int error;
448 1.2 riastrad
449 1.2 riastrad switch (resource->flags) {
450 1.2 riastrad case IORESOURCE_MEM:
451 1.2 riastrad bst = pa->pa_memt;
452 1.2 riastrad break;
453 1.2 riastrad
454 1.2 riastrad case IORESOURCE_IO:
455 1.2 riastrad bst = pa->pa_iot;
456 1.2 riastrad break;
457 1.2 riastrad
458 1.2 riastrad default:
459 1.2 riastrad panic("I don't know what kind of resource you want!");
460 1.2 riastrad }
461 1.2 riastrad
462 1.2 riastrad resource->r_bst = bst;
463 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
464 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
465 1.2 riastrad if (error)
466 1.2 riastrad return error;
467 1.2 riastrad
468 1.2 riastrad resource->size = size;
469 1.2 riastrad return 0;
470 1.2 riastrad }
471 1.2 riastrad
472 1.2 riastrad /*
473 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
474 1.2 riastrad * defined only for their single purposes in i915drm, in
475 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
476 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
477 1.2 riastrad * internally) to pass a cookie through.
478 1.2 riastrad */
479 1.2 riastrad
480 1.2 riastrad static inline int /* XXX inline? */
481 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
482 1.2 riastrad {
483 1.2 riastrad
484 1.2 riastrad if (pa->pa_bus != 0)
485 1.2 riastrad return 0;
486 1.2 riastrad if (pa->pa_device != 0)
487 1.2 riastrad return 0;
488 1.2 riastrad if (pa->pa_function != 0)
489 1.2 riastrad return 0;
490 1.2 riastrad
491 1.2 riastrad return 1;
492 1.2 riastrad }
493 1.2 riastrad
494 1.2 riastrad static inline struct pci_dev *
495 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
496 1.2 riastrad {
497 1.2 riastrad struct pci_attach_args pa;
498 1.2 riastrad
499 1.2 riastrad KASSERT(bus == 0);
500 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
501 1.2 riastrad
502 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
503 1.2 riastrad return NULL;
504 1.2 riastrad
505 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
506 1.33 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
507 1.2 riastrad
508 1.2 riastrad return pdev;
509 1.2 riastrad }
510 1.2 riastrad
511 1.2 riastrad static inline int /* XXX inline? */
512 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
513 1.2 riastrad {
514 1.2 riastrad
515 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
516 1.2 riastrad return 0;
517 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
518 1.2 riastrad return 0;
519 1.2 riastrad
520 1.2 riastrad return 1;
521 1.2 riastrad }
522 1.2 riastrad
523 1.4 riastrad static inline void
524 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
525 1.4 riastrad {
526 1.4 riastrad
527 1.4 riastrad if (pdev == NULL)
528 1.4 riastrad return;
529 1.4 riastrad
530 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
531 1.32 riastrad kmem_free(pdev->bus, sizeof(*pdev->bus));
532 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
533 1.4 riastrad }
534 1.4 riastrad
535 1.2 riastrad static inline struct pci_dev *
536 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
537 1.2 riastrad {
538 1.2 riastrad struct pci_attach_args pa;
539 1.2 riastrad
540 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
541 1.4 riastrad
542 1.4 riastrad if (from != NULL) {
543 1.4 riastrad pci_dev_put(from);
544 1.4 riastrad return NULL;
545 1.4 riastrad }
546 1.2 riastrad
547 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
548 1.2 riastrad return NULL;
549 1.2 riastrad
550 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
551 1.33 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
552 1.2 riastrad
553 1.2 riastrad return pdev;
554 1.2 riastrad }
555 1.2 riastrad
556 1.2 riastrad #define __pci_rom_iomem
557 1.2 riastrad
558 1.2 riastrad static inline void
559 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
560 1.2 riastrad {
561 1.2 riastrad
562 1.12 riastrad /* XXX Disable the ROM address decoder. */
563 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
564 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
565 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
566 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
567 1.2 riastrad pdev->pd_rom_vaddr = NULL;
568 1.2 riastrad }
569 1.2 riastrad
570 1.9 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
571 1.9 riastrad static int
572 1.9 riastrad pci_map_rom_md(struct pci_dev *pdev)
573 1.9 riastrad {
574 1.9 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
575 1.9 riastrad const bus_addr_t rom_base = 0xc0000;
576 1.9 riastrad const bus_size_t rom_size = 0x20000;
577 1.9 riastrad bus_space_handle_t rom_bsh;
578 1.9 riastrad int error;
579 1.9 riastrad
580 1.9 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
581 1.9 riastrad return ENXIO;
582 1.9 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
583 1.9 riastrad return ENXIO;
584 1.9 riastrad /* XXX Check whether this is the primary VGA card? */
585 1.9 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
586 1.9 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
587 1.9 riastrad if (error)
588 1.9 riastrad return ENXIO;
589 1.9 riastrad
590 1.9 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
591 1.9 riastrad pdev->pd_rom_bsh = rom_bsh;
592 1.9 riastrad pdev->pd_rom_size = rom_size;
593 1.22 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
594 1.9 riastrad
595 1.9 riastrad return 0;
596 1.9 riastrad #else
597 1.9 riastrad return ENXIO;
598 1.9 riastrad #endif
599 1.9 riastrad }
600 1.9 riastrad
601 1.2 riastrad static inline void __pci_rom_iomem *
602 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
603 1.2 riastrad {
604 1.2 riastrad
605 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
606 1.2 riastrad
607 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
608 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
609 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
610 1.22 riastrad != 0)
611 1.22 riastrad goto fail_mi;
612 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
613 1.2 riastrad
614 1.2 riastrad /* XXX This type is obviously wrong in general... */
615 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
616 1.18 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
617 1.18 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
618 1.2 riastrad pci_unmap_rom(pdev, NULL);
619 1.22 riastrad goto fail_mi;
620 1.22 riastrad }
621 1.22 riastrad goto success;
622 1.22 riastrad
623 1.22 riastrad fail_mi:
624 1.22 riastrad if (pci_map_rom_md(pdev) != 0)
625 1.22 riastrad goto fail_md;
626 1.22 riastrad
627 1.22 riastrad /* XXX This type is obviously wrong in general... */
628 1.22 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
629 1.22 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
630 1.22 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
631 1.22 riastrad pci_unmap_rom(pdev, NULL);
632 1.22 riastrad goto fail_md;
633 1.2 riastrad }
634 1.2 riastrad
635 1.22 riastrad success:
636 1.18 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
637 1.18 riastrad *sizep = pdev->pd_rom_found_size;
638 1.18 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
639 1.18 riastrad pdev->pd_rom_found_bsh);
640 1.2 riastrad return pdev->pd_rom_vaddr;
641 1.22 riastrad
642 1.22 riastrad fail_md:
643 1.22 riastrad return NULL;
644 1.2 riastrad }
645 1.2 riastrad
646 1.13 riastrad static inline void __pci_rom_iomem *
647 1.14 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
648 1.13 riastrad {
649 1.13 riastrad
650 1.14 riastrad *sizep = 0;
651 1.13 riastrad return NULL;
652 1.13 riastrad }
653 1.13 riastrad
654 1.12 riastrad static inline int
655 1.12 riastrad pci_enable_rom(struct pci_dev *pdev)
656 1.12 riastrad {
657 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
658 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
659 1.12 riastrad pcireg_t addr;
660 1.12 riastrad int s;
661 1.12 riastrad
662 1.12 riastrad /* XXX Don't do anything if the ROM isn't there. */
663 1.12 riastrad
664 1.12 riastrad s = splhigh();
665 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
666 1.12 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
667 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
668 1.12 riastrad splx(s);
669 1.12 riastrad
670 1.12 riastrad return 0;
671 1.12 riastrad }
672 1.12 riastrad
673 1.12 riastrad static inline void
674 1.12 riastrad pci_disable_rom(struct pci_dev *pdev)
675 1.12 riastrad {
676 1.12 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
677 1.12 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
678 1.12 riastrad pcireg_t addr;
679 1.12 riastrad int s;
680 1.12 riastrad
681 1.12 riastrad s = splhigh();
682 1.12 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
683 1.12 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
684 1.12 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
685 1.12 riastrad splx(s);
686 1.12 riastrad }
687 1.12 riastrad
688 1.4 riastrad static inline bus_addr_t
689 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
690 1.4 riastrad {
691 1.4 riastrad
692 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
693 1.4 riastrad return pdev->pd_resources[i].addr;
694 1.4 riastrad }
695 1.4 riastrad
696 1.4 riastrad static inline bus_size_t
697 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
698 1.4 riastrad {
699 1.4 riastrad
700 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
701 1.4 riastrad return pdev->pd_resources[i].size;
702 1.4 riastrad }
703 1.4 riastrad
704 1.4 riastrad static inline bus_addr_t
705 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
706 1.4 riastrad {
707 1.4 riastrad
708 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
709 1.4 riastrad }
710 1.4 riastrad
711 1.4 riastrad static inline int
712 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
713 1.4 riastrad {
714 1.4 riastrad
715 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
716 1.4 riastrad return pdev->pd_resources[i].flags;
717 1.4 riastrad }
718 1.4 riastrad
719 1.4 riastrad static inline void __pci_iomem *
720 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
721 1.4 riastrad {
722 1.4 riastrad int error;
723 1.4 riastrad
724 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
725 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
726 1.4 riastrad
727 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
728 1.4 riastrad return NULL;
729 1.4 riastrad if (pdev->pd_resources[i].size < size)
730 1.4 riastrad return NULL;
731 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
732 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
733 1.4 riastrad &pdev->pd_resources[i].bsh);
734 1.4 riastrad if (error) {
735 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
736 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
737 1.4 riastrad &pdev->pd_resources[i].bsh))
738 1.4 riastrad return NULL;
739 1.4 riastrad }
740 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
741 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
742 1.4 riastrad pdev->pd_resources[i].bsh);
743 1.34 riastrad pdev->pd_resources[i].mapped = true;
744 1.4 riastrad
745 1.4 riastrad return pdev->pd_resources[i].kva;
746 1.4 riastrad }
747 1.4 riastrad
748 1.4 riastrad static inline void
749 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
750 1.4 riastrad {
751 1.4 riastrad unsigned i;
752 1.4 riastrad
753 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
754 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
755 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
756 1.4 riastrad break;
757 1.4 riastrad }
758 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
759 1.4 riastrad
760 1.4 riastrad pdev->pd_resources[i].kva = NULL;
761 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
762 1.4 riastrad pdev->pd_resources[i].size);
763 1.4 riastrad }
764 1.4 riastrad
765 1.5 riastrad static inline void
766 1.5 riastrad pci_save_state(struct pci_dev *pdev)
767 1.5 riastrad {
768 1.5 riastrad
769 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
770 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
771 1.5 riastrad KM_SLEEP);
772 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
773 1.5 riastrad pdev->pd_saved_state);
774 1.5 riastrad }
775 1.5 riastrad
776 1.5 riastrad static inline void
777 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
778 1.5 riastrad {
779 1.5 riastrad
780 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
781 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
782 1.5 riastrad pdev->pd_saved_state);
783 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
784 1.5 riastrad pdev->pd_saved_state = NULL;
785 1.5 riastrad }
786 1.5 riastrad
787 1.5 riastrad static inline bool
788 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
789 1.5 riastrad {
790 1.5 riastrad
791 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
792 1.5 riastrad }
793 1.5 riastrad
794 1.7 riastrad static inline bool
795 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
796 1.7 riastrad {
797 1.7 riastrad
798 1.7 riastrad /* XXX Cop-out. */
799 1.7 riastrad if (mask > DMA_BIT_MASK(32))
800 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
801 1.7 riastrad else
802 1.7 riastrad return true;
803 1.7 riastrad }
804 1.7 riastrad
805 1.26 riastrad static inline bool
806 1.26 riastrad pci_is_root_bus(struct pci_bus *bus)
807 1.26 riastrad {
808 1.26 riastrad
809 1.26 riastrad /* XXX Cop-out. */
810 1.26 riastrad return false;
811 1.26 riastrad }
812 1.26 riastrad
813 1.29 riastrad static inline int
814 1.29 riastrad pci_domain_nr(struct pci_bus *bus)
815 1.29 riastrad {
816 1.29 riastrad
817 1.29 riastrad return device_unit(bus->pb_dev);
818 1.29 riastrad }
819 1.29 riastrad
820 1.29 riastrad /*
821 1.29 riastrad * We explicitly rename pci_enable/disable_device so that you have to
822 1.29 riastrad * review each use of them, since NetBSD's PCI API does _not_ respect
823 1.29 riastrad * our local enablecnt here, but there are different parts of NetBSD
824 1.29 riastrad * that automatically enable/disable like PMF, so you have to decide
825 1.29 riastrad * for each one whether to call it or not.
826 1.29 riastrad */
827 1.29 riastrad
828 1.29 riastrad static inline int
829 1.29 riastrad linux_pci_enable_device(struct pci_dev *pdev)
830 1.29 riastrad {
831 1.29 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
832 1.29 riastrad pcireg_t csr;
833 1.29 riastrad int s;
834 1.29 riastrad
835 1.29 riastrad if (pdev->pd_enablecnt++)
836 1.29 riastrad return 0;
837 1.29 riastrad
838 1.29 riastrad s = splhigh();
839 1.29 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
840 1.29 riastrad csr |= PCI_COMMAND_IO_ENABLE;
841 1.29 riastrad csr |= PCI_COMMAND_MEM_ENABLE;
842 1.29 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
843 1.29 riastrad splx(s);
844 1.29 riastrad
845 1.29 riastrad return 0;
846 1.29 riastrad }
847 1.29 riastrad
848 1.29 riastrad static inline void
849 1.29 riastrad linux_pci_disable_device(struct pci_dev *pdev)
850 1.29 riastrad {
851 1.29 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
852 1.29 riastrad pcireg_t csr;
853 1.29 riastrad int s;
854 1.29 riastrad
855 1.29 riastrad if (--pdev->pd_enablecnt)
856 1.29 riastrad return;
857 1.29 riastrad
858 1.29 riastrad s = splhigh();
859 1.29 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
860 1.29 riastrad csr &= ~PCI_COMMAND_IO_ENABLE;
861 1.29 riastrad csr &= ~PCI_COMMAND_MEM_ENABLE;
862 1.29 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
863 1.29 riastrad splx(s);
864 1.29 riastrad }
865 1.29 riastrad
866 1.34 riastrad static inline void
867 1.34 riastrad linux_pci_dev_destroy(struct pci_dev *pdev)
868 1.34 riastrad {
869 1.34 riastrad unsigned i;
870 1.34 riastrad
871 1.34 riastrad if (pdev->bus != NULL) {
872 1.34 riastrad kmem_free(pdev->bus, sizeof(*pdev->bus));
873 1.34 riastrad pdev->bus = NULL;
874 1.34 riastrad }
875 1.34 riastrad if (ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)) {
876 1.34 riastrad pci_unmap_rom(pdev, pdev->pd_rom_vaddr);
877 1.34 riastrad pdev->pd_rom_vaddr = 0;
878 1.34 riastrad }
879 1.34 riastrad for (i = 0; i < __arraycount(pdev->pd_resources); i++) {
880 1.36 riastrad if (!pdev->pd_resources[i].mapped)
881 1.34 riastrad continue;
882 1.34 riastrad bus_space_unmap(pdev->pd_resources[i].bst,
883 1.34 riastrad pdev->pd_resources[i].bsh, pdev->pd_resources[i].size);
884 1.34 riastrad }
885 1.34 riastrad
886 1.34 riastrad /* There is no way these should be still in use. */
887 1.34 riastrad KASSERT(pdev->pd_saved_state == NULL);
888 1.34 riastrad KASSERT(pdev->pd_intr_handles == NULL);
889 1.34 riastrad }
890 1.34 riastrad
891 1.2 riastrad #endif /* _LINUX_PCI_H_ */
892