pci.h revision 1.4 1 1.4 riastrad /* $NetBSD: pci.h,v 1.4 2014/07/16 20:56:25 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.2 riastrad #include <sys/types.h>
36 1.4 riastrad #include <sys/param.h>
37 1.2 riastrad #include <sys/bus.h>
38 1.3 riastrad #include <sys/cdefs.h>
39 1.2 riastrad #include <sys/kmem.h>
40 1.2 riastrad #include <sys/systm.h>
41 1.2 riastrad
42 1.4 riastrad #include <machine/limits.h>
43 1.4 riastrad
44 1.2 riastrad #include <dev/pci/pcidevs.h>
45 1.2 riastrad #include <dev/pci/pcireg.h>
46 1.2 riastrad #include <dev/pci/pcivar.h>
47 1.4 riastrad #include <dev/pci/agpvar.h>
48 1.2 riastrad
49 1.2 riastrad #include <linux/ioport.h>
50 1.2 riastrad
51 1.2 riastrad struct pci_bus;
52 1.2 riastrad
53 1.2 riastrad struct pci_device_id {
54 1.2 riastrad uint32_t vendor;
55 1.2 riastrad uint32_t device;
56 1.2 riastrad uint32_t subvendor;
57 1.2 riastrad uint32_t subdevice;
58 1.2 riastrad uint32_t class;
59 1.2 riastrad uint32_t class_mask;
60 1.2 riastrad unsigned long driver_data;
61 1.2 riastrad };
62 1.2 riastrad
63 1.2 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
64 1.2 riastrad
65 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
66 1.2 riastrad
67 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
68 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
69 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
70 1.2 riastrad
71 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
72 1.2 riastrad
73 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
74 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
75 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
76 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
77 1.2 riastrad
78 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
79 1.4 riastrad
80 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
81 1.2 riastrad
82 1.4 riastrad typedef int pci_power_t;
83 1.4 riastrad
84 1.4 riastrad #define PCI_D0 0
85 1.4 riastrad #define PCI_D1 1
86 1.4 riastrad #define PCI_D2 2
87 1.4 riastrad #define PCI_D3hot 3
88 1.4 riastrad #define PCI_D3cold 4
89 1.4 riastrad
90 1.4 riastrad #define __pci_iomem
91 1.4 riastrad
92 1.2 riastrad struct pci_dev {
93 1.2 riastrad struct pci_attach_args pd_pa;
94 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
95 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
96 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
97 1.2 riastrad bus_space_tag_t pd_rom_bst;
98 1.2 riastrad bus_space_handle_t pd_rom_bsh;
99 1.2 riastrad bus_size_t pd_rom_size;
100 1.2 riastrad void *pd_rom_vaddr;
101 1.2 riastrad device_t pd_dev;
102 1.4 riastrad struct {
103 1.4 riastrad pcireg_t type;
104 1.4 riastrad bus_addr_t addr;
105 1.4 riastrad bus_size_t size;
106 1.4 riastrad int flags;
107 1.4 riastrad bus_space_tag_t bst;
108 1.4 riastrad bus_space_handle_t bsh;
109 1.4 riastrad void __pci_iomem *kva;
110 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
111 1.2 riastrad struct device dev; /* XXX Don't believe me! */
112 1.2 riastrad struct pci_bus *bus;
113 1.2 riastrad uint32_t devfn;
114 1.2 riastrad uint16_t vendor;
115 1.2 riastrad uint16_t device;
116 1.2 riastrad uint16_t subsystem_vendor;
117 1.2 riastrad uint16_t subsystem_device;
118 1.2 riastrad uint8_t revision;
119 1.2 riastrad uint32_t class;
120 1.2 riastrad bool msi_enabled;
121 1.2 riastrad };
122 1.2 riastrad
123 1.2 riastrad static inline device_t
124 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
125 1.2 riastrad {
126 1.2 riastrad return pdev->pd_dev;
127 1.2 riastrad }
128 1.2 riastrad
129 1.2 riastrad static inline void
130 1.2 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
131 1.2 riastrad const struct pci_attach_args *pa, int kludges)
132 1.2 riastrad {
133 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
134 1.2 riastrad PCI_SUBSYS_ID_REG);
135 1.4 riastrad unsigned i;
136 1.2 riastrad
137 1.2 riastrad pdev->pd_pa = *pa;
138 1.2 riastrad pdev->pd_kludges = kludges;
139 1.2 riastrad pdev->pd_rom_vaddr = NULL;
140 1.2 riastrad pdev->pd_dev = dev;
141 1.2 riastrad pdev->bus = NULL; /* XXX struct pci_dev::bus */
142 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
143 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
144 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
145 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
146 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
147 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
148 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
149 1.2 riastrad pdev->msi_enabled = false;
150 1.4 riastrad
151 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
152 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
153 1.4 riastrad const int reg = PCI_BAR(i);
154 1.4 riastrad
155 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
156 1.4 riastrad pa->pa_tag, reg);
157 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
158 1.4 riastrad pdev->pd_resources[i].type,
159 1.4 riastrad &pdev->pd_resources[i].addr,
160 1.4 riastrad &pdev->pd_resources[i].size,
161 1.4 riastrad &pdev->pd_resources[i].flags)) {
162 1.4 riastrad pdev->pd_resources[i].addr = 0;
163 1.4 riastrad pdev->pd_resources[i].size = 0;
164 1.4 riastrad pdev->pd_resources[i].flags = 0;
165 1.4 riastrad }
166 1.4 riastrad pdev->pd_resources[i].kva = NULL;
167 1.4 riastrad }
168 1.2 riastrad }
169 1.2 riastrad
170 1.2 riastrad static inline int
171 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
172 1.2 riastrad {
173 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
174 1.2 riastrad NULL, NULL);
175 1.2 riastrad }
176 1.2 riastrad
177 1.4 riastrad static inline int
178 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
179 1.2 riastrad {
180 1.2 riastrad KASSERT(!ISSET(reg, 3));
181 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
182 1.4 riastrad return 0;
183 1.2 riastrad }
184 1.2 riastrad
185 1.4 riastrad static inline int
186 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
187 1.2 riastrad {
188 1.2 riastrad KASSERT(!ISSET(reg, 1));
189 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
190 1.2 riastrad (reg &~ 3)) >> (8 * (reg & 3));
191 1.4 riastrad return 0;
192 1.2 riastrad }
193 1.2 riastrad
194 1.4 riastrad static inline int
195 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
196 1.2 riastrad {
197 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
198 1.2 riastrad (reg &~ 1)) >> (8 * (reg & 1));
199 1.4 riastrad return 0;
200 1.2 riastrad }
201 1.2 riastrad
202 1.4 riastrad static inline int
203 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
204 1.2 riastrad {
205 1.2 riastrad KASSERT(!ISSET(reg, 3));
206 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
207 1.4 riastrad return 0;
208 1.2 riastrad }
209 1.2 riastrad
210 1.2 riastrad static inline void
211 1.2 riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
212 1.2 riastrad uint32_t value)
213 1.2 riastrad {
214 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
215 1.2 riastrad const int reg32 = (reg &~ 3);
216 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
217 1.2 riastrad uint32_t value32;
218 1.2 riastrad
219 1.2 riastrad KASSERT(bytes <= 4);
220 1.2 riastrad KASSERT(!ISSET(value, ~mask));
221 1.2 riastrad pci_read_config_dword(pdev, reg32, &value32);
222 1.2 riastrad value32 &=~ (mask << shift);
223 1.2 riastrad value32 |= (value << shift);
224 1.2 riastrad pci_write_config_dword(pdev, reg32, value32);
225 1.2 riastrad }
226 1.2 riastrad
227 1.4 riastrad static inline int
228 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
229 1.2 riastrad {
230 1.2 riastrad KASSERT(!ISSET(reg, 1));
231 1.2 riastrad pci_rmw_config(pdev, reg, 2, value);
232 1.4 riastrad return 0;
233 1.2 riastrad }
234 1.2 riastrad
235 1.4 riastrad static inline int
236 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
237 1.2 riastrad {
238 1.2 riastrad pci_rmw_config(pdev, reg, 1, value);
239 1.4 riastrad return 0;
240 1.2 riastrad }
241 1.2 riastrad
242 1.2 riastrad /*
243 1.2 riastrad * XXX pci msi
244 1.2 riastrad */
245 1.2 riastrad static inline void
246 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
247 1.2 riastrad {
248 1.2 riastrad KASSERT(!pdev->msi_enabled);
249 1.2 riastrad pdev->msi_enabled = true;
250 1.2 riastrad }
251 1.2 riastrad
252 1.2 riastrad static inline void
253 1.2 riastrad pci_disable_msi(struct pci_dev *pdev)
254 1.2 riastrad {
255 1.2 riastrad KASSERT(pdev->msi_enabled);
256 1.2 riastrad pdev->msi_enabled = false;
257 1.2 riastrad }
258 1.2 riastrad
259 1.2 riastrad static inline void
260 1.2 riastrad pci_set_master(struct pci_dev *pdev)
261 1.2 riastrad {
262 1.2 riastrad pcireg_t csr;
263 1.2 riastrad
264 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
265 1.2 riastrad PCI_COMMAND_STATUS_REG);
266 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
267 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
268 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
269 1.2 riastrad }
270 1.2 riastrad
271 1.2 riastrad #define PCIBIOS_MIN_MEM 0 /* XXX bogus x86 kludge bollocks */
272 1.2 riastrad
273 1.2 riastrad static inline bus_addr_t
274 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
275 1.2 riastrad bus_addr_t addr, bus_size_t size)
276 1.2 riastrad {
277 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
278 1.2 riastrad }
279 1.2 riastrad
280 1.2 riastrad static inline int
281 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
282 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
283 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
284 1.2 riastrad bus_size_t) __unused,
285 1.2 riastrad struct pci_dev *pdev)
286 1.2 riastrad {
287 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
288 1.2 riastrad bus_space_tag_t bst;
289 1.2 riastrad int error;
290 1.2 riastrad
291 1.2 riastrad switch (resource->flags) {
292 1.2 riastrad case IORESOURCE_MEM:
293 1.2 riastrad bst = pa->pa_memt;
294 1.2 riastrad break;
295 1.2 riastrad
296 1.2 riastrad case IORESOURCE_IO:
297 1.2 riastrad bst = pa->pa_iot;
298 1.2 riastrad break;
299 1.2 riastrad
300 1.2 riastrad default:
301 1.2 riastrad panic("I don't know what kind of resource you want!");
302 1.2 riastrad }
303 1.2 riastrad
304 1.2 riastrad resource->r_bst = bst;
305 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
306 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
307 1.2 riastrad if (error)
308 1.2 riastrad return error;
309 1.2 riastrad
310 1.2 riastrad resource->size = size;
311 1.2 riastrad return 0;
312 1.2 riastrad }
313 1.2 riastrad
314 1.2 riastrad /*
315 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
316 1.2 riastrad * defined only for their single purposes in i915drm, in
317 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
318 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
319 1.2 riastrad * internally) to pass a cookie through.
320 1.2 riastrad */
321 1.2 riastrad
322 1.2 riastrad static inline int /* XXX inline? */
323 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
324 1.2 riastrad {
325 1.2 riastrad
326 1.2 riastrad if (pa->pa_bus != 0)
327 1.2 riastrad return 0;
328 1.2 riastrad if (pa->pa_device != 0)
329 1.2 riastrad return 0;
330 1.2 riastrad if (pa->pa_function != 0)
331 1.2 riastrad return 0;
332 1.2 riastrad
333 1.2 riastrad return 1;
334 1.2 riastrad }
335 1.2 riastrad
336 1.2 riastrad static inline struct pci_dev *
337 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
338 1.2 riastrad {
339 1.2 riastrad struct pci_attach_args pa;
340 1.2 riastrad
341 1.2 riastrad KASSERT(bus == 0);
342 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
343 1.2 riastrad
344 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
345 1.2 riastrad return NULL;
346 1.2 riastrad
347 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
348 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
349 1.2 riastrad
350 1.2 riastrad return pdev;
351 1.2 riastrad }
352 1.2 riastrad
353 1.2 riastrad static inline int /* XXX inline? */
354 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
355 1.2 riastrad {
356 1.2 riastrad
357 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
358 1.2 riastrad return 0;
359 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
360 1.2 riastrad return 0;
361 1.2 riastrad
362 1.2 riastrad return 1;
363 1.2 riastrad }
364 1.2 riastrad
365 1.4 riastrad static inline void
366 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
367 1.4 riastrad {
368 1.4 riastrad
369 1.4 riastrad if (pdev == NULL)
370 1.4 riastrad return;
371 1.4 riastrad
372 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
373 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
374 1.4 riastrad }
375 1.4 riastrad
376 1.2 riastrad static inline struct pci_dev *
377 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
378 1.2 riastrad {
379 1.2 riastrad struct pci_attach_args pa;
380 1.2 riastrad
381 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
382 1.4 riastrad
383 1.4 riastrad if (from != NULL) {
384 1.4 riastrad pci_dev_put(from);
385 1.4 riastrad return NULL;
386 1.4 riastrad }
387 1.2 riastrad
388 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
389 1.2 riastrad return NULL;
390 1.2 riastrad
391 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
392 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
393 1.2 riastrad
394 1.2 riastrad return pdev;
395 1.2 riastrad }
396 1.2 riastrad
397 1.2 riastrad #define __pci_rom_iomem
398 1.2 riastrad
399 1.2 riastrad static inline void
400 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
401 1.2 riastrad {
402 1.2 riastrad
403 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
404 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
405 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
406 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
407 1.2 riastrad pdev->pd_rom_vaddr = NULL;
408 1.2 riastrad }
409 1.2 riastrad
410 1.2 riastrad static inline void __pci_rom_iomem *
411 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
412 1.2 riastrad {
413 1.2 riastrad bus_space_handle_t bsh;
414 1.2 riastrad bus_size_t size;
415 1.2 riastrad
416 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
417 1.2 riastrad
418 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
419 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
420 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
421 1.2 riastrad != 0) {
422 1.2 riastrad aprint_error_dev(pdev->pd_dev, "unable to map ROM\n");
423 1.2 riastrad return NULL;
424 1.2 riastrad }
425 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
426 1.2 riastrad
427 1.2 riastrad /* XXX This type is obviously wrong in general... */
428 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
429 1.2 riastrad PCI_ROM_CODE_TYPE_X86, &bsh, &size)) {
430 1.2 riastrad aprint_error_dev(pdev->pd_dev, "unable to find ROM\n");
431 1.2 riastrad pci_unmap_rom(pdev, NULL);
432 1.2 riastrad return NULL;
433 1.2 riastrad }
434 1.2 riastrad
435 1.2 riastrad KASSERT(size <= SIZE_T_MAX);
436 1.2 riastrad *sizep = size;
437 1.2 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh);
438 1.2 riastrad return pdev->pd_rom_vaddr;
439 1.2 riastrad }
440 1.2 riastrad
441 1.4 riastrad static inline bus_addr_t
442 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
443 1.4 riastrad {
444 1.4 riastrad
445 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
446 1.4 riastrad return pdev->pd_resources[i].addr;
447 1.4 riastrad }
448 1.4 riastrad
449 1.4 riastrad static inline bus_size_t
450 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
451 1.4 riastrad {
452 1.4 riastrad
453 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
454 1.4 riastrad return pdev->pd_resources[i].size;
455 1.4 riastrad }
456 1.4 riastrad
457 1.4 riastrad static inline bus_addr_t
458 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
459 1.4 riastrad {
460 1.4 riastrad
461 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
462 1.4 riastrad }
463 1.4 riastrad
464 1.4 riastrad static inline int
465 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
466 1.4 riastrad {
467 1.4 riastrad
468 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
469 1.4 riastrad return pdev->pd_resources[i].flags;
470 1.4 riastrad }
471 1.4 riastrad
472 1.4 riastrad static inline void __pci_iomem *
473 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
474 1.4 riastrad {
475 1.4 riastrad int error;
476 1.4 riastrad
477 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
478 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
479 1.4 riastrad
480 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
481 1.4 riastrad return NULL;
482 1.4 riastrad if (pdev->pd_resources[i].size < size)
483 1.4 riastrad return NULL;
484 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
485 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
486 1.4 riastrad &pdev->pd_resources[i].bsh);
487 1.4 riastrad if (error) {
488 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
489 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
490 1.4 riastrad &pdev->pd_resources[i].bsh))
491 1.4 riastrad return NULL;
492 1.4 riastrad }
493 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
494 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
495 1.4 riastrad pdev->pd_resources[i].bsh);
496 1.4 riastrad
497 1.4 riastrad return pdev->pd_resources[i].kva;
498 1.4 riastrad }
499 1.4 riastrad
500 1.4 riastrad static inline void
501 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
502 1.4 riastrad {
503 1.4 riastrad unsigned i;
504 1.4 riastrad
505 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
506 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
507 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
508 1.4 riastrad break;
509 1.4 riastrad }
510 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
511 1.4 riastrad
512 1.4 riastrad pdev->pd_resources[i].kva = NULL;
513 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
514 1.4 riastrad pdev->pd_resources[i].size);
515 1.4 riastrad }
516 1.4 riastrad
517 1.2 riastrad #endif /* _LINUX_PCI_H_ */
518