pci.h revision 1.49 1 1.49 riastrad /* $NetBSD: pci.h,v 1.49 2021/12/19 11:38:04 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.11 nonaka #ifdef _KERNEL_OPT
36 1.38 jmcneill #if defined(i386) || defined(amd64) || defined(__aarch64__)
37 1.10 nonaka #include "acpica.h"
38 1.10 nonaka #else /* !(i386 || amd64) */
39 1.10 nonaka #define NACPICA 0
40 1.10 nonaka #endif /* i386 || amd64 */
41 1.11 nonaka #endif
42 1.10 nonaka
43 1.2 riastrad #include <sys/types.h>
44 1.4 riastrad #include <sys/param.h>
45 1.2 riastrad #include <sys/bus.h>
46 1.3 riastrad #include <sys/cdefs.h>
47 1.2 riastrad #include <sys/kmem.h>
48 1.2 riastrad #include <sys/systm.h>
49 1.2 riastrad
50 1.4 riastrad #include <machine/limits.h>
51 1.4 riastrad
52 1.2 riastrad #include <dev/pci/pcidevs.h>
53 1.2 riastrad #include <dev/pci/pcireg.h>
54 1.2 riastrad #include <dev/pci/pcivar.h>
55 1.4 riastrad #include <dev/pci/agpvar.h>
56 1.2 riastrad
57 1.39 maya #include <linux/device.h>
58 1.7 riastrad #include <linux/dma-mapping.h>
59 1.39 maya #include <linux/errno.h>
60 1.39 maya #include <linux/io.h>
61 1.43 riastrad #include <linux/interrupt.h>
62 1.2 riastrad #include <linux/ioport.h>
63 1.15 riastrad #include <linux/kernel.h>
64 1.2 riastrad
65 1.47 riastrad struct acpi_devnode;
66 1.25 riastrad struct pci_driver;
67 1.25 riastrad
68 1.10 nonaka struct pci_bus {
69 1.29 riastrad /* NetBSD private members */
70 1.29 riastrad pci_chipset_tag_t pb_pc;
71 1.29 riastrad device_t pb_dev;
72 1.29 riastrad
73 1.29 riastrad /* Linux API */
74 1.28 riastrad u_int number;
75 1.10 nonaka };
76 1.2 riastrad
77 1.2 riastrad struct pci_device_id {
78 1.2 riastrad uint32_t vendor;
79 1.2 riastrad uint32_t device;
80 1.2 riastrad uint32_t subvendor;
81 1.2 riastrad uint32_t subdevice;
82 1.2 riastrad uint32_t class;
83 1.2 riastrad uint32_t class_mask;
84 1.2 riastrad unsigned long driver_data;
85 1.2 riastrad };
86 1.2 riastrad
87 1.49 riastrad #define PCI_DEVICE(VENDOR, DEVICE) \
88 1.49 riastrad .vendor = (VENDOR), \
89 1.49 riastrad .device = (DEVICE)
90 1.49 riastrad
91 1.29 riastrad #define PCI_ANY_ID (~0)
92 1.2 riastrad
93 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
94 1.2 riastrad
95 1.15 riastrad #define PCI_CLASS_DISPLAY_VGA \
96 1.15 riastrad ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
97 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
98 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
99 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
100 1.2 riastrad
101 1.5 riastrad /* XXX This is getting silly... */
102 1.29 riastrad #define PCI_VENDOR_ID_APPLE PCI_VENDOR_APPLE
103 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
104 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
105 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
106 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
107 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
108 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
109 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
110 1.29 riastrad #define PCI_VENDOR_ID_SI PCI_VENDOR_SIS
111 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
112 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
113 1.5 riastrad
114 1.40 riastrad #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4
115 1.40 riastrad
116 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
117 1.2 riastrad
118 1.40 riastrad #define PCI_SUBDEVICE_ID_QEMU 0x1100
119 1.40 riastrad
120 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
121 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
122 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
123 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
124 1.2 riastrad
125 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
126 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
127 1.4 riastrad
128 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
129 1.2 riastrad
130 1.4 riastrad typedef int pci_power_t;
131 1.4 riastrad
132 1.4 riastrad #define PCI_D0 0
133 1.4 riastrad #define PCI_D1 1
134 1.4 riastrad #define PCI_D2 2
135 1.4 riastrad #define PCI_D3hot 3
136 1.4 riastrad #define PCI_D3cold 4
137 1.4 riastrad
138 1.4 riastrad #define __pci_iomem
139 1.4 riastrad
140 1.2 riastrad struct pci_dev {
141 1.2 riastrad struct pci_attach_args pd_pa;
142 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
143 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
144 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
145 1.2 riastrad bus_space_tag_t pd_rom_bst;
146 1.2 riastrad bus_space_handle_t pd_rom_bsh;
147 1.2 riastrad bus_size_t pd_rom_size;
148 1.18 riastrad bus_space_handle_t pd_rom_found_bsh;
149 1.19 riastrad bus_size_t pd_rom_found_size;
150 1.2 riastrad void *pd_rom_vaddr;
151 1.2 riastrad device_t pd_dev;
152 1.42 riastrad void *pd_drvdata;
153 1.4 riastrad struct {
154 1.4 riastrad pcireg_t type;
155 1.4 riastrad bus_addr_t addr;
156 1.4 riastrad bus_size_t size;
157 1.4 riastrad int flags;
158 1.4 riastrad bus_space_tag_t bst;
159 1.4 riastrad bus_space_handle_t bsh;
160 1.4 riastrad void __pci_iomem *kva;
161 1.34 riastrad bool mapped;
162 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
163 1.5 riastrad struct pci_conf_state *pd_saved_state;
164 1.10 nonaka struct acpi_devnode *pd_ad;
165 1.27 riastrad pci_intr_handle_t *pd_intr_handles;
166 1.29 riastrad unsigned pd_enablecnt;
167 1.27 riastrad
168 1.27 riastrad /* Linx API only below */
169 1.2 riastrad struct pci_bus *bus;
170 1.2 riastrad uint32_t devfn;
171 1.2 riastrad uint16_t vendor;
172 1.2 riastrad uint16_t device;
173 1.2 riastrad uint16_t subsystem_vendor;
174 1.2 riastrad uint16_t subsystem_device;
175 1.2 riastrad uint8_t revision;
176 1.2 riastrad uint32_t class;
177 1.5 riastrad bool msi_enabled;
178 1.30 riastrad bool no_64bit_msi;
179 1.2 riastrad };
180 1.2 riastrad
181 1.46 riastrad enum pci_bus_speed {
182 1.46 riastrad PCI_SPEED_UNKNOWN,
183 1.46 riastrad PCIE_SPEED_2_5GT,
184 1.46 riastrad PCIE_SPEED_5_0GT,
185 1.46 riastrad PCIE_SPEED_8_0GT,
186 1.46 riastrad PCIE_SPEED_16_0GT,
187 1.46 riastrad };
188 1.46 riastrad
189 1.17 riastrad #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
190 1.2 riastrad
191 1.37 riastrad #define __pci_rom_iomem
192 1.2 riastrad
193 1.37 riastrad /* Namespace. */
194 1.37 riastrad #define pci_bus_alloc_resource linux_pci_bus_alloc_resource
195 1.37 riastrad #define pci_bus_read_config_byte linux_pci_bus_read_config_byte
196 1.37 riastrad #define pci_bus_read_config_dword linux_pci_bus_read_config_dword
197 1.37 riastrad #define pci_bus_read_config_word linux_pci_bus_read_config_word
198 1.37 riastrad #define pci_bus_write_config_byte linux_pci_bus_write_config_byte
199 1.37 riastrad #define pci_bus_write_config_dword linux_pci_bus_write_config_dword
200 1.37 riastrad #define pci_bus_write_config_word linux_pci_bus_write_config_word
201 1.37 riastrad #define pci_clear_master linux_pci_clear_master
202 1.37 riastrad #define pci_dev_dev linux_pci_dev_dev
203 1.49 riastrad #define pci_dev_present linux_pci_dev_present
204 1.37 riastrad #define pci_dev_put linux_pci_dev_put
205 1.37 riastrad #define pci_disable_msi linux_pci_disable_msi
206 1.37 riastrad #define pci_disable_rom linux_pci_disable_rom
207 1.37 riastrad #define pci_dma_supported linux_pci_dma_supported
208 1.37 riastrad #define pci_domain_nr linux_pci_domain_nr
209 1.37 riastrad #define pci_enable_msi linux_pci_enable_msi
210 1.37 riastrad #define pci_enable_rom linux_pci_enable_rom
211 1.37 riastrad #define pci_find_capability linux_pci_find_capability
212 1.37 riastrad #define pci_get_class linux_pci_get_class
213 1.41 riastrad #define pci_get_domain_bus_and_slot linux_pci_get_domain_bus_and_slot
214 1.37 riastrad #define pci_get_drvdata linux_pci_get_drvdata
215 1.37 riastrad #define pci_iomap linux_pci_iomap
216 1.37 riastrad #define pci_iounmap linux_pci_iounmap
217 1.37 riastrad #define pci_is_pcie linux_pci_is_pcie
218 1.37 riastrad #define pci_is_root_bus linux_pci_is_root_bus
219 1.44 riastrad #define pci_is_thunderbolt_attached linux_pci_is_thunderbolt_attached
220 1.37 riastrad #define pci_map_rom linux_pci_map_rom
221 1.37 riastrad #define pci_platform_rom linux_pci_platform_rom
222 1.37 riastrad #define pci_read_config_byte linux_pci_read_config_byte
223 1.37 riastrad #define pci_read_config_dword linux_pci_read_config_dword
224 1.37 riastrad #define pci_read_config_word linux_pci_read_config_word
225 1.37 riastrad #define pci_resource_end linux_pci_resource_end
226 1.37 riastrad #define pci_resource_flags linux_pci_resource_flags
227 1.37 riastrad #define pci_resource_len linux_pci_resource_len
228 1.37 riastrad #define pci_resource_start linux_pci_resource_start
229 1.37 riastrad #define pci_restore_state linux_pci_restore_state
230 1.37 riastrad #define pci_save_state linux_pci_save_state
231 1.42 riastrad #define pci_set_drvdata linux_pci_set_drvdata
232 1.37 riastrad #define pci_set_master linux_pci_set_master
233 1.37 riastrad #define pci_unmap_rom linux_pci_unmap_rom
234 1.37 riastrad #define pci_write_config_byte linux_pci_write_config_byte
235 1.37 riastrad #define pci_write_config_dword linux_pci_write_config_dword
236 1.37 riastrad #define pci_write_config_word linux_pci_write_config_word
237 1.37 riastrad #define pcibios_align_resource linux_pcibios_align_resource
238 1.37 riastrad
239 1.37 riastrad /* NetBSD local additions. */
240 1.37 riastrad void linux_pci_dev_init(struct pci_dev *, device_t, device_t,
241 1.37 riastrad const struct pci_attach_args *, int);
242 1.37 riastrad void linux_pci_dev_destroy(struct pci_dev *);
243 1.37 riastrad
244 1.37 riastrad /* NetBSD no-renames because use requires review. */
245 1.37 riastrad int linux_pci_enable_device(struct pci_dev *);
246 1.37 riastrad void linux_pci_disable_device(struct pci_dev *);
247 1.37 riastrad
248 1.37 riastrad bool pci_is_root_bus(struct pci_bus *);
249 1.37 riastrad int pci_domain_nr(struct pci_bus *);
250 1.37 riastrad
251 1.37 riastrad device_t pci_dev_dev(struct pci_dev *);
252 1.42 riastrad void pci_set_drvdata(struct pci_dev *, void *);
253 1.42 riastrad void * pci_get_drvdata(struct pci_dev *);
254 1.37 riastrad
255 1.37 riastrad int pci_find_capability(struct pci_dev *, int);
256 1.37 riastrad bool pci_is_pcie(struct pci_dev *);
257 1.37 riastrad bool pci_dma_supported(struct pci_dev *, uintmax_t);
258 1.44 riastrad bool pci_is_thunderbolt_attached(struct pci_dev *);
259 1.37 riastrad
260 1.37 riastrad int pci_read_config_dword(struct pci_dev *, int, uint32_t *);
261 1.37 riastrad int pci_read_config_word(struct pci_dev *, int, uint16_t *);
262 1.37 riastrad int pci_read_config_byte(struct pci_dev *, int, uint8_t *);
263 1.37 riastrad int pci_write_config_dword(struct pci_dev *, int, uint32_t);
264 1.37 riastrad int pci_write_config_word(struct pci_dev *, int, uint16_t);
265 1.37 riastrad int pci_write_config_byte(struct pci_dev *, int, uint8_t);
266 1.37 riastrad
267 1.37 riastrad int pci_bus_read_config_dword(struct pci_bus *, unsigned, int,
268 1.37 riastrad uint32_t *);
269 1.37 riastrad int pci_bus_read_config_word(struct pci_bus *, unsigned, int,
270 1.37 riastrad uint16_t *);
271 1.37 riastrad int pci_bus_read_config_byte(struct pci_bus *, unsigned, int,
272 1.37 riastrad uint8_t *);
273 1.37 riastrad int pci_bus_write_config_dword(struct pci_bus *, unsigned, int,
274 1.37 riastrad uint32_t);
275 1.37 riastrad int pci_bus_write_config_word(struct pci_bus *, unsigned, int,
276 1.37 riastrad uint16_t);
277 1.37 riastrad int pci_bus_write_config_byte(struct pci_bus *, unsigned, int,
278 1.37 riastrad uint8_t);
279 1.37 riastrad
280 1.37 riastrad int pci_enable_msi(struct pci_dev *);
281 1.37 riastrad void pci_disable_msi(struct pci_dev *);
282 1.37 riastrad void pci_set_master(struct pci_dev *);
283 1.37 riastrad void pci_clear_master(struct pci_dev *);
284 1.37 riastrad
285 1.37 riastrad bus_addr_t pcibios_align_resource(void *, const struct resource *,
286 1.37 riastrad bus_addr_t, bus_size_t);
287 1.37 riastrad int pci_bus_alloc_resource(struct pci_bus *, struct resource *,
288 1.37 riastrad bus_size_t, bus_size_t, bus_addr_t, int,
289 1.37 riastrad bus_addr_t (*)(void *, const struct resource *, bus_addr_t,
290 1.37 riastrad bus_size_t), struct pci_dev *);
291 1.37 riastrad
292 1.37 riastrad /* XXX Kludges only -- do not use without checking the implementation! */
293 1.41 riastrad struct pci_dev *pci_get_domain_bus_and_slot(int, int, int);
294 1.37 riastrad struct pci_dev *pci_get_class(uint32_t, struct pci_dev *); /* i915 kludge */
295 1.49 riastrad int pci_dev_present(const struct pci_device_id *);
296 1.37 riastrad void pci_dev_put(struct pci_dev *);
297 1.37 riastrad
298 1.37 riastrad void __pci_rom_iomem *
299 1.37 riastrad pci_map_rom(struct pci_dev *, size_t *);
300 1.37 riastrad void __pci_rom_iomem *
301 1.37 riastrad pci_platform_rom(struct pci_dev *, size_t *);
302 1.37 riastrad void pci_unmap_rom(struct pci_dev *, void __pci_rom_iomem *);
303 1.37 riastrad int pci_enable_rom(struct pci_dev *);
304 1.37 riastrad void pci_disable_rom(struct pci_dev *);
305 1.37 riastrad
306 1.37 riastrad bus_addr_t pci_resource_start(struct pci_dev *, unsigned);
307 1.37 riastrad bus_size_t pci_resource_len(struct pci_dev *, unsigned);
308 1.37 riastrad bus_addr_t pci_resource_end(struct pci_dev *, unsigned);
309 1.37 riastrad int pci_resource_flags(struct pci_dev *, unsigned);
310 1.37 riastrad
311 1.37 riastrad void __pci_iomem *
312 1.37 riastrad pci_iomap(struct pci_dev *, unsigned, bus_size_t);
313 1.37 riastrad void pci_iounmap(struct pci_dev *, void __pci_iomem *);
314 1.2 riastrad
315 1.37 riastrad void pci_save_state(struct pci_dev *);
316 1.37 riastrad void pci_restore_state(struct pci_dev *);
317 1.48 riastrad
318 1.48 riastrad static inline bool
319 1.48 riastrad dev_is_pci(struct device *dev)
320 1.48 riastrad {
321 1.48 riastrad struct device *parent = device_parent(dev);
322 1.48 riastrad
323 1.48 riastrad return parent && device_is_a(parent, "pci");
324 1.48 riastrad }
325 1.34 riastrad
326 1.2 riastrad #endif /* _LINUX_PCI_H_ */
327