pci.h revision 1.7 1 1.7 riastrad /* $NetBSD: pci.h,v 1.7 2014/08/06 13:52:06 riastradh Exp $ */
2 1.2 riastrad
3 1.2 riastrad /*-
4 1.2 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.2 riastrad * All rights reserved.
6 1.2 riastrad *
7 1.2 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 riastrad * by Taylor R. Campbell.
9 1.2 riastrad *
10 1.2 riastrad * Redistribution and use in source and binary forms, with or without
11 1.2 riastrad * modification, are permitted provided that the following conditions
12 1.2 riastrad * are met:
13 1.2 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.2 riastrad * notice, this list of conditions and the following disclaimer.
15 1.2 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.2 riastrad * documentation and/or other materials provided with the distribution.
18 1.2 riastrad *
19 1.2 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 riastrad */
31 1.2 riastrad
32 1.2 riastrad #ifndef _LINUX_PCI_H_
33 1.2 riastrad #define _LINUX_PCI_H_
34 1.2 riastrad
35 1.2 riastrad #include <sys/types.h>
36 1.4 riastrad #include <sys/param.h>
37 1.2 riastrad #include <sys/bus.h>
38 1.3 riastrad #include <sys/cdefs.h>
39 1.2 riastrad #include <sys/kmem.h>
40 1.2 riastrad #include <sys/systm.h>
41 1.2 riastrad
42 1.4 riastrad #include <machine/limits.h>
43 1.4 riastrad
44 1.2 riastrad #include <dev/pci/pcidevs.h>
45 1.2 riastrad #include <dev/pci/pcireg.h>
46 1.2 riastrad #include <dev/pci/pcivar.h>
47 1.4 riastrad #include <dev/pci/agpvar.h>
48 1.2 riastrad
49 1.7 riastrad #include <linux/dma-mapping.h>
50 1.2 riastrad #include <linux/ioport.h>
51 1.2 riastrad
52 1.2 riastrad struct pci_bus;
53 1.2 riastrad
54 1.2 riastrad struct pci_device_id {
55 1.2 riastrad uint32_t vendor;
56 1.2 riastrad uint32_t device;
57 1.2 riastrad uint32_t subvendor;
58 1.2 riastrad uint32_t subdevice;
59 1.2 riastrad uint32_t class;
60 1.2 riastrad uint32_t class_mask;
61 1.2 riastrad unsigned long driver_data;
62 1.2 riastrad };
63 1.2 riastrad
64 1.2 riastrad #define PCI_ANY_ID ((pcireg_t)-1)
65 1.2 riastrad
66 1.2 riastrad #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
67 1.2 riastrad
68 1.2 riastrad #define PCI_CLASS_BRIDGE_ISA \
69 1.2 riastrad ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
70 1.2 riastrad CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
71 1.2 riastrad
72 1.5 riastrad /* XXX This is getting silly... */
73 1.5 riastrad #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
74 1.5 riastrad #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
75 1.5 riastrad #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
76 1.5 riastrad #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
77 1.5 riastrad #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
78 1.2 riastrad #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
79 1.7 riastrad #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
80 1.5 riastrad #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
81 1.5 riastrad #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
82 1.5 riastrad
83 1.5 riastrad #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
84 1.2 riastrad
85 1.2 riastrad #define PCI_DEVFN(DEV, FN) \
86 1.2 riastrad (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
87 1.2 riastrad #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
88 1.2 riastrad #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
89 1.2 riastrad
90 1.4 riastrad #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
91 1.5 riastrad #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
92 1.4 riastrad
93 1.2 riastrad #define PCI_CAP_ID_AGP PCI_CAP_AGP
94 1.2 riastrad
95 1.4 riastrad typedef int pci_power_t;
96 1.4 riastrad
97 1.4 riastrad #define PCI_D0 0
98 1.4 riastrad #define PCI_D1 1
99 1.4 riastrad #define PCI_D2 2
100 1.4 riastrad #define PCI_D3hot 3
101 1.4 riastrad #define PCI_D3cold 4
102 1.4 riastrad
103 1.4 riastrad #define __pci_iomem
104 1.4 riastrad
105 1.2 riastrad struct pci_dev {
106 1.2 riastrad struct pci_attach_args pd_pa;
107 1.2 riastrad int pd_kludges; /* Gotta lose 'em... */
108 1.2 riastrad #define NBPCI_KLUDGE_GET_MUMBLE 0x01
109 1.2 riastrad #define NBPCI_KLUDGE_MAP_ROM 0x02
110 1.2 riastrad bus_space_tag_t pd_rom_bst;
111 1.2 riastrad bus_space_handle_t pd_rom_bsh;
112 1.2 riastrad bus_size_t pd_rom_size;
113 1.2 riastrad void *pd_rom_vaddr;
114 1.2 riastrad device_t pd_dev;
115 1.4 riastrad struct {
116 1.4 riastrad pcireg_t type;
117 1.4 riastrad bus_addr_t addr;
118 1.4 riastrad bus_size_t size;
119 1.4 riastrad int flags;
120 1.4 riastrad bus_space_tag_t bst;
121 1.4 riastrad bus_space_handle_t bsh;
122 1.4 riastrad void __pci_iomem *kva;
123 1.4 riastrad } pd_resources[PCI_NUM_RESOURCES];
124 1.5 riastrad struct pci_conf_state *pd_saved_state;
125 1.2 riastrad struct device dev; /* XXX Don't believe me! */
126 1.2 riastrad struct pci_bus *bus;
127 1.2 riastrad uint32_t devfn;
128 1.2 riastrad uint16_t vendor;
129 1.2 riastrad uint16_t device;
130 1.2 riastrad uint16_t subsystem_vendor;
131 1.2 riastrad uint16_t subsystem_device;
132 1.2 riastrad uint8_t revision;
133 1.2 riastrad uint32_t class;
134 1.5 riastrad bool msi_enabled;
135 1.2 riastrad };
136 1.2 riastrad
137 1.2 riastrad static inline device_t
138 1.2 riastrad pci_dev_dev(struct pci_dev *pdev)
139 1.2 riastrad {
140 1.2 riastrad return pdev->pd_dev;
141 1.2 riastrad }
142 1.2 riastrad
143 1.2 riastrad static inline void
144 1.2 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
145 1.2 riastrad const struct pci_attach_args *pa, int kludges)
146 1.2 riastrad {
147 1.2 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
148 1.2 riastrad PCI_SUBSYS_ID_REG);
149 1.4 riastrad unsigned i;
150 1.2 riastrad
151 1.2 riastrad pdev->pd_pa = *pa;
152 1.2 riastrad pdev->pd_kludges = kludges;
153 1.2 riastrad pdev->pd_rom_vaddr = NULL;
154 1.2 riastrad pdev->pd_dev = dev;
155 1.2 riastrad pdev->bus = NULL; /* XXX struct pci_dev::bus */
156 1.2 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
157 1.2 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
158 1.2 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
159 1.2 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
160 1.2 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
161 1.2 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
162 1.2 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
163 1.4 riastrad
164 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
165 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
166 1.4 riastrad const int reg = PCI_BAR(i);
167 1.4 riastrad
168 1.4 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
169 1.4 riastrad pa->pa_tag, reg);
170 1.4 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
171 1.4 riastrad pdev->pd_resources[i].type,
172 1.4 riastrad &pdev->pd_resources[i].addr,
173 1.4 riastrad &pdev->pd_resources[i].size,
174 1.4 riastrad &pdev->pd_resources[i].flags)) {
175 1.4 riastrad pdev->pd_resources[i].addr = 0;
176 1.4 riastrad pdev->pd_resources[i].size = 0;
177 1.4 riastrad pdev->pd_resources[i].flags = 0;
178 1.4 riastrad }
179 1.4 riastrad pdev->pd_resources[i].kva = NULL;
180 1.4 riastrad }
181 1.2 riastrad }
182 1.2 riastrad
183 1.2 riastrad static inline int
184 1.2 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
185 1.2 riastrad {
186 1.2 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
187 1.2 riastrad NULL, NULL);
188 1.2 riastrad }
189 1.2 riastrad
190 1.4 riastrad static inline int
191 1.2 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
192 1.2 riastrad {
193 1.2 riastrad KASSERT(!ISSET(reg, 3));
194 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
195 1.4 riastrad return 0;
196 1.2 riastrad }
197 1.2 riastrad
198 1.4 riastrad static inline int
199 1.2 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
200 1.2 riastrad {
201 1.2 riastrad KASSERT(!ISSET(reg, 1));
202 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
203 1.2 riastrad (reg &~ 3)) >> (8 * (reg & 3));
204 1.4 riastrad return 0;
205 1.2 riastrad }
206 1.2 riastrad
207 1.4 riastrad static inline int
208 1.2 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
209 1.2 riastrad {
210 1.2 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
211 1.2 riastrad (reg &~ 1)) >> (8 * (reg & 1));
212 1.4 riastrad return 0;
213 1.2 riastrad }
214 1.2 riastrad
215 1.4 riastrad static inline int
216 1.2 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
217 1.2 riastrad {
218 1.2 riastrad KASSERT(!ISSET(reg, 3));
219 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
220 1.4 riastrad return 0;
221 1.2 riastrad }
222 1.2 riastrad
223 1.2 riastrad static inline void
224 1.2 riastrad pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
225 1.2 riastrad uint32_t value)
226 1.2 riastrad {
227 1.2 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
228 1.2 riastrad const int reg32 = (reg &~ 3);
229 1.2 riastrad const unsigned int shift = (8 * (reg & 3));
230 1.2 riastrad uint32_t value32;
231 1.2 riastrad
232 1.2 riastrad KASSERT(bytes <= 4);
233 1.2 riastrad KASSERT(!ISSET(value, ~mask));
234 1.2 riastrad pci_read_config_dword(pdev, reg32, &value32);
235 1.2 riastrad value32 &=~ (mask << shift);
236 1.2 riastrad value32 |= (value << shift);
237 1.2 riastrad pci_write_config_dword(pdev, reg32, value32);
238 1.2 riastrad }
239 1.2 riastrad
240 1.4 riastrad static inline int
241 1.2 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
242 1.2 riastrad {
243 1.2 riastrad KASSERT(!ISSET(reg, 1));
244 1.2 riastrad pci_rmw_config(pdev, reg, 2, value);
245 1.4 riastrad return 0;
246 1.2 riastrad }
247 1.2 riastrad
248 1.4 riastrad static inline int
249 1.2 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
250 1.2 riastrad {
251 1.2 riastrad pci_rmw_config(pdev, reg, 1, value);
252 1.4 riastrad return 0;
253 1.2 riastrad }
254 1.2 riastrad
255 1.2 riastrad /*
256 1.2 riastrad * XXX pci msi
257 1.2 riastrad */
258 1.5 riastrad static inline int
259 1.2 riastrad pci_enable_msi(struct pci_dev *pdev)
260 1.2 riastrad {
261 1.5 riastrad return -ENOSYS;
262 1.2 riastrad }
263 1.2 riastrad
264 1.2 riastrad static inline void
265 1.5 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
266 1.2 riastrad {
267 1.2 riastrad KASSERT(pdev->msi_enabled);
268 1.2 riastrad }
269 1.2 riastrad
270 1.2 riastrad static inline void
271 1.2 riastrad pci_set_master(struct pci_dev *pdev)
272 1.2 riastrad {
273 1.2 riastrad pcireg_t csr;
274 1.2 riastrad
275 1.2 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
276 1.2 riastrad PCI_COMMAND_STATUS_REG);
277 1.2 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
278 1.2 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
279 1.2 riastrad PCI_COMMAND_STATUS_REG, csr);
280 1.2 riastrad }
281 1.2 riastrad
282 1.5 riastrad static inline void
283 1.5 riastrad pci_clear_master(struct pci_dev *pdev)
284 1.5 riastrad {
285 1.5 riastrad pcireg_t csr;
286 1.5 riastrad
287 1.5 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
288 1.5 riastrad PCI_COMMAND_STATUS_REG);
289 1.5 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
290 1.5 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
291 1.5 riastrad PCI_COMMAND_STATUS_REG, csr);
292 1.5 riastrad }
293 1.5 riastrad
294 1.2 riastrad #define PCIBIOS_MIN_MEM 0 /* XXX bogus x86 kludge bollocks */
295 1.2 riastrad
296 1.2 riastrad static inline bus_addr_t
297 1.2 riastrad pcibios_align_resource(void *p, const struct resource *resource,
298 1.2 riastrad bus_addr_t addr, bus_size_t size)
299 1.2 riastrad {
300 1.2 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
301 1.2 riastrad }
302 1.2 riastrad
303 1.2 riastrad static inline int
304 1.2 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
305 1.2 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
306 1.2 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
307 1.2 riastrad bus_size_t) __unused,
308 1.2 riastrad struct pci_dev *pdev)
309 1.2 riastrad {
310 1.2 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
311 1.2 riastrad bus_space_tag_t bst;
312 1.2 riastrad int error;
313 1.2 riastrad
314 1.2 riastrad switch (resource->flags) {
315 1.2 riastrad case IORESOURCE_MEM:
316 1.2 riastrad bst = pa->pa_memt;
317 1.2 riastrad break;
318 1.2 riastrad
319 1.2 riastrad case IORESOURCE_IO:
320 1.2 riastrad bst = pa->pa_iot;
321 1.2 riastrad break;
322 1.2 riastrad
323 1.2 riastrad default:
324 1.2 riastrad panic("I don't know what kind of resource you want!");
325 1.2 riastrad }
326 1.2 riastrad
327 1.2 riastrad resource->r_bst = bst;
328 1.3 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
329 1.2 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
330 1.2 riastrad if (error)
331 1.2 riastrad return error;
332 1.2 riastrad
333 1.2 riastrad resource->size = size;
334 1.2 riastrad return 0;
335 1.2 riastrad }
336 1.2 riastrad
337 1.2 riastrad /*
338 1.2 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
339 1.2 riastrad * defined only for their single purposes in i915drm, in
340 1.2 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
341 1.2 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
342 1.2 riastrad * internally) to pass a cookie through.
343 1.2 riastrad */
344 1.2 riastrad
345 1.2 riastrad static inline int /* XXX inline? */
346 1.2 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
347 1.2 riastrad {
348 1.2 riastrad
349 1.2 riastrad if (pa->pa_bus != 0)
350 1.2 riastrad return 0;
351 1.2 riastrad if (pa->pa_device != 0)
352 1.2 riastrad return 0;
353 1.2 riastrad if (pa->pa_function != 0)
354 1.2 riastrad return 0;
355 1.2 riastrad
356 1.2 riastrad return 1;
357 1.2 riastrad }
358 1.2 riastrad
359 1.2 riastrad static inline struct pci_dev *
360 1.2 riastrad pci_get_bus_and_slot(int bus, int slot)
361 1.2 riastrad {
362 1.2 riastrad struct pci_attach_args pa;
363 1.2 riastrad
364 1.2 riastrad KASSERT(bus == 0);
365 1.2 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
366 1.2 riastrad
367 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
368 1.2 riastrad return NULL;
369 1.2 riastrad
370 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
371 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
372 1.2 riastrad
373 1.2 riastrad return pdev;
374 1.2 riastrad }
375 1.2 riastrad
376 1.2 riastrad static inline int /* XXX inline? */
377 1.2 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
378 1.2 riastrad {
379 1.2 riastrad
380 1.2 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
381 1.2 riastrad return 0;
382 1.2 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
383 1.2 riastrad return 0;
384 1.2 riastrad
385 1.2 riastrad return 1;
386 1.2 riastrad }
387 1.2 riastrad
388 1.4 riastrad static inline void
389 1.4 riastrad pci_dev_put(struct pci_dev *pdev)
390 1.4 riastrad {
391 1.4 riastrad
392 1.4 riastrad if (pdev == NULL)
393 1.4 riastrad return;
394 1.4 riastrad
395 1.4 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
396 1.4 riastrad kmem_free(pdev, sizeof(*pdev));
397 1.4 riastrad }
398 1.4 riastrad
399 1.2 riastrad static inline struct pci_dev *
400 1.4 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
401 1.2 riastrad {
402 1.2 riastrad struct pci_attach_args pa;
403 1.2 riastrad
404 1.2 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
405 1.4 riastrad
406 1.4 riastrad if (from != NULL) {
407 1.4 riastrad pci_dev_put(from);
408 1.4 riastrad return NULL;
409 1.4 riastrad }
410 1.2 riastrad
411 1.2 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
412 1.2 riastrad return NULL;
413 1.2 riastrad
414 1.2 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
415 1.2 riastrad linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
416 1.2 riastrad
417 1.2 riastrad return pdev;
418 1.2 riastrad }
419 1.2 riastrad
420 1.2 riastrad #define __pci_rom_iomem
421 1.2 riastrad
422 1.2 riastrad static inline void
423 1.2 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
424 1.2 riastrad {
425 1.2 riastrad
426 1.2 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
427 1.2 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
428 1.2 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
429 1.2 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
430 1.2 riastrad pdev->pd_rom_vaddr = NULL;
431 1.2 riastrad }
432 1.2 riastrad
433 1.2 riastrad static inline void __pci_rom_iomem *
434 1.2 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
435 1.2 riastrad {
436 1.2 riastrad bus_space_handle_t bsh;
437 1.2 riastrad bus_size_t size;
438 1.2 riastrad
439 1.2 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
440 1.2 riastrad
441 1.2 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
442 1.2 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
443 1.2 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
444 1.6 riastrad != 0)
445 1.2 riastrad return NULL;
446 1.2 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
447 1.2 riastrad
448 1.2 riastrad /* XXX This type is obviously wrong in general... */
449 1.2 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
450 1.2 riastrad PCI_ROM_CODE_TYPE_X86, &bsh, &size)) {
451 1.2 riastrad pci_unmap_rom(pdev, NULL);
452 1.2 riastrad return NULL;
453 1.2 riastrad }
454 1.2 riastrad
455 1.2 riastrad KASSERT(size <= SIZE_T_MAX);
456 1.2 riastrad *sizep = size;
457 1.2 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh);
458 1.2 riastrad return pdev->pd_rom_vaddr;
459 1.2 riastrad }
460 1.2 riastrad
461 1.4 riastrad static inline bus_addr_t
462 1.4 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
463 1.4 riastrad {
464 1.4 riastrad
465 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
466 1.4 riastrad return pdev->pd_resources[i].addr;
467 1.4 riastrad }
468 1.4 riastrad
469 1.4 riastrad static inline bus_size_t
470 1.4 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
471 1.4 riastrad {
472 1.4 riastrad
473 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
474 1.4 riastrad return pdev->pd_resources[i].size;
475 1.4 riastrad }
476 1.4 riastrad
477 1.4 riastrad static inline bus_addr_t
478 1.4 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
479 1.4 riastrad {
480 1.4 riastrad
481 1.4 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
482 1.4 riastrad }
483 1.4 riastrad
484 1.4 riastrad static inline int
485 1.4 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
486 1.4 riastrad {
487 1.4 riastrad
488 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
489 1.4 riastrad return pdev->pd_resources[i].flags;
490 1.4 riastrad }
491 1.4 riastrad
492 1.4 riastrad static inline void __pci_iomem *
493 1.4 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
494 1.4 riastrad {
495 1.4 riastrad int error;
496 1.4 riastrad
497 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
498 1.4 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
499 1.4 riastrad
500 1.4 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
501 1.4 riastrad return NULL;
502 1.4 riastrad if (pdev->pd_resources[i].size < size)
503 1.4 riastrad return NULL;
504 1.4 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
505 1.4 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
506 1.4 riastrad &pdev->pd_resources[i].bsh);
507 1.4 riastrad if (error) {
508 1.4 riastrad /* Horrible hack: try asking the fake AGP device. */
509 1.4 riastrad if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
510 1.4 riastrad &pdev->pd_resources[i].bsh))
511 1.4 riastrad return NULL;
512 1.4 riastrad }
513 1.4 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
514 1.4 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
515 1.4 riastrad pdev->pd_resources[i].bsh);
516 1.4 riastrad
517 1.4 riastrad return pdev->pd_resources[i].kva;
518 1.4 riastrad }
519 1.4 riastrad
520 1.4 riastrad static inline void
521 1.4 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
522 1.4 riastrad {
523 1.4 riastrad unsigned i;
524 1.4 riastrad
525 1.4 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
526 1.4 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
527 1.4 riastrad if (pdev->pd_resources[i].kva == kva)
528 1.4 riastrad break;
529 1.4 riastrad }
530 1.4 riastrad KASSERT(i < PCI_NUM_RESOURCES);
531 1.4 riastrad
532 1.4 riastrad pdev->pd_resources[i].kva = NULL;
533 1.4 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
534 1.4 riastrad pdev->pd_resources[i].size);
535 1.4 riastrad }
536 1.4 riastrad
537 1.5 riastrad static inline void
538 1.5 riastrad pci_save_state(struct pci_dev *pdev)
539 1.5 riastrad {
540 1.5 riastrad
541 1.5 riastrad KASSERT(pdev->pd_saved_state == NULL);
542 1.5 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
543 1.5 riastrad KM_SLEEP);
544 1.5 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
545 1.5 riastrad pdev->pd_saved_state);
546 1.5 riastrad }
547 1.5 riastrad
548 1.5 riastrad static inline void
549 1.5 riastrad pci_restore_state(struct pci_dev *pdev)
550 1.5 riastrad {
551 1.5 riastrad
552 1.5 riastrad KASSERT(pdev->pd_saved_state != NULL);
553 1.5 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
554 1.5 riastrad pdev->pd_saved_state);
555 1.5 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
556 1.5 riastrad pdev->pd_saved_state = NULL;
557 1.5 riastrad }
558 1.5 riastrad
559 1.5 riastrad static inline bool
560 1.5 riastrad pci_is_pcie(struct pci_dev *pdev)
561 1.5 riastrad {
562 1.5 riastrad
563 1.5 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
564 1.5 riastrad }
565 1.5 riastrad
566 1.7 riastrad static inline bool
567 1.7 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
568 1.7 riastrad {
569 1.7 riastrad
570 1.7 riastrad /* XXX Cop-out. */
571 1.7 riastrad if (mask > DMA_BIT_MASK(32))
572 1.7 riastrad return pci_dma64_available(&pdev->pd_pa);
573 1.7 riastrad else
574 1.7 riastrad return true;
575 1.7 riastrad }
576 1.7 riastrad
577 1.2 riastrad #endif /* _LINUX_PCI_H_ */
578