pci.h revision 1.8.2.3 1 1.8.2.2 tls /* $NetBSD: pci.h,v 1.8.2.3 2017/12/03 11:37:59 jdolecek Exp $ */
2 1.8.2.2 tls
3 1.8.2.2 tls /*-
4 1.8.2.2 tls * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.8.2.2 tls * All rights reserved.
6 1.8.2.2 tls *
7 1.8.2.2 tls * This code is derived from software contributed to The NetBSD Foundation
8 1.8.2.2 tls * by Taylor R. Campbell.
9 1.8.2.2 tls *
10 1.8.2.2 tls * Redistribution and use in source and binary forms, with or without
11 1.8.2.2 tls * modification, are permitted provided that the following conditions
12 1.8.2.2 tls * are met:
13 1.8.2.2 tls * 1. Redistributions of source code must retain the above copyright
14 1.8.2.2 tls * notice, this list of conditions and the following disclaimer.
15 1.8.2.2 tls * 2. Redistributions in binary form must reproduce the above copyright
16 1.8.2.2 tls * notice, this list of conditions and the following disclaimer in the
17 1.8.2.2 tls * documentation and/or other materials provided with the distribution.
18 1.8.2.2 tls *
19 1.8.2.2 tls * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.8.2.2 tls * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.8.2.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.8.2.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.8.2.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.8.2.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.8.2.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.8.2.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.8.2.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.8.2.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.8.2.2 tls * POSSIBILITY OF SUCH DAMAGE.
30 1.8.2.2 tls */
31 1.8.2.2 tls
32 1.8.2.2 tls #ifndef _LINUX_PCI_H_
33 1.8.2.2 tls #define _LINUX_PCI_H_
34 1.8.2.2 tls
35 1.8.2.3 jdolecek #ifdef _KERNEL_OPT
36 1.8.2.3 jdolecek #if defined(i386) || defined(amd64)
37 1.8.2.3 jdolecek #include "acpica.h"
38 1.8.2.3 jdolecek #else /* !(i386 || amd64) */
39 1.8.2.3 jdolecek #define NACPICA 0
40 1.8.2.3 jdolecek #endif /* i386 || amd64 */
41 1.8.2.3 jdolecek #endif
42 1.8.2.3 jdolecek
43 1.8.2.2 tls #include <sys/types.h>
44 1.8.2.2 tls #include <sys/param.h>
45 1.8.2.2 tls #include <sys/bus.h>
46 1.8.2.2 tls #include <sys/cdefs.h>
47 1.8.2.2 tls #include <sys/kmem.h>
48 1.8.2.2 tls #include <sys/systm.h>
49 1.8.2.2 tls
50 1.8.2.2 tls #include <machine/limits.h>
51 1.8.2.2 tls
52 1.8.2.2 tls #include <dev/pci/pcidevs.h>
53 1.8.2.2 tls #include <dev/pci/pcireg.h>
54 1.8.2.2 tls #include <dev/pci/pcivar.h>
55 1.8.2.2 tls #include <dev/pci/agpvar.h>
56 1.8.2.2 tls
57 1.8.2.3 jdolecek #if NACPICA > 0
58 1.8.2.3 jdolecek #include <dev/acpi/acpivar.h>
59 1.8.2.3 jdolecek #include <dev/acpi/acpi_pci.h>
60 1.8.2.3 jdolecek #else
61 1.8.2.3 jdolecek struct acpi_devnode;
62 1.8.2.3 jdolecek #endif
63 1.8.2.3 jdolecek
64 1.8.2.2 tls #include <linux/dma-mapping.h>
65 1.8.2.2 tls #include <linux/ioport.h>
66 1.8.2.3 jdolecek #include <linux/kernel.h>
67 1.8.2.2 tls
68 1.8.2.3 jdolecek struct pci_bus {
69 1.8.2.3 jdolecek u_int number;
70 1.8.2.3 jdolecek };
71 1.8.2.2 tls
72 1.8.2.2 tls struct pci_device_id {
73 1.8.2.2 tls uint32_t vendor;
74 1.8.2.2 tls uint32_t device;
75 1.8.2.2 tls uint32_t subvendor;
76 1.8.2.2 tls uint32_t subdevice;
77 1.8.2.2 tls uint32_t class;
78 1.8.2.2 tls uint32_t class_mask;
79 1.8.2.2 tls unsigned long driver_data;
80 1.8.2.2 tls };
81 1.8.2.2 tls
82 1.8.2.2 tls #define PCI_ANY_ID ((pcireg_t)-1)
83 1.8.2.2 tls
84 1.8.2.2 tls #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY
85 1.8.2.2 tls
86 1.8.2.3 jdolecek #define PCI_CLASS_DISPLAY_VGA \
87 1.8.2.3 jdolecek ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA)
88 1.8.2.2 tls #define PCI_CLASS_BRIDGE_ISA \
89 1.8.2.2 tls ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
90 1.8.2.2 tls CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
91 1.8.2.2 tls
92 1.8.2.2 tls /* XXX This is getting silly... */
93 1.8.2.2 tls #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK
94 1.8.2.2 tls #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI
95 1.8.2.2 tls #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL
96 1.8.2.2 tls #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM
97 1.8.2.2 tls #define PCI_VENDOR_ID_HP PCI_VENDOR_HP
98 1.8.2.2 tls #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL
99 1.8.2.2 tls #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA
100 1.8.2.2 tls #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY
101 1.8.2.2 tls #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH
102 1.8.2.2 tls
103 1.8.2.2 tls #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY
104 1.8.2.2 tls
105 1.8.2.2 tls #define PCI_DEVFN(DEV, FN) \
106 1.8.2.2 tls (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
107 1.8.2.2 tls #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7))
108 1.8.2.2 tls #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2))
109 1.8.2.2 tls
110 1.8.2.2 tls #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
111 1.8.2.2 tls #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES
112 1.8.2.2 tls
113 1.8.2.2 tls #define PCI_CAP_ID_AGP PCI_CAP_AGP
114 1.8.2.2 tls
115 1.8.2.2 tls typedef int pci_power_t;
116 1.8.2.2 tls
117 1.8.2.2 tls #define PCI_D0 0
118 1.8.2.2 tls #define PCI_D1 1
119 1.8.2.2 tls #define PCI_D2 2
120 1.8.2.2 tls #define PCI_D3hot 3
121 1.8.2.2 tls #define PCI_D3cold 4
122 1.8.2.2 tls
123 1.8.2.2 tls #define __pci_iomem
124 1.8.2.2 tls
125 1.8.2.2 tls struct pci_dev {
126 1.8.2.2 tls struct pci_attach_args pd_pa;
127 1.8.2.2 tls int pd_kludges; /* Gotta lose 'em... */
128 1.8.2.2 tls #define NBPCI_KLUDGE_GET_MUMBLE 0x01
129 1.8.2.2 tls #define NBPCI_KLUDGE_MAP_ROM 0x02
130 1.8.2.2 tls bus_space_tag_t pd_rom_bst;
131 1.8.2.2 tls bus_space_handle_t pd_rom_bsh;
132 1.8.2.2 tls bus_size_t pd_rom_size;
133 1.8.2.3 jdolecek bus_space_handle_t pd_rom_found_bsh;
134 1.8.2.3 jdolecek bus_size_t pd_rom_found_size;
135 1.8.2.2 tls void *pd_rom_vaddr;
136 1.8.2.2 tls device_t pd_dev;
137 1.8.2.3 jdolecek struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */
138 1.8.2.2 tls struct {
139 1.8.2.2 tls pcireg_t type;
140 1.8.2.2 tls bus_addr_t addr;
141 1.8.2.2 tls bus_size_t size;
142 1.8.2.2 tls int flags;
143 1.8.2.2 tls bus_space_tag_t bst;
144 1.8.2.2 tls bus_space_handle_t bsh;
145 1.8.2.2 tls void __pci_iomem *kva;
146 1.8.2.2 tls } pd_resources[PCI_NUM_RESOURCES];
147 1.8.2.2 tls struct pci_conf_state *pd_saved_state;
148 1.8.2.3 jdolecek struct acpi_devnode *pd_ad;
149 1.8.2.2 tls struct pci_bus *bus;
150 1.8.2.2 tls uint32_t devfn;
151 1.8.2.2 tls uint16_t vendor;
152 1.8.2.2 tls uint16_t device;
153 1.8.2.2 tls uint16_t subsystem_vendor;
154 1.8.2.2 tls uint16_t subsystem_device;
155 1.8.2.2 tls uint8_t revision;
156 1.8.2.2 tls uint32_t class;
157 1.8.2.2 tls bool msi_enabled;
158 1.8.2.3 jdolecek pci_intr_handle_t *intr_handles;
159 1.8.2.2 tls };
160 1.8.2.2 tls
161 1.8.2.2 tls static inline device_t
162 1.8.2.2 tls pci_dev_dev(struct pci_dev *pdev)
163 1.8.2.2 tls {
164 1.8.2.2 tls return pdev->pd_dev;
165 1.8.2.2 tls }
166 1.8.2.2 tls
167 1.8.2.3 jdolecek /* XXX Nouveau kludge! */
168 1.8.2.3 jdolecek static inline struct drm_device *
169 1.8.2.3 jdolecek pci_get_drvdata(struct pci_dev *pdev)
170 1.8.2.3 jdolecek {
171 1.8.2.3 jdolecek return pdev->pd_drm_dev;
172 1.8.2.3 jdolecek }
173 1.8.2.3 jdolecek
174 1.8.2.2 tls static inline void
175 1.8.2.2 tls linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
176 1.8.2.2 tls const struct pci_attach_args *pa, int kludges)
177 1.8.2.2 tls {
178 1.8.2.2 tls const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
179 1.8.2.2 tls PCI_SUBSYS_ID_REG);
180 1.8.2.2 tls unsigned i;
181 1.8.2.2 tls
182 1.8.2.2 tls pdev->pd_pa = *pa;
183 1.8.2.2 tls pdev->pd_kludges = kludges;
184 1.8.2.2 tls pdev->pd_rom_vaddr = NULL;
185 1.8.2.2 tls pdev->pd_dev = dev;
186 1.8.2.3 jdolecek #if (NACPICA > 0)
187 1.8.2.3 jdolecek pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
188 1.8.2.3 jdolecek pa->pa_device, pa->pa_function);
189 1.8.2.3 jdolecek #else
190 1.8.2.3 jdolecek pdev->pd_ad = NULL;
191 1.8.2.3 jdolecek #endif
192 1.8.2.3 jdolecek pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP);
193 1.8.2.3 jdolecek pdev->bus->number = pa->pa_bus;
194 1.8.2.2 tls pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
195 1.8.2.2 tls pdev->vendor = PCI_VENDOR(pa->pa_id);
196 1.8.2.2 tls pdev->device = PCI_PRODUCT(pa->pa_id);
197 1.8.2.2 tls pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
198 1.8.2.2 tls pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
199 1.8.2.2 tls pdev->revision = PCI_REVISION(pa->pa_class);
200 1.8.2.2 tls pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
201 1.8.2.2 tls
202 1.8.2.2 tls CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
203 1.8.2.2 tls for (i = 0; i < PCI_NUM_RESOURCES; i++) {
204 1.8.2.2 tls const int reg = PCI_BAR(i);
205 1.8.2.2 tls
206 1.8.2.2 tls pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
207 1.8.2.2 tls pa->pa_tag, reg);
208 1.8.2.2 tls if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
209 1.8.2.2 tls pdev->pd_resources[i].type,
210 1.8.2.2 tls &pdev->pd_resources[i].addr,
211 1.8.2.2 tls &pdev->pd_resources[i].size,
212 1.8.2.2 tls &pdev->pd_resources[i].flags)) {
213 1.8.2.2 tls pdev->pd_resources[i].addr = 0;
214 1.8.2.2 tls pdev->pd_resources[i].size = 0;
215 1.8.2.2 tls pdev->pd_resources[i].flags = 0;
216 1.8.2.2 tls }
217 1.8.2.2 tls pdev->pd_resources[i].kva = NULL;
218 1.8.2.2 tls }
219 1.8.2.2 tls }
220 1.8.2.2 tls
221 1.8.2.2 tls static inline int
222 1.8.2.2 tls pci_find_capability(struct pci_dev *pdev, int cap)
223 1.8.2.2 tls {
224 1.8.2.2 tls return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
225 1.8.2.2 tls NULL, NULL);
226 1.8.2.2 tls }
227 1.8.2.2 tls
228 1.8.2.2 tls static inline int
229 1.8.2.2 tls pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
230 1.8.2.2 tls {
231 1.8.2.2 tls KASSERT(!ISSET(reg, 3));
232 1.8.2.2 tls *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
233 1.8.2.2 tls return 0;
234 1.8.2.2 tls }
235 1.8.2.2 tls
236 1.8.2.2 tls static inline int
237 1.8.2.2 tls pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
238 1.8.2.2 tls {
239 1.8.2.2 tls KASSERT(!ISSET(reg, 1));
240 1.8.2.2 tls *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
241 1.8.2.3 jdolecek (reg &~ 2)) >> (8 * (reg & 2));
242 1.8.2.2 tls return 0;
243 1.8.2.2 tls }
244 1.8.2.2 tls
245 1.8.2.2 tls static inline int
246 1.8.2.2 tls pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
247 1.8.2.2 tls {
248 1.8.2.2 tls *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
249 1.8.2.3 jdolecek (reg &~ 3)) >> (8 * (reg & 3));
250 1.8.2.2 tls return 0;
251 1.8.2.2 tls }
252 1.8.2.2 tls
253 1.8.2.2 tls static inline int
254 1.8.2.2 tls pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
255 1.8.2.2 tls {
256 1.8.2.2 tls KASSERT(!ISSET(reg, 3));
257 1.8.2.2 tls pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
258 1.8.2.2 tls return 0;
259 1.8.2.2 tls }
260 1.8.2.2 tls
261 1.8.2.2 tls static inline void
262 1.8.2.2 tls pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
263 1.8.2.2 tls uint32_t value)
264 1.8.2.2 tls {
265 1.8.2.2 tls const uint32_t mask = ~((~0UL) << (8 * bytes));
266 1.8.2.2 tls const int reg32 = (reg &~ 3);
267 1.8.2.2 tls const unsigned int shift = (8 * (reg & 3));
268 1.8.2.2 tls uint32_t value32;
269 1.8.2.2 tls
270 1.8.2.2 tls KASSERT(bytes <= 4);
271 1.8.2.2 tls KASSERT(!ISSET(value, ~mask));
272 1.8.2.2 tls pci_read_config_dword(pdev, reg32, &value32);
273 1.8.2.2 tls value32 &=~ (mask << shift);
274 1.8.2.2 tls value32 |= (value << shift);
275 1.8.2.2 tls pci_write_config_dword(pdev, reg32, value32);
276 1.8.2.2 tls }
277 1.8.2.2 tls
278 1.8.2.2 tls static inline int
279 1.8.2.2 tls pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
280 1.8.2.2 tls {
281 1.8.2.2 tls KASSERT(!ISSET(reg, 1));
282 1.8.2.2 tls pci_rmw_config(pdev, reg, 2, value);
283 1.8.2.2 tls return 0;
284 1.8.2.2 tls }
285 1.8.2.2 tls
286 1.8.2.2 tls static inline int
287 1.8.2.2 tls pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
288 1.8.2.2 tls {
289 1.8.2.2 tls pci_rmw_config(pdev, reg, 1, value);
290 1.8.2.2 tls return 0;
291 1.8.2.2 tls }
292 1.8.2.2 tls
293 1.8.2.2 tls static inline int
294 1.8.2.2 tls pci_enable_msi(struct pci_dev *pdev)
295 1.8.2.2 tls {
296 1.8.2.3 jdolecek #ifdef notyet
297 1.8.2.3 jdolecek const struct pci_attach_args *const pa = &pdev->pd_pa;
298 1.8.2.3 jdolecek
299 1.8.2.3 jdolecek if (pci_msi_alloc_exact(pa, &pdev->intr_handles, 1))
300 1.8.2.3 jdolecek return -EINVAL;
301 1.8.2.3 jdolecek
302 1.8.2.3 jdolecek pdev->msi_enabled = 1;
303 1.8.2.3 jdolecek return 0;
304 1.8.2.3 jdolecek #else
305 1.8.2.2 tls return -ENOSYS;
306 1.8.2.3 jdolecek #endif
307 1.8.2.2 tls }
308 1.8.2.2 tls
309 1.8.2.2 tls static inline void
310 1.8.2.2 tls pci_disable_msi(struct pci_dev *pdev __unused)
311 1.8.2.2 tls {
312 1.8.2.3 jdolecek const struct pci_attach_args *const pa = &pdev->pd_pa;
313 1.8.2.3 jdolecek
314 1.8.2.3 jdolecek if (pdev->intr_handles != NULL) {
315 1.8.2.3 jdolecek pci_intr_release(pa->pa_pc, pdev->intr_handles, 1);
316 1.8.2.3 jdolecek pdev->intr_handles = NULL;
317 1.8.2.3 jdolecek }
318 1.8.2.3 jdolecek pdev->msi_enabled = 0;
319 1.8.2.2 tls }
320 1.8.2.2 tls
321 1.8.2.2 tls static inline void
322 1.8.2.2 tls pci_set_master(struct pci_dev *pdev)
323 1.8.2.2 tls {
324 1.8.2.2 tls pcireg_t csr;
325 1.8.2.2 tls
326 1.8.2.2 tls csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
327 1.8.2.2 tls PCI_COMMAND_STATUS_REG);
328 1.8.2.2 tls csr |= PCI_COMMAND_MASTER_ENABLE;
329 1.8.2.2 tls pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
330 1.8.2.2 tls PCI_COMMAND_STATUS_REG, csr);
331 1.8.2.2 tls }
332 1.8.2.2 tls
333 1.8.2.2 tls static inline void
334 1.8.2.2 tls pci_clear_master(struct pci_dev *pdev)
335 1.8.2.2 tls {
336 1.8.2.2 tls pcireg_t csr;
337 1.8.2.2 tls
338 1.8.2.2 tls csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
339 1.8.2.2 tls PCI_COMMAND_STATUS_REG);
340 1.8.2.2 tls csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
341 1.8.2.2 tls pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
342 1.8.2.2 tls PCI_COMMAND_STATUS_REG, csr);
343 1.8.2.2 tls }
344 1.8.2.2 tls
345 1.8.2.3 jdolecek #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */
346 1.8.2.2 tls
347 1.8.2.2 tls static inline bus_addr_t
348 1.8.2.2 tls pcibios_align_resource(void *p, const struct resource *resource,
349 1.8.2.2 tls bus_addr_t addr, bus_size_t size)
350 1.8.2.2 tls {
351 1.8.2.2 tls panic("pcibios_align_resource has accessed unaligned neurons!");
352 1.8.2.2 tls }
353 1.8.2.2 tls
354 1.8.2.2 tls static inline int
355 1.8.2.2 tls pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
356 1.8.2.2 tls bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
357 1.8.2.2 tls bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
358 1.8.2.2 tls bus_size_t) __unused,
359 1.8.2.2 tls struct pci_dev *pdev)
360 1.8.2.2 tls {
361 1.8.2.2 tls const struct pci_attach_args *const pa = &pdev->pd_pa;
362 1.8.2.2 tls bus_space_tag_t bst;
363 1.8.2.2 tls int error;
364 1.8.2.2 tls
365 1.8.2.2 tls switch (resource->flags) {
366 1.8.2.2 tls case IORESOURCE_MEM:
367 1.8.2.2 tls bst = pa->pa_memt;
368 1.8.2.2 tls break;
369 1.8.2.2 tls
370 1.8.2.2 tls case IORESOURCE_IO:
371 1.8.2.2 tls bst = pa->pa_iot;
372 1.8.2.2 tls break;
373 1.8.2.2 tls
374 1.8.2.2 tls default:
375 1.8.2.2 tls panic("I don't know what kind of resource you want!");
376 1.8.2.2 tls }
377 1.8.2.2 tls
378 1.8.2.2 tls resource->r_bst = bst;
379 1.8.2.2 tls error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
380 1.8.2.2 tls size, align, 0, 0, &resource->start, &resource->r_bsh);
381 1.8.2.2 tls if (error)
382 1.8.2.2 tls return error;
383 1.8.2.2 tls
384 1.8.2.2 tls resource->size = size;
385 1.8.2.2 tls return 0;
386 1.8.2.2 tls }
387 1.8.2.2 tls
388 1.8.2.2 tls /*
389 1.8.2.2 tls * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
390 1.8.2.2 tls * defined only for their single purposes in i915drm, in
391 1.8.2.2 tls * i915_get_bridge_dev and intel_detect_pch. We can't define them more
392 1.8.2.2 tls * generally without adapting pci_find_device (and pci_enumerate_bus
393 1.8.2.2 tls * internally) to pass a cookie through.
394 1.8.2.2 tls */
395 1.8.2.2 tls
396 1.8.2.2 tls static inline int /* XXX inline? */
397 1.8.2.2 tls pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
398 1.8.2.2 tls {
399 1.8.2.2 tls
400 1.8.2.2 tls if (pa->pa_bus != 0)
401 1.8.2.2 tls return 0;
402 1.8.2.2 tls if (pa->pa_device != 0)
403 1.8.2.2 tls return 0;
404 1.8.2.2 tls if (pa->pa_function != 0)
405 1.8.2.2 tls return 0;
406 1.8.2.2 tls
407 1.8.2.2 tls return 1;
408 1.8.2.2 tls }
409 1.8.2.2 tls
410 1.8.2.2 tls static inline struct pci_dev *
411 1.8.2.2 tls pci_get_bus_and_slot(int bus, int slot)
412 1.8.2.2 tls {
413 1.8.2.2 tls struct pci_attach_args pa;
414 1.8.2.2 tls
415 1.8.2.2 tls KASSERT(bus == 0);
416 1.8.2.2 tls KASSERT(slot == PCI_DEVFN(0, 0));
417 1.8.2.2 tls
418 1.8.2.2 tls if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
419 1.8.2.2 tls return NULL;
420 1.8.2.2 tls
421 1.8.2.2 tls struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
422 1.8.2.2 tls linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
423 1.8.2.2 tls
424 1.8.2.2 tls return pdev;
425 1.8.2.2 tls }
426 1.8.2.2 tls
427 1.8.2.2 tls static inline int /* XXX inline? */
428 1.8.2.2 tls pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
429 1.8.2.2 tls {
430 1.8.2.2 tls
431 1.8.2.2 tls if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
432 1.8.2.2 tls return 0;
433 1.8.2.2 tls if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
434 1.8.2.2 tls return 0;
435 1.8.2.2 tls
436 1.8.2.2 tls return 1;
437 1.8.2.2 tls }
438 1.8.2.2 tls
439 1.8.2.2 tls static inline void
440 1.8.2.2 tls pci_dev_put(struct pci_dev *pdev)
441 1.8.2.2 tls {
442 1.8.2.2 tls
443 1.8.2.2 tls if (pdev == NULL)
444 1.8.2.2 tls return;
445 1.8.2.2 tls
446 1.8.2.2 tls KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
447 1.8.2.2 tls kmem_free(pdev, sizeof(*pdev));
448 1.8.2.2 tls }
449 1.8.2.2 tls
450 1.8.2.2 tls static inline struct pci_dev *
451 1.8.2.2 tls pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
452 1.8.2.2 tls {
453 1.8.2.2 tls struct pci_attach_args pa;
454 1.8.2.2 tls
455 1.8.2.2 tls KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
456 1.8.2.2 tls
457 1.8.2.2 tls if (from != NULL) {
458 1.8.2.2 tls pci_dev_put(from);
459 1.8.2.2 tls return NULL;
460 1.8.2.2 tls }
461 1.8.2.2 tls
462 1.8.2.2 tls if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
463 1.8.2.2 tls return NULL;
464 1.8.2.2 tls
465 1.8.2.2 tls struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
466 1.8.2.2 tls linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
467 1.8.2.2 tls
468 1.8.2.2 tls return pdev;
469 1.8.2.2 tls }
470 1.8.2.2 tls
471 1.8.2.2 tls #define __pci_rom_iomem
472 1.8.2.2 tls
473 1.8.2.2 tls static inline void
474 1.8.2.2 tls pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
475 1.8.2.2 tls {
476 1.8.2.2 tls
477 1.8.2.3 jdolecek /* XXX Disable the ROM address decoder. */
478 1.8.2.2 tls KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
479 1.8.2.2 tls KASSERT(vaddr == pdev->pd_rom_vaddr);
480 1.8.2.2 tls bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
481 1.8.2.2 tls pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
482 1.8.2.2 tls pdev->pd_rom_vaddr = NULL;
483 1.8.2.2 tls }
484 1.8.2.2 tls
485 1.8.2.3 jdolecek /* XXX Whattakludge! Should move this in sys/arch/. */
486 1.8.2.3 jdolecek static int
487 1.8.2.3 jdolecek pci_map_rom_md(struct pci_dev *pdev)
488 1.8.2.3 jdolecek {
489 1.8.2.3 jdolecek #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
490 1.8.2.3 jdolecek const bus_addr_t rom_base = 0xc0000;
491 1.8.2.3 jdolecek const bus_size_t rom_size = 0x20000;
492 1.8.2.3 jdolecek bus_space_handle_t rom_bsh;
493 1.8.2.3 jdolecek int error;
494 1.8.2.3 jdolecek
495 1.8.2.3 jdolecek if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
496 1.8.2.3 jdolecek return ENXIO;
497 1.8.2.3 jdolecek if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
498 1.8.2.3 jdolecek return ENXIO;
499 1.8.2.3 jdolecek /* XXX Check whether this is the primary VGA card? */
500 1.8.2.3 jdolecek error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
501 1.8.2.3 jdolecek (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
502 1.8.2.3 jdolecek if (error)
503 1.8.2.3 jdolecek return ENXIO;
504 1.8.2.3 jdolecek
505 1.8.2.3 jdolecek pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
506 1.8.2.3 jdolecek pdev->pd_rom_bsh = rom_bsh;
507 1.8.2.3 jdolecek pdev->pd_rom_size = rom_size;
508 1.8.2.3 jdolecek pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
509 1.8.2.3 jdolecek
510 1.8.2.3 jdolecek return 0;
511 1.8.2.3 jdolecek #else
512 1.8.2.3 jdolecek return ENXIO;
513 1.8.2.3 jdolecek #endif
514 1.8.2.3 jdolecek }
515 1.8.2.3 jdolecek
516 1.8.2.2 tls static inline void __pci_rom_iomem *
517 1.8.2.2 tls pci_map_rom(struct pci_dev *pdev, size_t *sizep)
518 1.8.2.2 tls {
519 1.8.2.2 tls
520 1.8.2.2 tls KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
521 1.8.2.2 tls
522 1.8.2.2 tls if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
523 1.8.2.2 tls (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
524 1.8.2.2 tls &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
525 1.8.2.2 tls != 0)
526 1.8.2.3 jdolecek goto fail_mi;
527 1.8.2.2 tls pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
528 1.8.2.2 tls
529 1.8.2.2 tls /* XXX This type is obviously wrong in general... */
530 1.8.2.2 tls if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
531 1.8.2.3 jdolecek pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
532 1.8.2.3 jdolecek &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
533 1.8.2.2 tls pci_unmap_rom(pdev, NULL);
534 1.8.2.3 jdolecek goto fail_mi;
535 1.8.2.2 tls }
536 1.8.2.3 jdolecek goto success;
537 1.8.2.3 jdolecek
538 1.8.2.3 jdolecek fail_mi:
539 1.8.2.3 jdolecek if (pci_map_rom_md(pdev) != 0)
540 1.8.2.3 jdolecek goto fail_md;
541 1.8.2.2 tls
542 1.8.2.3 jdolecek /* XXX This type is obviously wrong in general... */
543 1.8.2.3 jdolecek if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
544 1.8.2.3 jdolecek pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
545 1.8.2.3 jdolecek &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
546 1.8.2.3 jdolecek pci_unmap_rom(pdev, NULL);
547 1.8.2.3 jdolecek goto fail_md;
548 1.8.2.3 jdolecek }
549 1.8.2.3 jdolecek
550 1.8.2.3 jdolecek success:
551 1.8.2.3 jdolecek KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
552 1.8.2.3 jdolecek *sizep = pdev->pd_rom_found_size;
553 1.8.2.3 jdolecek pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
554 1.8.2.3 jdolecek pdev->pd_rom_found_bsh);
555 1.8.2.2 tls return pdev->pd_rom_vaddr;
556 1.8.2.3 jdolecek
557 1.8.2.3 jdolecek fail_md:
558 1.8.2.3 jdolecek return NULL;
559 1.8.2.3 jdolecek }
560 1.8.2.3 jdolecek
561 1.8.2.3 jdolecek static inline void __pci_rom_iomem *
562 1.8.2.3 jdolecek pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
563 1.8.2.3 jdolecek {
564 1.8.2.3 jdolecek
565 1.8.2.3 jdolecek *sizep = 0;
566 1.8.2.3 jdolecek return NULL;
567 1.8.2.3 jdolecek }
568 1.8.2.3 jdolecek
569 1.8.2.3 jdolecek static inline int
570 1.8.2.3 jdolecek pci_enable_rom(struct pci_dev *pdev)
571 1.8.2.3 jdolecek {
572 1.8.2.3 jdolecek const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
573 1.8.2.3 jdolecek const pcitag_t tag = pdev->pd_pa.pa_tag;
574 1.8.2.3 jdolecek pcireg_t addr;
575 1.8.2.3 jdolecek int s;
576 1.8.2.3 jdolecek
577 1.8.2.3 jdolecek /* XXX Don't do anything if the ROM isn't there. */
578 1.8.2.3 jdolecek
579 1.8.2.3 jdolecek s = splhigh();
580 1.8.2.3 jdolecek addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
581 1.8.2.3 jdolecek addr |= PCI_MAPREG_ROM_ENABLE;
582 1.8.2.3 jdolecek pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
583 1.8.2.3 jdolecek splx(s);
584 1.8.2.3 jdolecek
585 1.8.2.3 jdolecek return 0;
586 1.8.2.3 jdolecek }
587 1.8.2.3 jdolecek
588 1.8.2.3 jdolecek static inline void
589 1.8.2.3 jdolecek pci_disable_rom(struct pci_dev *pdev)
590 1.8.2.3 jdolecek {
591 1.8.2.3 jdolecek const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
592 1.8.2.3 jdolecek const pcitag_t tag = pdev->pd_pa.pa_tag;
593 1.8.2.3 jdolecek pcireg_t addr;
594 1.8.2.3 jdolecek int s;
595 1.8.2.3 jdolecek
596 1.8.2.3 jdolecek s = splhigh();
597 1.8.2.3 jdolecek addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
598 1.8.2.3 jdolecek addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
599 1.8.2.3 jdolecek pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
600 1.8.2.3 jdolecek splx(s);
601 1.8.2.2 tls }
602 1.8.2.2 tls
603 1.8.2.2 tls static inline bus_addr_t
604 1.8.2.2 tls pci_resource_start(struct pci_dev *pdev, unsigned i)
605 1.8.2.2 tls {
606 1.8.2.2 tls
607 1.8.2.2 tls KASSERT(i < PCI_NUM_RESOURCES);
608 1.8.2.2 tls return pdev->pd_resources[i].addr;
609 1.8.2.2 tls }
610 1.8.2.2 tls
611 1.8.2.2 tls static inline bus_size_t
612 1.8.2.2 tls pci_resource_len(struct pci_dev *pdev, unsigned i)
613 1.8.2.2 tls {
614 1.8.2.2 tls
615 1.8.2.2 tls KASSERT(i < PCI_NUM_RESOURCES);
616 1.8.2.2 tls return pdev->pd_resources[i].size;
617 1.8.2.2 tls }
618 1.8.2.2 tls
619 1.8.2.2 tls static inline bus_addr_t
620 1.8.2.2 tls pci_resource_end(struct pci_dev *pdev, unsigned i)
621 1.8.2.2 tls {
622 1.8.2.2 tls
623 1.8.2.2 tls return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
624 1.8.2.2 tls }
625 1.8.2.2 tls
626 1.8.2.2 tls static inline int
627 1.8.2.2 tls pci_resource_flags(struct pci_dev *pdev, unsigned i)
628 1.8.2.2 tls {
629 1.8.2.2 tls
630 1.8.2.2 tls KASSERT(i < PCI_NUM_RESOURCES);
631 1.8.2.2 tls return pdev->pd_resources[i].flags;
632 1.8.2.2 tls }
633 1.8.2.2 tls
634 1.8.2.2 tls static inline void __pci_iomem *
635 1.8.2.2 tls pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
636 1.8.2.2 tls {
637 1.8.2.2 tls int error;
638 1.8.2.2 tls
639 1.8.2.2 tls KASSERT(i < PCI_NUM_RESOURCES);
640 1.8.2.2 tls KASSERT(pdev->pd_resources[i].kva == NULL);
641 1.8.2.2 tls
642 1.8.2.2 tls if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
643 1.8.2.2 tls return NULL;
644 1.8.2.2 tls if (pdev->pd_resources[i].size < size)
645 1.8.2.2 tls return NULL;
646 1.8.2.2 tls error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
647 1.8.2.2 tls size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
648 1.8.2.2 tls &pdev->pd_resources[i].bsh);
649 1.8.2.2 tls if (error) {
650 1.8.2.2 tls /* Horrible hack: try asking the fake AGP device. */
651 1.8.2.2 tls if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
652 1.8.2.2 tls &pdev->pd_resources[i].bsh))
653 1.8.2.2 tls return NULL;
654 1.8.2.2 tls }
655 1.8.2.2 tls pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
656 1.8.2.2 tls pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
657 1.8.2.2 tls pdev->pd_resources[i].bsh);
658 1.8.2.2 tls
659 1.8.2.2 tls return pdev->pd_resources[i].kva;
660 1.8.2.2 tls }
661 1.8.2.2 tls
662 1.8.2.2 tls static inline void
663 1.8.2.2 tls pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
664 1.8.2.2 tls {
665 1.8.2.2 tls unsigned i;
666 1.8.2.2 tls
667 1.8.2.2 tls CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
668 1.8.2.2 tls for (i = 0; i < PCI_NUM_RESOURCES; i++) {
669 1.8.2.2 tls if (pdev->pd_resources[i].kva == kva)
670 1.8.2.2 tls break;
671 1.8.2.2 tls }
672 1.8.2.2 tls KASSERT(i < PCI_NUM_RESOURCES);
673 1.8.2.2 tls
674 1.8.2.2 tls pdev->pd_resources[i].kva = NULL;
675 1.8.2.2 tls bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
676 1.8.2.2 tls pdev->pd_resources[i].size);
677 1.8.2.2 tls }
678 1.8.2.2 tls
679 1.8.2.2 tls static inline void
680 1.8.2.2 tls pci_save_state(struct pci_dev *pdev)
681 1.8.2.2 tls {
682 1.8.2.2 tls
683 1.8.2.2 tls KASSERT(pdev->pd_saved_state == NULL);
684 1.8.2.2 tls pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
685 1.8.2.2 tls KM_SLEEP);
686 1.8.2.2 tls pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
687 1.8.2.2 tls pdev->pd_saved_state);
688 1.8.2.2 tls }
689 1.8.2.2 tls
690 1.8.2.2 tls static inline void
691 1.8.2.2 tls pci_restore_state(struct pci_dev *pdev)
692 1.8.2.2 tls {
693 1.8.2.2 tls
694 1.8.2.2 tls KASSERT(pdev->pd_saved_state != NULL);
695 1.8.2.2 tls pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
696 1.8.2.2 tls pdev->pd_saved_state);
697 1.8.2.2 tls kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
698 1.8.2.2 tls pdev->pd_saved_state = NULL;
699 1.8.2.2 tls }
700 1.8.2.2 tls
701 1.8.2.2 tls static inline bool
702 1.8.2.2 tls pci_is_pcie(struct pci_dev *pdev)
703 1.8.2.2 tls {
704 1.8.2.2 tls
705 1.8.2.2 tls return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
706 1.8.2.2 tls }
707 1.8.2.2 tls
708 1.8.2.2 tls static inline bool
709 1.8.2.2 tls pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
710 1.8.2.2 tls {
711 1.8.2.2 tls
712 1.8.2.2 tls /* XXX Cop-out. */
713 1.8.2.2 tls if (mask > DMA_BIT_MASK(32))
714 1.8.2.2 tls return pci_dma64_available(&pdev->pd_pa);
715 1.8.2.2 tls else
716 1.8.2.2 tls return true;
717 1.8.2.2 tls }
718 1.8.2.2 tls
719 1.8.2.2 tls #endif /* _LINUX_PCI_H_ */
720