Home | History | Annotate | Line # | Download | only in linux
pci.h revision 1.4
      1 /*	$NetBSD: pci.h,v 1.4 2014/07/16 20:56:25 riastradh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Taylor R. Campbell.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _LINUX_PCI_H_
     33 #define _LINUX_PCI_H_
     34 
     35 #include <sys/types.h>
     36 #include <sys/param.h>
     37 #include <sys/bus.h>
     38 #include <sys/cdefs.h>
     39 #include <sys/kmem.h>
     40 #include <sys/systm.h>
     41 
     42 #include <machine/limits.h>
     43 
     44 #include <dev/pci/pcidevs.h>
     45 #include <dev/pci/pcireg.h>
     46 #include <dev/pci/pcivar.h>
     47 #include <dev/pci/agpvar.h>
     48 
     49 #include <linux/ioport.h>
     50 
     51 struct pci_bus;
     52 
     53 struct pci_device_id {
     54 	uint32_t	vendor;
     55 	uint32_t	device;
     56 	uint32_t	subvendor;
     57 	uint32_t	subdevice;
     58 	uint32_t	class;
     59 	uint32_t	class_mask;
     60 	unsigned long	driver_data;
     61 };
     62 
     63 #define	PCI_ANY_ID		((pcireg_t)-1)
     64 
     65 #define	PCI_BASE_CLASS_DISPLAY	PCI_CLASS_DISPLAY
     66 
     67 #define	PCI_CLASS_BRIDGE_ISA						\
     68 	((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
     69 CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
     70 
     71 #define	PCI_VENDOR_ID_INTEL	PCI_VENDOR_INTEL
     72 
     73 #define	PCI_DEVFN(DEV, FN)						\
     74 	(__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
     75 #define	PCI_SLOT(DEVFN)		__SHIFTOUT((DEVFN), __BITS(3, 7))
     76 #define	PCI_FUNC(DEVFN)		__SHIFTOUT((DEVFN), __BITS(0, 2))
     77 
     78 #define	PCI_NUM_RESOURCES	((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
     79 
     80 #define	PCI_CAP_ID_AGP	PCI_CAP_AGP
     81 
     82 typedef int pci_power_t;
     83 
     84 #define	PCI_D0		0
     85 #define	PCI_D1		1
     86 #define	PCI_D2		2
     87 #define	PCI_D3hot	3
     88 #define	PCI_D3cold	4
     89 
     90 #define	__pci_iomem
     91 
     92 struct pci_dev {
     93 	struct pci_attach_args	pd_pa;
     94 	int			pd_kludges;	/* Gotta lose 'em...  */
     95 #define	NBPCI_KLUDGE_GET_MUMBLE	0x01
     96 #define	NBPCI_KLUDGE_MAP_ROM	0x02
     97 	bus_space_tag_t		pd_rom_bst;
     98 	bus_space_handle_t	pd_rom_bsh;
     99 	bus_size_t		pd_rom_size;
    100 	void			*pd_rom_vaddr;
    101 	device_t		pd_dev;
    102 	struct {
    103 		pcireg_t		type;
    104 		bus_addr_t		addr;
    105 		bus_size_t		size;
    106 		int			flags;
    107 		bus_space_tag_t		bst;
    108 		bus_space_handle_t	bsh;
    109 		void __pci_iomem	*kva;
    110 	}			pd_resources[PCI_NUM_RESOURCES];
    111 	struct device		dev;		/* XXX Don't believe me!  */
    112 	struct pci_bus		*bus;
    113 	uint32_t		devfn;
    114 	uint16_t		vendor;
    115 	uint16_t		device;
    116 	uint16_t		subsystem_vendor;
    117 	uint16_t		subsystem_device;
    118 	uint8_t			revision;
    119 	uint32_t		class;
    120 	bool 			msi_enabled;
    121 };
    122 
    123 static inline device_t
    124 pci_dev_dev(struct pci_dev *pdev)
    125 {
    126 	return pdev->pd_dev;
    127 }
    128 
    129 static inline void
    130 linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
    131     const struct pci_attach_args *pa, int kludges)
    132 {
    133 	const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
    134 	    PCI_SUBSYS_ID_REG);
    135 	unsigned i;
    136 
    137 	pdev->pd_pa = *pa;
    138 	pdev->pd_kludges = kludges;
    139 	pdev->pd_rom_vaddr = NULL;
    140 	pdev->pd_dev = dev;
    141 	pdev->bus = NULL;	/* XXX struct pci_dev::bus */
    142 	pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
    143 	pdev->vendor = PCI_VENDOR(pa->pa_id);
    144 	pdev->device = PCI_PRODUCT(pa->pa_id);
    145 	pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
    146 	pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
    147 	pdev->revision = PCI_REVISION(pa->pa_class);
    148 	pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
    149 	pdev->msi_enabled = false;
    150 
    151 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    152 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    153 		const int reg = PCI_BAR(i);
    154 
    155 		pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
    156 		    pa->pa_tag, reg);
    157 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
    158 			pdev->pd_resources[i].type,
    159 			&pdev->pd_resources[i].addr,
    160 			&pdev->pd_resources[i].size,
    161 			&pdev->pd_resources[i].flags)) {
    162 			pdev->pd_resources[i].addr = 0;
    163 			pdev->pd_resources[i].size = 0;
    164 			pdev->pd_resources[i].flags = 0;
    165 		}
    166 		pdev->pd_resources[i].kva = NULL;
    167 	}
    168 }
    169 
    170 static inline int
    171 pci_find_capability(struct pci_dev *pdev, int cap)
    172 {
    173 	return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
    174 	    NULL, NULL);
    175 }
    176 
    177 static inline int
    178 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
    179 {
    180 	KASSERT(!ISSET(reg, 3));
    181 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
    182 	return 0;
    183 }
    184 
    185 static inline int
    186 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
    187 {
    188 	KASSERT(!ISSET(reg, 1));
    189 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    190 	    (reg &~ 3)) >> (8 * (reg & 3));
    191 	return 0;
    192 }
    193 
    194 static inline int
    195 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
    196 {
    197 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    198 	    (reg &~ 1)) >> (8 * (reg & 1));
    199 	return 0;
    200 }
    201 
    202 static inline int
    203 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
    204 {
    205 	KASSERT(!ISSET(reg, 3));
    206 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
    207 	return 0;
    208 }
    209 
    210 static inline void
    211 pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
    212     uint32_t value)
    213 {
    214 	const uint32_t mask = ~((~0UL) << (8 * bytes));
    215 	const int reg32 = (reg &~ 3);
    216 	const unsigned int shift = (8 * (reg & 3));
    217 	uint32_t value32;
    218 
    219 	KASSERT(bytes <= 4);
    220 	KASSERT(!ISSET(value, ~mask));
    221 	pci_read_config_dword(pdev, reg32, &value32);
    222 	value32 &=~ (mask << shift);
    223 	value32 |= (value << shift);
    224 	pci_write_config_dword(pdev, reg32, value32);
    225 }
    226 
    227 static inline int
    228 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
    229 {
    230 	KASSERT(!ISSET(reg, 1));
    231 	pci_rmw_config(pdev, reg, 2, value);
    232 	return 0;
    233 }
    234 
    235 static inline int
    236 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
    237 {
    238 	pci_rmw_config(pdev, reg, 1, value);
    239 	return 0;
    240 }
    241 
    242 /*
    243  * XXX pci msi
    244  */
    245 static inline void
    246 pci_enable_msi(struct pci_dev *pdev)
    247 {
    248 	KASSERT(!pdev->msi_enabled);
    249 	pdev->msi_enabled = true;
    250 }
    251 
    252 static inline void
    253 pci_disable_msi(struct pci_dev *pdev)
    254 {
    255 	KASSERT(pdev->msi_enabled);
    256 	pdev->msi_enabled = false;
    257 }
    258 
    259 static inline void
    260 pci_set_master(struct pci_dev *pdev)
    261 {
    262 	pcireg_t csr;
    263 
    264 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    265 	    PCI_COMMAND_STATUS_REG);
    266 	csr |= PCI_COMMAND_MASTER_ENABLE;
    267 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    268 	    PCI_COMMAND_STATUS_REG, csr);
    269 }
    270 
    271 #define	PCIBIOS_MIN_MEM	0	/* XXX bogus x86 kludge bollocks */
    272 
    273 static inline bus_addr_t
    274 pcibios_align_resource(void *p, const struct resource *resource,
    275     bus_addr_t addr, bus_size_t size)
    276 {
    277 	panic("pcibios_align_resource has accessed unaligned neurons!");
    278 }
    279 
    280 static inline int
    281 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
    282     bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
    283     bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
    284 	bus_size_t) __unused,
    285     struct pci_dev *pdev)
    286 {
    287 	const struct pci_attach_args *const pa = &pdev->pd_pa;
    288 	bus_space_tag_t bst;
    289 	int error;
    290 
    291 	switch (resource->flags) {
    292 	case IORESOURCE_MEM:
    293 		bst = pa->pa_memt;
    294 		break;
    295 
    296 	case IORESOURCE_IO:
    297 		bst = pa->pa_iot;
    298 		break;
    299 
    300 	default:
    301 		panic("I don't know what kind of resource you want!");
    302 	}
    303 
    304 	resource->r_bst = bst;
    305 	error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
    306 	    size, align, 0, 0, &resource->start, &resource->r_bsh);
    307 	if (error)
    308 		return error;
    309 
    310 	resource->size = size;
    311 	return 0;
    312 }
    313 
    314 /*
    315  * XXX Mega-kludgerific!  pci_get_bus_and_slot and pci_get_class are
    316  * defined only for their single purposes in i915drm, in
    317  * i915_get_bridge_dev and intel_detect_pch.  We can't define them more
    318  * generally without adapting pci_find_device (and pci_enumerate_bus
    319  * internally) to pass a cookie through.
    320  */
    321 
    322 static inline int		/* XXX inline?  */
    323 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
    324 {
    325 
    326 	if (pa->pa_bus != 0)
    327 		return 0;
    328 	if (pa->pa_device != 0)
    329 		return 0;
    330 	if (pa->pa_function != 0)
    331 		return 0;
    332 
    333 	return 1;
    334 }
    335 
    336 static inline struct pci_dev *
    337 pci_get_bus_and_slot(int bus, int slot)
    338 {
    339 	struct pci_attach_args pa;
    340 
    341 	KASSERT(bus == 0);
    342 	KASSERT(slot == PCI_DEVFN(0, 0));
    343 
    344 	if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
    345 		return NULL;
    346 
    347 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    348 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    349 
    350 	return pdev;
    351 }
    352 
    353 static inline int		/* XXX inline?  */
    354 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
    355 {
    356 
    357 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
    358 		return 0;
    359 	if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
    360 		return 0;
    361 
    362 	return 1;
    363 }
    364 
    365 static inline void
    366 pci_dev_put(struct pci_dev *pdev)
    367 {
    368 
    369 	if (pdev == NULL)
    370 		return;
    371 
    372 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
    373 	kmem_free(pdev, sizeof(*pdev));
    374 }
    375 
    376 static inline struct pci_dev *
    377 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
    378 {
    379 	struct pci_attach_args pa;
    380 
    381 	KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
    382 
    383 	if (from != NULL) {
    384 		pci_dev_put(from);
    385 		return NULL;
    386 	}
    387 
    388 	if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
    389 		return NULL;
    390 
    391 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    392 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    393 
    394 	return pdev;
    395 }
    396 
    397 #define	__pci_rom_iomem
    398 
    399 static inline void
    400 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
    401 {
    402 
    403 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    404 	KASSERT(vaddr == pdev->pd_rom_vaddr);
    405 	bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
    406 	pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
    407 	pdev->pd_rom_vaddr = NULL;
    408 }
    409 
    410 static inline void __pci_rom_iomem *
    411 pci_map_rom(struct pci_dev *pdev, size_t *sizep)
    412 {
    413 	bus_space_handle_t bsh;
    414 	bus_size_t size;
    415 
    416 	KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    417 
    418 	if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
    419 		(BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
    420 		&pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
    421 	    != 0) {
    422 		aprint_error_dev(pdev->pd_dev, "unable to map ROM\n");
    423 		return NULL;
    424 	}
    425 	pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
    426 
    427 	/* XXX This type is obviously wrong in general...  */
    428 	if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
    429 		PCI_ROM_CODE_TYPE_X86, &bsh, &size)) {
    430 		aprint_error_dev(pdev->pd_dev, "unable to find ROM\n");
    431 		pci_unmap_rom(pdev, NULL);
    432 		return NULL;
    433 	}
    434 
    435 	KASSERT(size <= SIZE_T_MAX);
    436 	*sizep = size;
    437 	pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh);
    438 	return pdev->pd_rom_vaddr;
    439 }
    440 
    441 static inline bus_addr_t
    442 pci_resource_start(struct pci_dev *pdev, unsigned i)
    443 {
    444 
    445 	KASSERT(i < PCI_NUM_RESOURCES);
    446 	return pdev->pd_resources[i].addr;
    447 }
    448 
    449 static inline bus_size_t
    450 pci_resource_len(struct pci_dev *pdev, unsigned i)
    451 {
    452 
    453 	KASSERT(i < PCI_NUM_RESOURCES);
    454 	return pdev->pd_resources[i].size;
    455 }
    456 
    457 static inline bus_addr_t
    458 pci_resource_end(struct pci_dev *pdev, unsigned i)
    459 {
    460 
    461 	return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
    462 }
    463 
    464 static inline int
    465 pci_resource_flags(struct pci_dev *pdev, unsigned i)
    466 {
    467 
    468 	KASSERT(i < PCI_NUM_RESOURCES);
    469 	return pdev->pd_resources[i].flags;
    470 }
    471 
    472 static inline void __pci_iomem *
    473 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
    474 {
    475 	int error;
    476 
    477 	KASSERT(i < PCI_NUM_RESOURCES);
    478 	KASSERT(pdev->pd_resources[i].kva == NULL);
    479 
    480 	if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
    481 		return NULL;
    482 	if (pdev->pd_resources[i].size < size)
    483 		return NULL;
    484 	error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
    485 	    size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
    486 	    &pdev->pd_resources[i].bsh);
    487 	if (error) {
    488 		/* Horrible hack: try asking the fake AGP device.  */
    489 		if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
    490 			&pdev->pd_resources[i].bsh))
    491 			return NULL;
    492 	}
    493 	pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
    494 	pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
    495 	    pdev->pd_resources[i].bsh);
    496 
    497 	return pdev->pd_resources[i].kva;
    498 }
    499 
    500 static inline void
    501 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
    502 {
    503 	unsigned i;
    504 
    505 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    506 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    507 		if (pdev->pd_resources[i].kva == kva)
    508 			break;
    509 	}
    510 	KASSERT(i < PCI_NUM_RESOURCES);
    511 
    512 	pdev->pd_resources[i].kva = NULL;
    513 	bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
    514 	    pdev->pd_resources[i].size);
    515 }
    516 
    517 #endif  /* _LINUX_PCI_H_ */
    518