Home | History | Annotate | Line # | Download | only in linux
pci.h revision 1.6
      1 /*	$NetBSD: pci.h,v 1.6 2014/07/16 23:24:23 riastradh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Taylor R. Campbell.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _LINUX_PCI_H_
     33 #define _LINUX_PCI_H_
     34 
     35 #include <sys/types.h>
     36 #include <sys/param.h>
     37 #include <sys/bus.h>
     38 #include <sys/cdefs.h>
     39 #include <sys/kmem.h>
     40 #include <sys/systm.h>
     41 
     42 #include <machine/limits.h>
     43 
     44 #include <dev/pci/pcidevs.h>
     45 #include <dev/pci/pcireg.h>
     46 #include <dev/pci/pcivar.h>
     47 #include <dev/pci/agpvar.h>
     48 
     49 #include <linux/ioport.h>
     50 
     51 struct pci_bus;
     52 
     53 struct pci_device_id {
     54 	uint32_t	vendor;
     55 	uint32_t	device;
     56 	uint32_t	subvendor;
     57 	uint32_t	subdevice;
     58 	uint32_t	class;
     59 	uint32_t	class_mask;
     60 	unsigned long	driver_data;
     61 };
     62 
     63 #define	PCI_ANY_ID		((pcireg_t)-1)
     64 
     65 #define	PCI_BASE_CLASS_DISPLAY	PCI_CLASS_DISPLAY
     66 
     67 #define	PCI_CLASS_BRIDGE_ISA						\
     68 	((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA)
     69 CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601);
     70 
     71 /* XXX This is getting silly...  */
     72 #define	PCI_VENDOR_ID_ASUSTEK	PCI_VENDOR_ASUSTEK
     73 #define	PCI_VENDOR_ID_ATI	PCI_VENDOR_ATI
     74 #define	PCI_VENDOR_ID_DELL	PCI_VENDOR_DELL
     75 #define	PCI_VENDOR_ID_IBM	PCI_VENDOR_IBM
     76 #define	PCI_VENDOR_ID_HP	PCI_VENDOR_HP
     77 #define	PCI_VENDOR_ID_INTEL	PCI_VENDOR_INTEL
     78 #define	PCI_VENDOR_ID_SONY	PCI_VENDOR_SONY
     79 #define	PCI_VENDOR_ID_VIA	PCI_VENDOR_VIATECH
     80 
     81 #define	PCI_DEVICE_ID_ATI_RADEON_QY	PCI_PRODUCT_ATI_RADEON_RV100_QY
     82 
     83 #define	PCI_DEVFN(DEV, FN)						\
     84 	(__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2)))
     85 #define	PCI_SLOT(DEVFN)		__SHIFTOUT((DEVFN), __BITS(3, 7))
     86 #define	PCI_FUNC(DEVFN)		__SHIFTOUT((DEVFN), __BITS(0, 2))
     87 
     88 #define	PCI_NUM_RESOURCES	((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
     89 #define	DEVICE_COUNT_RESOURCE	PCI_NUM_RESOURCES
     90 
     91 #define	PCI_CAP_ID_AGP	PCI_CAP_AGP
     92 
     93 typedef int pci_power_t;
     94 
     95 #define	PCI_D0		0
     96 #define	PCI_D1		1
     97 #define	PCI_D2		2
     98 #define	PCI_D3hot	3
     99 #define	PCI_D3cold	4
    100 
    101 #define	__pci_iomem
    102 
    103 struct pci_dev {
    104 	struct pci_attach_args	pd_pa;
    105 	int			pd_kludges;	/* Gotta lose 'em...  */
    106 #define	NBPCI_KLUDGE_GET_MUMBLE	0x01
    107 #define	NBPCI_KLUDGE_MAP_ROM	0x02
    108 	bus_space_tag_t		pd_rom_bst;
    109 	bus_space_handle_t	pd_rom_bsh;
    110 	bus_size_t		pd_rom_size;
    111 	void			*pd_rom_vaddr;
    112 	device_t		pd_dev;
    113 	struct {
    114 		pcireg_t		type;
    115 		bus_addr_t		addr;
    116 		bus_size_t		size;
    117 		int			flags;
    118 		bus_space_tag_t		bst;
    119 		bus_space_handle_t	bsh;
    120 		void __pci_iomem	*kva;
    121 	}			pd_resources[PCI_NUM_RESOURCES];
    122 	struct pci_conf_state	*pd_saved_state;
    123 	struct device		dev;		/* XXX Don't believe me!  */
    124 	struct pci_bus		*bus;
    125 	uint32_t		devfn;
    126 	uint16_t		vendor;
    127 	uint16_t		device;
    128 	uint16_t		subsystem_vendor;
    129 	uint16_t		subsystem_device;
    130 	uint8_t			revision;
    131 	uint32_t		class;
    132 	bool			msi_enabled;
    133 };
    134 
    135 static inline device_t
    136 pci_dev_dev(struct pci_dev *pdev)
    137 {
    138 	return pdev->pd_dev;
    139 }
    140 
    141 static inline void
    142 linux_pci_dev_init(struct pci_dev *pdev, device_t dev,
    143     const struct pci_attach_args *pa, int kludges)
    144 {
    145 	const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
    146 	    PCI_SUBSYS_ID_REG);
    147 	unsigned i;
    148 
    149 	pdev->pd_pa = *pa;
    150 	pdev->pd_kludges = kludges;
    151 	pdev->pd_rom_vaddr = NULL;
    152 	pdev->pd_dev = dev;
    153 	pdev->bus = NULL;	/* XXX struct pci_dev::bus */
    154 	pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
    155 	pdev->vendor = PCI_VENDOR(pa->pa_id);
    156 	pdev->device = PCI_PRODUCT(pa->pa_id);
    157 	pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
    158 	pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
    159 	pdev->revision = PCI_REVISION(pa->pa_class);
    160 	pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
    161 
    162 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    163 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    164 		const int reg = PCI_BAR(i);
    165 
    166 		pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
    167 		    pa->pa_tag, reg);
    168 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
    169 			pdev->pd_resources[i].type,
    170 			&pdev->pd_resources[i].addr,
    171 			&pdev->pd_resources[i].size,
    172 			&pdev->pd_resources[i].flags)) {
    173 			pdev->pd_resources[i].addr = 0;
    174 			pdev->pd_resources[i].size = 0;
    175 			pdev->pd_resources[i].flags = 0;
    176 		}
    177 		pdev->pd_resources[i].kva = NULL;
    178 	}
    179 }
    180 
    181 static inline int
    182 pci_find_capability(struct pci_dev *pdev, int cap)
    183 {
    184 	return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
    185 	    NULL, NULL);
    186 }
    187 
    188 static inline int
    189 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
    190 {
    191 	KASSERT(!ISSET(reg, 3));
    192 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
    193 	return 0;
    194 }
    195 
    196 static inline int
    197 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
    198 {
    199 	KASSERT(!ISSET(reg, 1));
    200 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    201 	    (reg &~ 3)) >> (8 * (reg & 3));
    202 	return 0;
    203 }
    204 
    205 static inline int
    206 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
    207 {
    208 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    209 	    (reg &~ 1)) >> (8 * (reg & 1));
    210 	return 0;
    211 }
    212 
    213 static inline int
    214 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
    215 {
    216 	KASSERT(!ISSET(reg, 3));
    217 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
    218 	return 0;
    219 }
    220 
    221 static inline void
    222 pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes,
    223     uint32_t value)
    224 {
    225 	const uint32_t mask = ~((~0UL) << (8 * bytes));
    226 	const int reg32 = (reg &~ 3);
    227 	const unsigned int shift = (8 * (reg & 3));
    228 	uint32_t value32;
    229 
    230 	KASSERT(bytes <= 4);
    231 	KASSERT(!ISSET(value, ~mask));
    232 	pci_read_config_dword(pdev, reg32, &value32);
    233 	value32 &=~ (mask << shift);
    234 	value32 |= (value << shift);
    235 	pci_write_config_dword(pdev, reg32, value32);
    236 }
    237 
    238 static inline int
    239 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
    240 {
    241 	KASSERT(!ISSET(reg, 1));
    242 	pci_rmw_config(pdev, reg, 2, value);
    243 	return 0;
    244 }
    245 
    246 static inline int
    247 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
    248 {
    249 	pci_rmw_config(pdev, reg, 1, value);
    250 	return 0;
    251 }
    252 
    253 /*
    254  * XXX pci msi
    255  */
    256 static inline int
    257 pci_enable_msi(struct pci_dev *pdev)
    258 {
    259 	return -ENOSYS;
    260 }
    261 
    262 static inline void
    263 pci_disable_msi(struct pci_dev *pdev __unused)
    264 {
    265 	KASSERT(pdev->msi_enabled);
    266 }
    267 
    268 static inline void
    269 pci_set_master(struct pci_dev *pdev)
    270 {
    271 	pcireg_t csr;
    272 
    273 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    274 	    PCI_COMMAND_STATUS_REG);
    275 	csr |= PCI_COMMAND_MASTER_ENABLE;
    276 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    277 	    PCI_COMMAND_STATUS_REG, csr);
    278 }
    279 
    280 static inline void
    281 pci_clear_master(struct pci_dev *pdev)
    282 {
    283 	pcireg_t csr;
    284 
    285 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    286 	    PCI_COMMAND_STATUS_REG);
    287 	csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
    288 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    289 	    PCI_COMMAND_STATUS_REG, csr);
    290 }
    291 
    292 #define	PCIBIOS_MIN_MEM	0	/* XXX bogus x86 kludge bollocks */
    293 
    294 static inline bus_addr_t
    295 pcibios_align_resource(void *p, const struct resource *resource,
    296     bus_addr_t addr, bus_size_t size)
    297 {
    298 	panic("pcibios_align_resource has accessed unaligned neurons!");
    299 }
    300 
    301 static inline int
    302 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
    303     bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
    304     bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
    305 	bus_size_t) __unused,
    306     struct pci_dev *pdev)
    307 {
    308 	const struct pci_attach_args *const pa = &pdev->pd_pa;
    309 	bus_space_tag_t bst;
    310 	int error;
    311 
    312 	switch (resource->flags) {
    313 	case IORESOURCE_MEM:
    314 		bst = pa->pa_memt;
    315 		break;
    316 
    317 	case IORESOURCE_IO:
    318 		bst = pa->pa_iot;
    319 		break;
    320 
    321 	default:
    322 		panic("I don't know what kind of resource you want!");
    323 	}
    324 
    325 	resource->r_bst = bst;
    326 	error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
    327 	    size, align, 0, 0, &resource->start, &resource->r_bsh);
    328 	if (error)
    329 		return error;
    330 
    331 	resource->size = size;
    332 	return 0;
    333 }
    334 
    335 /*
    336  * XXX Mega-kludgerific!  pci_get_bus_and_slot and pci_get_class are
    337  * defined only for their single purposes in i915drm, in
    338  * i915_get_bridge_dev and intel_detect_pch.  We can't define them more
    339  * generally without adapting pci_find_device (and pci_enumerate_bus
    340  * internally) to pass a cookie through.
    341  */
    342 
    343 static inline int		/* XXX inline?  */
    344 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
    345 {
    346 
    347 	if (pa->pa_bus != 0)
    348 		return 0;
    349 	if (pa->pa_device != 0)
    350 		return 0;
    351 	if (pa->pa_function != 0)
    352 		return 0;
    353 
    354 	return 1;
    355 }
    356 
    357 static inline struct pci_dev *
    358 pci_get_bus_and_slot(int bus, int slot)
    359 {
    360 	struct pci_attach_args pa;
    361 
    362 	KASSERT(bus == 0);
    363 	KASSERT(slot == PCI_DEVFN(0, 0));
    364 
    365 	if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
    366 		return NULL;
    367 
    368 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    369 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    370 
    371 	return pdev;
    372 }
    373 
    374 static inline int		/* XXX inline?  */
    375 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
    376 {
    377 
    378 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
    379 		return 0;
    380 	if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
    381 		return 0;
    382 
    383 	return 1;
    384 }
    385 
    386 static inline void
    387 pci_dev_put(struct pci_dev *pdev)
    388 {
    389 
    390 	if (pdev == NULL)
    391 		return;
    392 
    393 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
    394 	kmem_free(pdev, sizeof(*pdev));
    395 }
    396 
    397 static inline struct pci_dev *
    398 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
    399 {
    400 	struct pci_attach_args pa;
    401 
    402 	KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
    403 
    404 	if (from != NULL) {
    405 		pci_dev_put(from);
    406 		return NULL;
    407 	}
    408 
    409 	if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
    410 		return NULL;
    411 
    412 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
    413 	linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
    414 
    415 	return pdev;
    416 }
    417 
    418 #define	__pci_rom_iomem
    419 
    420 static inline void
    421 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
    422 {
    423 
    424 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    425 	KASSERT(vaddr == pdev->pd_rom_vaddr);
    426 	bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
    427 	pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
    428 	pdev->pd_rom_vaddr = NULL;
    429 }
    430 
    431 static inline void __pci_rom_iomem *
    432 pci_map_rom(struct pci_dev *pdev, size_t *sizep)
    433 {
    434 	bus_space_handle_t bsh;
    435 	bus_size_t size;
    436 
    437 	KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
    438 
    439 	if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
    440 		(BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
    441 		&pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
    442 	    != 0)
    443 		return NULL;
    444 	pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
    445 
    446 	/* XXX This type is obviously wrong in general...  */
    447 	if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
    448 		PCI_ROM_CODE_TYPE_X86, &bsh, &size)) {
    449 		pci_unmap_rom(pdev, NULL);
    450 		return NULL;
    451 	}
    452 
    453 	KASSERT(size <= SIZE_T_MAX);
    454 	*sizep = size;
    455 	pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh);
    456 	return pdev->pd_rom_vaddr;
    457 }
    458 
    459 static inline bus_addr_t
    460 pci_resource_start(struct pci_dev *pdev, unsigned i)
    461 {
    462 
    463 	KASSERT(i < PCI_NUM_RESOURCES);
    464 	return pdev->pd_resources[i].addr;
    465 }
    466 
    467 static inline bus_size_t
    468 pci_resource_len(struct pci_dev *pdev, unsigned i)
    469 {
    470 
    471 	KASSERT(i < PCI_NUM_RESOURCES);
    472 	return pdev->pd_resources[i].size;
    473 }
    474 
    475 static inline bus_addr_t
    476 pci_resource_end(struct pci_dev *pdev, unsigned i)
    477 {
    478 
    479 	return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
    480 }
    481 
    482 static inline int
    483 pci_resource_flags(struct pci_dev *pdev, unsigned i)
    484 {
    485 
    486 	KASSERT(i < PCI_NUM_RESOURCES);
    487 	return pdev->pd_resources[i].flags;
    488 }
    489 
    490 static inline void __pci_iomem *
    491 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
    492 {
    493 	int error;
    494 
    495 	KASSERT(i < PCI_NUM_RESOURCES);
    496 	KASSERT(pdev->pd_resources[i].kva == NULL);
    497 
    498 	if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
    499 		return NULL;
    500 	if (pdev->pd_resources[i].size < size)
    501 		return NULL;
    502 	error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
    503 	    size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
    504 	    &pdev->pd_resources[i].bsh);
    505 	if (error) {
    506 		/* Horrible hack: try asking the fake AGP device.  */
    507 		if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
    508 			&pdev->pd_resources[i].bsh))
    509 			return NULL;
    510 	}
    511 	pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
    512 	pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
    513 	    pdev->pd_resources[i].bsh);
    514 
    515 	return pdev->pd_resources[i].kva;
    516 }
    517 
    518 static inline void
    519 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
    520 {
    521 	unsigned i;
    522 
    523 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
    524 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
    525 		if (pdev->pd_resources[i].kva == kva)
    526 			break;
    527 	}
    528 	KASSERT(i < PCI_NUM_RESOURCES);
    529 
    530 	pdev->pd_resources[i].kva = NULL;
    531 	bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
    532 	    pdev->pd_resources[i].size);
    533 }
    534 
    535 static inline void
    536 pci_save_state(struct pci_dev *pdev)
    537 {
    538 
    539 	KASSERT(pdev->pd_saved_state == NULL);
    540 	pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
    541 	    KM_SLEEP);
    542 	pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    543 	    pdev->pd_saved_state);
    544 }
    545 
    546 static inline void
    547 pci_restore_state(struct pci_dev *pdev)
    548 {
    549 
    550 	KASSERT(pdev->pd_saved_state != NULL);
    551 	pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
    552 	    pdev->pd_saved_state);
    553 	kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
    554 	pdev->pd_saved_state = NULL;
    555 }
    556 
    557 static inline bool
    558 pci_is_pcie(struct pci_dev *pdev)
    559 {
    560 
    561 	return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
    562 }
    563 
    564 #endif  /* _LINUX_PCI_H_ */
    565