pci.h revision 1.7.2.9
1 /* $NetBSD: pci.h,v 1.7.2.9 2016/02/11 22:52:58 snj Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Taylor R. Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _LINUX_PCI_H_ 33 #define _LINUX_PCI_H_ 34 35 #ifdef _KERNEL_OPT 36 #if defined(i386) || defined(amd64) 37 #include "acpica.h" 38 #else /* !(i386 || amd64) */ 39 #define NACPICA 0 40 #endif /* i386 || amd64 */ 41 #endif 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/bus.h> 46 #include <sys/cdefs.h> 47 #include <sys/kmem.h> 48 #include <sys/systm.h> 49 50 #include <machine/limits.h> 51 52 #include <dev/pci/pcidevs.h> 53 #include <dev/pci/pcireg.h> 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/agpvar.h> 56 57 #include <dev/acpi/acpivar.h> 58 #include <dev/acpi/acpi_pci.h> 59 60 #include <linux/dma-mapping.h> 61 #include <linux/ioport.h> 62 #include <linux/kernel.h> 63 64 struct pci_bus { 65 u_int number; 66 }; 67 68 struct pci_device_id { 69 uint32_t vendor; 70 uint32_t device; 71 uint32_t subvendor; 72 uint32_t subdevice; 73 uint32_t class; 74 uint32_t class_mask; 75 unsigned long driver_data; 76 }; 77 78 #define PCI_ANY_ID ((pcireg_t)-1) 79 80 #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY 81 82 #define PCI_CLASS_DISPLAY_VGA \ 83 ((PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA) 84 #define PCI_CLASS_BRIDGE_ISA \ 85 ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA) 86 CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601); 87 88 /* XXX This is getting silly... */ 89 #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK 90 #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI 91 #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL 92 #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM 93 #define PCI_VENDOR_ID_HP PCI_VENDOR_HP 94 #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL 95 #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA 96 #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY 97 #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH 98 99 #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY 100 101 #define PCI_DEVFN(DEV, FN) \ 102 (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2))) 103 #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7)) 104 #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2)) 105 106 #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4) 107 #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES 108 109 #define PCI_CAP_ID_AGP PCI_CAP_AGP 110 111 typedef int pci_power_t; 112 113 #define PCI_D0 0 114 #define PCI_D1 1 115 #define PCI_D2 2 116 #define PCI_D3hot 3 117 #define PCI_D3cold 4 118 119 #define __pci_iomem 120 121 struct pci_dev { 122 struct pci_attach_args pd_pa; 123 int pd_kludges; /* Gotta lose 'em... */ 124 #define NBPCI_KLUDGE_GET_MUMBLE 0x01 125 #define NBPCI_KLUDGE_MAP_ROM 0x02 126 bus_space_tag_t pd_rom_bst; 127 bus_space_handle_t pd_rom_bsh; 128 bus_size_t pd_rom_size; 129 bus_space_handle_t pd_rom_found_bsh; 130 bus_size_t pd_rom_found_size; 131 void *pd_rom_vaddr; 132 device_t pd_dev; 133 struct drm_device *pd_drm_dev; /* XXX Nouveau kludge! */ 134 struct { 135 pcireg_t type; 136 bus_addr_t addr; 137 bus_size_t size; 138 int flags; 139 bus_space_tag_t bst; 140 bus_space_handle_t bsh; 141 void __pci_iomem *kva; 142 } pd_resources[PCI_NUM_RESOURCES]; 143 struct pci_conf_state *pd_saved_state; 144 struct acpi_devnode *pd_ad; 145 struct pci_bus *bus; 146 uint32_t devfn; 147 uint16_t vendor; 148 uint16_t device; 149 uint16_t subsystem_vendor; 150 uint16_t subsystem_device; 151 uint8_t revision; 152 uint32_t class; 153 bool msi_enabled; 154 }; 155 156 static inline device_t 157 pci_dev_dev(struct pci_dev *pdev) 158 { 159 return pdev->pd_dev; 160 } 161 162 /* XXX Nouveau kludge! */ 163 static inline struct drm_device * 164 pci_get_drvdata(struct pci_dev *pdev) 165 { 166 return pdev->pd_drm_dev; 167 } 168 169 static inline void 170 linux_pci_dev_init(struct pci_dev *pdev, device_t dev, 171 const struct pci_attach_args *pa, int kludges) 172 { 173 const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag, 174 PCI_SUBSYS_ID_REG); 175 unsigned i; 176 177 pdev->pd_pa = *pa; 178 pdev->pd_kludges = kludges; 179 pdev->pd_rom_vaddr = NULL; 180 pdev->pd_dev = dev; 181 #if (NACPICA > 0) 182 pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus, 183 pa->pa_device, pa->pa_function); 184 #else 185 pdev->pd_ad = NULL; 186 #endif 187 pdev->bus = kmem_zalloc(sizeof(struct pci_bus), KM_NOSLEEP); 188 pdev->bus->number = pa->pa_bus; 189 pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function); 190 pdev->vendor = PCI_VENDOR(pa->pa_id); 191 pdev->device = PCI_PRODUCT(pa->pa_id); 192 pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id); 193 pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id); 194 pdev->revision = PCI_REVISION(pa->pa_class); 195 pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */ 196 197 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 198 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 199 const int reg = PCI_BAR(i); 200 201 pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc, 202 pa->pa_tag, reg); 203 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 204 pdev->pd_resources[i].type, 205 &pdev->pd_resources[i].addr, 206 &pdev->pd_resources[i].size, 207 &pdev->pd_resources[i].flags)) { 208 pdev->pd_resources[i].addr = 0; 209 pdev->pd_resources[i].size = 0; 210 pdev->pd_resources[i].flags = 0; 211 } 212 pdev->pd_resources[i].kva = NULL; 213 } 214 } 215 216 static inline int 217 pci_find_capability(struct pci_dev *pdev, int cap) 218 { 219 return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap, 220 NULL, NULL); 221 } 222 223 static inline int 224 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep) 225 { 226 KASSERT(!ISSET(reg, 3)); 227 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg); 228 return 0; 229 } 230 231 static inline int 232 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep) 233 { 234 KASSERT(!ISSET(reg, 1)); 235 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 236 (reg &~ 2)) >> (8 * (reg & 2)); 237 return 0; 238 } 239 240 static inline int 241 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep) 242 { 243 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 244 (reg &~ 3)) >> (8 * (reg & 3)); 245 return 0; 246 } 247 248 static inline int 249 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value) 250 { 251 KASSERT(!ISSET(reg, 3)); 252 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value); 253 return 0; 254 } 255 256 static inline void 257 pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes, 258 uint32_t value) 259 { 260 const uint32_t mask = ~((~0UL) << (8 * bytes)); 261 const int reg32 = (reg &~ 3); 262 const unsigned int shift = (8 * (reg & 3)); 263 uint32_t value32; 264 265 KASSERT(bytes <= 4); 266 KASSERT(!ISSET(value, ~mask)); 267 pci_read_config_dword(pdev, reg32, &value32); 268 value32 &=~ (mask << shift); 269 value32 |= (value << shift); 270 pci_write_config_dword(pdev, reg32, value32); 271 } 272 273 static inline int 274 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value) 275 { 276 KASSERT(!ISSET(reg, 1)); 277 pci_rmw_config(pdev, reg, 2, value); 278 return 0; 279 } 280 281 static inline int 282 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value) 283 { 284 pci_rmw_config(pdev, reg, 1, value); 285 return 0; 286 } 287 288 /* 289 * XXX pci msi 290 */ 291 static inline int 292 pci_enable_msi(struct pci_dev *pdev) 293 { 294 return -ENOSYS; 295 } 296 297 static inline void 298 pci_disable_msi(struct pci_dev *pdev __unused) 299 { 300 KASSERT(pdev->msi_enabled); 301 } 302 303 static inline void 304 pci_set_master(struct pci_dev *pdev) 305 { 306 pcireg_t csr; 307 308 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 309 PCI_COMMAND_STATUS_REG); 310 csr |= PCI_COMMAND_MASTER_ENABLE; 311 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 312 PCI_COMMAND_STATUS_REG, csr); 313 } 314 315 static inline void 316 pci_clear_master(struct pci_dev *pdev) 317 { 318 pcireg_t csr; 319 320 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 321 PCI_COMMAND_STATUS_REG); 322 csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE; 323 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 324 PCI_COMMAND_STATUS_REG, csr); 325 } 326 327 #define PCIBIOS_MIN_MEM 0x100000 /* XXX bogus x86 kludge bollocks */ 328 329 static inline bus_addr_t 330 pcibios_align_resource(void *p, const struct resource *resource, 331 bus_addr_t addr, bus_size_t size) 332 { 333 panic("pcibios_align_resource has accessed unaligned neurons!"); 334 } 335 336 static inline int 337 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource, 338 bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused, 339 bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t, 340 bus_size_t) __unused, 341 struct pci_dev *pdev) 342 { 343 const struct pci_attach_args *const pa = &pdev->pd_pa; 344 bus_space_tag_t bst; 345 int error; 346 347 switch (resource->flags) { 348 case IORESOURCE_MEM: 349 bst = pa->pa_memt; 350 break; 351 352 case IORESOURCE_IO: 353 bst = pa->pa_iot; 354 break; 355 356 default: 357 panic("I don't know what kind of resource you want!"); 358 } 359 360 resource->r_bst = bst; 361 error = bus_space_alloc(bst, start, __type_max(bus_addr_t), 362 size, align, 0, 0, &resource->start, &resource->r_bsh); 363 if (error) 364 return error; 365 366 resource->size = size; 367 return 0; 368 } 369 370 /* 371 * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are 372 * defined only for their single purposes in i915drm, in 373 * i915_get_bridge_dev and intel_detect_pch. We can't define them more 374 * generally without adapting pci_find_device (and pci_enumerate_bus 375 * internally) to pass a cookie through. 376 */ 377 378 static inline int /* XXX inline? */ 379 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa) 380 { 381 382 if (pa->pa_bus != 0) 383 return 0; 384 if (pa->pa_device != 0) 385 return 0; 386 if (pa->pa_function != 0) 387 return 0; 388 389 return 1; 390 } 391 392 static inline struct pci_dev * 393 pci_get_bus_and_slot(int bus, int slot) 394 { 395 struct pci_attach_args pa; 396 397 KASSERT(bus == 0); 398 KASSERT(slot == PCI_DEVFN(0, 0)); 399 400 if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0)) 401 return NULL; 402 403 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 404 linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 405 406 return pdev; 407 } 408 409 static inline int /* XXX inline? */ 410 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa) 411 { 412 413 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 414 return 0; 415 if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 416 return 0; 417 418 return 1; 419 } 420 421 static inline void 422 pci_dev_put(struct pci_dev *pdev) 423 { 424 425 if (pdev == NULL) 426 return; 427 428 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE)); 429 kmem_free(pdev, sizeof(*pdev)); 430 } 431 432 static inline struct pci_dev * 433 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from) 434 { 435 struct pci_attach_args pa; 436 437 KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8)); 438 439 if (from != NULL) { 440 pci_dev_put(from); 441 return NULL; 442 } 443 444 if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge)) 445 return NULL; 446 447 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 448 linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 449 450 return pdev; 451 } 452 453 #define __pci_rom_iomem 454 455 static inline void 456 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused) 457 { 458 459 /* XXX Disable the ROM address decoder. */ 460 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 461 KASSERT(vaddr == pdev->pd_rom_vaddr); 462 bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size); 463 pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM; 464 pdev->pd_rom_vaddr = NULL; 465 } 466 467 /* XXX Whattakludge! Should move this in sys/arch/. */ 468 static int 469 pci_map_rom_md(struct pci_dev *pdev) 470 { 471 #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__) 472 const bus_addr_t rom_base = 0xc0000; 473 const bus_size_t rom_size = 0x20000; 474 bus_space_handle_t rom_bsh; 475 int error; 476 477 if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY) 478 return ENXIO; 479 if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 480 return ENXIO; 481 /* XXX Check whether this is the primary VGA card? */ 482 error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size, 483 (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh); 484 if (error) 485 return ENXIO; 486 487 pdev->pd_rom_bst = pdev->pd_pa.pa_memt; 488 pdev->pd_rom_bsh = rom_bsh; 489 pdev->pd_rom_size = rom_size; 490 pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM; 491 492 return 0; 493 #else 494 return ENXIO; 495 #endif 496 } 497 498 static inline void __pci_rom_iomem * 499 pci_map_rom(struct pci_dev *pdev, size_t *sizep) 500 { 501 502 KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 503 504 if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM, 505 (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR), 506 &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size) 507 != 0) 508 goto fail_mi; 509 pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM; 510 511 /* XXX This type is obviously wrong in general... */ 512 if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh, 513 pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86, 514 &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) { 515 pci_unmap_rom(pdev, NULL); 516 goto fail_mi; 517 } 518 goto success; 519 520 fail_mi: 521 if (pci_map_rom_md(pdev) != 0) 522 goto fail_md; 523 524 /* XXX This type is obviously wrong in general... */ 525 if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh, 526 pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86, 527 &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) { 528 pci_unmap_rom(pdev, NULL); 529 goto fail_md; 530 } 531 532 success: 533 KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX); 534 *sizep = pdev->pd_rom_found_size; 535 pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, 536 pdev->pd_rom_found_bsh); 537 return pdev->pd_rom_vaddr; 538 539 fail_md: 540 return NULL; 541 } 542 543 static inline void __pci_rom_iomem * 544 pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep) 545 { 546 547 *sizep = 0; 548 return NULL; 549 } 550 551 static inline int 552 pci_enable_rom(struct pci_dev *pdev) 553 { 554 const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc; 555 const pcitag_t tag = pdev->pd_pa.pa_tag; 556 pcireg_t addr; 557 int s; 558 559 /* XXX Don't do anything if the ROM isn't there. */ 560 561 s = splhigh(); 562 addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM); 563 addr |= PCI_MAPREG_ROM_ENABLE; 564 pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr); 565 splx(s); 566 567 return 0; 568 } 569 570 static inline void 571 pci_disable_rom(struct pci_dev *pdev) 572 { 573 const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc; 574 const pcitag_t tag = pdev->pd_pa.pa_tag; 575 pcireg_t addr; 576 int s; 577 578 s = splhigh(); 579 addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM); 580 addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE; 581 pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr); 582 splx(s); 583 } 584 585 static inline bus_addr_t 586 pci_resource_start(struct pci_dev *pdev, unsigned i) 587 { 588 589 KASSERT(i < PCI_NUM_RESOURCES); 590 return pdev->pd_resources[i].addr; 591 } 592 593 static inline bus_size_t 594 pci_resource_len(struct pci_dev *pdev, unsigned i) 595 { 596 597 KASSERT(i < PCI_NUM_RESOURCES); 598 return pdev->pd_resources[i].size; 599 } 600 601 static inline bus_addr_t 602 pci_resource_end(struct pci_dev *pdev, unsigned i) 603 { 604 605 return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1); 606 } 607 608 static inline int 609 pci_resource_flags(struct pci_dev *pdev, unsigned i) 610 { 611 612 KASSERT(i < PCI_NUM_RESOURCES); 613 return pdev->pd_resources[i].flags; 614 } 615 616 static inline void __pci_iomem * 617 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size) 618 { 619 int error; 620 621 KASSERT(i < PCI_NUM_RESOURCES); 622 KASSERT(pdev->pd_resources[i].kva == NULL); 623 624 if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM) 625 return NULL; 626 if (pdev->pd_resources[i].size < size) 627 return NULL; 628 error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr, 629 size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags, 630 &pdev->pd_resources[i].bsh); 631 if (error) { 632 /* Horrible hack: try asking the fake AGP device. */ 633 if (!agp_i810_borrow(pdev->pd_resources[i].addr, size, 634 &pdev->pd_resources[i].bsh)) 635 return NULL; 636 } 637 pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt; 638 pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst, 639 pdev->pd_resources[i].bsh); 640 641 return pdev->pd_resources[i].kva; 642 } 643 644 static inline void 645 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva) 646 { 647 unsigned i; 648 649 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 650 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 651 if (pdev->pd_resources[i].kva == kva) 652 break; 653 } 654 KASSERT(i < PCI_NUM_RESOURCES); 655 656 pdev->pd_resources[i].kva = NULL; 657 bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh, 658 pdev->pd_resources[i].size); 659 } 660 661 static inline void 662 pci_save_state(struct pci_dev *pdev) 663 { 664 665 KASSERT(pdev->pd_saved_state == NULL); 666 pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state), 667 KM_SLEEP); 668 pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 669 pdev->pd_saved_state); 670 } 671 672 static inline void 673 pci_restore_state(struct pci_dev *pdev) 674 { 675 676 KASSERT(pdev->pd_saved_state != NULL); 677 pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 678 pdev->pd_saved_state); 679 kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state)); 680 pdev->pd_saved_state = NULL; 681 } 682 683 static inline bool 684 pci_is_pcie(struct pci_dev *pdev) 685 { 686 687 return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0); 688 } 689 690 static inline bool 691 pci_dma_supported(struct pci_dev *pdev, uintmax_t mask) 692 { 693 694 /* XXX Cop-out. */ 695 if (mask > DMA_BIT_MASK(32)) 696 return pci_dma64_available(&pdev->pd_pa); 697 else 698 return true; 699 } 700 701 #endif /* _LINUX_PCI_H_ */ 702
Indexes created Tue Sep 30 20:09:53 GMT 2025