linux_pci.c revision 1.19 1 1.19 riastrad /* $NetBSD: linux_pci.c,v 1.19 2021/12/19 11:38:04 riastradh Exp $ */
2 1.1 riastrad
3 1.1 riastrad /*-
4 1.1 riastrad * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.1 riastrad * All rights reserved.
6 1.1 riastrad *
7 1.1 riastrad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 riastrad * by Taylor R. Campbell.
9 1.1 riastrad *
10 1.1 riastrad * Redistribution and use in source and binary forms, with or without
11 1.1 riastrad * modification, are permitted provided that the following conditions
12 1.1 riastrad * are met:
13 1.1 riastrad * 1. Redistributions of source code must retain the above copyright
14 1.1 riastrad * notice, this list of conditions and the following disclaimer.
15 1.1 riastrad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 riastrad * notice, this list of conditions and the following disclaimer in the
17 1.1 riastrad * documentation and/or other materials provided with the distribution.
18 1.1 riastrad *
19 1.1 riastrad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 riastrad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 riastrad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 riastrad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 riastrad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 riastrad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 riastrad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 riastrad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 riastrad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 riastrad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 riastrad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 riastrad */
31 1.1 riastrad
32 1.7 jmcneill #ifdef _KERNEL_OPT
33 1.17 riastrad #include "acpica.h"
34 1.7 jmcneill #include "opt_pci.h"
35 1.7 jmcneill #endif
36 1.7 jmcneill
37 1.1 riastrad #include <sys/cdefs.h>
38 1.19 riastrad __KERNEL_RCSID(0, "$NetBSD: linux_pci.c,v 1.19 2021/12/19 11:38:04 riastradh Exp $");
39 1.16 riastrad
40 1.16 riastrad #if NACPICA > 0
41 1.16 riastrad #include <dev/acpi/acpivar.h>
42 1.16 riastrad #include <dev/acpi/acpi_pci.h>
43 1.16 riastrad #endif
44 1.1 riastrad
45 1.1 riastrad #include <linux/pci.h>
46 1.1 riastrad
47 1.5 riastrad #include <drm/drm_agp_netbsd.h>
48 1.5 riastrad
49 1.1 riastrad device_t
50 1.1 riastrad pci_dev_dev(struct pci_dev *pdev)
51 1.1 riastrad {
52 1.1 riastrad
53 1.1 riastrad return pdev->pd_dev;
54 1.1 riastrad }
55 1.1 riastrad
56 1.12 riastrad void
57 1.12 riastrad pci_set_drvdata(struct pci_dev *pdev, void *drvdata)
58 1.12 riastrad {
59 1.12 riastrad pdev->pd_drvdata = drvdata;
60 1.12 riastrad }
61 1.12 riastrad
62 1.12 riastrad void *
63 1.1 riastrad pci_get_drvdata(struct pci_dev *pdev)
64 1.1 riastrad {
65 1.12 riastrad return pdev->pd_drvdata;
66 1.1 riastrad }
67 1.1 riastrad
68 1.1 riastrad void
69 1.1 riastrad linux_pci_dev_init(struct pci_dev *pdev, device_t dev, device_t parent,
70 1.1 riastrad const struct pci_attach_args *pa, int kludges)
71 1.1 riastrad {
72 1.1 riastrad const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
73 1.1 riastrad PCI_SUBSYS_ID_REG);
74 1.1 riastrad unsigned i;
75 1.1 riastrad
76 1.3 riastrad memset(pdev, 0, sizeof(*pdev)); /* paranoia */
77 1.3 riastrad
78 1.1 riastrad pdev->pd_pa = *pa;
79 1.1 riastrad pdev->pd_kludges = kludges;
80 1.1 riastrad pdev->pd_rom_vaddr = NULL;
81 1.1 riastrad pdev->pd_dev = dev;
82 1.1 riastrad #if (NACPICA > 0)
83 1.7 jmcneill #ifdef __HAVE_PCI_GET_SEGMENT
84 1.7 jmcneill const int seg = pci_get_segment(pa->pa_pc);
85 1.7 jmcneill #else
86 1.7 jmcneill const int seg = 0;
87 1.7 jmcneill #endif
88 1.7 jmcneill pdev->pd_ad = acpi_pcidev_find(seg, pa->pa_bus,
89 1.1 riastrad pa->pa_device, pa->pa_function);
90 1.1 riastrad #else
91 1.1 riastrad pdev->pd_ad = NULL;
92 1.1 riastrad #endif
93 1.1 riastrad pdev->pd_saved_state = NULL;
94 1.1 riastrad pdev->pd_intr_handles = NULL;
95 1.12 riastrad pdev->pd_drvdata = NULL;
96 1.1 riastrad pdev->bus = kmem_zalloc(sizeof(*pdev->bus), KM_NOSLEEP);
97 1.1 riastrad pdev->bus->pb_pc = pa->pa_pc;
98 1.1 riastrad pdev->bus->pb_dev = parent;
99 1.1 riastrad pdev->bus->number = pa->pa_bus;
100 1.1 riastrad pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
101 1.1 riastrad pdev->vendor = PCI_VENDOR(pa->pa_id);
102 1.1 riastrad pdev->device = PCI_PRODUCT(pa->pa_id);
103 1.1 riastrad pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
104 1.1 riastrad pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
105 1.1 riastrad pdev->revision = PCI_REVISION(pa->pa_class);
106 1.1 riastrad pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
107 1.1 riastrad
108 1.1 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
109 1.1 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
110 1.1 riastrad const int reg = PCI_BAR(i);
111 1.1 riastrad
112 1.1 riastrad pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
113 1.1 riastrad pa->pa_tag, reg);
114 1.1 riastrad if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
115 1.1 riastrad pdev->pd_resources[i].type,
116 1.1 riastrad &pdev->pd_resources[i].addr,
117 1.1 riastrad &pdev->pd_resources[i].size,
118 1.1 riastrad &pdev->pd_resources[i].flags)) {
119 1.1 riastrad pdev->pd_resources[i].addr = 0;
120 1.1 riastrad pdev->pd_resources[i].size = 0;
121 1.1 riastrad pdev->pd_resources[i].flags = 0;
122 1.1 riastrad }
123 1.1 riastrad pdev->pd_resources[i].kva = NULL;
124 1.2 riastrad pdev->pd_resources[i].mapped = false;
125 1.1 riastrad }
126 1.1 riastrad }
127 1.1 riastrad
128 1.1 riastrad int
129 1.1 riastrad pci_find_capability(struct pci_dev *pdev, int cap)
130 1.1 riastrad {
131 1.1 riastrad
132 1.1 riastrad return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
133 1.1 riastrad NULL, NULL);
134 1.1 riastrad }
135 1.1 riastrad
136 1.1 riastrad int
137 1.1 riastrad pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
138 1.1 riastrad {
139 1.1 riastrad
140 1.1 riastrad KASSERT(!ISSET(reg, 3));
141 1.1 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
142 1.1 riastrad return 0;
143 1.1 riastrad }
144 1.1 riastrad
145 1.1 riastrad int
146 1.1 riastrad pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
147 1.1 riastrad {
148 1.1 riastrad
149 1.1 riastrad KASSERT(!ISSET(reg, 1));
150 1.1 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
151 1.1 riastrad (reg &~ 2)) >> (8 * (reg & 2));
152 1.1 riastrad return 0;
153 1.1 riastrad }
154 1.1 riastrad
155 1.1 riastrad int
156 1.1 riastrad pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
157 1.1 riastrad {
158 1.1 riastrad
159 1.1 riastrad *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
160 1.1 riastrad (reg &~ 3)) >> (8 * (reg & 3));
161 1.1 riastrad return 0;
162 1.1 riastrad }
163 1.1 riastrad
164 1.1 riastrad int
165 1.1 riastrad pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
166 1.1 riastrad {
167 1.1 riastrad
168 1.1 riastrad KASSERT(!ISSET(reg, 3));
169 1.1 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
170 1.1 riastrad return 0;
171 1.1 riastrad }
172 1.1 riastrad
173 1.1 riastrad int
174 1.1 riastrad pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
175 1.1 riastrad uint32_t *valuep)
176 1.1 riastrad {
177 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
178 1.1 riastrad PCI_FUNC(devfn));
179 1.1 riastrad
180 1.1 riastrad KASSERT(!ISSET(reg, 1));
181 1.1 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
182 1.1 riastrad return 0;
183 1.1 riastrad }
184 1.1 riastrad
185 1.1 riastrad int
186 1.1 riastrad pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
187 1.1 riastrad uint16_t *valuep)
188 1.1 riastrad {
189 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
190 1.1 riastrad PCI_FUNC(devfn));
191 1.1 riastrad
192 1.1 riastrad KASSERT(!ISSET(reg, 1));
193 1.1 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
194 1.1 riastrad return 0;
195 1.1 riastrad }
196 1.1 riastrad
197 1.1 riastrad int
198 1.1 riastrad pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
199 1.1 riastrad uint8_t *valuep)
200 1.1 riastrad {
201 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
202 1.1 riastrad PCI_FUNC(devfn));
203 1.1 riastrad
204 1.1 riastrad *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
205 1.1 riastrad return 0;
206 1.1 riastrad }
207 1.1 riastrad
208 1.1 riastrad int
209 1.1 riastrad pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
210 1.1 riastrad uint32_t value)
211 1.1 riastrad {
212 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
213 1.1 riastrad PCI_FUNC(devfn));
214 1.1 riastrad
215 1.1 riastrad KASSERT(!ISSET(reg, 3));
216 1.1 riastrad pci_conf_write(bus->pb_pc, tag, reg, value);
217 1.1 riastrad return 0;
218 1.1 riastrad }
219 1.1 riastrad
220 1.1 riastrad static void
221 1.1 riastrad pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
222 1.1 riastrad uint32_t value)
223 1.1 riastrad {
224 1.1 riastrad const uint32_t mask = ~((~0UL) << (8 * bytes));
225 1.1 riastrad const int reg32 = (reg &~ 3);
226 1.1 riastrad const unsigned int shift = (8 * (reg & 3));
227 1.1 riastrad uint32_t value32;
228 1.1 riastrad
229 1.1 riastrad KASSERT(bytes <= 4);
230 1.1 riastrad KASSERT(!ISSET(value, ~mask));
231 1.1 riastrad value32 = pci_conf_read(pc, tag, reg32);
232 1.1 riastrad value32 &=~ (mask << shift);
233 1.1 riastrad value32 |= (value << shift);
234 1.1 riastrad pci_conf_write(pc, tag, reg32, value32);
235 1.1 riastrad }
236 1.1 riastrad
237 1.1 riastrad int
238 1.1 riastrad pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
239 1.1 riastrad {
240 1.1 riastrad
241 1.1 riastrad KASSERT(!ISSET(reg, 1));
242 1.1 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
243 1.1 riastrad return 0;
244 1.1 riastrad }
245 1.1 riastrad
246 1.1 riastrad int
247 1.1 riastrad pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
248 1.1 riastrad {
249 1.1 riastrad
250 1.1 riastrad pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
251 1.1 riastrad return 0;
252 1.1 riastrad }
253 1.1 riastrad
254 1.1 riastrad int
255 1.1 riastrad pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
256 1.1 riastrad uint16_t value)
257 1.1 riastrad {
258 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
259 1.1 riastrad PCI_FUNC(devfn));
260 1.1 riastrad
261 1.1 riastrad KASSERT(!ISSET(reg, 1));
262 1.1 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
263 1.1 riastrad return 0;
264 1.1 riastrad }
265 1.1 riastrad
266 1.1 riastrad int
267 1.1 riastrad pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
268 1.1 riastrad uint8_t value)
269 1.1 riastrad {
270 1.1 riastrad pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
271 1.1 riastrad PCI_FUNC(devfn));
272 1.1 riastrad
273 1.1 riastrad pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
274 1.1 riastrad return 0;
275 1.1 riastrad }
276 1.1 riastrad
277 1.1 riastrad int
278 1.1 riastrad pci_enable_msi(struct pci_dev *pdev)
279 1.1 riastrad {
280 1.1 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
281 1.1 riastrad
282 1.1 riastrad if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
283 1.1 riastrad return -EINVAL;
284 1.1 riastrad
285 1.1 riastrad pdev->msi_enabled = 1;
286 1.1 riastrad return 0;
287 1.1 riastrad }
288 1.1 riastrad
289 1.1 riastrad void
290 1.1 riastrad pci_disable_msi(struct pci_dev *pdev __unused)
291 1.1 riastrad {
292 1.1 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
293 1.1 riastrad
294 1.1 riastrad if (pdev->pd_intr_handles != NULL) {
295 1.1 riastrad pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
296 1.1 riastrad pdev->pd_intr_handles = NULL;
297 1.1 riastrad }
298 1.1 riastrad pdev->msi_enabled = 0;
299 1.1 riastrad }
300 1.1 riastrad
301 1.1 riastrad void
302 1.1 riastrad pci_set_master(struct pci_dev *pdev)
303 1.1 riastrad {
304 1.1 riastrad pcireg_t csr;
305 1.1 riastrad
306 1.1 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
307 1.1 riastrad PCI_COMMAND_STATUS_REG);
308 1.1 riastrad csr |= PCI_COMMAND_MASTER_ENABLE;
309 1.1 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
310 1.1 riastrad PCI_COMMAND_STATUS_REG, csr);
311 1.1 riastrad }
312 1.1 riastrad
313 1.1 riastrad void
314 1.1 riastrad pci_clear_master(struct pci_dev *pdev)
315 1.1 riastrad {
316 1.1 riastrad pcireg_t csr;
317 1.1 riastrad
318 1.1 riastrad csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
319 1.1 riastrad PCI_COMMAND_STATUS_REG);
320 1.1 riastrad csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
321 1.1 riastrad pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
322 1.1 riastrad PCI_COMMAND_STATUS_REG, csr);
323 1.1 riastrad }
324 1.1 riastrad
325 1.1 riastrad bus_addr_t
326 1.1 riastrad pcibios_align_resource(void *p, const struct resource *resource,
327 1.1 riastrad bus_addr_t addr, bus_size_t size)
328 1.1 riastrad {
329 1.1 riastrad panic("pcibios_align_resource has accessed unaligned neurons!");
330 1.1 riastrad }
331 1.1 riastrad
332 1.1 riastrad int
333 1.1 riastrad pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
334 1.1 riastrad bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
335 1.1 riastrad bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
336 1.1 riastrad bus_size_t) __unused,
337 1.1 riastrad struct pci_dev *pdev)
338 1.1 riastrad {
339 1.1 riastrad const struct pci_attach_args *const pa = &pdev->pd_pa;
340 1.1 riastrad bus_space_tag_t bst;
341 1.1 riastrad int error;
342 1.1 riastrad
343 1.1 riastrad switch (resource->flags) {
344 1.1 riastrad case IORESOURCE_MEM:
345 1.1 riastrad bst = pa->pa_memt;
346 1.1 riastrad break;
347 1.1 riastrad
348 1.1 riastrad case IORESOURCE_IO:
349 1.1 riastrad bst = pa->pa_iot;
350 1.1 riastrad break;
351 1.1 riastrad
352 1.1 riastrad default:
353 1.1 riastrad panic("I don't know what kind of resource you want!");
354 1.1 riastrad }
355 1.1 riastrad
356 1.1 riastrad resource->r_bst = bst;
357 1.1 riastrad error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
358 1.1 riastrad size, align, 0, 0, &resource->start, &resource->r_bsh);
359 1.1 riastrad if (error)
360 1.1 riastrad return error;
361 1.1 riastrad
362 1.13 riastrad resource->end = start + (size - 1);
363 1.1 riastrad return 0;
364 1.1 riastrad }
365 1.1 riastrad
366 1.1 riastrad /*
367 1.1 riastrad * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
368 1.1 riastrad * defined only for their single purposes in i915drm, in
369 1.1 riastrad * i915_get_bridge_dev and intel_detect_pch. We can't define them more
370 1.1 riastrad * generally without adapting pci_find_device (and pci_enumerate_bus
371 1.1 riastrad * internally) to pass a cookie through.
372 1.1 riastrad */
373 1.1 riastrad
374 1.1 riastrad static int
375 1.1 riastrad pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
376 1.1 riastrad {
377 1.1 riastrad
378 1.11 riastrad /* XXX domain */
379 1.1 riastrad if (pa->pa_bus != 0)
380 1.1 riastrad return 0;
381 1.1 riastrad if (pa->pa_device != 0)
382 1.1 riastrad return 0;
383 1.1 riastrad if (pa->pa_function != 0)
384 1.1 riastrad return 0;
385 1.1 riastrad
386 1.1 riastrad return 1;
387 1.1 riastrad }
388 1.1 riastrad
389 1.1 riastrad struct pci_dev *
390 1.11 riastrad pci_get_domain_bus_and_slot(int domain, int bus, int slot)
391 1.1 riastrad {
392 1.1 riastrad struct pci_attach_args pa;
393 1.1 riastrad
394 1.11 riastrad KASSERT(domain == 0);
395 1.1 riastrad KASSERT(bus == 0);
396 1.1 riastrad KASSERT(slot == PCI_DEVFN(0, 0));
397 1.1 riastrad
398 1.1 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
399 1.1 riastrad return NULL;
400 1.1 riastrad
401 1.1 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
402 1.1 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
403 1.1 riastrad
404 1.1 riastrad return pdev;
405 1.1 riastrad }
406 1.1 riastrad
407 1.1 riastrad static int
408 1.1 riastrad pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
409 1.1 riastrad {
410 1.1 riastrad
411 1.1 riastrad if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
412 1.1 riastrad return 0;
413 1.1 riastrad if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
414 1.1 riastrad return 0;
415 1.1 riastrad
416 1.1 riastrad return 1;
417 1.1 riastrad }
418 1.1 riastrad
419 1.1 riastrad void
420 1.1 riastrad pci_dev_put(struct pci_dev *pdev)
421 1.1 riastrad {
422 1.1 riastrad
423 1.1 riastrad if (pdev == NULL)
424 1.1 riastrad return;
425 1.1 riastrad
426 1.1 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
427 1.1 riastrad kmem_free(pdev->bus, sizeof(*pdev->bus));
428 1.1 riastrad kmem_free(pdev, sizeof(*pdev));
429 1.1 riastrad }
430 1.1 riastrad
431 1.1 riastrad struct pci_dev * /* XXX i915 kludge */
432 1.1 riastrad pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
433 1.1 riastrad {
434 1.1 riastrad struct pci_attach_args pa;
435 1.1 riastrad
436 1.1 riastrad KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
437 1.1 riastrad
438 1.1 riastrad if (from != NULL) {
439 1.1 riastrad pci_dev_put(from);
440 1.1 riastrad return NULL;
441 1.1 riastrad }
442 1.1 riastrad
443 1.1 riastrad if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
444 1.1 riastrad return NULL;
445 1.1 riastrad
446 1.1 riastrad struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
447 1.1 riastrad linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
448 1.1 riastrad
449 1.1 riastrad return pdev;
450 1.1 riastrad }
451 1.1 riastrad
452 1.19 riastrad int
453 1.19 riastrad pci_dev_present(const struct pci_device_id *ids)
454 1.19 riastrad {
455 1.19 riastrad
456 1.19 riastrad /* XXX implement me -- pci_find_device doesn't pass a cookie */
457 1.19 riastrad return 0;
458 1.19 riastrad }
459 1.19 riastrad
460 1.1 riastrad void
461 1.1 riastrad pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
462 1.1 riastrad {
463 1.1 riastrad
464 1.1 riastrad /* XXX Disable the ROM address decoder. */
465 1.1 riastrad KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
466 1.1 riastrad KASSERT(vaddr == pdev->pd_rom_vaddr);
467 1.1 riastrad bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
468 1.1 riastrad pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
469 1.1 riastrad pdev->pd_rom_vaddr = NULL;
470 1.1 riastrad }
471 1.1 riastrad
472 1.1 riastrad /* XXX Whattakludge! Should move this in sys/arch/. */
473 1.1 riastrad static int
474 1.1 riastrad pci_map_rom_md(struct pci_dev *pdev)
475 1.1 riastrad {
476 1.1 riastrad #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
477 1.1 riastrad const bus_addr_t rom_base = 0xc0000;
478 1.1 riastrad const bus_size_t rom_size = 0x20000;
479 1.1 riastrad bus_space_handle_t rom_bsh;
480 1.1 riastrad int error;
481 1.1 riastrad
482 1.1 riastrad if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
483 1.1 riastrad return ENXIO;
484 1.1 riastrad if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
485 1.1 riastrad return ENXIO;
486 1.1 riastrad /* XXX Check whether this is the primary VGA card? */
487 1.1 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
488 1.1 riastrad (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
489 1.1 riastrad if (error)
490 1.1 riastrad return ENXIO;
491 1.1 riastrad
492 1.1 riastrad pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
493 1.1 riastrad pdev->pd_rom_bsh = rom_bsh;
494 1.1 riastrad pdev->pd_rom_size = rom_size;
495 1.1 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
496 1.1 riastrad
497 1.1 riastrad return 0;
498 1.1 riastrad #else
499 1.1 riastrad return ENXIO;
500 1.1 riastrad #endif
501 1.1 riastrad }
502 1.1 riastrad
503 1.1 riastrad void __pci_rom_iomem *
504 1.1 riastrad pci_map_rom(struct pci_dev *pdev, size_t *sizep)
505 1.1 riastrad {
506 1.1 riastrad
507 1.1 riastrad KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
508 1.1 riastrad
509 1.1 riastrad if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
510 1.1 riastrad (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
511 1.1 riastrad &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
512 1.1 riastrad != 0)
513 1.1 riastrad goto fail_mi;
514 1.1 riastrad pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
515 1.1 riastrad
516 1.1 riastrad /* XXX This type is obviously wrong in general... */
517 1.1 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
518 1.1 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
519 1.1 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
520 1.1 riastrad pci_unmap_rom(pdev, NULL);
521 1.1 riastrad goto fail_mi;
522 1.1 riastrad }
523 1.1 riastrad goto success;
524 1.1 riastrad
525 1.1 riastrad fail_mi:
526 1.1 riastrad if (pci_map_rom_md(pdev) != 0)
527 1.1 riastrad goto fail_md;
528 1.1 riastrad
529 1.1 riastrad /* XXX This type is obviously wrong in general... */
530 1.1 riastrad if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
531 1.1 riastrad pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
532 1.1 riastrad &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
533 1.1 riastrad pci_unmap_rom(pdev, NULL);
534 1.1 riastrad goto fail_md;
535 1.1 riastrad }
536 1.1 riastrad
537 1.1 riastrad success:
538 1.1 riastrad KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
539 1.1 riastrad *sizep = pdev->pd_rom_found_size;
540 1.1 riastrad pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
541 1.1 riastrad pdev->pd_rom_found_bsh);
542 1.1 riastrad return pdev->pd_rom_vaddr;
543 1.1 riastrad
544 1.1 riastrad fail_md:
545 1.1 riastrad return NULL;
546 1.1 riastrad }
547 1.1 riastrad
548 1.1 riastrad void __pci_rom_iomem *
549 1.1 riastrad pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
550 1.1 riastrad {
551 1.1 riastrad
552 1.1 riastrad *sizep = 0;
553 1.1 riastrad return NULL;
554 1.1 riastrad }
555 1.1 riastrad
556 1.1 riastrad int
557 1.1 riastrad pci_enable_rom(struct pci_dev *pdev)
558 1.1 riastrad {
559 1.1 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
560 1.1 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
561 1.1 riastrad pcireg_t addr;
562 1.1 riastrad int s;
563 1.1 riastrad
564 1.1 riastrad /* XXX Don't do anything if the ROM isn't there. */
565 1.1 riastrad
566 1.1 riastrad s = splhigh();
567 1.1 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
568 1.1 riastrad addr |= PCI_MAPREG_ROM_ENABLE;
569 1.1 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
570 1.1 riastrad splx(s);
571 1.1 riastrad
572 1.1 riastrad return 0;
573 1.1 riastrad }
574 1.1 riastrad
575 1.1 riastrad void
576 1.1 riastrad pci_disable_rom(struct pci_dev *pdev)
577 1.1 riastrad {
578 1.1 riastrad const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
579 1.1 riastrad const pcitag_t tag = pdev->pd_pa.pa_tag;
580 1.1 riastrad pcireg_t addr;
581 1.1 riastrad int s;
582 1.1 riastrad
583 1.1 riastrad s = splhigh();
584 1.1 riastrad addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
585 1.1 riastrad addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
586 1.1 riastrad pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
587 1.1 riastrad splx(s);
588 1.1 riastrad }
589 1.1 riastrad
590 1.1 riastrad bus_addr_t
591 1.1 riastrad pci_resource_start(struct pci_dev *pdev, unsigned i)
592 1.1 riastrad {
593 1.1 riastrad
594 1.1 riastrad KASSERT(i < PCI_NUM_RESOURCES);
595 1.1 riastrad return pdev->pd_resources[i].addr;
596 1.1 riastrad }
597 1.1 riastrad
598 1.1 riastrad bus_size_t
599 1.1 riastrad pci_resource_len(struct pci_dev *pdev, unsigned i)
600 1.1 riastrad {
601 1.1 riastrad
602 1.1 riastrad KASSERT(i < PCI_NUM_RESOURCES);
603 1.1 riastrad return pdev->pd_resources[i].size;
604 1.1 riastrad }
605 1.1 riastrad
606 1.1 riastrad bus_addr_t
607 1.1 riastrad pci_resource_end(struct pci_dev *pdev, unsigned i)
608 1.1 riastrad {
609 1.1 riastrad
610 1.1 riastrad return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
611 1.1 riastrad }
612 1.1 riastrad
613 1.1 riastrad int
614 1.1 riastrad pci_resource_flags(struct pci_dev *pdev, unsigned i)
615 1.1 riastrad {
616 1.1 riastrad
617 1.1 riastrad KASSERT(i < PCI_NUM_RESOURCES);
618 1.1 riastrad return pdev->pd_resources[i].flags;
619 1.1 riastrad }
620 1.1 riastrad
621 1.1 riastrad void __pci_iomem *
622 1.1 riastrad pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
623 1.1 riastrad {
624 1.1 riastrad int error;
625 1.1 riastrad
626 1.1 riastrad KASSERT(i < PCI_NUM_RESOURCES);
627 1.1 riastrad KASSERT(pdev->pd_resources[i].kva == NULL);
628 1.1 riastrad
629 1.1 riastrad if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
630 1.1 riastrad return NULL;
631 1.1 riastrad if (pdev->pd_resources[i].size < size)
632 1.1 riastrad return NULL;
633 1.1 riastrad error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
634 1.1 riastrad size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
635 1.1 riastrad &pdev->pd_resources[i].bsh);
636 1.6 riastrad if (error)
637 1.5 riastrad return NULL;
638 1.6 riastrad /* XXX Synchronize with drm_agp_borrow_hook in drm_agpsupport.c. */
639 1.1 riastrad pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
640 1.1 riastrad pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
641 1.1 riastrad pdev->pd_resources[i].bsh);
642 1.1 riastrad pdev->pd_resources[i].mapped = true;
643 1.1 riastrad
644 1.1 riastrad return pdev->pd_resources[i].kva;
645 1.1 riastrad }
646 1.1 riastrad
647 1.1 riastrad void
648 1.1 riastrad pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
649 1.1 riastrad {
650 1.1 riastrad unsigned i;
651 1.1 riastrad
652 1.1 riastrad CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
653 1.1 riastrad for (i = 0; i < PCI_NUM_RESOURCES; i++) {
654 1.1 riastrad if (pdev->pd_resources[i].kva == kva)
655 1.1 riastrad break;
656 1.1 riastrad }
657 1.1 riastrad KASSERT(i < PCI_NUM_RESOURCES);
658 1.1 riastrad
659 1.1 riastrad pdev->pd_resources[i].kva = NULL;
660 1.1 riastrad bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
661 1.1 riastrad pdev->pd_resources[i].size);
662 1.1 riastrad }
663 1.1 riastrad
664 1.1 riastrad void
665 1.1 riastrad pci_save_state(struct pci_dev *pdev)
666 1.1 riastrad {
667 1.1 riastrad
668 1.1 riastrad KASSERT(pdev->pd_saved_state == NULL);
669 1.1 riastrad pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
670 1.1 riastrad KM_SLEEP);
671 1.1 riastrad pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
672 1.1 riastrad pdev->pd_saved_state);
673 1.1 riastrad }
674 1.1 riastrad
675 1.1 riastrad void
676 1.1 riastrad pci_restore_state(struct pci_dev *pdev)
677 1.1 riastrad {
678 1.1 riastrad
679 1.1 riastrad KASSERT(pdev->pd_saved_state != NULL);
680 1.1 riastrad pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
681 1.1 riastrad pdev->pd_saved_state);
682 1.1 riastrad kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
683 1.1 riastrad pdev->pd_saved_state = NULL;
684 1.1 riastrad }
685 1.1 riastrad
686 1.1 riastrad bool
687 1.1 riastrad pci_is_pcie(struct pci_dev *pdev)
688 1.1 riastrad {
689 1.1 riastrad
690 1.1 riastrad return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
691 1.1 riastrad }
692 1.1 riastrad
693 1.1 riastrad bool
694 1.1 riastrad pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
695 1.1 riastrad {
696 1.1 riastrad
697 1.1 riastrad /* XXX Cop-out. */
698 1.1 riastrad if (mask > DMA_BIT_MASK(32))
699 1.1 riastrad return pci_dma64_available(&pdev->pd_pa);
700 1.1 riastrad else
701 1.1 riastrad return true;
702 1.1 riastrad }
703 1.1 riastrad
704 1.1 riastrad bool
705 1.14 riastrad pci_is_thunderbolt_attached(struct pci_dev *pdev)
706 1.14 riastrad {
707 1.14 riastrad
708 1.14 riastrad /* XXX Cop-out. */
709 1.14 riastrad return false;
710 1.14 riastrad }
711 1.14 riastrad
712 1.14 riastrad bool
713 1.1 riastrad pci_is_root_bus(struct pci_bus *bus)
714 1.1 riastrad {
715 1.1 riastrad
716 1.1 riastrad /* XXX Cop-out. */
717 1.1 riastrad return false;
718 1.1 riastrad }
719 1.1 riastrad
720 1.1 riastrad int
721 1.1 riastrad pci_domain_nr(struct pci_bus *bus)
722 1.1 riastrad {
723 1.1 riastrad
724 1.1 riastrad return device_unit(bus->pb_dev);
725 1.1 riastrad }
726 1.1 riastrad
727 1.1 riastrad /*
728 1.1 riastrad * We explicitly rename pci_enable/disable_device so that you have to
729 1.1 riastrad * review each use of them, since NetBSD's PCI API does _not_ respect
730 1.1 riastrad * our local enablecnt here, but there are different parts of NetBSD
731 1.1 riastrad * that automatically enable/disable like PMF, so you have to decide
732 1.1 riastrad * for each one whether to call it or not.
733 1.1 riastrad */
734 1.1 riastrad
735 1.1 riastrad int
736 1.1 riastrad linux_pci_enable_device(struct pci_dev *pdev)
737 1.1 riastrad {
738 1.1 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
739 1.1 riastrad pcireg_t csr;
740 1.1 riastrad int s;
741 1.1 riastrad
742 1.1 riastrad if (pdev->pd_enablecnt++)
743 1.1 riastrad return 0;
744 1.1 riastrad
745 1.1 riastrad s = splhigh();
746 1.1 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
747 1.4 riastrad /* If someone else (firmware) already enabled it, credit them. */
748 1.4 riastrad if (csr & (PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE))
749 1.4 riastrad pdev->pd_enablecnt++;
750 1.1 riastrad csr |= PCI_COMMAND_IO_ENABLE;
751 1.1 riastrad csr |= PCI_COMMAND_MEM_ENABLE;
752 1.1 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
753 1.1 riastrad splx(s);
754 1.1 riastrad
755 1.1 riastrad return 0;
756 1.1 riastrad }
757 1.1 riastrad
758 1.1 riastrad void
759 1.1 riastrad linux_pci_disable_device(struct pci_dev *pdev)
760 1.1 riastrad {
761 1.1 riastrad const struct pci_attach_args *pa = &pdev->pd_pa;
762 1.1 riastrad pcireg_t csr;
763 1.1 riastrad int s;
764 1.1 riastrad
765 1.1 riastrad if (--pdev->pd_enablecnt)
766 1.1 riastrad return;
767 1.1 riastrad
768 1.1 riastrad s = splhigh();
769 1.1 riastrad csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
770 1.1 riastrad csr &= ~PCI_COMMAND_IO_ENABLE;
771 1.1 riastrad csr &= ~PCI_COMMAND_MEM_ENABLE;
772 1.1 riastrad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
773 1.1 riastrad splx(s);
774 1.1 riastrad }
775 1.1 riastrad
776 1.1 riastrad void
777 1.1 riastrad linux_pci_dev_destroy(struct pci_dev *pdev)
778 1.1 riastrad {
779 1.1 riastrad unsigned i;
780 1.1 riastrad
781 1.1 riastrad if (pdev->bus != NULL) {
782 1.1 riastrad kmem_free(pdev->bus, sizeof(*pdev->bus));
783 1.1 riastrad pdev->bus = NULL;
784 1.1 riastrad }
785 1.1 riastrad if (ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)) {
786 1.1 riastrad pci_unmap_rom(pdev, pdev->pd_rom_vaddr);
787 1.1 riastrad pdev->pd_rom_vaddr = 0;
788 1.1 riastrad }
789 1.1 riastrad for (i = 0; i < __arraycount(pdev->pd_resources); i++) {
790 1.1 riastrad if (!pdev->pd_resources[i].mapped)
791 1.1 riastrad continue;
792 1.1 riastrad bus_space_unmap(pdev->pd_resources[i].bst,
793 1.1 riastrad pdev->pd_resources[i].bsh, pdev->pd_resources[i].size);
794 1.1 riastrad }
795 1.1 riastrad
796 1.1 riastrad /* There is no way these should be still in use. */
797 1.1 riastrad KASSERT(pdev->pd_saved_state == NULL);
798 1.1 riastrad KASSERT(pdev->pd_intr_handles == NULL);
799 1.1 riastrad }
800