linux_pci.c revision 1.2 1 /* $NetBSD: linux_pci.c,v 1.2 2018/08/27 14:16:52 riastradh Exp $ */
2
3 /*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Taylor R. Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: linux_pci.c,v 1.2 2018/08/27 14:16:52 riastradh Exp $");
34
35 #include <linux/pci.h>
36
37 device_t
38 pci_dev_dev(struct pci_dev *pdev)
39 {
40
41 return pdev->pd_dev;
42 }
43
44 /* XXX Nouveau kludge! */
45 struct drm_device *
46 pci_get_drvdata(struct pci_dev *pdev)
47 {
48
49 return pdev->pd_drm_dev;
50 }
51
52 void
53 linux_pci_dev_init(struct pci_dev *pdev, device_t dev, device_t parent,
54 const struct pci_attach_args *pa, int kludges)
55 {
56 const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
57 PCI_SUBSYS_ID_REG);
58 unsigned i;
59
60 pdev->pd_pa = *pa;
61 pdev->pd_kludges = kludges;
62 pdev->pd_rom_vaddr = NULL;
63 pdev->pd_dev = dev;
64 #if (NACPICA > 0)
65 pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
66 pa->pa_device, pa->pa_function);
67 #else
68 pdev->pd_ad = NULL;
69 #endif
70 pdev->pd_saved_state = NULL;
71 pdev->pd_intr_handles = NULL;
72 pdev->bus = kmem_zalloc(sizeof(*pdev->bus), KM_NOSLEEP);
73 pdev->bus->pb_pc = pa->pa_pc;
74 pdev->bus->pb_dev = parent;
75 pdev->bus->number = pa->pa_bus;
76 pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
77 pdev->vendor = PCI_VENDOR(pa->pa_id);
78 pdev->device = PCI_PRODUCT(pa->pa_id);
79 pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
80 pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
81 pdev->revision = PCI_REVISION(pa->pa_class);
82 pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
83
84 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
85 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
86 const int reg = PCI_BAR(i);
87
88 pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
89 pa->pa_tag, reg);
90 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
91 pdev->pd_resources[i].type,
92 &pdev->pd_resources[i].addr,
93 &pdev->pd_resources[i].size,
94 &pdev->pd_resources[i].flags)) {
95 pdev->pd_resources[i].addr = 0;
96 pdev->pd_resources[i].size = 0;
97 pdev->pd_resources[i].flags = 0;
98 }
99 pdev->pd_resources[i].kva = NULL;
100 pdev->pd_resources[i].mapped = false;
101 }
102 }
103
104 int
105 pci_find_capability(struct pci_dev *pdev, int cap)
106 {
107
108 return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
109 NULL, NULL);
110 }
111
112 int
113 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
114 {
115
116 KASSERT(!ISSET(reg, 3));
117 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
118 return 0;
119 }
120
121 int
122 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
123 {
124
125 KASSERT(!ISSET(reg, 1));
126 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
127 (reg &~ 2)) >> (8 * (reg & 2));
128 return 0;
129 }
130
131 int
132 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
133 {
134
135 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
136 (reg &~ 3)) >> (8 * (reg & 3));
137 return 0;
138 }
139
140 int
141 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
142 {
143
144 KASSERT(!ISSET(reg, 3));
145 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
146 return 0;
147 }
148
149 int
150 pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
151 uint32_t *valuep)
152 {
153 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
154 PCI_FUNC(devfn));
155
156 KASSERT(!ISSET(reg, 1));
157 *valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
158 return 0;
159 }
160
161 int
162 pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
163 uint16_t *valuep)
164 {
165 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
166 PCI_FUNC(devfn));
167
168 KASSERT(!ISSET(reg, 1));
169 *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
170 return 0;
171 }
172
173 int
174 pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
175 uint8_t *valuep)
176 {
177 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
178 PCI_FUNC(devfn));
179
180 *valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
181 return 0;
182 }
183
184 int
185 pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
186 uint32_t value)
187 {
188 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
189 PCI_FUNC(devfn));
190
191 KASSERT(!ISSET(reg, 3));
192 pci_conf_write(bus->pb_pc, tag, reg, value);
193 return 0;
194 }
195
196 static void
197 pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
198 uint32_t value)
199 {
200 const uint32_t mask = ~((~0UL) << (8 * bytes));
201 const int reg32 = (reg &~ 3);
202 const unsigned int shift = (8 * (reg & 3));
203 uint32_t value32;
204
205 KASSERT(bytes <= 4);
206 KASSERT(!ISSET(value, ~mask));
207 value32 = pci_conf_read(pc, tag, reg32);
208 value32 &=~ (mask << shift);
209 value32 |= (value << shift);
210 pci_conf_write(pc, tag, reg32, value32);
211 }
212
213 int
214 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
215 {
216
217 KASSERT(!ISSET(reg, 1));
218 pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
219 return 0;
220 }
221
222 int
223 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
224 {
225
226 pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
227 return 0;
228 }
229
230 int
231 pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
232 uint16_t value)
233 {
234 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
235 PCI_FUNC(devfn));
236
237 KASSERT(!ISSET(reg, 1));
238 pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
239 return 0;
240 }
241
242 int
243 pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
244 uint8_t value)
245 {
246 pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
247 PCI_FUNC(devfn));
248
249 pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
250 return 0;
251 }
252
253 int
254 pci_enable_msi(struct pci_dev *pdev)
255 {
256 #ifdef notyet
257 const struct pci_attach_args *const pa = &pdev->pd_pa;
258
259 if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
260 return -EINVAL;
261
262 pdev->msi_enabled = 1;
263 return 0;
264 #else
265 return -ENOSYS;
266 #endif
267 }
268
269 void
270 pci_disable_msi(struct pci_dev *pdev __unused)
271 {
272 const struct pci_attach_args *const pa = &pdev->pd_pa;
273
274 if (pdev->pd_intr_handles != NULL) {
275 pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
276 pdev->pd_intr_handles = NULL;
277 }
278 pdev->msi_enabled = 0;
279 }
280
281 void
282 pci_set_master(struct pci_dev *pdev)
283 {
284 pcireg_t csr;
285
286 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
287 PCI_COMMAND_STATUS_REG);
288 csr |= PCI_COMMAND_MASTER_ENABLE;
289 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
290 PCI_COMMAND_STATUS_REG, csr);
291 }
292
293 void
294 pci_clear_master(struct pci_dev *pdev)
295 {
296 pcireg_t csr;
297
298 csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
299 PCI_COMMAND_STATUS_REG);
300 csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
301 pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
302 PCI_COMMAND_STATUS_REG, csr);
303 }
304
305 bus_addr_t
306 pcibios_align_resource(void *p, const struct resource *resource,
307 bus_addr_t addr, bus_size_t size)
308 {
309 panic("pcibios_align_resource has accessed unaligned neurons!");
310 }
311
312 int
313 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
314 bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
315 bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
316 bus_size_t) __unused,
317 struct pci_dev *pdev)
318 {
319 const struct pci_attach_args *const pa = &pdev->pd_pa;
320 bus_space_tag_t bst;
321 int error;
322
323 switch (resource->flags) {
324 case IORESOURCE_MEM:
325 bst = pa->pa_memt;
326 break;
327
328 case IORESOURCE_IO:
329 bst = pa->pa_iot;
330 break;
331
332 default:
333 panic("I don't know what kind of resource you want!");
334 }
335
336 resource->r_bst = bst;
337 error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
338 size, align, 0, 0, &resource->start, &resource->r_bsh);
339 if (error)
340 return error;
341
342 resource->size = size;
343 return 0;
344 }
345
346 /*
347 * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are
348 * defined only for their single purposes in i915drm, in
349 * i915_get_bridge_dev and intel_detect_pch. We can't define them more
350 * generally without adapting pci_find_device (and pci_enumerate_bus
351 * internally) to pass a cookie through.
352 */
353
354 static int
355 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
356 {
357
358 if (pa->pa_bus != 0)
359 return 0;
360 if (pa->pa_device != 0)
361 return 0;
362 if (pa->pa_function != 0)
363 return 0;
364
365 return 1;
366 }
367
368 struct pci_dev *
369 pci_get_bus_and_slot(int bus, int slot)
370 {
371 struct pci_attach_args pa;
372
373 KASSERT(bus == 0);
374 KASSERT(slot == PCI_DEVFN(0, 0));
375
376 if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
377 return NULL;
378
379 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
380 linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
381
382 return pdev;
383 }
384
385 static int
386 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
387 {
388
389 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
390 return 0;
391 if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
392 return 0;
393
394 return 1;
395 }
396
397 void
398 pci_dev_put(struct pci_dev *pdev)
399 {
400
401 if (pdev == NULL)
402 return;
403
404 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
405 kmem_free(pdev->bus, sizeof(*pdev->bus));
406 kmem_free(pdev, sizeof(*pdev));
407 }
408
409 struct pci_dev * /* XXX i915 kludge */
410 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
411 {
412 struct pci_attach_args pa;
413
414 KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
415
416 if (from != NULL) {
417 pci_dev_put(from);
418 return NULL;
419 }
420
421 if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
422 return NULL;
423
424 struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
425 linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
426
427 return pdev;
428 }
429
430 void
431 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
432 {
433
434 /* XXX Disable the ROM address decoder. */
435 KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
436 KASSERT(vaddr == pdev->pd_rom_vaddr);
437 bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
438 pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
439 pdev->pd_rom_vaddr = NULL;
440 }
441
442 /* XXX Whattakludge! Should move this in sys/arch/. */
443 static int
444 pci_map_rom_md(struct pci_dev *pdev)
445 {
446 #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
447 const bus_addr_t rom_base = 0xc0000;
448 const bus_size_t rom_size = 0x20000;
449 bus_space_handle_t rom_bsh;
450 int error;
451
452 if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
453 return ENXIO;
454 if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
455 return ENXIO;
456 /* XXX Check whether this is the primary VGA card? */
457 error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
458 (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
459 if (error)
460 return ENXIO;
461
462 pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
463 pdev->pd_rom_bsh = rom_bsh;
464 pdev->pd_rom_size = rom_size;
465 pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
466
467 return 0;
468 #else
469 return ENXIO;
470 #endif
471 }
472
473 void __pci_rom_iomem *
474 pci_map_rom(struct pci_dev *pdev, size_t *sizep)
475 {
476
477 KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
478
479 if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
480 (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
481 &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
482 != 0)
483 goto fail_mi;
484 pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
485
486 /* XXX This type is obviously wrong in general... */
487 if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
488 pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
489 &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
490 pci_unmap_rom(pdev, NULL);
491 goto fail_mi;
492 }
493 goto success;
494
495 fail_mi:
496 if (pci_map_rom_md(pdev) != 0)
497 goto fail_md;
498
499 /* XXX This type is obviously wrong in general... */
500 if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
501 pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
502 &pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
503 pci_unmap_rom(pdev, NULL);
504 goto fail_md;
505 }
506
507 success:
508 KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
509 *sizep = pdev->pd_rom_found_size;
510 pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
511 pdev->pd_rom_found_bsh);
512 return pdev->pd_rom_vaddr;
513
514 fail_md:
515 return NULL;
516 }
517
518 void __pci_rom_iomem *
519 pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
520 {
521
522 *sizep = 0;
523 return NULL;
524 }
525
526 int
527 pci_enable_rom(struct pci_dev *pdev)
528 {
529 const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
530 const pcitag_t tag = pdev->pd_pa.pa_tag;
531 pcireg_t addr;
532 int s;
533
534 /* XXX Don't do anything if the ROM isn't there. */
535
536 s = splhigh();
537 addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
538 addr |= PCI_MAPREG_ROM_ENABLE;
539 pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
540 splx(s);
541
542 return 0;
543 }
544
545 void
546 pci_disable_rom(struct pci_dev *pdev)
547 {
548 const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
549 const pcitag_t tag = pdev->pd_pa.pa_tag;
550 pcireg_t addr;
551 int s;
552
553 s = splhigh();
554 addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
555 addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
556 pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
557 splx(s);
558 }
559
560 bus_addr_t
561 pci_resource_start(struct pci_dev *pdev, unsigned i)
562 {
563
564 KASSERT(i < PCI_NUM_RESOURCES);
565 return pdev->pd_resources[i].addr;
566 }
567
568 bus_size_t
569 pci_resource_len(struct pci_dev *pdev, unsigned i)
570 {
571
572 KASSERT(i < PCI_NUM_RESOURCES);
573 return pdev->pd_resources[i].size;
574 }
575
576 bus_addr_t
577 pci_resource_end(struct pci_dev *pdev, unsigned i)
578 {
579
580 return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
581 }
582
583 int
584 pci_resource_flags(struct pci_dev *pdev, unsigned i)
585 {
586
587 KASSERT(i < PCI_NUM_RESOURCES);
588 return pdev->pd_resources[i].flags;
589 }
590
591 void __pci_iomem *
592 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
593 {
594 int error;
595
596 KASSERT(i < PCI_NUM_RESOURCES);
597 KASSERT(pdev->pd_resources[i].kva == NULL);
598
599 if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
600 return NULL;
601 if (pdev->pd_resources[i].size < size)
602 return NULL;
603 error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
604 size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
605 &pdev->pd_resources[i].bsh);
606 if (error) {
607 /* Horrible hack: try asking the fake AGP device. */
608 if (!agp_i810_borrow(pdev->pd_resources[i].addr, size,
609 &pdev->pd_resources[i].bsh))
610 return NULL;
611 }
612 pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
613 pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
614 pdev->pd_resources[i].bsh);
615 pdev->pd_resources[i].mapped = true;
616
617 return pdev->pd_resources[i].kva;
618 }
619
620 void
621 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
622 {
623 unsigned i;
624
625 CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
626 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
627 if (pdev->pd_resources[i].kva == kva)
628 break;
629 }
630 KASSERT(i < PCI_NUM_RESOURCES);
631
632 pdev->pd_resources[i].kva = NULL;
633 bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
634 pdev->pd_resources[i].size);
635 }
636
637 void
638 pci_save_state(struct pci_dev *pdev)
639 {
640
641 KASSERT(pdev->pd_saved_state == NULL);
642 pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
643 KM_SLEEP);
644 pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
645 pdev->pd_saved_state);
646 }
647
648 void
649 pci_restore_state(struct pci_dev *pdev)
650 {
651
652 KASSERT(pdev->pd_saved_state != NULL);
653 pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
654 pdev->pd_saved_state);
655 kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
656 pdev->pd_saved_state = NULL;
657 }
658
659 bool
660 pci_is_pcie(struct pci_dev *pdev)
661 {
662
663 return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
664 }
665
666 bool
667 pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
668 {
669
670 /* XXX Cop-out. */
671 if (mask > DMA_BIT_MASK(32))
672 return pci_dma64_available(&pdev->pd_pa);
673 else
674 return true;
675 }
676
677 bool
678 pci_is_root_bus(struct pci_bus *bus)
679 {
680
681 /* XXX Cop-out. */
682 return false;
683 }
684
685 int
686 pci_domain_nr(struct pci_bus *bus)
687 {
688
689 return device_unit(bus->pb_dev);
690 }
691
692 /*
693 * We explicitly rename pci_enable/disable_device so that you have to
694 * review each use of them, since NetBSD's PCI API does _not_ respect
695 * our local enablecnt here, but there are different parts of NetBSD
696 * that automatically enable/disable like PMF, so you have to decide
697 * for each one whether to call it or not.
698 */
699
700 int
701 linux_pci_enable_device(struct pci_dev *pdev)
702 {
703 const struct pci_attach_args *pa = &pdev->pd_pa;
704 pcireg_t csr;
705 int s;
706
707 if (pdev->pd_enablecnt++)
708 return 0;
709
710 s = splhigh();
711 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
712 csr |= PCI_COMMAND_IO_ENABLE;
713 csr |= PCI_COMMAND_MEM_ENABLE;
714 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
715 splx(s);
716
717 return 0;
718 }
719
720 void
721 linux_pci_disable_device(struct pci_dev *pdev)
722 {
723 const struct pci_attach_args *pa = &pdev->pd_pa;
724 pcireg_t csr;
725 int s;
726
727 if (--pdev->pd_enablecnt)
728 return;
729
730 s = splhigh();
731 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
732 csr &= ~PCI_COMMAND_IO_ENABLE;
733 csr &= ~PCI_COMMAND_MEM_ENABLE;
734 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
735 splx(s);
736 }
737
738 void
739 linux_pci_dev_destroy(struct pci_dev *pdev)
740 {
741 unsigned i;
742
743 if (pdev->bus != NULL) {
744 kmem_free(pdev->bus, sizeof(*pdev->bus));
745 pdev->bus = NULL;
746 }
747 if (ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)) {
748 pci_unmap_rom(pdev, pdev->pd_rom_vaddr);
749 pdev->pd_rom_vaddr = 0;
750 }
751 for (i = 0; i < __arraycount(pdev->pd_resources); i++) {
752 if (!pdev->pd_resources[i].mapped)
753 continue;
754 bus_space_unmap(pdev->pd_resources[i].bst,
755 pdev->pd_resources[i].bsh, pdev->pd_resources[i].size);
756 }
757
758 /* There is no way these should be still in use. */
759 KASSERT(pdev->pd_saved_state == NULL);
760 KASSERT(pdev->pd_intr_handles == NULL);
761 }
762