dwc2.c revision 1.26
1 /* $NetBSD: dwc2.c,v 1.26 2014/01/03 14:41:57 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.26 2014/01/03 14:41:57 skrll Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kmem.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/cpu.h> 46 47 #include <machine/endian.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usb_mem.h> 53 54 #include <dev/usb/usbroothub_subr.h> 55 56 #include <dwc2/dwc2.h> 57 #include <dwc2/dwc2var.h> 58 59 #include "dwc2_core.h" 60 #include "dwc2_hcd.h" 61 62 #ifdef DWC2_COUNTERS 63 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 64 #else 65 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 66 #endif 67 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 68 69 #ifdef DWC2_DEBUG 70 #define DPRINTFN(n,fmt,...) do { \ 71 if (dwc2debug >= (n)) { \ 72 printf("%s: " fmt, \ 73 __FUNCTION__,## __VA_ARGS__); \ 74 } \ 75 } while (0) 76 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 77 int dwc2debug = 0; 78 #else 79 #define DPRINTF(...) do { } while (0) 80 #define DPRINTFN(...) do { } while (0) 81 #endif 82 83 Static usbd_status dwc2_open(usbd_pipe_handle); 84 Static void dwc2_poll(struct usbd_bus *); 85 Static void dwc2_softintr(void *); 86 Static void dwc2_waitintr(struct dwc2_softc *, usbd_xfer_handle); 87 88 Static usbd_status dwc2_allocm(struct usbd_bus *, usb_dma_t *, uint32_t); 89 Static void dwc2_freem(struct usbd_bus *, usb_dma_t *); 90 91 Static usbd_xfer_handle dwc2_allocx(struct usbd_bus *); 92 Static void dwc2_freex(struct usbd_bus *, usbd_xfer_handle); 93 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 94 95 Static usbd_status dwc2_root_ctrl_transfer(usbd_xfer_handle); 96 Static usbd_status dwc2_root_ctrl_start(usbd_xfer_handle); 97 Static void dwc2_root_ctrl_abort(usbd_xfer_handle); 98 Static void dwc2_root_ctrl_close(usbd_pipe_handle); 99 Static void dwc2_root_ctrl_done(usbd_xfer_handle); 100 101 Static usbd_status dwc2_root_intr_transfer(usbd_xfer_handle); 102 Static usbd_status dwc2_root_intr_start(usbd_xfer_handle); 103 Static void dwc2_root_intr_abort(usbd_xfer_handle); 104 Static void dwc2_root_intr_close(usbd_pipe_handle); 105 Static void dwc2_root_intr_done(usbd_xfer_handle); 106 107 Static usbd_status dwc2_device_ctrl_transfer(usbd_xfer_handle); 108 Static usbd_status dwc2_device_ctrl_start(usbd_xfer_handle); 109 Static void dwc2_device_ctrl_abort(usbd_xfer_handle); 110 Static void dwc2_device_ctrl_close(usbd_pipe_handle); 111 Static void dwc2_device_ctrl_done(usbd_xfer_handle); 112 113 Static usbd_status dwc2_device_bulk_transfer(usbd_xfer_handle); 114 Static usbd_status dwc2_device_bulk_start(usbd_xfer_handle); 115 Static void dwc2_device_bulk_abort(usbd_xfer_handle); 116 Static void dwc2_device_bulk_close(usbd_pipe_handle); 117 Static void dwc2_device_bulk_done(usbd_xfer_handle); 118 119 Static usbd_status dwc2_device_intr_transfer(usbd_xfer_handle); 120 Static usbd_status dwc2_device_intr_start(usbd_xfer_handle); 121 Static void dwc2_device_intr_abort(usbd_xfer_handle); 122 Static void dwc2_device_intr_close(usbd_pipe_handle); 123 Static void dwc2_device_intr_done(usbd_xfer_handle); 124 125 Static usbd_status dwc2_device_isoc_transfer(usbd_xfer_handle); 126 Static usbd_status dwc2_device_isoc_start(usbd_xfer_handle); 127 Static void dwc2_device_isoc_abort(usbd_xfer_handle); 128 Static void dwc2_device_isoc_close(usbd_pipe_handle); 129 Static void dwc2_device_isoc_done(usbd_xfer_handle); 130 131 Static usbd_status dwc2_device_start(usbd_xfer_handle); 132 133 Static void dwc2_close_pipe(usbd_pipe_handle); 134 Static void dwc2_abort_xfer(usbd_xfer_handle, usbd_status); 135 136 Static void dwc2_device_clear_toggle(usbd_pipe_handle); 137 Static void dwc2_noop(usbd_pipe_handle pipe); 138 139 Static int dwc2_interrupt(struct dwc2_softc *); 140 Static void dwc2_rhc(void *); 141 142 Static void dwc2_timeout(void *); 143 Static void dwc2_timeout_task(void *); 144 145 146 147 static inline void 148 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 149 usbd_xfer_handle xfer) 150 { 151 } 152 153 static inline void 154 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 155 usbd_xfer_handle xfer) 156 { 157 } 158 159 #define DWC2_INTR_ENDPT 1 160 161 Static const struct usbd_bus_methods dwc2_bus_methods = { 162 .open_pipe = dwc2_open, 163 .soft_intr = dwc2_softintr, 164 .do_poll = dwc2_poll, 165 .allocm = dwc2_allocm, 166 .freem = dwc2_freem, 167 .allocx = dwc2_allocx, 168 .freex = dwc2_freex, 169 .get_lock = dwc2_get_lock, 170 }; 171 172 Static const struct usbd_pipe_methods dwc2_root_ctrl_methods = { 173 .transfer = dwc2_root_ctrl_transfer, 174 .start = dwc2_root_ctrl_start, 175 .abort = dwc2_root_ctrl_abort, 176 .close = dwc2_root_ctrl_close, 177 .cleartoggle = dwc2_noop, 178 .done = dwc2_root_ctrl_done, 179 }; 180 181 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 182 .transfer = dwc2_root_intr_transfer, 183 .start = dwc2_root_intr_start, 184 .abort = dwc2_root_intr_abort, 185 .close = dwc2_root_intr_close, 186 .cleartoggle = dwc2_noop, 187 .done = dwc2_root_intr_done, 188 }; 189 190 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 191 .transfer = dwc2_device_ctrl_transfer, 192 .start = dwc2_device_ctrl_start, 193 .abort = dwc2_device_ctrl_abort, 194 .close = dwc2_device_ctrl_close, 195 .cleartoggle = dwc2_noop, 196 .done = dwc2_device_ctrl_done, 197 }; 198 199 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 200 .transfer = dwc2_device_intr_transfer, 201 .start = dwc2_device_intr_start, 202 .abort = dwc2_device_intr_abort, 203 .close = dwc2_device_intr_close, 204 .cleartoggle = dwc2_device_clear_toggle, 205 .done = dwc2_device_intr_done, 206 }; 207 208 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 209 .transfer = dwc2_device_bulk_transfer, 210 .start = dwc2_device_bulk_start, 211 .abort = dwc2_device_bulk_abort, 212 .close = dwc2_device_bulk_close, 213 .cleartoggle = dwc2_device_clear_toggle, 214 .done = dwc2_device_bulk_done, 215 }; 216 217 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 218 .transfer = dwc2_device_isoc_transfer, 219 .start = dwc2_device_isoc_start, 220 .abort = dwc2_device_isoc_abort, 221 .close = dwc2_device_isoc_close, 222 .cleartoggle = dwc2_noop, 223 .done = dwc2_device_isoc_done, 224 }; 225 226 Static usbd_status 227 dwc2_allocm(struct usbd_bus *bus, usb_dma_t *dma, uint32_t size) 228 { 229 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 230 usbd_status status; 231 232 DPRINTFN(10, "\n"); 233 234 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 235 if (status == USBD_NOMEM) 236 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 237 return status; 238 } 239 240 Static void 241 dwc2_freem(struct usbd_bus *bus, usb_dma_t *dma) 242 { 243 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 244 245 DPRINTFN(10, "\n"); 246 247 if (dma->block->flags & USB_DMA_RESERVE) { 248 usb_reserve_freem(&sc->sc_dma_reserve, dma); 249 return; 250 } 251 usb_freemem(&sc->sc_bus, dma); 252 } 253 254 usbd_xfer_handle 255 dwc2_allocx(struct usbd_bus *bus) 256 { 257 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 258 struct dwc2_xfer *dxfer; 259 260 DPRINTFN(10, "\n"); 261 262 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 263 dxfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 264 if (dxfer != NULL) { 265 memset(dxfer, 0, sizeof(*dxfer)); 266 267 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 268 DWC2_MAXISOCPACKETS, GFP_KERNEL); 269 270 #ifdef DIAGNOSTIC 271 dxfer->xfer.busy_free = XFER_BUSY; 272 #endif 273 } 274 return (usbd_xfer_handle)dxfer; 275 } 276 277 void 278 dwc2_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 279 { 280 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 281 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 282 283 DPRINTFN(10, "\n"); 284 285 #ifdef DIAGNOSTIC 286 if (xfer->busy_free != XFER_BUSY) { 287 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->busy_free); 288 } 289 xfer->busy_free = XFER_FREE; 290 #endif 291 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 292 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, DWC2_MAXISOCPACKETS); 293 pool_cache_put(sc->sc_xferpool, xfer); 294 } 295 296 Static void 297 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 298 { 299 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 300 301 *lock = &sc->sc_lock; 302 } 303 304 Static void 305 dwc2_rhc(void *addr) 306 { 307 struct dwc2_softc *sc = addr; 308 usbd_xfer_handle xfer; 309 u_char *p; 310 311 DPRINTF("\n"); 312 mutex_enter(&sc->sc_lock); 313 xfer = sc->sc_intrxfer; 314 315 if (xfer == NULL) { 316 /* Just ignore the change. */ 317 mutex_exit(&sc->sc_lock); 318 return; 319 320 } 321 /* set port bit */ 322 p = KERNADDR(&xfer->dmabuf, 0); 323 324 p[0] = 0x02; /* we only have one port (1 << 1) */ 325 326 xfer->actlen = xfer->length; 327 xfer->status = USBD_NORMAL_COMPLETION; 328 329 usb_transfer_complete(xfer); 330 mutex_exit(&sc->sc_lock); 331 } 332 333 Static void 334 dwc2_softintr(void *v) 335 { 336 struct usbd_bus *bus = v; 337 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 338 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 339 struct dwc2_xfer *dxfer; 340 341 KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock)); 342 343 mutex_spin_enter(&hsotg->lock); 344 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 345 346 KASSERTMSG(!callout_pending(&dxfer->xfer.timeout_handle), 347 "xfer %p pipe %p\n", dxfer, dxfer->xfer.pipe); 348 349 /* 350 * dwc2_abort_xfer will remove this transfer from the 351 * sc_complete queue 352 */ 353 /*XXXNH not tested */ 354 if (dxfer->xfer.hcflags & UXFER_ABORTING) { 355 cv_broadcast(&dxfer->xfer.hccv); 356 continue; 357 } 358 359 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 360 361 mutex_spin_exit(&hsotg->lock); 362 usb_transfer_complete(&dxfer->xfer); 363 mutex_spin_enter(&hsotg->lock); 364 } 365 mutex_spin_exit(&hsotg->lock); 366 } 367 368 Static void 369 dwc2_waitintr(struct dwc2_softc *sc, usbd_xfer_handle xfer) 370 { 371 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 372 uint32_t intrs; 373 int timo; 374 375 xfer->status = USBD_IN_PROGRESS; 376 for (timo = xfer->timeout; timo >= 0; timo--) { 377 usb_delay_ms(&sc->sc_bus, 1); 378 if (sc->sc_dying) 379 break; 380 intrs = dwc2_read_core_intr(hsotg); 381 382 DPRINTFN(15, "0x%08x\n", intrs); 383 384 if (intrs) { 385 mutex_spin_enter(&hsotg->lock); 386 dwc2_interrupt(sc); 387 mutex_spin_exit(&hsotg->lock); 388 if (xfer->status != USBD_IN_PROGRESS) 389 return; 390 } 391 } 392 393 /* Timeout */ 394 DPRINTF("timeout\n"); 395 396 mutex_enter(&sc->sc_lock); 397 xfer->status = USBD_TIMEOUT; 398 usb_transfer_complete(xfer); 399 mutex_exit(&sc->sc_lock); 400 } 401 402 Static void 403 dwc2_timeout(void *addr) 404 { 405 usbd_xfer_handle xfer = addr; 406 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 407 // struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 408 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 409 410 DPRINTF("dxfer=%p\n", dxfer); 411 412 if (sc->sc_dying) { 413 mutex_enter(&sc->sc_lock); 414 dwc2_abort_xfer(&dxfer->xfer, USBD_TIMEOUT); 415 mutex_exit(&sc->sc_lock); 416 return; 417 } 418 419 /* Execute the abort in a process context. */ 420 usb_init_task(&dxfer->abort_task, dwc2_timeout_task, addr, 421 USB_TASKQ_MPSAFE); 422 usb_add_task(dxfer->xfer.pipe->device, &dxfer->abort_task, 423 USB_TASKQ_HC); 424 } 425 426 Static void 427 dwc2_timeout_task(void *addr) 428 { 429 usbd_xfer_handle xfer = addr; 430 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 431 432 DPRINTF("xfer=%p\n", xfer); 433 434 mutex_enter(&sc->sc_lock); 435 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 436 mutex_exit(&sc->sc_lock); 437 } 438 439 usbd_status 440 dwc2_open(usbd_pipe_handle pipe) 441 { 442 usbd_device_handle dev = pipe->device; 443 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 444 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 445 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 446 uint8_t addr = dev->address; 447 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 448 usbd_status err; 449 450 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 451 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 452 453 if (sc->sc_dying) { 454 return USBD_IOERROR; 455 } 456 457 if (addr == sc->sc_addr) { 458 switch (ed->bEndpointAddress) { 459 case USB_CONTROL_ENDPOINT: 460 pipe->methods = &dwc2_root_ctrl_methods; 461 break; 462 case UE_DIR_IN | DWC2_INTR_ENDPT: 463 pipe->methods = &dwc2_root_intr_methods; 464 break; 465 default: 466 DPRINTF("bad bEndpointAddress 0x%02x\n", 467 ed->bEndpointAddress); 468 return USBD_INVAL; 469 } 470 DPRINTF("root hub pipe open\n"); 471 return USBD_NORMAL_COMPLETION; 472 } 473 474 switch (xfertype) { 475 case UE_CONTROL: 476 pipe->methods = &dwc2_device_ctrl_methods; 477 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 478 0, &dpipe->req_dma); 479 if (err) 480 return err; 481 break; 482 case UE_INTERRUPT: 483 pipe->methods = &dwc2_device_intr_methods; 484 break; 485 case UE_ISOCHRONOUS: 486 pipe->methods = &dwc2_device_isoc_methods; 487 break; 488 case UE_BULK: 489 pipe->methods = &dwc2_device_bulk_methods; 490 break; 491 default: 492 DPRINTF("bad xfer type %d\n", xfertype); 493 return USBD_INVAL; 494 } 495 496 dpipe->priv = NULL; /* QH */ 497 498 return USBD_NORMAL_COMPLETION; 499 } 500 501 Static void 502 dwc2_poll(struct usbd_bus *bus) 503 { 504 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 505 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 506 507 mutex_spin_enter(&hsotg->lock); 508 dwc2_interrupt(sc); 509 mutex_spin_exit(&hsotg->lock); 510 } 511 512 /* 513 * Close a reqular pipe. 514 * Assumes that there are no pending transactions. 515 */ 516 Static void 517 dwc2_close_pipe(usbd_pipe_handle pipe) 518 { 519 #ifdef DIAGNOSTIC 520 struct dwc2_softc *sc = pipe->device->bus->hci_private; 521 #endif 522 523 KASSERT(mutex_owned(&sc->sc_lock)); 524 } 525 526 /* 527 * Abort a device request. 528 */ 529 Static void 530 dwc2_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 531 { 532 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 533 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 534 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 535 struct dwc2_xfer *d, *tmp; 536 bool wake; 537 int err; 538 539 DPRINTF("xfer=%p\n", xfer); 540 541 KASSERT(mutex_owned(&sc->sc_lock)); 542 KASSERT(!cpu_intr_p() && !cpu_softintr_p()); 543 544 if (sc->sc_dying) { 545 xfer->status = status; 546 callout_stop(&xfer->timeout_handle); 547 usb_transfer_complete(xfer); 548 return; 549 } 550 551 /* 552 * If an abort is already in progress then just wait for it to 553 * complete and return. 554 */ 555 if (xfer->hcflags & UXFER_ABORTING) { 556 xfer->status = status; 557 xfer->hcflags |= UXFER_ABORTWAIT; 558 while (xfer->hcflags & UXFER_ABORTING) 559 cv_wait(&xfer->hccv, &sc->sc_lock); 560 return; 561 } 562 563 /* 564 * Step 1: Make the stack ignore it and stop the callout. 565 */ 566 mutex_spin_enter(&hsotg->lock); 567 xfer->hcflags |= UXFER_ABORTING; 568 569 xfer->status = status; /* make software ignore it */ 570 callout_stop(&xfer->timeout_handle); 571 572 /* XXXNH suboptimal */ 573 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 574 if (d == dxfer) { 575 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 576 } 577 } 578 579 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 580 if (err) { 581 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 582 } 583 584 mutex_spin_exit(&hsotg->lock); 585 586 /* 587 * Step 2: Execute callback. 588 */ 589 wake = xfer->hcflags & UXFER_ABORTWAIT; 590 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 591 592 usb_transfer_complete(xfer); 593 if (wake) { 594 cv_broadcast(&xfer->hccv); 595 } 596 } 597 598 Static void 599 dwc2_noop(usbd_pipe_handle pipe) 600 { 601 602 } 603 604 Static void 605 dwc2_device_clear_toggle(usbd_pipe_handle pipe) 606 { 607 608 DPRINTF("toggle %d -> 0", pipe->endpoint->datatoggle); 609 } 610 611 /***********************************************************************/ 612 613 /* 614 * Data structures and routines to emulate the root hub. 615 */ 616 617 Static const usb_device_descriptor_t dwc2_devd = { 618 .bLength = sizeof(usb_device_descriptor_t), 619 .bDescriptorType = UDESC_DEVICE, 620 .bcdUSB = {0x00, 0x02}, 621 .bDeviceClass = UDCLASS_HUB, 622 .bDeviceSubClass = UDSUBCLASS_HUB, 623 .bDeviceProtocol = UDPROTO_HSHUBSTT, 624 .bMaxPacketSize = 64, 625 .bcdDevice = {0x00, 0x01}, 626 .iManufacturer = 1, 627 .iProduct = 2, 628 .bNumConfigurations = 1, 629 }; 630 631 struct dwc2_config_desc { 632 usb_config_descriptor_t confd; 633 usb_interface_descriptor_t ifcd; 634 usb_endpoint_descriptor_t endpd; 635 } __packed; 636 637 Static const struct dwc2_config_desc dwc2_confd = { 638 .confd = { 639 .bLength = USB_CONFIG_DESCRIPTOR_SIZE, 640 .bDescriptorType = UDESC_CONFIG, 641 .wTotalLength[0] = sizeof(dwc2_confd), 642 .bNumInterface = 1, 643 .bConfigurationValue = 1, 644 .iConfiguration = 0, 645 .bmAttributes = UC_SELF_POWERED, 646 .bMaxPower = 0, 647 }, 648 .ifcd = { 649 .bLength = USB_INTERFACE_DESCRIPTOR_SIZE, 650 .bDescriptorType = UDESC_INTERFACE, 651 .bInterfaceNumber = 0, 652 .bAlternateSetting = 0, 653 .bNumEndpoints = 1, 654 .bInterfaceClass = UICLASS_HUB, 655 .bInterfaceSubClass = UISUBCLASS_HUB, 656 .bInterfaceProtocol = UIPROTO_HSHUBSTT, 657 .iInterface = 0 658 }, 659 .endpd = { 660 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 661 .bDescriptorType = UDESC_ENDPOINT, 662 .bEndpointAddress = UE_DIR_IN | DWC2_INTR_ENDPT, 663 .bmAttributes = UE_INTERRUPT, 664 .wMaxPacketSize = {8, 0}, /* max packet */ 665 .bInterval = 255, 666 }, 667 }; 668 669 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) } 670 Static const usb_hub_descriptor_t dwc2_hubd = { 671 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 672 .bDescriptorType = UDESC_HUB, 673 .bNbrPorts = 1, 674 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)), 675 .bPwrOn2PwrGood = 50, 676 .bHubContrCurrent = 0, 677 .DeviceRemovable = {0}, /* port is removable */ 678 }; 679 680 Static usbd_status 681 dwc2_root_ctrl_transfer(usbd_xfer_handle xfer) 682 { 683 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 684 usbd_status err; 685 686 mutex_enter(&sc->sc_lock); 687 err = usb_insert_transfer(xfer); 688 mutex_exit(&sc->sc_lock); 689 if (err) 690 return err; 691 692 return dwc2_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 693 } 694 695 Static usbd_status 696 dwc2_root_ctrl_start(usbd_xfer_handle xfer) 697 { 698 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 699 usb_device_request_t *req; 700 uint8_t *buf; 701 uint16_t len; 702 int value, index, l, totlen; 703 usbd_status err = USBD_IOERROR; 704 705 if (sc->sc_dying) 706 return USBD_IOERROR; 707 708 req = &xfer->request; 709 710 DPRINTFN(4, "type=0x%02x request=%02x\n", 711 req->bmRequestType, req->bRequest); 712 713 len = UGETW(req->wLength); 714 value = UGETW(req->wValue); 715 index = UGETW(req->wIndex); 716 717 buf = len ? KERNADDR(&xfer->dmabuf, 0) : NULL; 718 719 totlen = 0; 720 721 #define C(x,y) ((x) | ((y) << 8)) 722 switch (C(req->bRequest, req->bmRequestType)) { 723 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 724 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 725 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 726 /* 727 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 728 * for the integrated root hub. 729 */ 730 break; 731 case C(UR_GET_CONFIG, UT_READ_DEVICE): 732 if (len > 0) { 733 *buf = sc->sc_conf; 734 totlen = 1; 735 } 736 break; 737 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 738 DPRINTFN(8, "wValue=0x%04x\n", value); 739 740 if (len == 0) 741 break; 742 switch (value) { 743 case C(0, UDESC_DEVICE): 744 l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 745 // USETW(dwc2_devd.idVendor, sc->sc_id_vendor); 746 memcpy(buf, &dwc2_devd, l); 747 buf += l; 748 len -= l; 749 totlen += l; 750 751 break; 752 case C(0, UDESC_CONFIG): 753 l = min(len, sizeof(dwc2_confd)); 754 memcpy(buf, &dwc2_confd, l); 755 buf += l; 756 len -= l; 757 totlen += l; 758 759 break; 760 #define sd ((usb_string_descriptor_t *)buf) 761 case C(0, UDESC_STRING): 762 totlen = usb_makelangtbl(sd, len); 763 break; 764 case C(1, UDESC_STRING): 765 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 766 break; 767 case C(2, UDESC_STRING): 768 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 769 break; 770 #undef sd 771 default: 772 goto fail; 773 } 774 break; 775 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 776 if (len > 0) { 777 *buf = 0; 778 totlen = 1; 779 } 780 break; 781 case C(UR_GET_STATUS, UT_READ_DEVICE): 782 if (len > 1) { 783 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 784 totlen = 2; 785 } 786 break; 787 case C(UR_GET_STATUS, UT_READ_INTERFACE): 788 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 789 if (len > 1) { 790 USETW(((usb_status_t *)buf)->wStatus, 0); 791 totlen = 2; 792 } 793 break; 794 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 795 DPRINTF("UR_SET_ADDRESS, UT_WRITE_DEVICE: addr %d\n", 796 value); 797 if (value >= USB_MAX_DEVICES) 798 goto fail; 799 800 sc->sc_addr = value; 801 break; 802 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 803 if (value != 0 && value != 1) 804 goto fail; 805 806 sc->sc_conf = value; 807 break; 808 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 809 break; 810 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 811 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 812 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 813 err = USBD_IOERROR; 814 goto fail; 815 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 816 break; 817 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 818 break; 819 default: 820 /* Hub requests - XXXNH len check? */ 821 err = dwc2_hcd_hub_control(sc->sc_hsotg, 822 C(req->bRequest, req->bmRequestType), value, index, 823 buf, len); 824 if (err) { 825 err = USBD_IOERROR; 826 goto fail; 827 } 828 totlen = len; 829 } 830 xfer->actlen = totlen; 831 err = USBD_NORMAL_COMPLETION; 832 833 fail: 834 mutex_enter(&sc->sc_lock); 835 xfer->status = err; 836 usb_transfer_complete(xfer); 837 mutex_exit(&sc->sc_lock); 838 839 return USBD_IN_PROGRESS; 840 } 841 842 Static void 843 dwc2_root_ctrl_abort(usbd_xfer_handle xfer) 844 { 845 DPRINTFN(10, "\n"); 846 847 /* Nothing to do, all transfers are synchronous. */ 848 } 849 850 Static void 851 dwc2_root_ctrl_close(usbd_pipe_handle pipe) 852 { 853 DPRINTFN(10, "\n"); 854 855 /* Nothing to do. */ 856 } 857 858 Static void 859 dwc2_root_ctrl_done(usbd_xfer_handle xfer) 860 { 861 DPRINTFN(10, "\n"); 862 863 /* Nothing to do. */ 864 } 865 866 Static usbd_status 867 dwc2_root_intr_transfer(usbd_xfer_handle xfer) 868 { 869 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 870 usbd_status err; 871 872 DPRINTF("\n"); 873 874 /* Insert last in queue. */ 875 mutex_enter(&sc->sc_lock); 876 err = usb_insert_transfer(xfer); 877 mutex_exit(&sc->sc_lock); 878 if (err) 879 return err; 880 881 /* Pipe isn't running, start first */ 882 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 883 } 884 885 Static usbd_status 886 dwc2_root_intr_start(usbd_xfer_handle xfer) 887 { 888 struct dwc2_softc *sc = DWC2_PIPE2SC(xfer); 889 890 DPRINTF("\n"); 891 892 if (sc->sc_dying) 893 return USBD_IOERROR; 894 895 mutex_enter(&sc->sc_lock); 896 KASSERT(sc->sc_intrxfer == NULL); 897 sc->sc_intrxfer = xfer; 898 mutex_exit(&sc->sc_lock); 899 900 return USBD_IN_PROGRESS; 901 } 902 903 /* Abort a root interrupt request. */ 904 Static void 905 dwc2_root_intr_abort(usbd_xfer_handle xfer) 906 { 907 #ifdef DIAGNOSTIC 908 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 909 #endif 910 DPRINTF("xfer=%p\n", xfer); 911 912 KASSERT(mutex_owned(&sc->sc_lock)); 913 914 if (xfer->pipe->intrxfer == xfer) { 915 DPRINTF("remove\n"); 916 xfer->pipe->intrxfer = NULL; 917 } 918 xfer->status = USBD_CANCELLED; 919 usb_transfer_complete(xfer); 920 } 921 922 Static void 923 dwc2_root_intr_close(usbd_pipe_handle pipe) 924 { 925 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 926 927 DPRINTF("\n"); 928 929 KASSERT(mutex_owned(&sc->sc_lock)); 930 931 sc->sc_intrxfer = NULL; 932 } 933 934 Static void 935 dwc2_root_intr_done(usbd_xfer_handle xfer) 936 { 937 938 DPRINTF("\n"); 939 } 940 941 /***********************************************************************/ 942 943 Static usbd_status 944 dwc2_device_ctrl_transfer(usbd_xfer_handle xfer) 945 { 946 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 947 usbd_status err; 948 949 DPRINTF("\n"); 950 951 /* Insert last in queue. */ 952 mutex_enter(&sc->sc_lock); 953 err = usb_insert_transfer(xfer); 954 mutex_exit(&sc->sc_lock); 955 if (err) 956 return err; 957 958 /* Pipe isn't running, start first */ 959 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 960 } 961 962 Static usbd_status 963 dwc2_device_ctrl_start(usbd_xfer_handle xfer) 964 { 965 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 966 usbd_status err; 967 968 DPRINTF("\n"); 969 970 mutex_enter(&sc->sc_lock); 971 xfer->status = USBD_IN_PROGRESS; 972 err = dwc2_device_start(xfer); 973 mutex_exit(&sc->sc_lock); 974 975 if (err) 976 return err; 977 978 if (sc->sc_bus.use_polling) 979 dwc2_waitintr(sc, xfer); 980 981 return USBD_IN_PROGRESS; 982 } 983 984 Static void 985 dwc2_device_ctrl_abort(usbd_xfer_handle xfer) 986 { 987 #ifdef DIAGNOSTIC 988 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 989 #endif 990 KASSERT(mutex_owned(&sc->sc_lock)); 991 992 DPRINTF("xfer=%p\n", xfer); 993 dwc2_abort_xfer(xfer, USBD_CANCELLED); 994 } 995 996 Static void 997 dwc2_device_ctrl_close(usbd_pipe_handle pipe) 998 { 999 1000 DPRINTF("pipe=%p\n", pipe); 1001 dwc2_close_pipe(pipe); 1002 } 1003 1004 Static void 1005 dwc2_device_ctrl_done(usbd_xfer_handle xfer) 1006 { 1007 1008 DPRINTF("xfer=%p\n", xfer); 1009 } 1010 1011 /***********************************************************************/ 1012 1013 Static usbd_status 1014 dwc2_device_bulk_transfer(usbd_xfer_handle xfer) 1015 { 1016 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1017 usbd_status err; 1018 1019 DPRINTF("xfer=%p\n", xfer); 1020 1021 /* Insert last in queue. */ 1022 mutex_enter(&sc->sc_lock); 1023 err = usb_insert_transfer(xfer); 1024 mutex_exit(&sc->sc_lock); 1025 if (err) 1026 return err; 1027 1028 /* Pipe isn't running, start first */ 1029 return dwc2_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1030 } 1031 1032 Static usbd_status 1033 dwc2_device_bulk_start(usbd_xfer_handle xfer) 1034 { 1035 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1036 usbd_status err; 1037 1038 DPRINTF("xfer=%p\n", xfer); 1039 mutex_enter(&sc->sc_lock); 1040 xfer->status = USBD_IN_PROGRESS; 1041 err = dwc2_device_start(xfer); 1042 mutex_exit(&sc->sc_lock); 1043 1044 return err; 1045 } 1046 1047 Static void 1048 dwc2_device_bulk_abort(usbd_xfer_handle xfer) 1049 { 1050 #ifdef DIAGNOSTIC 1051 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1052 #endif 1053 KASSERT(mutex_owned(&sc->sc_lock)); 1054 1055 DPRINTF("xfer=%p\n", xfer); 1056 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1057 } 1058 1059 Static void 1060 dwc2_device_bulk_close(usbd_pipe_handle pipe) 1061 { 1062 1063 DPRINTF("pipe=%p\n", pipe); 1064 1065 dwc2_close_pipe(pipe); 1066 } 1067 1068 Static void 1069 dwc2_device_bulk_done(usbd_xfer_handle xfer) 1070 { 1071 1072 DPRINTF("xfer=%p\n", xfer); 1073 } 1074 1075 /***********************************************************************/ 1076 1077 Static usbd_status 1078 dwc2_device_intr_transfer(usbd_xfer_handle xfer) 1079 { 1080 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1081 usbd_status err; 1082 1083 DPRINTF("xfer=%p\n", xfer); 1084 1085 /* Insert last in queue. */ 1086 mutex_enter(&sc->sc_lock); 1087 err = usb_insert_transfer(xfer); 1088 mutex_exit(&sc->sc_lock); 1089 if (err) 1090 return err; 1091 1092 /* Pipe isn't running, start first */ 1093 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1094 } 1095 1096 Static usbd_status 1097 dwc2_device_intr_start(usbd_xfer_handle xfer) 1098 { 1099 struct dwc2_pipe *dpipe = (struct dwc2_pipe *)xfer->pipe; 1100 usbd_device_handle dev = dpipe->pipe.device; 1101 struct dwc2_softc *sc = dev->bus->hci_private; 1102 usbd_status err; 1103 1104 mutex_enter(&sc->sc_lock); 1105 xfer->status = USBD_IN_PROGRESS; 1106 err = dwc2_device_start(xfer); 1107 mutex_exit(&sc->sc_lock); 1108 1109 if (err) 1110 return err; 1111 1112 if (sc->sc_bus.use_polling) 1113 dwc2_waitintr(sc, xfer); 1114 1115 return USBD_IN_PROGRESS; 1116 } 1117 1118 /* Abort a device interrupt request. */ 1119 Static void 1120 dwc2_device_intr_abort(usbd_xfer_handle xfer) 1121 { 1122 #ifdef DIAGNOSTIC 1123 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1124 #endif 1125 1126 KASSERT(mutex_owned(&sc->sc_lock)); 1127 1128 if (xfer->pipe->intrxfer == xfer) { 1129 DPRINTF("remove\n"); 1130 xfer->pipe->intrxfer = NULL; 1131 } 1132 DPRINTF("xfer=%p\n", xfer); 1133 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1134 } 1135 1136 Static void 1137 dwc2_device_intr_close(usbd_pipe_handle pipe) 1138 { 1139 1140 DPRINTF("pipe=%p\n", pipe); 1141 1142 dwc2_close_pipe(pipe); 1143 } 1144 1145 Static void 1146 dwc2_device_intr_done(usbd_xfer_handle xfer) 1147 { 1148 1149 DPRINTF("\n"); 1150 1151 if (xfer->pipe->repeat) { 1152 xfer->status = USBD_IN_PROGRESS; 1153 dwc2_device_start(xfer); 1154 } 1155 } 1156 1157 /***********************************************************************/ 1158 1159 usbd_status 1160 dwc2_device_isoc_transfer(usbd_xfer_handle xfer) 1161 { 1162 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1163 usbd_status err; 1164 1165 DPRINTF("xfer=%p\n", xfer); 1166 1167 /* Insert last in queue. */ 1168 mutex_enter(&sc->sc_lock); 1169 err = usb_insert_transfer(xfer); 1170 mutex_exit(&sc->sc_lock); 1171 if (err) 1172 return err; 1173 1174 /* Pipe isn't running, start first */ 1175 return dwc2_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1176 } 1177 1178 usbd_status 1179 dwc2_device_isoc_start(usbd_xfer_handle xfer) 1180 { 1181 struct dwc2_pipe *dpipe = (struct dwc2_pipe *)xfer->pipe; 1182 usbd_device_handle dev = dpipe->pipe.device; 1183 struct dwc2_softc *sc = dev->bus->hci_private; 1184 usbd_status err; 1185 1186 mutex_enter(&sc->sc_lock); 1187 xfer->status = USBD_IN_PROGRESS; 1188 err = dwc2_device_start(xfer); 1189 mutex_exit(&sc->sc_lock); 1190 1191 if (sc->sc_bus.use_polling) 1192 dwc2_waitintr(sc, xfer); 1193 1194 return err; 1195 } 1196 1197 void 1198 dwc2_device_isoc_abort(usbd_xfer_handle xfer) 1199 { 1200 #ifdef DIAGNOSTIC 1201 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1202 #endif 1203 KASSERT(mutex_owned(&sc->sc_lock)); 1204 1205 DPRINTF("xfer=%p\n", xfer); 1206 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1207 } 1208 1209 void 1210 dwc2_device_isoc_close(usbd_pipe_handle pipe) 1211 { 1212 DPRINTF("\n"); 1213 1214 dwc2_close_pipe(pipe); 1215 } 1216 1217 void 1218 dwc2_device_isoc_done(usbd_xfer_handle xfer) 1219 { 1220 1221 DPRINTF("\n"); 1222 } 1223 1224 1225 usbd_status 1226 dwc2_device_start(usbd_xfer_handle xfer) 1227 { 1228 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1229 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1230 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1231 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1232 struct dwc2_hcd_urb *dwc2_urb; 1233 1234 usbd_device_handle dev = xfer->pipe->device; 1235 usb_endpoint_descriptor_t *ed = xfer->pipe->endpoint->edesc; 1236 uint8_t addr = dev->address; 1237 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1238 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 1239 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 1240 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 1241 uint32_t len; 1242 1243 uint32_t flags = 0; 1244 uint32_t off = 0; 1245 int retval, err = USBD_IN_PROGRESS; 1246 int alloc_bandwidth = 0; 1247 int i; 1248 1249 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->pipe); 1250 1251 if (xfertype == UE_ISOCHRONOUS || 1252 xfertype == UE_INTERRUPT) { 1253 mutex_spin_enter(&hsotg->lock); 1254 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 1255 alloc_bandwidth = 1; 1256 mutex_spin_exit(&hsotg->lock); 1257 } 1258 1259 /* 1260 * For Control pipe the direction is from the request, all other 1261 * transfers have been set correctly at pipe open time. 1262 */ 1263 if (xfertype == UE_CONTROL) { 1264 usb_device_request_t *req = &xfer->request; 1265 1266 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 1267 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 1268 "mps=%d\n", 1269 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 1270 UGETW(req->wIndex), UGETW(req->wLength), dev->address, 1271 epnum, dir == UT_READ ? "in" :"out", dev->speed, mps); 1272 1273 /* Copy request packet to our DMA buffer */ 1274 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 1275 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 1276 BUS_DMASYNC_PREWRITE); 1277 len = UGETW(req->wLength); 1278 if ((req->bmRequestType & UT_READ) == UT_READ) { 1279 dir = UE_DIR_IN; 1280 } else { 1281 dir = UE_DIR_OUT; 1282 } 1283 1284 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 1285 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 1286 len, dir == UE_DIR_IN ? "in" : "out"); 1287 } else { 1288 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 1289 " mps=%d dir %s\n", xfer, xfer->length, xfer->flags, addr, 1290 epnum, mps, dir == UT_READ ? "in" :"out"); 1291 1292 len = xfer->length; 1293 } 1294 1295 dwc2_urb = dxfer->urb; 1296 if (!dwc2_urb) 1297 return USBD_NOMEM; 1298 1299 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1300 sizeof(dwc2_urb->iso_descs[0]) * DWC2_MAXISOCPACKETS); 1301 1302 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1303 mps); 1304 1305 if (xfertype == UE_CONTROL) { 1306 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1307 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1308 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1309 } else { 1310 /* XXXNH - % mps required? */ 1311 if ((xfer->flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1312 flags |= URB_SEND_ZERO_PACKET; 1313 } 1314 flags |= URB_GIVEBACK_ASAP; 1315 1316 /* 1317 * control transfers with no data phase don't touch usbdma, but 1318 * everything else does. 1319 */ 1320 if (!(xfertype == UE_CONTROL && len == 0)) { 1321 dwc2_urb->usbdma = &xfer->dmabuf; 1322 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1323 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1324 } 1325 dwc2_urb->length = len; 1326 dwc2_urb->flags = flags; 1327 dwc2_urb->status = -EINPROGRESS; 1328 dwc2_urb->packet_count = xfer->nframes; 1329 1330 if (xfertype == UE_INTERRUPT || 1331 xfertype == UE_ISOCHRONOUS) { 1332 uint16_t ival; 1333 1334 if (xfertype == UE_INTERRUPT && 1335 dpipe->pipe.interval != USBD_DEFAULT_INTERVAL) { 1336 ival = dpipe->pipe.interval; 1337 } else { 1338 ival = ed->bInterval; 1339 } 1340 1341 if (ival < 1) { 1342 retval = -ENODEV; 1343 goto fail; 1344 } 1345 if (dev->speed == USB_SPEED_HIGH || 1346 (dev->speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1347 if (ival > 16) { 1348 /* 1349 * illegal with HS/FS, but there were 1350 * documentation bugs in the spec 1351 */ 1352 ival = 256; 1353 } else { 1354 ival = (1 << (ival - 1)); 1355 } 1356 } else { 1357 if (xfertype == UE_INTERRUPT && ival < 10) 1358 ival = 10; 1359 } 1360 dwc2_urb->interval = ival; 1361 } 1362 1363 /* XXXNH bring down from callers?? */ 1364 // mutex_enter(&sc->sc_lock); 1365 1366 xfer->actlen = 0; 1367 1368 KASSERT(xfertype != UE_ISOCHRONOUS || 1369 xfer->nframes < DWC2_MAXISOCPACKETS); 1370 KASSERTMSG(xfer->nframes == 0 || xfertype == UE_ISOCHRONOUS, 1371 "nframes %d xfertype %d\n", xfer->nframes, xfertype); 1372 1373 for (off = i = 0; i < xfer->nframes; ++i) { 1374 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1375 off, xfer->frlengths[i]); 1376 1377 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1378 xfer->frlengths[i]); 1379 off += xfer->frlengths[i]; 1380 } 1381 1382 /* might need to check cpu_intr_p */ 1383 mutex_spin_enter(&hsotg->lock); 1384 1385 if (xfer->timeout && !sc->sc_bus.use_polling) { 1386 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1387 dwc2_timeout, xfer); 1388 } 1389 1390 dwc2_urb->priv = xfer; 1391 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, &dpipe->priv, 0); 1392 if (retval) 1393 goto fail; 1394 1395 if (alloc_bandwidth) { 1396 dwc2_allocate_bus_bandwidth(hsotg, 1397 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1398 xfer); 1399 } 1400 1401 fail: 1402 mutex_spin_exit(&hsotg->lock); 1403 1404 // mutex_exit(&sc->sc_lock); 1405 1406 switch (retval) { 1407 case 0: 1408 break; 1409 case -ENODEV: 1410 err = USBD_INVAL; 1411 break; 1412 case -ENOMEM: 1413 err = USBD_NOMEM; 1414 break; 1415 default: 1416 err = USBD_IOERROR; 1417 } 1418 1419 return err; 1420 1421 } 1422 1423 void 1424 dwc2_worker(struct work *wk, void *priv) 1425 { 1426 struct dwc2_softc *sc = priv; 1427 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1428 1429 Debugger(); 1430 #if 0 1431 usbd_xfer_handle xfer = dwork->xfer; 1432 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1433 1434 dwc2_hcd_endpoint_disable(sc->dwc_dev.hcd, dpipe->priv, 250); 1435 dwc_free(NULL, dpipe->urb); 1436 #endif 1437 1438 mutex_enter(&sc->sc_lock); 1439 if (wk == &hsotg->wf_otg) { 1440 dwc2_conn_id_status_change(wk); 1441 } else if (wk == &hsotg->start_work.work) { 1442 dwc2_hcd_start_func(wk); 1443 } else if (wk == &hsotg->reset_work.work) { 1444 dwc2_hcd_reset_func(wk); 1445 } else { 1446 #if 0 1447 KASSERT(dwork->xfer != NULL); 1448 KASSERT(dxfer->queued == true); 1449 1450 if (!(xfer->hcflags & UXFER_ABORTING)) { 1451 dwc2_start_standard_chain(xfer); 1452 } 1453 dxfer->queued = false; 1454 cv_broadcast(&xfer->hccv); 1455 #endif 1456 } 1457 mutex_exit(&sc->sc_lock); 1458 } 1459 1460 int dwc2_intr(void *p) 1461 { 1462 struct dwc2_softc *sc = p; 1463 struct dwc2_hsotg *hsotg; 1464 int ret = 0; 1465 1466 if (sc == NULL) 1467 return 0; 1468 1469 hsotg = sc->sc_hsotg; 1470 mutex_spin_enter(&hsotg->lock); 1471 1472 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1473 goto done; 1474 1475 if (sc->sc_bus.use_polling) { 1476 uint32_t intrs; 1477 1478 intrs = dwc2_read_core_intr(hsotg); 1479 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1480 } else { 1481 ret = dwc2_interrupt(sc); 1482 } 1483 1484 done: 1485 mutex_spin_exit(&hsotg->lock); 1486 1487 return ret; 1488 } 1489 1490 int 1491 dwc2_interrupt(struct dwc2_softc *sc) 1492 { 1493 int ret = 0; 1494 1495 if (sc->sc_hcdenabled) { 1496 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1497 } 1498 1499 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1500 1501 return ret; 1502 } 1503 1504 /***********************************************************************/ 1505 1506 int 1507 dwc2_detach(struct dwc2_softc *sc, int flags) 1508 { 1509 int rv = 0; 1510 1511 if (sc->sc_child != NULL) 1512 rv = config_detach(sc->sc_child, flags); 1513 1514 return rv; 1515 } 1516 1517 bool 1518 dwc2_shutdown(device_t self, int flags) 1519 { 1520 struct dwc2_softc *sc = device_private(self); 1521 1522 sc = sc; 1523 1524 return true; 1525 } 1526 1527 void 1528 dwc2_childdet(device_t self, device_t child) 1529 { 1530 struct dwc2_softc *sc = device_private(self); 1531 1532 sc = sc; 1533 } 1534 1535 int 1536 dwc2_activate(device_t self, enum devact act) 1537 { 1538 struct dwc2_softc *sc = device_private(self); 1539 1540 sc = sc; 1541 1542 return 0; 1543 } 1544 1545 bool 1546 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1547 { 1548 struct dwc2_softc *sc = device_private(dv); 1549 1550 sc = sc; 1551 1552 return true; 1553 } 1554 1555 bool 1556 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1557 { 1558 struct dwc2_softc *sc = device_private(dv); 1559 1560 sc = sc; 1561 1562 return true; 1563 } 1564 1565 /***********************************************************************/ 1566 int 1567 dwc2_init(struct dwc2_softc *sc) 1568 { 1569 int err = 0; 1570 1571 sc->sc_bus.hci_private = sc; 1572 sc->sc_bus.usbrev = USBREV_2_0; 1573 sc->sc_bus.methods = &dwc2_bus_methods; 1574 sc->sc_bus.pipe_size = sizeof(struct dwc2_pipe); 1575 sc->sc_hcdenabled = false; 1576 1577 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1578 1579 TAILQ_INIT(&sc->sc_complete); 1580 1581 sc->sc_rhc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 1582 dwc2_rhc, sc); 1583 1584 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 1585 USB_MEM_RESERVE); 1586 1587 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1588 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1589 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1590 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1591 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1592 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1593 1594 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1595 if (sc->sc_hsotg == NULL) { 1596 err = ENOMEM; 1597 goto fail1; 1598 } 1599 1600 sc->sc_hsotg->hsotg_sc = sc; 1601 sc->sc_hsotg->dev = sc->sc_dev; 1602 sc->sc_hcdenabled = true; 1603 1604 err = dwc2_hcd_init(sc->sc_hsotg, sc->sc_params); 1605 if (err) { 1606 err = -err; 1607 goto fail2; 1608 } 1609 1610 return 0; 1611 1612 fail2: 1613 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1614 fail1: 1615 softint_disestablish(sc->sc_rhc_si); 1616 1617 return err; 1618 } 1619 1620 #if 0 1621 /* 1622 * curmode is a mode indication bit 0 = device, 1 = host 1623 */ 1624 static const char * const intnames[32] = { 1625 "curmode", "modemis", "otgint", "sof", 1626 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1627 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1628 "usbrst", "enumdone", "isooutdrop", "eopf", 1629 "restore_done", "epmis", "iepint", "oepint", 1630 "incompisoin", "incomplp", "fetsusp", "resetdet", 1631 "prtint", "hchint", "ptxfemp", "lpm", 1632 "conidstschng", "disconnint", "sessreqint", "wkupint" 1633 }; 1634 1635 1636 /***********************************************************************/ 1637 1638 #endif 1639 1640 1641 void 1642 dw_callout(void *arg) 1643 { 1644 struct delayed_work *dw = arg; 1645 1646 workqueue_enqueue(dw->dw_wq, &dw->work, NULL); 1647 } 1648 1649 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1650 int *hub_port) 1651 { 1652 usbd_xfer_handle xfer = context; 1653 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1654 usbd_device_handle dev = dpipe->pipe.device; 1655 1656 *hub_addr = dev->myhsport->parent->address; 1657 *hub_port = dev->myhsport->portno; 1658 } 1659 1660 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1661 { 1662 usbd_xfer_handle xfer = context; 1663 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1664 usbd_device_handle dev = dpipe->pipe.device; 1665 1666 return dev->speed; 1667 } 1668 1669 /* 1670 * Sets the final status of an URB and returns it to the upper layer. Any 1671 * required cleanup of the URB is performed. 1672 * 1673 * Must be called with interrupt disabled and spinlock held 1674 */ 1675 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1676 int status) 1677 { 1678 usbd_xfer_handle xfer; 1679 struct dwc2_xfer *dxfer; 1680 struct dwc2_softc *sc; 1681 usb_endpoint_descriptor_t *ed; 1682 uint8_t xfertype; 1683 1684 if (!qtd) { 1685 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1686 return; 1687 } 1688 1689 if (!qtd->urb) { 1690 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1691 return; 1692 } 1693 1694 xfer = qtd->urb->priv; 1695 if (!xfer) { 1696 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1697 return; 1698 } 1699 1700 dxfer = DWC2_XFER2DXFER(xfer); 1701 sc = DWC2_XFER2SC(xfer); 1702 ed = xfer->pipe->endpoint->edesc; 1703 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1704 1705 xfer->actlen = dwc2_hcd_urb_get_actual_length(qtd->urb); 1706 1707 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->actlen); 1708 1709 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1710 int i; 1711 1712 for (i = 0; i < xfer->nframes; i++) 1713 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1714 i, qtd->urb->iso_descs[i].status); 1715 } 1716 1717 if (xfertype == UE_ISOCHRONOUS) { 1718 int i; 1719 1720 xfer->actlen = 0; 1721 for (i = 0; i < xfer->nframes; ++i) { 1722 xfer->frlengths[i] = 1723 dwc2_hcd_urb_get_iso_desc_actual_length( 1724 qtd->urb, i); 1725 xfer->actlen += xfer->frlengths[i]; 1726 } 1727 } 1728 1729 if (!status) { 1730 if (!(xfer->flags & USBD_SHORT_XFER_OK) && 1731 xfer->actlen < xfer->length) 1732 status = -EIO; 1733 } 1734 1735 switch (status) { 1736 case 0: 1737 xfer->status = USBD_NORMAL_COMPLETION; 1738 break; 1739 case -EPIPE: 1740 xfer->status = USBD_STALLED; 1741 break; 1742 case -ETIMEDOUT: 1743 xfer->status = USBD_TIMEOUT; 1744 break; 1745 case -EPROTO: 1746 xfer->status = USBD_INVAL; 1747 break; 1748 case -EIO: 1749 xfer->status = USBD_IOERROR; 1750 break; 1751 case -EOVERFLOW: 1752 xfer->status = USBD_IOERROR; 1753 break; 1754 default: 1755 printf("%s: unknown error status %d\n", __func__, status); 1756 } 1757 1758 if (xfertype == UE_ISOCHRONOUS || 1759 xfertype == UE_INTERRUPT) { 1760 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1761 1762 dwc2_free_bus_bandwidth(hsotg, 1763 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1764 xfer); 1765 } 1766 1767 qtd->urb = NULL; 1768 callout_stop(&xfer->timeout_handle); 1769 1770 KASSERT(mutex_owned(&hsotg->lock)); 1771 1772 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1773 1774 mutex_spin_exit(&hsotg->lock); 1775 usb_schedsoftintr(&sc->sc_bus); 1776 mutex_spin_enter(&hsotg->lock); 1777 } 1778 1779 1780 int 1781 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1782 { 1783 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1784 1785 mutex_spin_enter(&hsotg->lock); 1786 1787 hsotg->op_state = OTG_STATE_A_HOST; 1788 1789 dwc2_hcd_reinit(hsotg); 1790 1791 /*XXXNH*/ 1792 delay(50); 1793 1794 mutex_spin_exit(&hsotg->lock); 1795 return 0; 1796 } 1797 1798 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1799 { 1800 1801 return false; 1802 } 1803
Indexes created Wed Sep 24 02:09:48 GMT 2025