dwc2.c revision 1.51
1 /* $NetBSD: dwc2.c,v 1.51 2018/08/07 16:35:08 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.51 2018/08/07 16:35:08 skrll Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kmem.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/cpu.h> 46 47 #include <machine/endian.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usb_mem.h> 53 #include <dev/usb/usbroothub.h> 54 55 #include <dwc2/dwc2.h> 56 #include <dwc2/dwc2var.h> 57 58 #include "dwc2_core.h" 59 #include "dwc2_hcd.h" 60 61 #ifdef DWC2_COUNTERS 62 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 63 #else 64 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 65 #endif 66 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 67 68 #ifdef DWC2_DEBUG 69 #define DPRINTFN(n,fmt,...) do { \ 70 if (dwc2debug >= (n)) { \ 71 printf("%s: " fmt, \ 72 __FUNCTION__,## __VA_ARGS__); \ 73 } \ 74 } while (0) 75 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 76 int dwc2debug = 0; 77 #else 78 #define DPRINTF(...) do { } while (0) 79 #define DPRINTFN(...) do { } while (0) 80 #endif 81 82 Static usbd_status dwc2_open(struct usbd_pipe *); 83 Static void dwc2_poll(struct usbd_bus *); 84 Static void dwc2_softintr(void *); 85 86 Static struct usbd_xfer * 87 dwc2_allocx(struct usbd_bus *, unsigned int); 88 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 89 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 90 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 91 void *, int); 92 93 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 94 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 95 Static void dwc2_root_intr_abort(struct usbd_xfer *); 96 Static void dwc2_root_intr_close(struct usbd_pipe *); 97 Static void dwc2_root_intr_done(struct usbd_xfer *); 98 99 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 100 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 101 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 102 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 103 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 104 105 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 106 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 107 Static void dwc2_device_bulk_close(struct usbd_pipe *); 108 Static void dwc2_device_bulk_done(struct usbd_xfer *); 109 110 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 111 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 112 Static void dwc2_device_intr_abort(struct usbd_xfer *); 113 Static void dwc2_device_intr_close(struct usbd_pipe *); 114 Static void dwc2_device_intr_done(struct usbd_xfer *); 115 116 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 117 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 118 Static void dwc2_device_isoc_close(struct usbd_pipe *); 119 Static void dwc2_device_isoc_done(struct usbd_xfer *); 120 121 Static usbd_status dwc2_device_start(struct usbd_xfer *); 122 123 Static void dwc2_close_pipe(struct usbd_pipe *); 124 Static void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 125 126 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 127 Static void dwc2_noop(struct usbd_pipe *pipe); 128 129 Static int dwc2_interrupt(struct dwc2_softc *); 130 Static void dwc2_rhc(void *); 131 132 Static void dwc2_timeout(void *); 133 Static void dwc2_timeout_task(void *); 134 135 136 static inline void 137 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 138 struct usbd_xfer *xfer) 139 { 140 } 141 142 static inline void 143 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 144 struct usbd_xfer *xfer) 145 { 146 } 147 148 Static const struct usbd_bus_methods dwc2_bus_methods = { 149 .ubm_open = dwc2_open, 150 .ubm_softint = dwc2_softintr, 151 .ubm_dopoll = dwc2_poll, 152 .ubm_allocx = dwc2_allocx, 153 .ubm_freex = dwc2_freex, 154 .ubm_getlock = dwc2_get_lock, 155 .ubm_rhctrl = dwc2_roothub_ctrl, 156 }; 157 158 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 159 .upm_transfer = dwc2_root_intr_transfer, 160 .upm_start = dwc2_root_intr_start, 161 .upm_abort = dwc2_root_intr_abort, 162 .upm_close = dwc2_root_intr_close, 163 .upm_cleartoggle = dwc2_noop, 164 .upm_done = dwc2_root_intr_done, 165 }; 166 167 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 168 .upm_transfer = dwc2_device_ctrl_transfer, 169 .upm_start = dwc2_device_ctrl_start, 170 .upm_abort = dwc2_device_ctrl_abort, 171 .upm_close = dwc2_device_ctrl_close, 172 .upm_cleartoggle = dwc2_noop, 173 .upm_done = dwc2_device_ctrl_done, 174 }; 175 176 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 177 .upm_transfer = dwc2_device_intr_transfer, 178 .upm_start = dwc2_device_intr_start, 179 .upm_abort = dwc2_device_intr_abort, 180 .upm_close = dwc2_device_intr_close, 181 .upm_cleartoggle = dwc2_device_clear_toggle, 182 .upm_done = dwc2_device_intr_done, 183 }; 184 185 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 186 .upm_transfer = dwc2_device_bulk_transfer, 187 .upm_abort = dwc2_device_bulk_abort, 188 .upm_close = dwc2_device_bulk_close, 189 .upm_cleartoggle = dwc2_device_clear_toggle, 190 .upm_done = dwc2_device_bulk_done, 191 }; 192 193 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 194 .upm_transfer = dwc2_device_isoc_transfer, 195 .upm_abort = dwc2_device_isoc_abort, 196 .upm_close = dwc2_device_isoc_close, 197 .upm_cleartoggle = dwc2_noop, 198 .upm_done = dwc2_device_isoc_done, 199 }; 200 201 struct usbd_xfer * 202 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 203 { 204 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 205 struct dwc2_xfer *dxfer; 206 207 DPRINTFN(10, "\n"); 208 209 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 210 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 211 if (dxfer != NULL) { 212 memset(dxfer, 0, sizeof(*dxfer)); 213 214 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 215 nframes, GFP_KERNEL); 216 217 #ifdef DIAGNOSTIC 218 dxfer->xfer.ux_state = XFER_BUSY; 219 #endif 220 } 221 return (struct usbd_xfer *)dxfer; 222 } 223 224 void 225 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 226 { 227 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 228 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 229 230 DPRINTFN(10, "\n"); 231 232 #ifdef DIAGNOSTIC 233 if (xfer->ux_state != XFER_BUSY) { 234 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 235 } 236 xfer->ux_state = XFER_FREE; 237 #endif 238 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 239 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 240 pool_cache_put(sc->sc_xferpool, xfer); 241 } 242 243 Static void 244 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 245 { 246 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 247 248 *lock = &sc->sc_lock; 249 } 250 251 Static void 252 dwc2_rhc(void *addr) 253 { 254 struct dwc2_softc *sc = addr; 255 struct usbd_xfer *xfer; 256 u_char *p; 257 258 DPRINTF("\n"); 259 mutex_enter(&sc->sc_lock); 260 xfer = sc->sc_intrxfer; 261 262 if (xfer == NULL) { 263 /* Just ignore the change. */ 264 mutex_exit(&sc->sc_lock); 265 return; 266 267 } 268 /* set port bit */ 269 p = KERNADDR(&xfer->ux_dmabuf, 0); 270 271 p[0] = 0x02; /* we only have one port (1 << 1) */ 272 273 xfer->ux_actlen = xfer->ux_length; 274 xfer->ux_status = USBD_NORMAL_COMPLETION; 275 276 usb_transfer_complete(xfer); 277 mutex_exit(&sc->sc_lock); 278 } 279 280 Static void 281 dwc2_softintr(void *v) 282 { 283 struct usbd_bus *bus = v; 284 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 285 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 286 struct dwc2_xfer *dxfer; 287 288 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 289 290 mutex_spin_enter(&hsotg->lock); 291 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 292 293 KASSERTMSG(!callout_pending(&dxfer->xfer.ux_callout), 294 "xfer %p pipe %p\n", dxfer, dxfer->xfer.ux_pipe); 295 296 /* 297 * dwc2_abort_xfer will remove this transfer from the 298 * sc_complete queue 299 */ 300 /*XXXNH not tested */ 301 if (dxfer->xfer.ux_hcflags & UXFER_ABORTING) { 302 cv_broadcast(&dxfer->xfer.ux_hccv); 303 continue; 304 } 305 306 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 307 308 mutex_spin_exit(&hsotg->lock); 309 usb_transfer_complete(&dxfer->xfer); 310 mutex_spin_enter(&hsotg->lock); 311 } 312 mutex_spin_exit(&hsotg->lock); 313 } 314 315 Static void 316 dwc2_timeout(void *addr) 317 { 318 struct usbd_xfer *xfer = addr; 319 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 320 // struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 321 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 322 323 DPRINTF("dxfer=%p\n", dxfer); 324 325 if (sc->sc_dying) { 326 mutex_enter(&sc->sc_lock); 327 dwc2_abort_xfer(&dxfer->xfer, USBD_TIMEOUT); 328 mutex_exit(&sc->sc_lock); 329 return; 330 } 331 332 /* Execute the abort in a process context. */ 333 usb_init_task(&dxfer->abort_task, dwc2_timeout_task, addr, 334 USB_TASKQ_MPSAFE); 335 usb_add_task(dxfer->xfer.ux_pipe->up_dev, &dxfer->abort_task, 336 USB_TASKQ_HC); 337 } 338 339 Static void 340 dwc2_timeout_task(void *addr) 341 { 342 struct usbd_xfer *xfer = addr; 343 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 344 345 DPRINTF("xfer=%p\n", xfer); 346 347 mutex_enter(&sc->sc_lock); 348 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 349 mutex_exit(&sc->sc_lock); 350 } 351 352 usbd_status 353 dwc2_open(struct usbd_pipe *pipe) 354 { 355 struct usbd_device *dev = pipe->up_dev; 356 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 357 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 358 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 359 uint8_t addr = dev->ud_addr; 360 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 361 usbd_status err; 362 363 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 364 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 365 366 if (sc->sc_dying) { 367 return USBD_IOERROR; 368 } 369 370 if (addr == dev->ud_bus->ub_rhaddr) { 371 switch (ed->bEndpointAddress) { 372 case USB_CONTROL_ENDPOINT: 373 pipe->up_methods = &roothub_ctrl_methods; 374 break; 375 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 376 pipe->up_methods = &dwc2_root_intr_methods; 377 break; 378 default: 379 DPRINTF("bad bEndpointAddress 0x%02x\n", 380 ed->bEndpointAddress); 381 return USBD_INVAL; 382 } 383 DPRINTF("root hub pipe open\n"); 384 return USBD_NORMAL_COMPLETION; 385 } 386 387 switch (xfertype) { 388 case UE_CONTROL: 389 pipe->up_methods = &dwc2_device_ctrl_methods; 390 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 391 0, &dpipe->req_dma); 392 if (err) 393 return err; 394 break; 395 case UE_INTERRUPT: 396 pipe->up_methods = &dwc2_device_intr_methods; 397 break; 398 case UE_ISOCHRONOUS: 399 pipe->up_serialise = false; 400 pipe->up_methods = &dwc2_device_isoc_methods; 401 break; 402 case UE_BULK: 403 pipe->up_serialise = false; 404 pipe->up_methods = &dwc2_device_bulk_methods; 405 break; 406 default: 407 DPRINTF("bad xfer type %d\n", xfertype); 408 return USBD_INVAL; 409 } 410 411 /* QH */ 412 dpipe->priv = NULL; 413 414 return USBD_NORMAL_COMPLETION; 415 } 416 417 Static void 418 dwc2_poll(struct usbd_bus *bus) 419 { 420 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 421 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 422 423 mutex_spin_enter(&hsotg->lock); 424 dwc2_interrupt(sc); 425 mutex_spin_exit(&hsotg->lock); 426 } 427 428 /* 429 * Close a reqular pipe. 430 * Assumes that there are no pending transactions. 431 */ 432 Static void 433 dwc2_close_pipe(struct usbd_pipe *pipe) 434 { 435 #ifdef DIAGNOSTIC 436 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 437 #endif 438 439 KASSERT(mutex_owned(&sc->sc_lock)); 440 } 441 442 /* 443 * Abort a device request. 444 */ 445 Static void 446 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 447 { 448 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 449 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 450 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 451 struct dwc2_xfer *d, *tmp; 452 bool wake; 453 int err; 454 455 DPRINTF("xfer=%p\n", xfer); 456 457 KASSERT(mutex_owned(&sc->sc_lock)); 458 KASSERT(!cpu_intr_p() && !cpu_softintr_p()); 459 460 if (sc->sc_dying) { 461 xfer->ux_status = status; 462 callout_stop(&xfer->ux_callout); 463 usb_transfer_complete(xfer); 464 return; 465 } 466 467 /* 468 * If an abort is already in progress then just wait for it to 469 * complete and return. 470 */ 471 if (xfer->ux_hcflags & UXFER_ABORTING) { 472 xfer->ux_status = status; 473 xfer->ux_hcflags |= UXFER_ABORTWAIT; 474 while (xfer->ux_hcflags & UXFER_ABORTING) 475 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 476 return; 477 } 478 479 /* 480 * Step 1: Make the stack ignore it and stop the callout. 481 */ 482 mutex_spin_enter(&hsotg->lock); 483 xfer->ux_hcflags |= UXFER_ABORTING; 484 485 xfer->ux_status = status; /* make software ignore it */ 486 callout_stop(&xfer->ux_callout); 487 488 /* XXXNH suboptimal */ 489 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 490 if (d == dxfer) { 491 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 492 } 493 } 494 495 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 496 if (err) { 497 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 498 } 499 500 mutex_spin_exit(&hsotg->lock); 501 502 /* 503 * Step 2: Execute callback. 504 */ 505 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 506 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 507 508 usb_transfer_complete(xfer); 509 if (wake) { 510 cv_broadcast(&xfer->ux_hccv); 511 } 512 } 513 514 Static void 515 dwc2_noop(struct usbd_pipe *pipe) 516 { 517 518 } 519 520 Static void 521 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 522 { 523 524 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 525 } 526 527 /***********************************************************************/ 528 529 Static int 530 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 531 void *buf, int buflen) 532 { 533 struct dwc2_softc *sc = bus->ub_hcpriv; 534 usbd_status err = USBD_IOERROR; 535 uint16_t len, value, index; 536 int totlen = 0; 537 538 if (sc->sc_dying) 539 return -1; 540 541 DPRINTFN(4, "type=0x%02x request=%02x\n", 542 req->bmRequestType, req->bRequest); 543 544 len = UGETW(req->wLength); 545 value = UGETW(req->wValue); 546 index = UGETW(req->wIndex); 547 548 #define C(x,y) ((x) | ((y) << 8)) 549 switch (C(req->bRequest, req->bmRequestType)) { 550 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 551 DPRINTFN(8, "wValue=0x%04x\n", value); 552 553 if (len == 0) 554 break; 555 switch (value) { 556 #define sd ((usb_string_descriptor_t *)buf) 557 case C(2, UDESC_STRING): 558 /* Product */ 559 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 560 break; 561 #undef sd 562 default: 563 /* default from usbroothub */ 564 return buflen; 565 } 566 break; 567 568 case C(UR_GET_CONFIG, UT_READ_DEVICE): 569 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 570 case C(UR_GET_STATUS, UT_READ_INTERFACE): 571 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 572 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 573 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 574 /* default from usbroothub */ 575 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 576 577 return buflen; 578 579 default: 580 /* Hub requests */ 581 err = dwc2_hcd_hub_control(sc->sc_hsotg, 582 C(req->bRequest, req->bmRequestType), value, index, 583 buf, len); 584 if (err) { 585 return -1; 586 } 587 totlen = len; 588 } 589 590 return totlen; 591 } 592 593 Static usbd_status 594 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 595 { 596 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 597 usbd_status err; 598 599 DPRINTF("\n"); 600 601 /* Insert last in queue. */ 602 mutex_enter(&sc->sc_lock); 603 err = usb_insert_transfer(xfer); 604 mutex_exit(&sc->sc_lock); 605 if (err) 606 return err; 607 608 /* Pipe isn't running, start first */ 609 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 610 } 611 612 Static usbd_status 613 dwc2_root_intr_start(struct usbd_xfer *xfer) 614 { 615 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 616 617 DPRINTF("\n"); 618 619 if (sc->sc_dying) 620 return USBD_IOERROR; 621 622 mutex_enter(&sc->sc_lock); 623 KASSERT(sc->sc_intrxfer == NULL); 624 sc->sc_intrxfer = xfer; 625 mutex_exit(&sc->sc_lock); 626 627 return USBD_IN_PROGRESS; 628 } 629 630 /* Abort a root interrupt request. */ 631 Static void 632 dwc2_root_intr_abort(struct usbd_xfer *xfer) 633 { 634 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 635 636 DPRINTF("xfer=%p\n", xfer); 637 638 KASSERT(mutex_owned(&sc->sc_lock)); 639 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 640 641 xfer->ux_status = USBD_CANCELLED; 642 usb_transfer_complete(xfer); 643 } 644 645 Static void 646 dwc2_root_intr_close(struct usbd_pipe *pipe) 647 { 648 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 649 650 DPRINTF("\n"); 651 652 KASSERT(mutex_owned(&sc->sc_lock)); 653 654 sc->sc_intrxfer = NULL; 655 } 656 657 Static void 658 dwc2_root_intr_done(struct usbd_xfer *xfer) 659 { 660 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 661 662 KASSERT(sc->sc_intrxfer != NULL); 663 sc->sc_intrxfer = NULL; 664 DPRINTF("\n"); 665 } 666 667 /***********************************************************************/ 668 669 Static usbd_status 670 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 671 { 672 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 673 usbd_status err; 674 675 DPRINTF("\n"); 676 677 /* Insert last in queue. */ 678 mutex_enter(&sc->sc_lock); 679 err = usb_insert_transfer(xfer); 680 mutex_exit(&sc->sc_lock); 681 if (err) 682 return err; 683 684 /* Pipe isn't running, start first */ 685 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 686 } 687 688 Static usbd_status 689 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 690 { 691 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 692 usbd_status err; 693 694 DPRINTF("\n"); 695 696 mutex_enter(&sc->sc_lock); 697 xfer->ux_status = USBD_IN_PROGRESS; 698 err = dwc2_device_start(xfer); 699 mutex_exit(&sc->sc_lock); 700 701 if (err) 702 return err; 703 704 return USBD_IN_PROGRESS; 705 } 706 707 Static void 708 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 709 { 710 #ifdef DIAGNOSTIC 711 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 712 #endif 713 KASSERT(mutex_owned(&sc->sc_lock)); 714 715 DPRINTF("xfer=%p\n", xfer); 716 dwc2_abort_xfer(xfer, USBD_CANCELLED); 717 } 718 719 Static void 720 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 721 { 722 723 DPRINTF("pipe=%p\n", pipe); 724 dwc2_close_pipe(pipe); 725 } 726 727 Static void 728 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 729 { 730 731 DPRINTF("xfer=%p\n", xfer); 732 } 733 734 /***********************************************************************/ 735 736 Static usbd_status 737 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 738 { 739 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 740 usbd_status err; 741 742 DPRINTF("xfer=%p\n", xfer); 743 744 /* Insert last in queue. */ 745 mutex_enter(&sc->sc_lock); 746 err = usb_insert_transfer(xfer); 747 748 KASSERT(err == USBD_NORMAL_COMPLETION); 749 750 xfer->ux_status = USBD_IN_PROGRESS; 751 err = dwc2_device_start(xfer); 752 mutex_exit(&sc->sc_lock); 753 754 return err; 755 } 756 757 Static void 758 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 759 { 760 #ifdef DIAGNOSTIC 761 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 762 #endif 763 KASSERT(mutex_owned(&sc->sc_lock)); 764 765 DPRINTF("xfer=%p\n", xfer); 766 dwc2_abort_xfer(xfer, USBD_CANCELLED); 767 } 768 769 Static void 770 dwc2_device_bulk_close(struct usbd_pipe *pipe) 771 { 772 773 DPRINTF("pipe=%p\n", pipe); 774 775 dwc2_close_pipe(pipe); 776 } 777 778 Static void 779 dwc2_device_bulk_done(struct usbd_xfer *xfer) 780 { 781 782 DPRINTF("xfer=%p\n", xfer); 783 } 784 785 /***********************************************************************/ 786 787 Static usbd_status 788 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 789 { 790 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 791 usbd_status err; 792 793 DPRINTF("xfer=%p\n", xfer); 794 795 /* Insert last in queue. */ 796 mutex_enter(&sc->sc_lock); 797 err = usb_insert_transfer(xfer); 798 mutex_exit(&sc->sc_lock); 799 if (err) 800 return err; 801 802 /* Pipe isn't running, start first */ 803 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 804 } 805 806 Static usbd_status 807 dwc2_device_intr_start(struct usbd_xfer *xfer) 808 { 809 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 810 struct usbd_device *dev = dpipe->pipe.up_dev; 811 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 812 usbd_status err; 813 814 mutex_enter(&sc->sc_lock); 815 xfer->ux_status = USBD_IN_PROGRESS; 816 err = dwc2_device_start(xfer); 817 mutex_exit(&sc->sc_lock); 818 819 if (err) 820 return err; 821 822 return USBD_IN_PROGRESS; 823 } 824 825 /* Abort a device interrupt request. */ 826 Static void 827 dwc2_device_intr_abort(struct usbd_xfer *xfer) 828 { 829 #ifdef DIAGNOSTIC 830 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 831 #endif 832 833 KASSERT(mutex_owned(&sc->sc_lock)); 834 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 835 836 DPRINTF("xfer=%p\n", xfer); 837 838 dwc2_abort_xfer(xfer, USBD_CANCELLED); 839 } 840 841 Static void 842 dwc2_device_intr_close(struct usbd_pipe *pipe) 843 { 844 845 DPRINTF("pipe=%p\n", pipe); 846 847 dwc2_close_pipe(pipe); 848 } 849 850 Static void 851 dwc2_device_intr_done(struct usbd_xfer *xfer) 852 { 853 854 DPRINTF("\n"); 855 } 856 857 /***********************************************************************/ 858 859 usbd_status 860 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 861 { 862 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 863 usbd_status err; 864 865 DPRINTF("xfer=%p\n", xfer); 866 867 /* Insert last in queue. */ 868 mutex_enter(&sc->sc_lock); 869 err = usb_insert_transfer(xfer); 870 871 KASSERT(err == USBD_NORMAL_COMPLETION); 872 873 xfer->ux_status = USBD_IN_PROGRESS; 874 err = dwc2_device_start(xfer); 875 mutex_exit(&sc->sc_lock); 876 877 return err; 878 } 879 880 void 881 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 882 { 883 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 884 KASSERT(mutex_owned(&sc->sc_lock)); 885 886 DPRINTF("xfer=%p\n", xfer); 887 dwc2_abort_xfer(xfer, USBD_CANCELLED); 888 } 889 890 void 891 dwc2_device_isoc_close(struct usbd_pipe *pipe) 892 { 893 DPRINTF("\n"); 894 895 dwc2_close_pipe(pipe); 896 } 897 898 void 899 dwc2_device_isoc_done(struct usbd_xfer *xfer) 900 { 901 902 DPRINTF("\n"); 903 } 904 905 906 usbd_status 907 dwc2_device_start(struct usbd_xfer *xfer) 908 { 909 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 910 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 911 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 912 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 913 struct dwc2_hcd_urb *dwc2_urb; 914 915 struct usbd_device *dev = xfer->ux_pipe->up_dev; 916 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 917 uint8_t addr = dev->ud_addr; 918 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 919 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 920 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 921 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 922 uint32_t len; 923 924 uint32_t flags = 0; 925 uint32_t off = 0; 926 int retval, err; 927 int alloc_bandwidth = 0; 928 int i; 929 930 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 931 932 if (xfertype == UE_ISOCHRONOUS || 933 xfertype == UE_INTERRUPT) { 934 mutex_spin_enter(&hsotg->lock); 935 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 936 alloc_bandwidth = 1; 937 mutex_spin_exit(&hsotg->lock); 938 } 939 940 /* 941 * For Control pipe the direction is from the request, all other 942 * transfers have been set correctly at pipe open time. 943 */ 944 if (xfertype == UE_CONTROL) { 945 usb_device_request_t *req = &xfer->ux_request; 946 947 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 948 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 949 "mps=%d\n", 950 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 951 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 952 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 953 954 /* Copy request packet to our DMA buffer */ 955 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 956 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 957 BUS_DMASYNC_PREWRITE); 958 len = UGETW(req->wLength); 959 if ((req->bmRequestType & UT_READ) == UT_READ) { 960 dir = UE_DIR_IN; 961 } else { 962 dir = UE_DIR_OUT; 963 } 964 965 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 966 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 967 len, dir == UE_DIR_IN ? "in" : "out"); 968 } else { 969 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 970 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 971 epnum, mps, dir == UT_READ ? "in" :"out"); 972 973 len = xfer->ux_length; 974 } 975 976 dwc2_urb = dxfer->urb; 977 if (!dwc2_urb) 978 return USBD_NOMEM; 979 980 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 981 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 982 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 983 984 dwc2_urb->priv = xfer; 985 dwc2_urb->packet_count = xfer->ux_nframes; 986 987 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 988 mps); 989 990 if (xfertype == UE_CONTROL) { 991 dwc2_urb->setup_usbdma = &dpipe->req_dma; 992 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 993 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 994 } else { 995 /* XXXNH - % mps required? */ 996 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 997 flags |= URB_SEND_ZERO_PACKET; 998 } 999 flags |= URB_GIVEBACK_ASAP; 1000 1001 /* 1002 * control transfers with no data phase don't touch usbdma, but 1003 * everything else does. 1004 */ 1005 if (!(xfertype == UE_CONTROL && len == 0)) { 1006 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1007 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1008 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1009 1010 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1011 dir == UE_DIR_IN ? 1012 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1013 } 1014 dwc2_urb->length = len; 1015 dwc2_urb->flags = flags; 1016 dwc2_urb->status = -EINPROGRESS; 1017 1018 if (xfertype == UE_INTERRUPT || 1019 xfertype == UE_ISOCHRONOUS) { 1020 uint16_t ival; 1021 1022 if (xfertype == UE_INTERRUPT && 1023 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1024 ival = dpipe->pipe.up_interval; 1025 } else { 1026 ival = ed->bInterval; 1027 } 1028 1029 if (ival < 1) { 1030 retval = -ENODEV; 1031 goto fail; 1032 } 1033 if (dev->ud_speed == USB_SPEED_HIGH || 1034 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1035 if (ival > 16) { 1036 /* 1037 * illegal with HS/FS, but there were 1038 * documentation bugs in the spec 1039 */ 1040 ival = 256; 1041 } else { 1042 ival = (1 << (ival - 1)); 1043 } 1044 } else { 1045 if (xfertype == UE_INTERRUPT && ival < 10) 1046 ival = 10; 1047 } 1048 dwc2_urb->interval = ival; 1049 } 1050 1051 /* XXXNH bring down from callers?? */ 1052 // mutex_enter(&sc->sc_lock); 1053 1054 xfer->ux_actlen = 0; 1055 1056 KASSERT(xfertype != UE_ISOCHRONOUS || 1057 xfer->ux_nframes <= dwc2_urb->packet_count); 1058 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1059 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1060 1061 for (off = i = 0; i < xfer->ux_nframes; ++i) { 1062 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1063 off, xfer->ux_frlengths[i]); 1064 1065 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1066 xfer->ux_frlengths[i]); 1067 off += xfer->ux_frlengths[i]; 1068 } 1069 1070 struct dwc2_qh *qh = dpipe->priv; 1071 struct dwc2_qtd *qtd; 1072 bool qh_allocated = false; 1073 1074 /* Create QH for the endpoint if it doesn't exist */ 1075 if (!qh) { 1076 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1077 if (!qh) { 1078 retval = -ENOMEM; 1079 goto fail; 1080 } 1081 dpipe->priv = qh; 1082 qh_allocated = true; 1083 } 1084 1085 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1086 if (!qtd) { 1087 retval = -ENOMEM; 1088 goto fail1; 1089 } 1090 memset(qtd, 0, sizeof(*qtd)); 1091 1092 /* might need to check cpu_intr_p */ 1093 mutex_spin_enter(&hsotg->lock); 1094 1095 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1096 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1097 dwc2_timeout, xfer); 1098 } 1099 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1100 if (retval) 1101 goto fail2; 1102 1103 if (alloc_bandwidth) { 1104 dwc2_allocate_bus_bandwidth(hsotg, 1105 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1106 xfer); 1107 } 1108 1109 mutex_spin_exit(&hsotg->lock); 1110 // mutex_exit(&sc->sc_lock); 1111 1112 return USBD_IN_PROGRESS; 1113 1114 fail2: 1115 callout_stop(&xfer->ux_callout); 1116 dwc2_urb->priv = NULL; 1117 mutex_spin_exit(&hsotg->lock); 1118 pool_cache_put(sc->sc_qtdpool, qtd); 1119 1120 fail1: 1121 if (qh_allocated) { 1122 dpipe->priv = NULL; 1123 dwc2_hcd_qh_free(hsotg, qh); 1124 } 1125 fail: 1126 1127 switch (retval) { 1128 case -EINVAL: 1129 case -ENODEV: 1130 err = USBD_INVAL; 1131 break; 1132 case -ENOMEM: 1133 err = USBD_NOMEM; 1134 break; 1135 default: 1136 err = USBD_IOERROR; 1137 } 1138 1139 return err; 1140 1141 } 1142 1143 int dwc2_intr(void *p) 1144 { 1145 struct dwc2_softc *sc = p; 1146 struct dwc2_hsotg *hsotg; 1147 int ret = 0; 1148 1149 if (sc == NULL) 1150 return 0; 1151 1152 hsotg = sc->sc_hsotg; 1153 mutex_spin_enter(&hsotg->lock); 1154 1155 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1156 goto done; 1157 1158 if (sc->sc_bus.ub_usepolling) { 1159 uint32_t intrs; 1160 1161 intrs = dwc2_read_core_intr(hsotg); 1162 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1163 } else { 1164 ret = dwc2_interrupt(sc); 1165 } 1166 1167 done: 1168 mutex_spin_exit(&hsotg->lock); 1169 1170 return ret; 1171 } 1172 1173 int 1174 dwc2_interrupt(struct dwc2_softc *sc) 1175 { 1176 int ret = 0; 1177 1178 if (sc->sc_hcdenabled) { 1179 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1180 } 1181 1182 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1183 1184 return ret; 1185 } 1186 1187 /***********************************************************************/ 1188 1189 int 1190 dwc2_detach(struct dwc2_softc *sc, int flags) 1191 { 1192 int rv = 0; 1193 1194 if (sc->sc_child != NULL) 1195 rv = config_detach(sc->sc_child, flags); 1196 1197 return rv; 1198 } 1199 1200 bool 1201 dwc2_shutdown(device_t self, int flags) 1202 { 1203 struct dwc2_softc *sc = device_private(self); 1204 1205 sc = sc; 1206 1207 return true; 1208 } 1209 1210 void 1211 dwc2_childdet(device_t self, device_t child) 1212 { 1213 struct dwc2_softc *sc = device_private(self); 1214 1215 sc = sc; 1216 } 1217 1218 int 1219 dwc2_activate(device_t self, enum devact act) 1220 { 1221 struct dwc2_softc *sc = device_private(self); 1222 1223 sc = sc; 1224 1225 return 0; 1226 } 1227 1228 bool 1229 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1230 { 1231 struct dwc2_softc *sc = device_private(dv); 1232 1233 sc = sc; 1234 1235 return true; 1236 } 1237 1238 bool 1239 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1240 { 1241 struct dwc2_softc *sc = device_private(dv); 1242 1243 sc = sc; 1244 1245 return true; 1246 } 1247 1248 /***********************************************************************/ 1249 int 1250 dwc2_init(struct dwc2_softc *sc) 1251 { 1252 int err = 0; 1253 1254 sc->sc_bus.ub_hcpriv = sc; 1255 sc->sc_bus.ub_revision = USBREV_2_0; 1256 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1257 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1258 sc->sc_bus.ub_usedma = true; 1259 sc->sc_hcdenabled = false; 1260 1261 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1262 1263 TAILQ_INIT(&sc->sc_complete); 1264 1265 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1266 dwc2_rhc, sc); 1267 1268 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1269 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1270 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1271 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1272 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1273 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1274 1275 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1276 sc->sc_hsotg->hsotg_sc = sc; 1277 sc->sc_hsotg->dev = sc->sc_dev; 1278 sc->sc_hcdenabled = true; 1279 1280 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1281 struct dwc2_core_params defparams; 1282 int retval; 1283 1284 if (sc->sc_params == NULL) { 1285 /* Default all params to autodetect */ 1286 dwc2_set_all_params(&defparams, -1); 1287 sc->sc_params = &defparams; 1288 1289 /* 1290 * Disable descriptor dma mode by default as the HW can support 1291 * it, but does not support it for SPLIT transactions. 1292 */ 1293 defparams.dma_desc_enable = 0; 1294 } 1295 hsotg->dr_mode = USB_DR_MODE_HOST; 1296 1297 /* Detect config values from hardware */ 1298 retval = dwc2_get_hwparams(hsotg); 1299 if (retval) { 1300 goto fail2; 1301 } 1302 1303 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1304 dwc2_set_all_params(hsotg->core_params, -1); 1305 1306 /* Validate parameter values */ 1307 dwc2_set_parameters(hsotg, sc->sc_params); 1308 1309 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1310 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1311 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1312 retval = dwc2_gadget_init(hsotg); 1313 if (retval) 1314 goto fail2; 1315 hsotg->gadget_enabled = 1; 1316 } 1317 #endif 1318 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1319 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1320 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1321 retval = dwc2_hcd_init(hsotg); 1322 if (retval) { 1323 if (hsotg->gadget_enabled) 1324 dwc2_hsotg_remove(hsotg); 1325 goto fail2; 1326 } 1327 hsotg->hcd_enabled = 1; 1328 } 1329 #endif 1330 1331 uint32_t snpsid = hsotg->hw_params.snpsid; 1332 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1333 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1334 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1335 1336 return 0; 1337 1338 fail2: 1339 err = -retval; 1340 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1341 softint_disestablish(sc->sc_rhc_si); 1342 1343 return err; 1344 } 1345 1346 #if 0 1347 /* 1348 * curmode is a mode indication bit 0 = device, 1 = host 1349 */ 1350 static const char * const intnames[32] = { 1351 "curmode", "modemis", "otgint", "sof", 1352 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1353 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1354 "usbrst", "enumdone", "isooutdrop", "eopf", 1355 "restore_done", "epmis", "iepint", "oepint", 1356 "incompisoin", "incomplp", "fetsusp", "resetdet", 1357 "prtint", "hchint", "ptxfemp", "lpm", 1358 "conidstschng", "disconnint", "sessreqint", "wkupint" 1359 }; 1360 1361 1362 /***********************************************************************/ 1363 1364 #endif 1365 1366 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1367 int *hub_port) 1368 { 1369 struct usbd_xfer *xfer = context; 1370 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1371 struct usbd_device *dev = dpipe->pipe.up_dev; 1372 1373 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1374 *hub_port = dev->ud_myhsport->up_portno; 1375 } 1376 1377 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1378 { 1379 struct usbd_xfer *xfer = context; 1380 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1381 struct usbd_device *dev = dpipe->pipe.up_dev; 1382 1383 return dev->ud_speed; 1384 } 1385 1386 /* 1387 * Sets the final status of an URB and returns it to the upper layer. Any 1388 * required cleanup of the URB is performed. 1389 * 1390 * Must be called with interrupt disabled and spinlock held 1391 */ 1392 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1393 int status) 1394 { 1395 struct usbd_xfer *xfer; 1396 struct dwc2_xfer *dxfer; 1397 struct dwc2_softc *sc; 1398 usb_endpoint_descriptor_t *ed; 1399 uint8_t xfertype; 1400 1401 if (!qtd) { 1402 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1403 return; 1404 } 1405 1406 if (!qtd->urb) { 1407 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1408 return; 1409 } 1410 1411 xfer = qtd->urb->priv; 1412 if (!xfer) { 1413 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1414 return; 1415 } 1416 1417 dxfer = DWC2_XFER2DXFER(xfer); 1418 sc = DWC2_XFER2SC(xfer); 1419 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1420 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1421 1422 struct dwc2_hcd_urb *urb = qtd->urb; 1423 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1424 1425 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1426 1427 if (xfertype == UE_ISOCHRONOUS) { 1428 int i; 1429 1430 xfer->ux_actlen = 0; 1431 for (i = 0; i < xfer->ux_nframes; ++i) { 1432 xfer->ux_frlengths[i] = 1433 dwc2_hcd_urb_get_iso_desc_actual_length( 1434 urb, i); 1435 xfer->ux_actlen += xfer->ux_frlengths[i]; 1436 } 1437 } 1438 1439 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1440 int i; 1441 1442 for (i = 0; i < xfer->ux_nframes; i++) 1443 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1444 i, urb->iso_descs[i].status); 1445 } 1446 1447 if (!status) { 1448 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1449 xfer->ux_actlen < xfer->ux_length) 1450 status = -EIO; 1451 } 1452 1453 switch (status) { 1454 case 0: 1455 xfer->ux_status = USBD_NORMAL_COMPLETION; 1456 break; 1457 case -EPIPE: 1458 xfer->ux_status = USBD_STALLED; 1459 break; 1460 case -ETIMEDOUT: 1461 xfer->ux_status = USBD_TIMEOUT; 1462 break; 1463 case -EPROTO: 1464 xfer->ux_status = USBD_INVAL; 1465 break; 1466 case -EIO: 1467 xfer->ux_status = USBD_IOERROR; 1468 break; 1469 case -EOVERFLOW: 1470 xfer->ux_status = USBD_IOERROR; 1471 break; 1472 default: 1473 xfer->ux_status = USBD_IOERROR; 1474 printf("%s: unknown error status %d\n", __func__, status); 1475 } 1476 1477 if (xfer->ux_status == USBD_NORMAL_COMPLETION) { 1478 /* 1479 * control transfers with no data phase don't touch dmabuf, but 1480 * everything else does. 1481 */ 1482 if (!(xfertype == UE_CONTROL && 1483 UGETW(xfer->ux_request.wLength) == 0) && 1484 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1485 ) { 1486 int rd = usbd_xfer_isread(xfer); 1487 1488 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1489 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1490 } 1491 } 1492 1493 if (xfertype == UE_ISOCHRONOUS || 1494 xfertype == UE_INTERRUPT) { 1495 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1496 1497 dwc2_free_bus_bandwidth(hsotg, 1498 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1499 xfer); 1500 } 1501 1502 qtd->urb = NULL; 1503 callout_stop(&xfer->ux_callout); 1504 1505 KASSERT(mutex_owned(&hsotg->lock)); 1506 1507 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1508 1509 mutex_spin_exit(&hsotg->lock); 1510 usb_schedsoftintr(&sc->sc_bus); 1511 mutex_spin_enter(&hsotg->lock); 1512 } 1513 1514 1515 int 1516 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1517 { 1518 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1519 1520 mutex_spin_enter(&hsotg->lock); 1521 1522 hsotg->lx_state = DWC2_L0; 1523 1524 if (dwc2_is_device_mode(hsotg)) { 1525 mutex_spin_exit(&hsotg->lock); 1526 return 0; /* why 0 ?? */ 1527 } 1528 1529 dwc2_hcd_reinit(hsotg); 1530 1531 mutex_spin_exit(&hsotg->lock); 1532 return 0; 1533 } 1534 1535 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1536 { 1537 1538 return false; 1539 } 1540
Indexes created Tue Sep 23 02:09:52 GMT 2025