dwc2.c revision 1.52
1 /* $NetBSD: dwc2.c,v 1.52 2018/08/09 06:26:47 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.52 2018/08/09 06:26:47 mrg Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kmem.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/cpu.h> 46 47 #include <machine/endian.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usb_mem.h> 53 #include <dev/usb/usbroothub.h> 54 55 #include <dwc2/dwc2.h> 56 #include <dwc2/dwc2var.h> 57 58 #include "dwc2_core.h" 59 #include "dwc2_hcd.h" 60 61 #ifdef DWC2_COUNTERS 62 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 63 #else 64 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 65 #endif 66 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 67 68 #ifdef DWC2_DEBUG 69 #define DPRINTFN(n,fmt,...) do { \ 70 if (dwc2debug >= (n)) { \ 71 printf("%s: " fmt, \ 72 __FUNCTION__,## __VA_ARGS__); \ 73 } \ 74 } while (0) 75 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 76 int dwc2debug = 0; 77 #else 78 #define DPRINTF(...) do { } while (0) 79 #define DPRINTFN(...) do { } while (0) 80 #endif 81 82 Static usbd_status dwc2_open(struct usbd_pipe *); 83 Static void dwc2_poll(struct usbd_bus *); 84 Static void dwc2_softintr(void *); 85 86 Static struct usbd_xfer * 87 dwc2_allocx(struct usbd_bus *, unsigned int); 88 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 89 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 90 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 91 void *, int); 92 93 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 94 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 95 Static void dwc2_root_intr_abort(struct usbd_xfer *); 96 Static void dwc2_root_intr_close(struct usbd_pipe *); 97 Static void dwc2_root_intr_done(struct usbd_xfer *); 98 99 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 100 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 101 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 102 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 103 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 104 105 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 106 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 107 Static void dwc2_device_bulk_close(struct usbd_pipe *); 108 Static void dwc2_device_bulk_done(struct usbd_xfer *); 109 110 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 111 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 112 Static void dwc2_device_intr_abort(struct usbd_xfer *); 113 Static void dwc2_device_intr_close(struct usbd_pipe *); 114 Static void dwc2_device_intr_done(struct usbd_xfer *); 115 116 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 117 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 118 Static void dwc2_device_isoc_close(struct usbd_pipe *); 119 Static void dwc2_device_isoc_done(struct usbd_xfer *); 120 121 Static usbd_status dwc2_device_start(struct usbd_xfer *); 122 123 Static void dwc2_close_pipe(struct usbd_pipe *); 124 Static void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 125 126 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 127 Static void dwc2_noop(struct usbd_pipe *pipe); 128 129 Static int dwc2_interrupt(struct dwc2_softc *); 130 Static void dwc2_rhc(void *); 131 132 Static void dwc2_timeout(void *); 133 Static void dwc2_timeout_task(void *); 134 135 136 static inline void 137 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 138 struct usbd_xfer *xfer) 139 { 140 } 141 142 static inline void 143 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 144 struct usbd_xfer *xfer) 145 { 146 } 147 148 Static const struct usbd_bus_methods dwc2_bus_methods = { 149 .ubm_open = dwc2_open, 150 .ubm_softint = dwc2_softintr, 151 .ubm_dopoll = dwc2_poll, 152 .ubm_allocx = dwc2_allocx, 153 .ubm_freex = dwc2_freex, 154 .ubm_getlock = dwc2_get_lock, 155 .ubm_rhctrl = dwc2_roothub_ctrl, 156 }; 157 158 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 159 .upm_transfer = dwc2_root_intr_transfer, 160 .upm_start = dwc2_root_intr_start, 161 .upm_abort = dwc2_root_intr_abort, 162 .upm_close = dwc2_root_intr_close, 163 .upm_cleartoggle = dwc2_noop, 164 .upm_done = dwc2_root_intr_done, 165 }; 166 167 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 168 .upm_transfer = dwc2_device_ctrl_transfer, 169 .upm_start = dwc2_device_ctrl_start, 170 .upm_abort = dwc2_device_ctrl_abort, 171 .upm_close = dwc2_device_ctrl_close, 172 .upm_cleartoggle = dwc2_noop, 173 .upm_done = dwc2_device_ctrl_done, 174 }; 175 176 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 177 .upm_transfer = dwc2_device_intr_transfer, 178 .upm_start = dwc2_device_intr_start, 179 .upm_abort = dwc2_device_intr_abort, 180 .upm_close = dwc2_device_intr_close, 181 .upm_cleartoggle = dwc2_device_clear_toggle, 182 .upm_done = dwc2_device_intr_done, 183 }; 184 185 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 186 .upm_transfer = dwc2_device_bulk_transfer, 187 .upm_abort = dwc2_device_bulk_abort, 188 .upm_close = dwc2_device_bulk_close, 189 .upm_cleartoggle = dwc2_device_clear_toggle, 190 .upm_done = dwc2_device_bulk_done, 191 }; 192 193 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 194 .upm_transfer = dwc2_device_isoc_transfer, 195 .upm_abort = dwc2_device_isoc_abort, 196 .upm_close = dwc2_device_isoc_close, 197 .upm_cleartoggle = dwc2_noop, 198 .upm_done = dwc2_device_isoc_done, 199 }; 200 201 struct usbd_xfer * 202 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 203 { 204 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 205 struct dwc2_xfer *dxfer; 206 struct usbd_xfer *xfer; 207 208 DPRINTFN(10, "\n"); 209 210 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 211 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 212 xfer = (struct usbd_xfer *)dxfer; 213 if (dxfer != NULL) { 214 memset(dxfer, 0, sizeof(*dxfer)); 215 216 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 217 nframes, GFP_KERNEL); 218 219 /* Initialise this always so we can call remove on it. */ 220 usb_init_task(&xfer->ux_aborttask, dwc2_timeout_task, xfer, 221 USB_TASKQ_MPSAFE); 222 #ifdef DIAGNOSTIC 223 dxfer->xfer.ux_state = XFER_BUSY; 224 #endif 225 } 226 return (struct usbd_xfer *)dxfer; 227 } 228 229 void 230 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 231 { 232 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 233 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 234 235 DPRINTFN(10, "\n"); 236 237 #ifdef DIAGNOSTIC 238 if (xfer->ux_state != XFER_BUSY) { 239 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 240 } 241 xfer->ux_state = XFER_FREE; 242 #endif 243 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 244 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 245 pool_cache_put(sc->sc_xferpool, xfer); 246 } 247 248 Static void 249 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 250 { 251 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 252 253 *lock = &sc->sc_lock; 254 } 255 256 Static void 257 dwc2_rhc(void *addr) 258 { 259 struct dwc2_softc *sc = addr; 260 struct usbd_xfer *xfer; 261 u_char *p; 262 263 DPRINTF("\n"); 264 mutex_enter(&sc->sc_lock); 265 xfer = sc->sc_intrxfer; 266 267 if (xfer == NULL) { 268 /* Just ignore the change. */ 269 mutex_exit(&sc->sc_lock); 270 return; 271 272 } 273 /* set port bit */ 274 p = KERNADDR(&xfer->ux_dmabuf, 0); 275 276 p[0] = 0x02; /* we only have one port (1 << 1) */ 277 278 xfer->ux_actlen = xfer->ux_length; 279 xfer->ux_status = USBD_NORMAL_COMPLETION; 280 281 usb_transfer_complete(xfer); 282 mutex_exit(&sc->sc_lock); 283 } 284 285 Static void 286 dwc2_softintr(void *v) 287 { 288 struct usbd_bus *bus = v; 289 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 290 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 291 struct dwc2_xfer *dxfer; 292 293 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 294 295 mutex_spin_enter(&hsotg->lock); 296 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 297 298 KASSERTMSG(!callout_pending(&dxfer->xfer.ux_callout), 299 "xfer %p pipe %p\n", dxfer, dxfer->xfer.ux_pipe); 300 301 /* 302 * dwc2_abort_xfer will remove this transfer from the 303 * sc_complete queue 304 */ 305 /*XXXNH not tested */ 306 if (dxfer->xfer.ux_status == USBD_CANCELLED || 307 dxfer->xfer.ux_status == USBD_TIMEOUT) { 308 continue; 309 } 310 311 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 312 313 mutex_spin_exit(&hsotg->lock); 314 usb_transfer_complete(&dxfer->xfer); 315 mutex_spin_enter(&hsotg->lock); 316 } 317 mutex_spin_exit(&hsotg->lock); 318 } 319 320 Static void 321 dwc2_timeout(void *addr) 322 { 323 struct usbd_xfer *xfer = addr; 324 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 325 struct usbd_device *dev = xfer->ux_pipe->up_dev; 326 327 DPRINTF("dxfer=%p\n", dxfer); 328 329 mutex_enter(&sc->sc_lock); 330 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 331 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 332 mutex_exit(&sc->sc_lock); 333 } 334 335 Static void 336 dwc2_timeout_task(void *addr) 337 { 338 struct usbd_xfer *xfer = addr; 339 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 340 341 DPRINTF("xfer=%p\n", xfer); 342 343 mutex_enter(&sc->sc_lock); 344 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 345 mutex_exit(&sc->sc_lock); 346 } 347 348 usbd_status 349 dwc2_open(struct usbd_pipe *pipe) 350 { 351 struct usbd_device *dev = pipe->up_dev; 352 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 353 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 354 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 355 uint8_t addr = dev->ud_addr; 356 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 357 usbd_status err; 358 359 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 360 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 361 362 if (sc->sc_dying) { 363 return USBD_IOERROR; 364 } 365 366 if (addr == dev->ud_bus->ub_rhaddr) { 367 switch (ed->bEndpointAddress) { 368 case USB_CONTROL_ENDPOINT: 369 pipe->up_methods = &roothub_ctrl_methods; 370 break; 371 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 372 pipe->up_methods = &dwc2_root_intr_methods; 373 break; 374 default: 375 DPRINTF("bad bEndpointAddress 0x%02x\n", 376 ed->bEndpointAddress); 377 return USBD_INVAL; 378 } 379 DPRINTF("root hub pipe open\n"); 380 return USBD_NORMAL_COMPLETION; 381 } 382 383 switch (xfertype) { 384 case UE_CONTROL: 385 pipe->up_methods = &dwc2_device_ctrl_methods; 386 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 387 0, &dpipe->req_dma); 388 if (err) 389 return err; 390 break; 391 case UE_INTERRUPT: 392 pipe->up_methods = &dwc2_device_intr_methods; 393 break; 394 case UE_ISOCHRONOUS: 395 pipe->up_serialise = false; 396 pipe->up_methods = &dwc2_device_isoc_methods; 397 break; 398 case UE_BULK: 399 pipe->up_serialise = false; 400 pipe->up_methods = &dwc2_device_bulk_methods; 401 break; 402 default: 403 DPRINTF("bad xfer type %d\n", xfertype); 404 return USBD_INVAL; 405 } 406 407 /* QH */ 408 dpipe->priv = NULL; 409 410 return USBD_NORMAL_COMPLETION; 411 } 412 413 Static void 414 dwc2_poll(struct usbd_bus *bus) 415 { 416 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 417 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 418 419 mutex_spin_enter(&hsotg->lock); 420 dwc2_interrupt(sc); 421 mutex_spin_exit(&hsotg->lock); 422 } 423 424 /* 425 * Close a reqular pipe. 426 * Assumes that there are no pending transactions. 427 */ 428 Static void 429 dwc2_close_pipe(struct usbd_pipe *pipe) 430 { 431 #ifdef DIAGNOSTIC 432 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 433 #endif 434 435 KASSERT(mutex_owned(&sc->sc_lock)); 436 } 437 438 /* 439 * Abort a device request. 440 */ 441 Static void 442 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 443 { 444 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 445 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 446 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 447 struct dwc2_xfer *d, *tmp; 448 int err; 449 450 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 451 "invalid status for abort: %d", (int)status); 452 453 DPRINTF("xfer %pjx pipe %pjx status %jd", xfer, xfer->ux_pipe, status); 454 455 KASSERT(mutex_owned(&sc->sc_lock)); 456 ASSERT_SLEEPABLE(); 457 458 if (status == USBD_CANCELLED) { 459 /* 460 * We are synchronously aborting. Try to stop the 461 * callout and task, but if we can't, wait for them to 462 * complete. 463 */ 464 callout_halt(&xfer->ux_callout, &sc->sc_lock); 465 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 466 USB_TASKQ_HC, &sc->sc_lock); 467 } else { 468 /* Otherwise, we are timing out. */ 469 KASSERT(status == USBD_TIMEOUT); 470 } 471 472 /* 473 * The xfer cannot have been cancelled already. It is the 474 * responsibility of the caller of usbd_abort_pipe not to try 475 * to abort a pipe multiple times, whether concurrently or 476 * sequentially. 477 */ 478 KASSERT(xfer->ux_status != USBD_CANCELLED); 479 480 /* Only the timeout, which runs only once, can time it out. */ 481 KASSERT(xfer->ux_status != USBD_TIMEOUT); 482 483 /* If anyone else beat us, we're done. */ 484 if (xfer->ux_status != USBD_IN_PROGRESS) 485 return; 486 487 /* We beat everyone else. Claim the status. */ 488 xfer->ux_status = status; 489 490 /* 491 * If we're dying, skip the hardware action and just notify the 492 * software that we're done. 493 */ 494 if (sc->sc_dying) { 495 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer, 496 xfer->ux_status, 0, 0); 497 goto dying; 498 } 499 500 /* 501 * HC Step 1: Handle the hardware. 502 */ 503 mutex_spin_enter(&hsotg->lock); 504 /* XXXNH suboptimal */ 505 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 506 if (d == dxfer) { 507 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 508 break; 509 } 510 } 511 512 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 513 if (err) { 514 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 515 } 516 517 mutex_spin_exit(&hsotg->lock); 518 519 /* 520 * Final Step: Notify completion to waiting xfers. 521 */ 522 dying: 523 usb_transfer_complete(xfer); 524 KASSERT(mutex_owned(&sc->sc_lock)); 525 } 526 527 Static void 528 dwc2_noop(struct usbd_pipe *pipe) 529 { 530 531 } 532 533 Static void 534 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 535 { 536 537 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 538 } 539 540 /***********************************************************************/ 541 542 Static int 543 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 544 void *buf, int buflen) 545 { 546 struct dwc2_softc *sc = bus->ub_hcpriv; 547 usbd_status err = USBD_IOERROR; 548 uint16_t len, value, index; 549 int totlen = 0; 550 551 if (sc->sc_dying) 552 return -1; 553 554 DPRINTFN(4, "type=0x%02x request=%02x\n", 555 req->bmRequestType, req->bRequest); 556 557 len = UGETW(req->wLength); 558 value = UGETW(req->wValue); 559 index = UGETW(req->wIndex); 560 561 #define C(x,y) ((x) | ((y) << 8)) 562 switch (C(req->bRequest, req->bmRequestType)) { 563 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 564 DPRINTFN(8, "wValue=0x%04x\n", value); 565 566 if (len == 0) 567 break; 568 switch (value) { 569 #define sd ((usb_string_descriptor_t *)buf) 570 case C(2, UDESC_STRING): 571 /* Product */ 572 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 573 break; 574 #undef sd 575 default: 576 /* default from usbroothub */ 577 return buflen; 578 } 579 break; 580 581 case C(UR_GET_CONFIG, UT_READ_DEVICE): 582 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 583 case C(UR_GET_STATUS, UT_READ_INTERFACE): 584 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 585 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 586 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 587 /* default from usbroothub */ 588 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 589 590 return buflen; 591 592 default: 593 /* Hub requests */ 594 err = dwc2_hcd_hub_control(sc->sc_hsotg, 595 C(req->bRequest, req->bmRequestType), value, index, 596 buf, len); 597 if (err) { 598 return -1; 599 } 600 totlen = len; 601 } 602 603 return totlen; 604 } 605 606 Static usbd_status 607 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 608 { 609 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 610 usbd_status err; 611 612 DPRINTF("\n"); 613 614 /* Insert last in queue. */ 615 mutex_enter(&sc->sc_lock); 616 err = usb_insert_transfer(xfer); 617 mutex_exit(&sc->sc_lock); 618 if (err) 619 return err; 620 621 /* Pipe isn't running, start first */ 622 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 623 } 624 625 Static usbd_status 626 dwc2_root_intr_start(struct usbd_xfer *xfer) 627 { 628 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 629 630 DPRINTF("\n"); 631 632 if (sc->sc_dying) 633 return USBD_IOERROR; 634 635 mutex_enter(&sc->sc_lock); 636 KASSERT(sc->sc_intrxfer == NULL); 637 sc->sc_intrxfer = xfer; 638 mutex_exit(&sc->sc_lock); 639 640 return USBD_IN_PROGRESS; 641 } 642 643 /* Abort a root interrupt request. */ 644 Static void 645 dwc2_root_intr_abort(struct usbd_xfer *xfer) 646 { 647 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 648 649 DPRINTF("xfer=%p\n", xfer); 650 651 KASSERT(mutex_owned(&sc->sc_lock)); 652 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 653 654 xfer->ux_status = USBD_CANCELLED; 655 usb_transfer_complete(xfer); 656 } 657 658 Static void 659 dwc2_root_intr_close(struct usbd_pipe *pipe) 660 { 661 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 662 663 DPRINTF("\n"); 664 665 KASSERT(mutex_owned(&sc->sc_lock)); 666 667 sc->sc_intrxfer = NULL; 668 } 669 670 Static void 671 dwc2_root_intr_done(struct usbd_xfer *xfer) 672 { 673 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 674 675 KASSERT(sc->sc_intrxfer != NULL); 676 sc->sc_intrxfer = NULL; 677 DPRINTF("\n"); 678 } 679 680 /***********************************************************************/ 681 682 Static usbd_status 683 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 684 { 685 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 686 usbd_status err; 687 688 DPRINTF("\n"); 689 690 /* Insert last in queue. */ 691 mutex_enter(&sc->sc_lock); 692 err = usb_insert_transfer(xfer); 693 mutex_exit(&sc->sc_lock); 694 if (err) 695 return err; 696 697 /* Pipe isn't running, start first */ 698 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 699 } 700 701 Static usbd_status 702 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 703 { 704 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 705 usbd_status err; 706 707 DPRINTF("\n"); 708 709 mutex_enter(&sc->sc_lock); 710 xfer->ux_status = USBD_IN_PROGRESS; 711 err = dwc2_device_start(xfer); 712 mutex_exit(&sc->sc_lock); 713 714 if (err) 715 return err; 716 717 return USBD_IN_PROGRESS; 718 } 719 720 Static void 721 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 722 { 723 #ifdef DIAGNOSTIC 724 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 725 #endif 726 KASSERT(mutex_owned(&sc->sc_lock)); 727 728 DPRINTF("xfer=%p\n", xfer); 729 dwc2_abort_xfer(xfer, USBD_CANCELLED); 730 } 731 732 Static void 733 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 734 { 735 736 DPRINTF("pipe=%p\n", pipe); 737 dwc2_close_pipe(pipe); 738 } 739 740 Static void 741 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 742 { 743 744 DPRINTF("xfer=%p\n", xfer); 745 } 746 747 /***********************************************************************/ 748 749 Static usbd_status 750 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 751 { 752 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 753 usbd_status err; 754 755 DPRINTF("xfer=%p\n", xfer); 756 757 /* Insert last in queue. */ 758 mutex_enter(&sc->sc_lock); 759 err = usb_insert_transfer(xfer); 760 761 KASSERT(err == USBD_NORMAL_COMPLETION); 762 763 xfer->ux_status = USBD_IN_PROGRESS; 764 err = dwc2_device_start(xfer); 765 mutex_exit(&sc->sc_lock); 766 767 return err; 768 } 769 770 Static void 771 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 772 { 773 #ifdef DIAGNOSTIC 774 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 775 #endif 776 KASSERT(mutex_owned(&sc->sc_lock)); 777 778 DPRINTF("xfer=%p\n", xfer); 779 dwc2_abort_xfer(xfer, USBD_CANCELLED); 780 } 781 782 Static void 783 dwc2_device_bulk_close(struct usbd_pipe *pipe) 784 { 785 786 DPRINTF("pipe=%p\n", pipe); 787 788 dwc2_close_pipe(pipe); 789 } 790 791 Static void 792 dwc2_device_bulk_done(struct usbd_xfer *xfer) 793 { 794 795 DPRINTF("xfer=%p\n", xfer); 796 } 797 798 /***********************************************************************/ 799 800 Static usbd_status 801 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 802 { 803 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 804 usbd_status err; 805 806 DPRINTF("xfer=%p\n", xfer); 807 808 /* Insert last in queue. */ 809 mutex_enter(&sc->sc_lock); 810 err = usb_insert_transfer(xfer); 811 mutex_exit(&sc->sc_lock); 812 if (err) 813 return err; 814 815 /* Pipe isn't running, start first */ 816 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 817 } 818 819 Static usbd_status 820 dwc2_device_intr_start(struct usbd_xfer *xfer) 821 { 822 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 823 struct usbd_device *dev = dpipe->pipe.up_dev; 824 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 825 usbd_status err; 826 827 mutex_enter(&sc->sc_lock); 828 xfer->ux_status = USBD_IN_PROGRESS; 829 err = dwc2_device_start(xfer); 830 mutex_exit(&sc->sc_lock); 831 832 if (err) 833 return err; 834 835 return USBD_IN_PROGRESS; 836 } 837 838 /* Abort a device interrupt request. */ 839 Static void 840 dwc2_device_intr_abort(struct usbd_xfer *xfer) 841 { 842 #ifdef DIAGNOSTIC 843 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 844 #endif 845 846 KASSERT(mutex_owned(&sc->sc_lock)); 847 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 848 849 DPRINTF("xfer=%p\n", xfer); 850 851 dwc2_abort_xfer(xfer, USBD_CANCELLED); 852 } 853 854 Static void 855 dwc2_device_intr_close(struct usbd_pipe *pipe) 856 { 857 858 DPRINTF("pipe=%p\n", pipe); 859 860 dwc2_close_pipe(pipe); 861 } 862 863 Static void 864 dwc2_device_intr_done(struct usbd_xfer *xfer) 865 { 866 867 DPRINTF("\n"); 868 } 869 870 /***********************************************************************/ 871 872 usbd_status 873 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 874 { 875 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 876 usbd_status err; 877 878 DPRINTF("xfer=%p\n", xfer); 879 880 /* Insert last in queue. */ 881 mutex_enter(&sc->sc_lock); 882 err = usb_insert_transfer(xfer); 883 884 KASSERT(err == USBD_NORMAL_COMPLETION); 885 886 xfer->ux_status = USBD_IN_PROGRESS; 887 err = dwc2_device_start(xfer); 888 mutex_exit(&sc->sc_lock); 889 890 return err; 891 } 892 893 void 894 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 895 { 896 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 897 KASSERT(mutex_owned(&sc->sc_lock)); 898 899 DPRINTF("xfer=%p\n", xfer); 900 dwc2_abort_xfer(xfer, USBD_CANCELLED); 901 } 902 903 void 904 dwc2_device_isoc_close(struct usbd_pipe *pipe) 905 { 906 DPRINTF("\n"); 907 908 dwc2_close_pipe(pipe); 909 } 910 911 void 912 dwc2_device_isoc_done(struct usbd_xfer *xfer) 913 { 914 915 DPRINTF("\n"); 916 } 917 918 919 usbd_status 920 dwc2_device_start(struct usbd_xfer *xfer) 921 { 922 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 923 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 924 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 925 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 926 struct dwc2_hcd_urb *dwc2_urb; 927 928 struct usbd_device *dev = xfer->ux_pipe->up_dev; 929 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 930 uint8_t addr = dev->ud_addr; 931 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 932 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 933 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 934 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 935 uint32_t len; 936 937 uint32_t flags = 0; 938 uint32_t off = 0; 939 int retval, err; 940 int alloc_bandwidth = 0; 941 int i; 942 943 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 944 945 if (xfertype == UE_ISOCHRONOUS || 946 xfertype == UE_INTERRUPT) { 947 mutex_spin_enter(&hsotg->lock); 948 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 949 alloc_bandwidth = 1; 950 mutex_spin_exit(&hsotg->lock); 951 } 952 953 /* 954 * For Control pipe the direction is from the request, all other 955 * transfers have been set correctly at pipe open time. 956 */ 957 if (xfertype == UE_CONTROL) { 958 usb_device_request_t *req = &xfer->ux_request; 959 960 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 961 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 962 "mps=%d\n", 963 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 964 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 965 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 966 967 /* Copy request packet to our DMA buffer */ 968 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 969 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 970 BUS_DMASYNC_PREWRITE); 971 len = UGETW(req->wLength); 972 if ((req->bmRequestType & UT_READ) == UT_READ) { 973 dir = UE_DIR_IN; 974 } else { 975 dir = UE_DIR_OUT; 976 } 977 978 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 979 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 980 len, dir == UE_DIR_IN ? "in" : "out"); 981 } else { 982 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 983 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 984 epnum, mps, dir == UT_READ ? "in" :"out"); 985 986 len = xfer->ux_length; 987 } 988 989 dwc2_urb = dxfer->urb; 990 if (!dwc2_urb) 991 return USBD_NOMEM; 992 993 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 994 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 995 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 996 997 dwc2_urb->priv = xfer; 998 dwc2_urb->packet_count = xfer->ux_nframes; 999 1000 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1001 mps); 1002 1003 if (xfertype == UE_CONTROL) { 1004 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1005 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1006 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1007 } else { 1008 /* XXXNH - % mps required? */ 1009 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1010 flags |= URB_SEND_ZERO_PACKET; 1011 } 1012 flags |= URB_GIVEBACK_ASAP; 1013 1014 /* 1015 * control transfers with no data phase don't touch usbdma, but 1016 * everything else does. 1017 */ 1018 if (!(xfertype == UE_CONTROL && len == 0)) { 1019 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1020 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1021 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1022 1023 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1024 dir == UE_DIR_IN ? 1025 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1026 } 1027 dwc2_urb->length = len; 1028 dwc2_urb->flags = flags; 1029 dwc2_urb->status = -EINPROGRESS; 1030 1031 if (xfertype == UE_INTERRUPT || 1032 xfertype == UE_ISOCHRONOUS) { 1033 uint16_t ival; 1034 1035 if (xfertype == UE_INTERRUPT && 1036 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1037 ival = dpipe->pipe.up_interval; 1038 } else { 1039 ival = ed->bInterval; 1040 } 1041 1042 if (ival < 1) { 1043 retval = -ENODEV; 1044 goto fail; 1045 } 1046 if (dev->ud_speed == USB_SPEED_HIGH || 1047 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1048 if (ival > 16) { 1049 /* 1050 * illegal with HS/FS, but there were 1051 * documentation bugs in the spec 1052 */ 1053 ival = 256; 1054 } else { 1055 ival = (1 << (ival - 1)); 1056 } 1057 } else { 1058 if (xfertype == UE_INTERRUPT && ival < 10) 1059 ival = 10; 1060 } 1061 dwc2_urb->interval = ival; 1062 } 1063 1064 /* XXXNH bring down from callers?? */ 1065 // mutex_enter(&sc->sc_lock); 1066 1067 xfer->ux_actlen = 0; 1068 1069 KASSERT(xfertype != UE_ISOCHRONOUS || 1070 xfer->ux_nframes <= dwc2_urb->packet_count); 1071 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1072 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1073 1074 for (off = i = 0; i < xfer->ux_nframes; ++i) { 1075 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1076 off, xfer->ux_frlengths[i]); 1077 1078 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1079 xfer->ux_frlengths[i]); 1080 off += xfer->ux_frlengths[i]; 1081 } 1082 1083 struct dwc2_qh *qh = dpipe->priv; 1084 struct dwc2_qtd *qtd; 1085 bool qh_allocated = false; 1086 1087 /* Create QH for the endpoint if it doesn't exist */ 1088 if (!qh) { 1089 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1090 if (!qh) { 1091 retval = -ENOMEM; 1092 goto fail; 1093 } 1094 dpipe->priv = qh; 1095 qh_allocated = true; 1096 } 1097 1098 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1099 if (!qtd) { 1100 retval = -ENOMEM; 1101 goto fail1; 1102 } 1103 memset(qtd, 0, sizeof(*qtd)); 1104 1105 /* might need to check cpu_intr_p */ 1106 mutex_spin_enter(&hsotg->lock); 1107 1108 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1109 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1110 dwc2_timeout, xfer); 1111 } 1112 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1113 if (retval) 1114 goto fail2; 1115 1116 if (alloc_bandwidth) { 1117 dwc2_allocate_bus_bandwidth(hsotg, 1118 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1119 xfer); 1120 } 1121 1122 mutex_spin_exit(&hsotg->lock); 1123 // mutex_exit(&sc->sc_lock); 1124 1125 return USBD_IN_PROGRESS; 1126 1127 fail2: 1128 callout_halt(&xfer->ux_callout, &hsotg->lock); 1129 dwc2_urb->priv = NULL; 1130 mutex_spin_exit(&hsotg->lock); 1131 pool_cache_put(sc->sc_qtdpool, qtd); 1132 1133 fail1: 1134 if (qh_allocated) { 1135 dpipe->priv = NULL; 1136 dwc2_hcd_qh_free(hsotg, qh); 1137 } 1138 fail: 1139 1140 switch (retval) { 1141 case -EINVAL: 1142 case -ENODEV: 1143 err = USBD_INVAL; 1144 break; 1145 case -ENOMEM: 1146 err = USBD_NOMEM; 1147 break; 1148 default: 1149 err = USBD_IOERROR; 1150 } 1151 1152 return err; 1153 1154 } 1155 1156 int dwc2_intr(void *p) 1157 { 1158 struct dwc2_softc *sc = p; 1159 struct dwc2_hsotg *hsotg; 1160 int ret = 0; 1161 1162 if (sc == NULL) 1163 return 0; 1164 1165 hsotg = sc->sc_hsotg; 1166 mutex_spin_enter(&hsotg->lock); 1167 1168 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1169 goto done; 1170 1171 if (sc->sc_bus.ub_usepolling) { 1172 uint32_t intrs; 1173 1174 intrs = dwc2_read_core_intr(hsotg); 1175 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1176 } else { 1177 ret = dwc2_interrupt(sc); 1178 } 1179 1180 done: 1181 mutex_spin_exit(&hsotg->lock); 1182 1183 return ret; 1184 } 1185 1186 int 1187 dwc2_interrupt(struct dwc2_softc *sc) 1188 { 1189 int ret = 0; 1190 1191 if (sc->sc_hcdenabled) { 1192 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1193 } 1194 1195 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1196 1197 return ret; 1198 } 1199 1200 /***********************************************************************/ 1201 1202 int 1203 dwc2_detach(struct dwc2_softc *sc, int flags) 1204 { 1205 int rv = 0; 1206 1207 if (sc->sc_child != NULL) 1208 rv = config_detach(sc->sc_child, flags); 1209 1210 return rv; 1211 } 1212 1213 bool 1214 dwc2_shutdown(device_t self, int flags) 1215 { 1216 struct dwc2_softc *sc = device_private(self); 1217 1218 sc = sc; 1219 1220 return true; 1221 } 1222 1223 void 1224 dwc2_childdet(device_t self, device_t child) 1225 { 1226 struct dwc2_softc *sc = device_private(self); 1227 1228 sc = sc; 1229 } 1230 1231 int 1232 dwc2_activate(device_t self, enum devact act) 1233 { 1234 struct dwc2_softc *sc = device_private(self); 1235 1236 sc = sc; 1237 1238 return 0; 1239 } 1240 1241 bool 1242 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1243 { 1244 struct dwc2_softc *sc = device_private(dv); 1245 1246 sc = sc; 1247 1248 return true; 1249 } 1250 1251 bool 1252 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1253 { 1254 struct dwc2_softc *sc = device_private(dv); 1255 1256 sc = sc; 1257 1258 return true; 1259 } 1260 1261 /***********************************************************************/ 1262 int 1263 dwc2_init(struct dwc2_softc *sc) 1264 { 1265 int err = 0; 1266 1267 sc->sc_bus.ub_hcpriv = sc; 1268 sc->sc_bus.ub_revision = USBREV_2_0; 1269 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1270 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1271 sc->sc_bus.ub_usedma = true; 1272 sc->sc_hcdenabled = false; 1273 1274 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1275 1276 TAILQ_INIT(&sc->sc_complete); 1277 1278 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1279 dwc2_rhc, sc); 1280 1281 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1282 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1283 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1284 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1285 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1286 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1287 1288 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1289 sc->sc_hsotg->hsotg_sc = sc; 1290 sc->sc_hsotg->dev = sc->sc_dev; 1291 sc->sc_hcdenabled = true; 1292 1293 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1294 struct dwc2_core_params defparams; 1295 int retval; 1296 1297 if (sc->sc_params == NULL) { 1298 /* Default all params to autodetect */ 1299 dwc2_set_all_params(&defparams, -1); 1300 sc->sc_params = &defparams; 1301 1302 /* 1303 * Disable descriptor dma mode by default as the HW can support 1304 * it, but does not support it for SPLIT transactions. 1305 */ 1306 defparams.dma_desc_enable = 0; 1307 } 1308 hsotg->dr_mode = USB_DR_MODE_HOST; 1309 1310 /* Detect config values from hardware */ 1311 retval = dwc2_get_hwparams(hsotg); 1312 if (retval) { 1313 goto fail2; 1314 } 1315 1316 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1317 dwc2_set_all_params(hsotg->core_params, -1); 1318 1319 /* Validate parameter values */ 1320 dwc2_set_parameters(hsotg, sc->sc_params); 1321 1322 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1323 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1324 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1325 retval = dwc2_gadget_init(hsotg); 1326 if (retval) 1327 goto fail2; 1328 hsotg->gadget_enabled = 1; 1329 } 1330 #endif 1331 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1332 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1333 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1334 retval = dwc2_hcd_init(hsotg); 1335 if (retval) { 1336 if (hsotg->gadget_enabled) 1337 dwc2_hsotg_remove(hsotg); 1338 goto fail2; 1339 } 1340 hsotg->hcd_enabled = 1; 1341 } 1342 #endif 1343 1344 uint32_t snpsid = hsotg->hw_params.snpsid; 1345 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1346 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1347 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1348 1349 return 0; 1350 1351 fail2: 1352 err = -retval; 1353 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1354 softint_disestablish(sc->sc_rhc_si); 1355 1356 return err; 1357 } 1358 1359 #if 0 1360 /* 1361 * curmode is a mode indication bit 0 = device, 1 = host 1362 */ 1363 static const char * const intnames[32] = { 1364 "curmode", "modemis", "otgint", "sof", 1365 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1366 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1367 "usbrst", "enumdone", "isooutdrop", "eopf", 1368 "restore_done", "epmis", "iepint", "oepint", 1369 "incompisoin", "incomplp", "fetsusp", "resetdet", 1370 "prtint", "hchint", "ptxfemp", "lpm", 1371 "conidstschng", "disconnint", "sessreqint", "wkupint" 1372 }; 1373 1374 1375 /***********************************************************************/ 1376 1377 #endif 1378 1379 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1380 int *hub_port) 1381 { 1382 struct usbd_xfer *xfer = context; 1383 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1384 struct usbd_device *dev = dpipe->pipe.up_dev; 1385 1386 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1387 *hub_port = dev->ud_myhsport->up_portno; 1388 } 1389 1390 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1391 { 1392 struct usbd_xfer *xfer = context; 1393 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1394 struct usbd_device *dev = dpipe->pipe.up_dev; 1395 1396 return dev->ud_speed; 1397 } 1398 1399 /* 1400 * Sets the final status of an URB and returns it to the upper layer. Any 1401 * required cleanup of the URB is performed. 1402 * 1403 * Must be called with interrupt disabled and spinlock held 1404 */ 1405 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1406 int status) 1407 { 1408 struct usbd_xfer *xfer; 1409 struct dwc2_xfer *dxfer; 1410 struct dwc2_softc *sc; 1411 usb_endpoint_descriptor_t *ed; 1412 uint8_t xfertype; 1413 1414 if (!qtd) { 1415 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1416 return; 1417 } 1418 1419 if (!qtd->urb) { 1420 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1421 return; 1422 } 1423 1424 xfer = qtd->urb->priv; 1425 if (!xfer) { 1426 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1427 return; 1428 } 1429 1430 /* 1431 * If software has completed it, either by cancellation 1432 * or timeout, drop it on the floor. 1433 */ 1434 if (xfer->ux_status != USBD_IN_PROGRESS) { 1435 KASSERT(xfer->ux_status == USBD_CANCELLED || 1436 xfer->ux_status == USBD_TIMEOUT); 1437 return; 1438 } 1439 1440 /* 1441 * Cancel the timeout and the task, which have not yet 1442 * run. If they have already fired, at worst they are 1443 * waiting for the lock. They will see that the xfer 1444 * is no longer in progress and give up. 1445 */ 1446 callout_stop(&xfer->ux_callout); 1447 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1448 1449 dxfer = DWC2_XFER2DXFER(xfer); 1450 sc = DWC2_XFER2SC(xfer); 1451 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1452 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1453 1454 struct dwc2_hcd_urb *urb = qtd->urb; 1455 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1456 1457 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1458 1459 if (xfertype == UE_ISOCHRONOUS) { 1460 int i; 1461 1462 xfer->ux_actlen = 0; 1463 for (i = 0; i < xfer->ux_nframes; ++i) { 1464 xfer->ux_frlengths[i] = 1465 dwc2_hcd_urb_get_iso_desc_actual_length( 1466 urb, i); 1467 xfer->ux_actlen += xfer->ux_frlengths[i]; 1468 } 1469 } 1470 1471 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1472 int i; 1473 1474 for (i = 0; i < xfer->ux_nframes; i++) 1475 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1476 i, urb->iso_descs[i].status); 1477 } 1478 1479 if (!status) { 1480 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1481 xfer->ux_actlen < xfer->ux_length) 1482 status = -EIO; 1483 } 1484 1485 switch (status) { 1486 case 0: 1487 xfer->ux_status = USBD_NORMAL_COMPLETION; 1488 break; 1489 case -EPIPE: 1490 xfer->ux_status = USBD_STALLED; 1491 break; 1492 case -ETIMEDOUT: 1493 xfer->ux_status = USBD_TIMEOUT; 1494 break; 1495 case -EPROTO: 1496 xfer->ux_status = USBD_INVAL; 1497 break; 1498 case -EIO: 1499 xfer->ux_status = USBD_IOERROR; 1500 break; 1501 case -EOVERFLOW: 1502 xfer->ux_status = USBD_IOERROR; 1503 break; 1504 default: 1505 xfer->ux_status = USBD_IOERROR; 1506 printf("%s: unknown error status %d\n", __func__, status); 1507 } 1508 1509 if (xfer->ux_status == USBD_NORMAL_COMPLETION) { 1510 /* 1511 * control transfers with no data phase don't touch dmabuf, but 1512 * everything else does. 1513 */ 1514 if (!(xfertype == UE_CONTROL && 1515 UGETW(xfer->ux_request.wLength) == 0) && 1516 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1517 ) { 1518 int rd = usbd_xfer_isread(xfer); 1519 1520 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1521 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1522 } 1523 } 1524 1525 if (xfertype == UE_ISOCHRONOUS || 1526 xfertype == UE_INTERRUPT) { 1527 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1528 1529 dwc2_free_bus_bandwidth(hsotg, 1530 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1531 xfer); 1532 } 1533 1534 qtd->urb = NULL; 1535 KASSERT(mutex_owned(&hsotg->lock)); 1536 1537 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1538 1539 mutex_spin_exit(&hsotg->lock); 1540 usb_schedsoftintr(&sc->sc_bus); 1541 mutex_spin_enter(&hsotg->lock); 1542 } 1543 1544 1545 int 1546 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1547 { 1548 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1549 1550 mutex_spin_enter(&hsotg->lock); 1551 1552 hsotg->lx_state = DWC2_L0; 1553 1554 if (dwc2_is_device_mode(hsotg)) { 1555 mutex_spin_exit(&hsotg->lock); 1556 return 0; /* why 0 ?? */ 1557 } 1558 1559 dwc2_hcd_reinit(hsotg); 1560 1561 mutex_spin_exit(&hsotg->lock); 1562 return 0; 1563 } 1564 1565 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1566 { 1567 1568 return false; 1569 } 1570
Indexes created Tue Sep 23 02:09:52 GMT 2025