dwc2.c revision 1.54
1 /* $NetBSD: dwc2.c,v 1.54 2018/08/28 08:17:10 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.54 2018/08/28 08:17:10 skrll Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kmem.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/cpu.h> 46 47 #include <machine/endian.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usb_mem.h> 53 #include <dev/usb/usbroothub.h> 54 55 #include <dwc2/dwc2.h> 56 #include <dwc2/dwc2var.h> 57 58 #include "dwc2_core.h" 59 #include "dwc2_hcd.h" 60 61 #ifdef DWC2_COUNTERS 62 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 63 #else 64 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 65 #endif 66 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 67 68 #ifdef DWC2_DEBUG 69 #define DPRINTFN(n,fmt,...) do { \ 70 if (dwc2debug >= (n)) { \ 71 printf("%s: " fmt, \ 72 __FUNCTION__,## __VA_ARGS__); \ 73 } \ 74 } while (0) 75 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 76 int dwc2debug = 0; 77 #else 78 #define DPRINTF(...) do { } while (0) 79 #define DPRINTFN(...) do { } while (0) 80 #endif 81 82 Static usbd_status dwc2_open(struct usbd_pipe *); 83 Static void dwc2_poll(struct usbd_bus *); 84 Static void dwc2_softintr(void *); 85 86 Static struct usbd_xfer * 87 dwc2_allocx(struct usbd_bus *, unsigned int); 88 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 89 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 90 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 91 void *, int); 92 93 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 94 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 95 Static void dwc2_root_intr_abort(struct usbd_xfer *); 96 Static void dwc2_root_intr_close(struct usbd_pipe *); 97 Static void dwc2_root_intr_done(struct usbd_xfer *); 98 99 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 100 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 101 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 102 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 103 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 104 105 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 106 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 107 Static void dwc2_device_bulk_close(struct usbd_pipe *); 108 Static void dwc2_device_bulk_done(struct usbd_xfer *); 109 110 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 111 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 112 Static void dwc2_device_intr_abort(struct usbd_xfer *); 113 Static void dwc2_device_intr_close(struct usbd_pipe *); 114 Static void dwc2_device_intr_done(struct usbd_xfer *); 115 116 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 117 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 118 Static void dwc2_device_isoc_close(struct usbd_pipe *); 119 Static void dwc2_device_isoc_done(struct usbd_xfer *); 120 121 Static usbd_status dwc2_device_start(struct usbd_xfer *); 122 123 Static void dwc2_close_pipe(struct usbd_pipe *); 124 Static void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 125 126 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 127 Static void dwc2_noop(struct usbd_pipe *pipe); 128 129 Static int dwc2_interrupt(struct dwc2_softc *); 130 Static void dwc2_rhc(void *); 131 132 Static void dwc2_timeout(void *); 133 Static void dwc2_timeout_task(void *); 134 135 136 static inline void 137 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 138 struct usbd_xfer *xfer) 139 { 140 } 141 142 static inline void 143 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 144 struct usbd_xfer *xfer) 145 { 146 } 147 148 Static const struct usbd_bus_methods dwc2_bus_methods = { 149 .ubm_open = dwc2_open, 150 .ubm_softint = dwc2_softintr, 151 .ubm_dopoll = dwc2_poll, 152 .ubm_allocx = dwc2_allocx, 153 .ubm_freex = dwc2_freex, 154 .ubm_getlock = dwc2_get_lock, 155 .ubm_rhctrl = dwc2_roothub_ctrl, 156 }; 157 158 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 159 .upm_transfer = dwc2_root_intr_transfer, 160 .upm_start = dwc2_root_intr_start, 161 .upm_abort = dwc2_root_intr_abort, 162 .upm_close = dwc2_root_intr_close, 163 .upm_cleartoggle = dwc2_noop, 164 .upm_done = dwc2_root_intr_done, 165 }; 166 167 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 168 .upm_transfer = dwc2_device_ctrl_transfer, 169 .upm_start = dwc2_device_ctrl_start, 170 .upm_abort = dwc2_device_ctrl_abort, 171 .upm_close = dwc2_device_ctrl_close, 172 .upm_cleartoggle = dwc2_noop, 173 .upm_done = dwc2_device_ctrl_done, 174 }; 175 176 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 177 .upm_transfer = dwc2_device_intr_transfer, 178 .upm_start = dwc2_device_intr_start, 179 .upm_abort = dwc2_device_intr_abort, 180 .upm_close = dwc2_device_intr_close, 181 .upm_cleartoggle = dwc2_device_clear_toggle, 182 .upm_done = dwc2_device_intr_done, 183 }; 184 185 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 186 .upm_transfer = dwc2_device_bulk_transfer, 187 .upm_abort = dwc2_device_bulk_abort, 188 .upm_close = dwc2_device_bulk_close, 189 .upm_cleartoggle = dwc2_device_clear_toggle, 190 .upm_done = dwc2_device_bulk_done, 191 }; 192 193 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 194 .upm_transfer = dwc2_device_isoc_transfer, 195 .upm_abort = dwc2_device_isoc_abort, 196 .upm_close = dwc2_device_isoc_close, 197 .upm_cleartoggle = dwc2_noop, 198 .upm_done = dwc2_device_isoc_done, 199 }; 200 201 struct usbd_xfer * 202 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 203 { 204 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 205 struct dwc2_xfer *dxfer; 206 struct usbd_xfer *xfer; 207 208 DPRINTFN(10, "\n"); 209 210 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 211 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 212 xfer = (struct usbd_xfer *)dxfer; 213 if (dxfer != NULL) { 214 memset(dxfer, 0, sizeof(*dxfer)); 215 216 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 217 nframes, GFP_KERNEL); 218 219 /* Initialise this always so we can call remove on it. */ 220 usb_init_task(&xfer->ux_aborttask, dwc2_timeout_task, xfer, 221 USB_TASKQ_MPSAFE); 222 #ifdef DIAGNOSTIC 223 dxfer->xfer.ux_state = XFER_BUSY; 224 #endif 225 } 226 return (struct usbd_xfer *)dxfer; 227 } 228 229 void 230 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 231 { 232 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 233 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 234 235 DPRINTFN(10, "\n"); 236 237 #ifdef DIAGNOSTIC 238 if (xfer->ux_state != XFER_BUSY) { 239 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 240 } 241 xfer->ux_state = XFER_FREE; 242 #endif 243 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 244 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 245 pool_cache_put(sc->sc_xferpool, xfer); 246 } 247 248 Static void 249 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 250 { 251 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 252 253 *lock = &sc->sc_lock; 254 } 255 256 Static void 257 dwc2_rhc(void *addr) 258 { 259 struct dwc2_softc *sc = addr; 260 struct usbd_xfer *xfer; 261 u_char *p; 262 263 DPRINTF("\n"); 264 mutex_enter(&sc->sc_lock); 265 xfer = sc->sc_intrxfer; 266 267 if (xfer == NULL) { 268 /* Just ignore the change. */ 269 mutex_exit(&sc->sc_lock); 270 return; 271 272 } 273 /* set port bit */ 274 p = KERNADDR(&xfer->ux_dmabuf, 0); 275 276 p[0] = 0x02; /* we only have one port (1 << 1) */ 277 278 xfer->ux_actlen = xfer->ux_length; 279 xfer->ux_status = USBD_NORMAL_COMPLETION; 280 281 usb_transfer_complete(xfer); 282 mutex_exit(&sc->sc_lock); 283 } 284 285 Static void 286 dwc2_softintr(void *v) 287 { 288 struct usbd_bus *bus = v; 289 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 290 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 291 struct dwc2_xfer *dxfer; 292 293 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 294 295 mutex_spin_enter(&hsotg->lock); 296 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 297 298 KASSERTMSG(!callout_pending(&dxfer->xfer.ux_callout), 299 "xfer %p pipe %p\n", dxfer, dxfer->xfer.ux_pipe); 300 301 /* 302 * dwc2_abort_xfer will remove this transfer from the 303 * sc_complete queue 304 */ 305 /*XXXNH not tested */ 306 if (dxfer->xfer.ux_status == USBD_CANCELLED || 307 dxfer->xfer.ux_status == USBD_TIMEOUT) { 308 continue; 309 } 310 311 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 312 313 mutex_spin_exit(&hsotg->lock); 314 usb_transfer_complete(&dxfer->xfer); 315 mutex_spin_enter(&hsotg->lock); 316 } 317 mutex_spin_exit(&hsotg->lock); 318 } 319 320 Static void 321 dwc2_timeout(void *addr) 322 { 323 struct usbd_xfer *xfer = addr; 324 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 325 struct usbd_device *dev = xfer->ux_pipe->up_dev; 326 327 DPRINTF("xfer=%p\n", xfer); 328 329 mutex_enter(&sc->sc_lock); 330 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 331 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 332 mutex_exit(&sc->sc_lock); 333 } 334 335 Static void 336 dwc2_timeout_task(void *addr) 337 { 338 struct usbd_xfer *xfer = addr; 339 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 340 341 DPRINTF("xfer=%p\n", xfer); 342 343 mutex_enter(&sc->sc_lock); 344 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 345 mutex_exit(&sc->sc_lock); 346 } 347 348 usbd_status 349 dwc2_open(struct usbd_pipe *pipe) 350 { 351 struct usbd_device *dev = pipe->up_dev; 352 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 353 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 354 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 355 uint8_t addr = dev->ud_addr; 356 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 357 usbd_status err; 358 359 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 360 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 361 362 if (sc->sc_dying) { 363 return USBD_IOERROR; 364 } 365 366 if (addr == dev->ud_bus->ub_rhaddr) { 367 switch (ed->bEndpointAddress) { 368 case USB_CONTROL_ENDPOINT: 369 pipe->up_methods = &roothub_ctrl_methods; 370 break; 371 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 372 pipe->up_methods = &dwc2_root_intr_methods; 373 break; 374 default: 375 DPRINTF("bad bEndpointAddress 0x%02x\n", 376 ed->bEndpointAddress); 377 return USBD_INVAL; 378 } 379 DPRINTF("root hub pipe open\n"); 380 return USBD_NORMAL_COMPLETION; 381 } 382 383 switch (xfertype) { 384 case UE_CONTROL: 385 pipe->up_methods = &dwc2_device_ctrl_methods; 386 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 387 0, &dpipe->req_dma); 388 if (err) 389 return err; 390 break; 391 case UE_INTERRUPT: 392 pipe->up_methods = &dwc2_device_intr_methods; 393 break; 394 case UE_ISOCHRONOUS: 395 pipe->up_serialise = false; 396 pipe->up_methods = &dwc2_device_isoc_methods; 397 break; 398 case UE_BULK: 399 pipe->up_serialise = false; 400 pipe->up_methods = &dwc2_device_bulk_methods; 401 break; 402 default: 403 DPRINTF("bad xfer type %d\n", xfertype); 404 return USBD_INVAL; 405 } 406 407 /* QH */ 408 dpipe->priv = NULL; 409 410 return USBD_NORMAL_COMPLETION; 411 } 412 413 Static void 414 dwc2_poll(struct usbd_bus *bus) 415 { 416 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 417 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 418 419 mutex_spin_enter(&hsotg->lock); 420 dwc2_interrupt(sc); 421 mutex_spin_exit(&hsotg->lock); 422 } 423 424 /* 425 * Close a reqular pipe. 426 * Assumes that there are no pending transactions. 427 */ 428 Static void 429 dwc2_close_pipe(struct usbd_pipe *pipe) 430 { 431 #ifdef DIAGNOSTIC 432 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 433 #endif 434 435 KASSERT(mutex_owned(&sc->sc_lock)); 436 } 437 438 /* 439 * Abort a device request. 440 */ 441 Static void 442 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 443 { 444 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 445 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 446 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 447 struct dwc2_xfer *d, *tmp; 448 int err; 449 450 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 451 "invalid status for abort: %d", (int)status); 452 453 DPRINTF("xfer %p pipe %p status 0x%08x", xfer, xfer->ux_pipe, status); 454 455 KASSERT(mutex_owned(&sc->sc_lock)); 456 ASSERT_SLEEPABLE(); 457 458 if (status == USBD_CANCELLED) { 459 /* 460 * We are synchronously aborting. Try to stop the 461 * callout and task, but if we can't, wait for them to 462 * complete. 463 */ 464 callout_halt(&xfer->ux_callout, &sc->sc_lock); 465 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 466 USB_TASKQ_HC, &sc->sc_lock); 467 } else { 468 /* Otherwise, we are timing out. */ 469 KASSERT(status == USBD_TIMEOUT); 470 } 471 472 /* 473 * The xfer cannot have been cancelled already. It is the 474 * responsibility of the caller of usbd_abort_pipe not to try 475 * to abort a pipe multiple times, whether concurrently or 476 * sequentially. 477 */ 478 KASSERT(xfer->ux_status != USBD_CANCELLED); 479 480 /* Only the timeout, which runs only once, can time it out. */ 481 KASSERT(xfer->ux_status != USBD_TIMEOUT); 482 483 /* If anyone else beat us, we're done. */ 484 if (xfer->ux_status != USBD_IN_PROGRESS) 485 return; 486 487 /* We beat everyone else. Claim the status. */ 488 xfer->ux_status = status; 489 490 /* 491 * If we're dying, skip the hardware action and just notify the 492 * software that we're done. 493 */ 494 if (sc->sc_dying) { 495 DPRINTFN(4, "xfer %p dying 0x%08x", xfer, xfer->ux_status); 496 goto dying; 497 } 498 499 /* 500 * HC Step 1: Handle the hardware. 501 */ 502 mutex_spin_enter(&hsotg->lock); 503 /* XXXNH suboptimal */ 504 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 505 if (d == dxfer) { 506 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 507 break; 508 } 509 } 510 511 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 512 if (err) { 513 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 514 } 515 516 mutex_spin_exit(&hsotg->lock); 517 518 /* 519 * Final Step: Notify completion to waiting xfers. 520 */ 521 dying: 522 usb_transfer_complete(xfer); 523 KASSERT(mutex_owned(&sc->sc_lock)); 524 } 525 526 Static void 527 dwc2_noop(struct usbd_pipe *pipe) 528 { 529 530 } 531 532 Static void 533 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 534 { 535 536 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 537 } 538 539 /***********************************************************************/ 540 541 Static int 542 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 543 void *buf, int buflen) 544 { 545 struct dwc2_softc *sc = bus->ub_hcpriv; 546 usbd_status err = USBD_IOERROR; 547 uint16_t len, value, index; 548 int totlen = 0; 549 550 if (sc->sc_dying) 551 return -1; 552 553 DPRINTFN(4, "type=0x%02x request=%02x\n", 554 req->bmRequestType, req->bRequest); 555 556 len = UGETW(req->wLength); 557 value = UGETW(req->wValue); 558 index = UGETW(req->wIndex); 559 560 #define C(x,y) ((x) | ((y) << 8)) 561 switch (C(req->bRequest, req->bmRequestType)) { 562 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 563 DPRINTFN(8, "wValue=0x%04x\n", value); 564 565 if (len == 0) 566 break; 567 switch (value) { 568 #define sd ((usb_string_descriptor_t *)buf) 569 case C(2, UDESC_STRING): 570 /* Product */ 571 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 572 break; 573 #undef sd 574 default: 575 /* default from usbroothub */ 576 return buflen; 577 } 578 break; 579 580 case C(UR_GET_CONFIG, UT_READ_DEVICE): 581 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 582 case C(UR_GET_STATUS, UT_READ_INTERFACE): 583 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 584 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 585 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 586 /* default from usbroothub */ 587 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 588 589 return buflen; 590 591 default: 592 /* Hub requests */ 593 err = dwc2_hcd_hub_control(sc->sc_hsotg, 594 C(req->bRequest, req->bmRequestType), value, index, 595 buf, len); 596 if (err) { 597 return -1; 598 } 599 totlen = len; 600 } 601 602 return totlen; 603 } 604 605 Static usbd_status 606 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 607 { 608 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 609 usbd_status err; 610 611 DPRINTF("\n"); 612 613 /* Insert last in queue. */ 614 mutex_enter(&sc->sc_lock); 615 err = usb_insert_transfer(xfer); 616 mutex_exit(&sc->sc_lock); 617 if (err) 618 return err; 619 620 /* Pipe isn't running, start first */ 621 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 622 } 623 624 Static usbd_status 625 dwc2_root_intr_start(struct usbd_xfer *xfer) 626 { 627 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 628 629 DPRINTF("\n"); 630 631 if (sc->sc_dying) 632 return USBD_IOERROR; 633 634 mutex_enter(&sc->sc_lock); 635 KASSERT(sc->sc_intrxfer == NULL); 636 sc->sc_intrxfer = xfer; 637 mutex_exit(&sc->sc_lock); 638 639 return USBD_IN_PROGRESS; 640 } 641 642 /* Abort a root interrupt request. */ 643 Static void 644 dwc2_root_intr_abort(struct usbd_xfer *xfer) 645 { 646 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 647 648 DPRINTF("xfer=%p\n", xfer); 649 650 KASSERT(mutex_owned(&sc->sc_lock)); 651 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 652 653 xfer->ux_status = USBD_CANCELLED; 654 usb_transfer_complete(xfer); 655 } 656 657 Static void 658 dwc2_root_intr_close(struct usbd_pipe *pipe) 659 { 660 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 661 662 DPRINTF("\n"); 663 664 KASSERT(mutex_owned(&sc->sc_lock)); 665 666 sc->sc_intrxfer = NULL; 667 } 668 669 Static void 670 dwc2_root_intr_done(struct usbd_xfer *xfer) 671 { 672 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 673 674 KASSERT(sc->sc_intrxfer != NULL); 675 sc->sc_intrxfer = NULL; 676 DPRINTF("\n"); 677 } 678 679 /***********************************************************************/ 680 681 Static usbd_status 682 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 683 { 684 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 685 usbd_status err; 686 687 DPRINTF("\n"); 688 689 /* Insert last in queue. */ 690 mutex_enter(&sc->sc_lock); 691 err = usb_insert_transfer(xfer); 692 mutex_exit(&sc->sc_lock); 693 if (err) 694 return err; 695 696 /* Pipe isn't running, start first */ 697 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 698 } 699 700 Static usbd_status 701 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 702 { 703 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 704 usbd_status err; 705 706 DPRINTF("\n"); 707 708 mutex_enter(&sc->sc_lock); 709 xfer->ux_status = USBD_IN_PROGRESS; 710 err = dwc2_device_start(xfer); 711 mutex_exit(&sc->sc_lock); 712 713 if (err) 714 return err; 715 716 return USBD_IN_PROGRESS; 717 } 718 719 Static void 720 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 721 { 722 #ifdef DIAGNOSTIC 723 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 724 #endif 725 KASSERT(mutex_owned(&sc->sc_lock)); 726 727 DPRINTF("xfer=%p\n", xfer); 728 dwc2_abort_xfer(xfer, USBD_CANCELLED); 729 } 730 731 Static void 732 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 733 { 734 735 DPRINTF("pipe=%p\n", pipe); 736 dwc2_close_pipe(pipe); 737 } 738 739 Static void 740 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 741 { 742 743 DPRINTF("xfer=%p\n", xfer); 744 } 745 746 /***********************************************************************/ 747 748 Static usbd_status 749 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 750 { 751 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 752 usbd_status err; 753 754 DPRINTF("xfer=%p\n", xfer); 755 756 /* Insert last in queue. */ 757 mutex_enter(&sc->sc_lock); 758 err = usb_insert_transfer(xfer); 759 760 KASSERT(err == USBD_NORMAL_COMPLETION); 761 762 xfer->ux_status = USBD_IN_PROGRESS; 763 err = dwc2_device_start(xfer); 764 mutex_exit(&sc->sc_lock); 765 766 return err; 767 } 768 769 Static void 770 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 771 { 772 #ifdef DIAGNOSTIC 773 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 774 #endif 775 KASSERT(mutex_owned(&sc->sc_lock)); 776 777 DPRINTF("xfer=%p\n", xfer); 778 dwc2_abort_xfer(xfer, USBD_CANCELLED); 779 } 780 781 Static void 782 dwc2_device_bulk_close(struct usbd_pipe *pipe) 783 { 784 785 DPRINTF("pipe=%p\n", pipe); 786 787 dwc2_close_pipe(pipe); 788 } 789 790 Static void 791 dwc2_device_bulk_done(struct usbd_xfer *xfer) 792 { 793 794 DPRINTF("xfer=%p\n", xfer); 795 } 796 797 /***********************************************************************/ 798 799 Static usbd_status 800 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 801 { 802 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 803 usbd_status err; 804 805 DPRINTF("xfer=%p\n", xfer); 806 807 /* Insert last in queue. */ 808 mutex_enter(&sc->sc_lock); 809 err = usb_insert_transfer(xfer); 810 mutex_exit(&sc->sc_lock); 811 if (err) 812 return err; 813 814 /* Pipe isn't running, start first */ 815 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 816 } 817 818 Static usbd_status 819 dwc2_device_intr_start(struct usbd_xfer *xfer) 820 { 821 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 822 struct usbd_device *dev = dpipe->pipe.up_dev; 823 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 824 usbd_status err; 825 826 mutex_enter(&sc->sc_lock); 827 xfer->ux_status = USBD_IN_PROGRESS; 828 err = dwc2_device_start(xfer); 829 mutex_exit(&sc->sc_lock); 830 831 if (err) 832 return err; 833 834 return USBD_IN_PROGRESS; 835 } 836 837 /* Abort a device interrupt request. */ 838 Static void 839 dwc2_device_intr_abort(struct usbd_xfer *xfer) 840 { 841 #ifdef DIAGNOSTIC 842 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 843 #endif 844 845 KASSERT(mutex_owned(&sc->sc_lock)); 846 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 847 848 DPRINTF("xfer=%p\n", xfer); 849 850 dwc2_abort_xfer(xfer, USBD_CANCELLED); 851 } 852 853 Static void 854 dwc2_device_intr_close(struct usbd_pipe *pipe) 855 { 856 857 DPRINTF("pipe=%p\n", pipe); 858 859 dwc2_close_pipe(pipe); 860 } 861 862 Static void 863 dwc2_device_intr_done(struct usbd_xfer *xfer) 864 { 865 866 DPRINTF("\n"); 867 } 868 869 /***********************************************************************/ 870 871 usbd_status 872 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 873 { 874 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 875 usbd_status err; 876 877 DPRINTF("xfer=%p\n", xfer); 878 879 /* Insert last in queue. */ 880 mutex_enter(&sc->sc_lock); 881 err = usb_insert_transfer(xfer); 882 883 KASSERT(err == USBD_NORMAL_COMPLETION); 884 885 xfer->ux_status = USBD_IN_PROGRESS; 886 err = dwc2_device_start(xfer); 887 mutex_exit(&sc->sc_lock); 888 889 return err; 890 } 891 892 void 893 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 894 { 895 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 896 KASSERT(mutex_owned(&sc->sc_lock)); 897 898 DPRINTF("xfer=%p\n", xfer); 899 dwc2_abort_xfer(xfer, USBD_CANCELLED); 900 } 901 902 void 903 dwc2_device_isoc_close(struct usbd_pipe *pipe) 904 { 905 DPRINTF("\n"); 906 907 dwc2_close_pipe(pipe); 908 } 909 910 void 911 dwc2_device_isoc_done(struct usbd_xfer *xfer) 912 { 913 914 DPRINTF("\n"); 915 } 916 917 918 usbd_status 919 dwc2_device_start(struct usbd_xfer *xfer) 920 { 921 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 922 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 923 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 924 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 925 struct dwc2_hcd_urb *dwc2_urb; 926 927 struct usbd_device *dev = xfer->ux_pipe->up_dev; 928 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 929 uint8_t addr = dev->ud_addr; 930 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 931 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 932 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 933 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 934 uint32_t len; 935 936 uint32_t flags = 0; 937 uint32_t off = 0; 938 int retval, err; 939 int alloc_bandwidth = 0; 940 int i; 941 942 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 943 944 if (xfertype == UE_ISOCHRONOUS || 945 xfertype == UE_INTERRUPT) { 946 mutex_spin_enter(&hsotg->lock); 947 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 948 alloc_bandwidth = 1; 949 mutex_spin_exit(&hsotg->lock); 950 } 951 952 /* 953 * For Control pipe the direction is from the request, all other 954 * transfers have been set correctly at pipe open time. 955 */ 956 if (xfertype == UE_CONTROL) { 957 usb_device_request_t *req = &xfer->ux_request; 958 959 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 960 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 961 "mps=%d\n", 962 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 963 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 964 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 965 966 /* Copy request packet to our DMA buffer */ 967 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 968 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 969 BUS_DMASYNC_PREWRITE); 970 len = UGETW(req->wLength); 971 if ((req->bmRequestType & UT_READ) == UT_READ) { 972 dir = UE_DIR_IN; 973 } else { 974 dir = UE_DIR_OUT; 975 } 976 977 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 978 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 979 len, dir == UE_DIR_IN ? "in" : "out"); 980 } else { 981 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 982 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 983 epnum, mps, dir == UT_READ ? "in" :"out"); 984 985 len = xfer->ux_length; 986 } 987 988 dwc2_urb = dxfer->urb; 989 if (!dwc2_urb) 990 return USBD_NOMEM; 991 992 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 993 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 994 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 995 996 dwc2_urb->priv = xfer; 997 dwc2_urb->packet_count = xfer->ux_nframes; 998 999 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1000 mps); 1001 1002 if (xfertype == UE_CONTROL) { 1003 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1004 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1005 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1006 } else { 1007 /* XXXNH - % mps required? */ 1008 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1009 flags |= URB_SEND_ZERO_PACKET; 1010 } 1011 flags |= URB_GIVEBACK_ASAP; 1012 1013 /* 1014 * control transfers with no data phase don't touch usbdma, but 1015 * everything else does. 1016 */ 1017 if (!(xfertype == UE_CONTROL && len == 0)) { 1018 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1019 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1020 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1021 1022 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1023 dir == UE_DIR_IN ? 1024 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1025 } 1026 dwc2_urb->length = len; 1027 dwc2_urb->flags = flags; 1028 dwc2_urb->status = -EINPROGRESS; 1029 1030 if (xfertype == UE_INTERRUPT || 1031 xfertype == UE_ISOCHRONOUS) { 1032 uint16_t ival; 1033 1034 if (xfertype == UE_INTERRUPT && 1035 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1036 ival = dpipe->pipe.up_interval; 1037 } else { 1038 ival = ed->bInterval; 1039 } 1040 1041 if (ival < 1) { 1042 retval = -ENODEV; 1043 goto fail; 1044 } 1045 if (dev->ud_speed == USB_SPEED_HIGH || 1046 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1047 if (ival > 16) { 1048 /* 1049 * illegal with HS/FS, but there were 1050 * documentation bugs in the spec 1051 */ 1052 ival = 256; 1053 } else { 1054 ival = (1 << (ival - 1)); 1055 } 1056 } else { 1057 if (xfertype == UE_INTERRUPT && ival < 10) 1058 ival = 10; 1059 } 1060 dwc2_urb->interval = ival; 1061 } 1062 1063 /* XXXNH bring down from callers?? */ 1064 // mutex_enter(&sc->sc_lock); 1065 1066 xfer->ux_actlen = 0; 1067 1068 KASSERT(xfertype != UE_ISOCHRONOUS || 1069 xfer->ux_nframes <= dwc2_urb->packet_count); 1070 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1071 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1072 1073 for (off = i = 0; i < xfer->ux_nframes; ++i) { 1074 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1075 off, xfer->ux_frlengths[i]); 1076 1077 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1078 xfer->ux_frlengths[i]); 1079 off += xfer->ux_frlengths[i]; 1080 } 1081 1082 struct dwc2_qh *qh = dpipe->priv; 1083 struct dwc2_qtd *qtd; 1084 bool qh_allocated = false; 1085 1086 /* Create QH for the endpoint if it doesn't exist */ 1087 if (!qh) { 1088 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1089 if (!qh) { 1090 retval = -ENOMEM; 1091 goto fail; 1092 } 1093 dpipe->priv = qh; 1094 qh_allocated = true; 1095 } 1096 1097 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1098 if (!qtd) { 1099 retval = -ENOMEM; 1100 goto fail1; 1101 } 1102 memset(qtd, 0, sizeof(*qtd)); 1103 1104 /* might need to check cpu_intr_p */ 1105 mutex_spin_enter(&hsotg->lock); 1106 1107 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1108 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1109 dwc2_timeout, xfer); 1110 } 1111 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1112 if (retval) 1113 goto fail2; 1114 1115 if (alloc_bandwidth) { 1116 dwc2_allocate_bus_bandwidth(hsotg, 1117 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1118 xfer); 1119 } 1120 1121 mutex_spin_exit(&hsotg->lock); 1122 // mutex_exit(&sc->sc_lock); 1123 1124 return USBD_IN_PROGRESS; 1125 1126 fail2: 1127 callout_halt(&xfer->ux_callout, &hsotg->lock); 1128 dwc2_urb->priv = NULL; 1129 mutex_spin_exit(&hsotg->lock); 1130 pool_cache_put(sc->sc_qtdpool, qtd); 1131 1132 fail1: 1133 if (qh_allocated) { 1134 dpipe->priv = NULL; 1135 dwc2_hcd_qh_free(hsotg, qh); 1136 } 1137 fail: 1138 1139 switch (retval) { 1140 case -EINVAL: 1141 case -ENODEV: 1142 err = USBD_INVAL; 1143 break; 1144 case -ENOMEM: 1145 err = USBD_NOMEM; 1146 break; 1147 default: 1148 err = USBD_IOERROR; 1149 } 1150 1151 return err; 1152 1153 } 1154 1155 int dwc2_intr(void *p) 1156 { 1157 struct dwc2_softc *sc = p; 1158 struct dwc2_hsotg *hsotg; 1159 int ret = 0; 1160 1161 if (sc == NULL) 1162 return 0; 1163 1164 hsotg = sc->sc_hsotg; 1165 mutex_spin_enter(&hsotg->lock); 1166 1167 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1168 goto done; 1169 1170 if (sc->sc_bus.ub_usepolling) { 1171 uint32_t intrs; 1172 1173 intrs = dwc2_read_core_intr(hsotg); 1174 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1175 } else { 1176 ret = dwc2_interrupt(sc); 1177 } 1178 1179 done: 1180 mutex_spin_exit(&hsotg->lock); 1181 1182 return ret; 1183 } 1184 1185 int 1186 dwc2_interrupt(struct dwc2_softc *sc) 1187 { 1188 int ret = 0; 1189 1190 if (sc->sc_hcdenabled) { 1191 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1192 } 1193 1194 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1195 1196 return ret; 1197 } 1198 1199 /***********************************************************************/ 1200 1201 int 1202 dwc2_detach(struct dwc2_softc *sc, int flags) 1203 { 1204 int rv = 0; 1205 1206 if (sc->sc_child != NULL) 1207 rv = config_detach(sc->sc_child, flags); 1208 1209 return rv; 1210 } 1211 1212 bool 1213 dwc2_shutdown(device_t self, int flags) 1214 { 1215 struct dwc2_softc *sc = device_private(self); 1216 1217 sc = sc; 1218 1219 return true; 1220 } 1221 1222 void 1223 dwc2_childdet(device_t self, device_t child) 1224 { 1225 struct dwc2_softc *sc = device_private(self); 1226 1227 sc = sc; 1228 } 1229 1230 int 1231 dwc2_activate(device_t self, enum devact act) 1232 { 1233 struct dwc2_softc *sc = device_private(self); 1234 1235 sc = sc; 1236 1237 return 0; 1238 } 1239 1240 bool 1241 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1242 { 1243 struct dwc2_softc *sc = device_private(dv); 1244 1245 sc = sc; 1246 1247 return true; 1248 } 1249 1250 bool 1251 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1252 { 1253 struct dwc2_softc *sc = device_private(dv); 1254 1255 sc = sc; 1256 1257 return true; 1258 } 1259 1260 /***********************************************************************/ 1261 int 1262 dwc2_init(struct dwc2_softc *sc) 1263 { 1264 int err = 0; 1265 1266 sc->sc_bus.ub_hcpriv = sc; 1267 sc->sc_bus.ub_revision = USBREV_2_0; 1268 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1269 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1270 sc->sc_bus.ub_usedma = true; 1271 sc->sc_hcdenabled = false; 1272 1273 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1274 1275 TAILQ_INIT(&sc->sc_complete); 1276 1277 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1278 dwc2_rhc, sc); 1279 1280 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1281 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1282 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1283 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1284 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1285 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1286 1287 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1288 sc->sc_hsotg->hsotg_sc = sc; 1289 sc->sc_hsotg->dev = sc->sc_dev; 1290 sc->sc_hcdenabled = true; 1291 1292 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1293 struct dwc2_core_params defparams; 1294 int retval; 1295 1296 if (sc->sc_params == NULL) { 1297 /* Default all params to autodetect */ 1298 dwc2_set_all_params(&defparams, -1); 1299 sc->sc_params = &defparams; 1300 1301 /* 1302 * Disable descriptor dma mode by default as the HW can support 1303 * it, but does not support it for SPLIT transactions. 1304 */ 1305 defparams.dma_desc_enable = 0; 1306 } 1307 hsotg->dr_mode = USB_DR_MODE_HOST; 1308 1309 /* Detect config values from hardware */ 1310 retval = dwc2_get_hwparams(hsotg); 1311 if (retval) { 1312 goto fail2; 1313 } 1314 1315 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1316 dwc2_set_all_params(hsotg->core_params, -1); 1317 1318 /* Validate parameter values */ 1319 dwc2_set_parameters(hsotg, sc->sc_params); 1320 1321 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1322 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1323 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1324 retval = dwc2_gadget_init(hsotg); 1325 if (retval) 1326 goto fail2; 1327 hsotg->gadget_enabled = 1; 1328 } 1329 #endif 1330 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1331 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1332 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1333 retval = dwc2_hcd_init(hsotg); 1334 if (retval) { 1335 if (hsotg->gadget_enabled) 1336 dwc2_hsotg_remove(hsotg); 1337 goto fail2; 1338 } 1339 hsotg->hcd_enabled = 1; 1340 } 1341 #endif 1342 1343 uint32_t snpsid = hsotg->hw_params.snpsid; 1344 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1345 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1346 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1347 1348 return 0; 1349 1350 fail2: 1351 err = -retval; 1352 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1353 softint_disestablish(sc->sc_rhc_si); 1354 1355 return err; 1356 } 1357 1358 #if 0 1359 /* 1360 * curmode is a mode indication bit 0 = device, 1 = host 1361 */ 1362 static const char * const intnames[32] = { 1363 "curmode", "modemis", "otgint", "sof", 1364 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1365 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1366 "usbrst", "enumdone", "isooutdrop", "eopf", 1367 "restore_done", "epmis", "iepint", "oepint", 1368 "incompisoin", "incomplp", "fetsusp", "resetdet", 1369 "prtint", "hchint", "ptxfemp", "lpm", 1370 "conidstschng", "disconnint", "sessreqint", "wkupint" 1371 }; 1372 1373 1374 /***********************************************************************/ 1375 1376 #endif 1377 1378 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1379 int *hub_port) 1380 { 1381 struct usbd_xfer *xfer = context; 1382 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1383 struct usbd_device *dev = dpipe->pipe.up_dev; 1384 1385 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1386 *hub_port = dev->ud_myhsport->up_portno; 1387 } 1388 1389 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1390 { 1391 struct usbd_xfer *xfer = context; 1392 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1393 struct usbd_device *dev = dpipe->pipe.up_dev; 1394 1395 return dev->ud_speed; 1396 } 1397 1398 /* 1399 * Sets the final status of an URB and returns it to the upper layer. Any 1400 * required cleanup of the URB is performed. 1401 * 1402 * Must be called with interrupt disabled and spinlock held 1403 */ 1404 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1405 int status) 1406 { 1407 struct usbd_xfer *xfer; 1408 struct dwc2_xfer *dxfer; 1409 struct dwc2_softc *sc; 1410 usb_endpoint_descriptor_t *ed; 1411 uint8_t xfertype; 1412 1413 if (!qtd) { 1414 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1415 return; 1416 } 1417 1418 if (!qtd->urb) { 1419 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1420 return; 1421 } 1422 1423 xfer = qtd->urb->priv; 1424 if (!xfer) { 1425 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1426 return; 1427 } 1428 1429 /* 1430 * If software has completed it, either by cancellation 1431 * or timeout, drop it on the floor. 1432 */ 1433 if (xfer->ux_status != USBD_IN_PROGRESS) { 1434 KASSERT(xfer->ux_status == USBD_CANCELLED || 1435 xfer->ux_status == USBD_TIMEOUT); 1436 return; 1437 } 1438 1439 /* 1440 * Cancel the timeout and the task, which have not yet 1441 * run. If they have already fired, at worst they are 1442 * waiting for the lock. They will see that the xfer 1443 * is no longer in progress and give up. 1444 */ 1445 callout_stop(&xfer->ux_callout); 1446 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1447 1448 dxfer = DWC2_XFER2DXFER(xfer); 1449 sc = DWC2_XFER2SC(xfer); 1450 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1451 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1452 1453 struct dwc2_hcd_urb *urb = qtd->urb; 1454 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1455 1456 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1457 1458 if (xfertype == UE_ISOCHRONOUS) { 1459 int i; 1460 1461 xfer->ux_actlen = 0; 1462 for (i = 0; i < xfer->ux_nframes; ++i) { 1463 xfer->ux_frlengths[i] = 1464 dwc2_hcd_urb_get_iso_desc_actual_length( 1465 urb, i); 1466 xfer->ux_actlen += xfer->ux_frlengths[i]; 1467 } 1468 } 1469 1470 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1471 int i; 1472 1473 for (i = 0; i < xfer->ux_nframes; i++) 1474 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1475 i, urb->iso_descs[i].status); 1476 } 1477 1478 if (!status) { 1479 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1480 xfer->ux_actlen < xfer->ux_length) 1481 status = -EIO; 1482 } 1483 1484 switch (status) { 1485 case 0: 1486 xfer->ux_status = USBD_NORMAL_COMPLETION; 1487 break; 1488 case -EPIPE: 1489 xfer->ux_status = USBD_STALLED; 1490 break; 1491 case -ETIMEDOUT: 1492 xfer->ux_status = USBD_TIMEOUT; 1493 break; 1494 case -EPROTO: 1495 xfer->ux_status = USBD_INVAL; 1496 break; 1497 case -EIO: 1498 xfer->ux_status = USBD_IOERROR; 1499 break; 1500 case -EOVERFLOW: 1501 xfer->ux_status = USBD_IOERROR; 1502 break; 1503 default: 1504 xfer->ux_status = USBD_IOERROR; 1505 printf("%s: unknown error status %d\n", __func__, status); 1506 } 1507 1508 if (xfer->ux_status == USBD_NORMAL_COMPLETION) { 1509 /* 1510 * control transfers with no data phase don't touch dmabuf, but 1511 * everything else does. 1512 */ 1513 if (!(xfertype == UE_CONTROL && 1514 UGETW(xfer->ux_request.wLength) == 0) && 1515 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1516 ) { 1517 int rd = usbd_xfer_isread(xfer); 1518 1519 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1520 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1521 } 1522 } 1523 1524 if (xfertype == UE_ISOCHRONOUS || 1525 xfertype == UE_INTERRUPT) { 1526 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1527 1528 dwc2_free_bus_bandwidth(hsotg, 1529 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1530 xfer); 1531 } 1532 1533 qtd->urb = NULL; 1534 KASSERT(mutex_owned(&hsotg->lock)); 1535 1536 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1537 1538 mutex_spin_exit(&hsotg->lock); 1539 usb_schedsoftintr(&sc->sc_bus); 1540 mutex_spin_enter(&hsotg->lock); 1541 } 1542 1543 1544 int 1545 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1546 { 1547 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1548 1549 mutex_spin_enter(&hsotg->lock); 1550 1551 hsotg->lx_state = DWC2_L0; 1552 1553 if (dwc2_is_device_mode(hsotg)) { 1554 mutex_spin_exit(&hsotg->lock); 1555 return 0; /* why 0 ?? */ 1556 } 1557 1558 dwc2_hcd_reinit(hsotg); 1559 1560 mutex_spin_exit(&hsotg->lock); 1561 return 0; 1562 } 1563 1564 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1565 { 1566 1567 return false; 1568 } 1569
Indexes created Fri Sep 26 20:09:58 GMT 2025