dwc2.c revision 1.58
1 /* $NetBSD: dwc2.c,v 1.58 2019/02/17 04:17:52 rin Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.58 2019/02/17 04:17:52 rin Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kmem.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/cpu.h> 46 47 #include <machine/endian.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usb_mem.h> 53 #include <dev/usb/usbroothub.h> 54 55 #include <dwc2/dwc2.h> 56 #include <dwc2/dwc2var.h> 57 58 #include "dwc2_core.h" 59 #include "dwc2_hcd.h" 60 61 #ifdef DWC2_COUNTERS 62 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 63 #else 64 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 65 #endif 66 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 67 68 #ifdef DWC2_DEBUG 69 #define DPRINTFN(n,fmt,...) do { \ 70 if (dwc2debug >= (n)) { \ 71 printf("%s: " fmt, \ 72 __FUNCTION__,## __VA_ARGS__); \ 73 } \ 74 } while (0) 75 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 76 int dwc2debug = 0; 77 #else 78 #define DPRINTF(...) do { } while (0) 79 #define DPRINTFN(...) do { } while (0) 80 #endif 81 82 Static usbd_status dwc2_open(struct usbd_pipe *); 83 Static void dwc2_poll(struct usbd_bus *); 84 Static void dwc2_softintr(void *); 85 86 Static struct usbd_xfer * 87 dwc2_allocx(struct usbd_bus *, unsigned int); 88 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 89 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 90 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 91 void *, int); 92 93 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 94 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 95 Static void dwc2_root_intr_abort(struct usbd_xfer *); 96 Static void dwc2_root_intr_close(struct usbd_pipe *); 97 Static void dwc2_root_intr_done(struct usbd_xfer *); 98 99 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 100 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 101 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 102 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 103 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 104 105 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 106 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 107 Static void dwc2_device_bulk_close(struct usbd_pipe *); 108 Static void dwc2_device_bulk_done(struct usbd_xfer *); 109 110 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 111 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 112 Static void dwc2_device_intr_abort(struct usbd_xfer *); 113 Static void dwc2_device_intr_close(struct usbd_pipe *); 114 Static void dwc2_device_intr_done(struct usbd_xfer *); 115 116 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 117 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 118 Static void dwc2_device_isoc_close(struct usbd_pipe *); 119 Static void dwc2_device_isoc_done(struct usbd_xfer *); 120 121 Static usbd_status dwc2_device_start(struct usbd_xfer *); 122 123 Static void dwc2_close_pipe(struct usbd_pipe *); 124 Static void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 125 126 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 127 Static void dwc2_noop(struct usbd_pipe *pipe); 128 129 Static int dwc2_interrupt(struct dwc2_softc *); 130 Static void dwc2_rhc(void *); 131 132 Static void dwc2_timeout(void *); 133 Static void dwc2_timeout_task(void *); 134 135 136 static inline void 137 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 138 struct usbd_xfer *xfer) 139 { 140 } 141 142 static inline void 143 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 144 struct usbd_xfer *xfer) 145 { 146 } 147 148 Static const struct usbd_bus_methods dwc2_bus_methods = { 149 .ubm_open = dwc2_open, 150 .ubm_softint = dwc2_softintr, 151 .ubm_dopoll = dwc2_poll, 152 .ubm_allocx = dwc2_allocx, 153 .ubm_freex = dwc2_freex, 154 .ubm_getlock = dwc2_get_lock, 155 .ubm_rhctrl = dwc2_roothub_ctrl, 156 }; 157 158 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 159 .upm_transfer = dwc2_root_intr_transfer, 160 .upm_start = dwc2_root_intr_start, 161 .upm_abort = dwc2_root_intr_abort, 162 .upm_close = dwc2_root_intr_close, 163 .upm_cleartoggle = dwc2_noop, 164 .upm_done = dwc2_root_intr_done, 165 }; 166 167 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 168 .upm_transfer = dwc2_device_ctrl_transfer, 169 .upm_start = dwc2_device_ctrl_start, 170 .upm_abort = dwc2_device_ctrl_abort, 171 .upm_close = dwc2_device_ctrl_close, 172 .upm_cleartoggle = dwc2_noop, 173 .upm_done = dwc2_device_ctrl_done, 174 }; 175 176 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 177 .upm_transfer = dwc2_device_intr_transfer, 178 .upm_start = dwc2_device_intr_start, 179 .upm_abort = dwc2_device_intr_abort, 180 .upm_close = dwc2_device_intr_close, 181 .upm_cleartoggle = dwc2_device_clear_toggle, 182 .upm_done = dwc2_device_intr_done, 183 }; 184 185 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 186 .upm_transfer = dwc2_device_bulk_transfer, 187 .upm_abort = dwc2_device_bulk_abort, 188 .upm_close = dwc2_device_bulk_close, 189 .upm_cleartoggle = dwc2_device_clear_toggle, 190 .upm_done = dwc2_device_bulk_done, 191 }; 192 193 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 194 .upm_transfer = dwc2_device_isoc_transfer, 195 .upm_abort = dwc2_device_isoc_abort, 196 .upm_close = dwc2_device_isoc_close, 197 .upm_cleartoggle = dwc2_noop, 198 .upm_done = dwc2_device_isoc_done, 199 }; 200 201 struct usbd_xfer * 202 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 203 { 204 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 205 struct dwc2_xfer *dxfer; 206 struct usbd_xfer *xfer; 207 208 DPRINTFN(10, "\n"); 209 210 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 211 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 212 xfer = (struct usbd_xfer *)dxfer; 213 if (dxfer != NULL) { 214 memset(dxfer, 0, sizeof(*dxfer)); 215 216 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 217 nframes, GFP_KERNEL); 218 219 /* Initialise this always so we can call remove on it. */ 220 usb_init_task(&xfer->ux_aborttask, dwc2_timeout_task, xfer, 221 USB_TASKQ_MPSAFE); 222 #ifdef DIAGNOSTIC 223 dxfer->xfer.ux_state = XFER_BUSY; 224 #endif 225 } 226 return (struct usbd_xfer *)dxfer; 227 } 228 229 void 230 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 231 { 232 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 233 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 234 235 DPRINTFN(10, "\n"); 236 237 #ifdef DIAGNOSTIC 238 if (xfer->ux_state != XFER_BUSY && 239 xfer->ux_status != USBD_NOT_STARTED) { 240 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 241 } 242 xfer->ux_state = XFER_FREE; 243 #endif 244 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 245 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 246 pool_cache_put(sc->sc_xferpool, xfer); 247 } 248 249 Static void 250 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 251 { 252 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 253 254 *lock = &sc->sc_lock; 255 } 256 257 Static void 258 dwc2_rhc(void *addr) 259 { 260 struct dwc2_softc *sc = addr; 261 struct usbd_xfer *xfer; 262 u_char *p; 263 264 DPRINTF("\n"); 265 mutex_enter(&sc->sc_lock); 266 xfer = sc->sc_intrxfer; 267 268 if (xfer == NULL) { 269 /* Just ignore the change. */ 270 mutex_exit(&sc->sc_lock); 271 return; 272 273 } 274 /* set port bit */ 275 p = KERNADDR(&xfer->ux_dmabuf, 0); 276 277 p[0] = 0x02; /* we only have one port (1 << 1) */ 278 279 xfer->ux_actlen = xfer->ux_length; 280 xfer->ux_status = USBD_NORMAL_COMPLETION; 281 282 usb_transfer_complete(xfer); 283 mutex_exit(&sc->sc_lock); 284 } 285 286 Static void 287 dwc2_softintr(void *v) 288 { 289 struct usbd_bus *bus = v; 290 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 291 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 292 struct dwc2_xfer *dxfer; 293 294 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 295 296 mutex_spin_enter(&hsotg->lock); 297 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 298 299 KASSERTMSG(!callout_pending(&dxfer->xfer.ux_callout), 300 "xfer %p pipe %p\n", dxfer, dxfer->xfer.ux_pipe); 301 302 /* 303 * dwc2_abort_xfer will remove this transfer from the 304 * sc_complete queue 305 */ 306 /*XXXNH not tested */ 307 if (dxfer->xfer.ux_status == USBD_CANCELLED || 308 dxfer->xfer.ux_status == USBD_TIMEOUT) { 309 continue; 310 } 311 312 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 313 314 mutex_spin_exit(&hsotg->lock); 315 usb_transfer_complete(&dxfer->xfer); 316 mutex_spin_enter(&hsotg->lock); 317 } 318 mutex_spin_exit(&hsotg->lock); 319 } 320 321 Static void 322 dwc2_timeout(void *addr) 323 { 324 struct usbd_xfer *xfer = addr; 325 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 326 struct usbd_device *dev = xfer->ux_pipe->up_dev; 327 328 DPRINTF("xfer=%p\n", xfer); 329 330 mutex_enter(&sc->sc_lock); 331 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 332 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 333 mutex_exit(&sc->sc_lock); 334 } 335 336 Static void 337 dwc2_timeout_task(void *addr) 338 { 339 struct usbd_xfer *xfer = addr; 340 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 341 342 DPRINTF("xfer=%p\n", xfer); 343 344 mutex_enter(&sc->sc_lock); 345 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 346 mutex_exit(&sc->sc_lock); 347 } 348 349 usbd_status 350 dwc2_open(struct usbd_pipe *pipe) 351 { 352 struct usbd_device *dev = pipe->up_dev; 353 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 354 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 355 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 356 uint8_t addr = dev->ud_addr; 357 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 358 usbd_status err; 359 360 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 361 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 362 363 if (sc->sc_dying) { 364 return USBD_IOERROR; 365 } 366 367 if (addr == dev->ud_bus->ub_rhaddr) { 368 switch (ed->bEndpointAddress) { 369 case USB_CONTROL_ENDPOINT: 370 pipe->up_methods = &roothub_ctrl_methods; 371 break; 372 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 373 pipe->up_methods = &dwc2_root_intr_methods; 374 break; 375 default: 376 DPRINTF("bad bEndpointAddress 0x%02x\n", 377 ed->bEndpointAddress); 378 return USBD_INVAL; 379 } 380 DPRINTF("root hub pipe open\n"); 381 return USBD_NORMAL_COMPLETION; 382 } 383 384 switch (xfertype) { 385 case UE_CONTROL: 386 pipe->up_methods = &dwc2_device_ctrl_methods; 387 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 388 0, &dpipe->req_dma); 389 if (err) 390 return err; 391 break; 392 case UE_INTERRUPT: 393 pipe->up_methods = &dwc2_device_intr_methods; 394 break; 395 case UE_ISOCHRONOUS: 396 pipe->up_serialise = false; 397 pipe->up_methods = &dwc2_device_isoc_methods; 398 break; 399 case UE_BULK: 400 pipe->up_serialise = false; 401 pipe->up_methods = &dwc2_device_bulk_methods; 402 break; 403 default: 404 DPRINTF("bad xfer type %d\n", xfertype); 405 return USBD_INVAL; 406 } 407 408 /* QH */ 409 dpipe->priv = NULL; 410 411 return USBD_NORMAL_COMPLETION; 412 } 413 414 Static void 415 dwc2_poll(struct usbd_bus *bus) 416 { 417 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 418 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 419 420 mutex_spin_enter(&hsotg->lock); 421 dwc2_interrupt(sc); 422 mutex_spin_exit(&hsotg->lock); 423 } 424 425 /* 426 * Close a reqular pipe. 427 * Assumes that there are no pending transactions. 428 */ 429 Static void 430 dwc2_close_pipe(struct usbd_pipe *pipe) 431 { 432 #ifdef DIAGNOSTIC 433 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 434 #endif 435 436 KASSERT(mutex_owned(&sc->sc_lock)); 437 } 438 439 /* 440 * Abort a device request. 441 */ 442 Static void 443 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 444 { 445 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 446 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 447 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 448 struct dwc2_xfer *d, *tmp; 449 int err; 450 451 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 452 "invalid status for abort: %d", (int)status); 453 454 DPRINTF("xfer %p pipe %p status 0x%08x", xfer, xfer->ux_pipe, status); 455 456 KASSERT(mutex_owned(&sc->sc_lock)); 457 ASSERT_SLEEPABLE(); 458 459 if (status == USBD_CANCELLED) { 460 /* 461 * We are synchronously aborting. Try to stop the 462 * callout and task, but if we can't, wait for them to 463 * complete. 464 */ 465 callout_halt(&xfer->ux_callout, &sc->sc_lock); 466 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 467 USB_TASKQ_HC, &sc->sc_lock); 468 } else { 469 /* Otherwise, we are timing out. */ 470 KASSERT(status == USBD_TIMEOUT); 471 } 472 473 /* 474 * The xfer cannot have been cancelled already. It is the 475 * responsibility of the caller of usbd_abort_pipe not to try 476 * to abort a pipe multiple times, whether concurrently or 477 * sequentially. 478 */ 479 KASSERT(xfer->ux_status != USBD_CANCELLED); 480 481 /* Only the timeout, which runs only once, can time it out. */ 482 KASSERT(xfer->ux_status != USBD_TIMEOUT); 483 484 /* If anyone else beat us, we're done. */ 485 if (xfer->ux_status != USBD_IN_PROGRESS) 486 return; 487 488 /* We beat everyone else. Claim the status. */ 489 xfer->ux_status = status; 490 491 /* 492 * If we're dying, skip the hardware action and just notify the 493 * software that we're done. 494 */ 495 if (sc->sc_dying) { 496 DPRINTFN(4, "xfer %p dying 0x%08x", xfer, xfer->ux_status); 497 goto dying; 498 } 499 500 /* 501 * HC Step 1: Handle the hardware. 502 */ 503 mutex_spin_enter(&hsotg->lock); 504 /* XXXNH suboptimal */ 505 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 506 if (d == dxfer) { 507 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 508 break; 509 } 510 } 511 512 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 513 if (err) { 514 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 515 } 516 517 mutex_spin_exit(&hsotg->lock); 518 519 /* 520 * Final Step: Notify completion to waiting xfers. 521 */ 522 dying: 523 usb_transfer_complete(xfer); 524 KASSERT(mutex_owned(&sc->sc_lock)); 525 } 526 527 Static void 528 dwc2_noop(struct usbd_pipe *pipe) 529 { 530 531 } 532 533 Static void 534 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 535 { 536 537 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 538 } 539 540 /***********************************************************************/ 541 542 Static int 543 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 544 void *buf, int buflen) 545 { 546 struct dwc2_softc *sc = bus->ub_hcpriv; 547 usbd_status err = USBD_IOERROR; 548 uint16_t len, value, index; 549 int totlen = 0; 550 551 if (sc->sc_dying) 552 return -1; 553 554 DPRINTFN(4, "type=0x%02x request=%02x\n", 555 req->bmRequestType, req->bRequest); 556 557 len = UGETW(req->wLength); 558 value = UGETW(req->wValue); 559 index = UGETW(req->wIndex); 560 561 #define C(x,y) ((x) | ((y) << 8)) 562 switch (C(req->bRequest, req->bmRequestType)) { 563 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 564 DPRINTFN(8, "wValue=0x%04x\n", value); 565 566 if (len == 0) 567 break; 568 switch (value) { 569 #define sd ((usb_string_descriptor_t *)buf) 570 case C(2, UDESC_STRING): 571 /* Product */ 572 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 573 break; 574 #undef sd 575 default: 576 /* default from usbroothub */ 577 return buflen; 578 } 579 break; 580 581 case C(UR_GET_CONFIG, UT_READ_DEVICE): 582 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 583 case C(UR_GET_STATUS, UT_READ_INTERFACE): 584 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 585 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 586 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 587 /* default from usbroothub */ 588 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 589 590 return buflen; 591 592 default: 593 /* Hub requests */ 594 err = dwc2_hcd_hub_control(sc->sc_hsotg, 595 C(req->bRequest, req->bmRequestType), value, index, 596 buf, len); 597 if (err) { 598 return -1; 599 } 600 totlen = len; 601 } 602 603 return totlen; 604 } 605 606 Static usbd_status 607 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 608 { 609 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 610 usbd_status err; 611 612 DPRINTF("\n"); 613 614 /* Insert last in queue. */ 615 mutex_enter(&sc->sc_lock); 616 err = usb_insert_transfer(xfer); 617 mutex_exit(&sc->sc_lock); 618 if (err) 619 return err; 620 621 /* Pipe isn't running, start first */ 622 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 623 } 624 625 Static usbd_status 626 dwc2_root_intr_start(struct usbd_xfer *xfer) 627 { 628 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 629 const bool polling = sc->sc_bus.ub_usepolling; 630 631 DPRINTF("\n"); 632 633 if (sc->sc_dying) 634 return USBD_IOERROR; 635 636 if (!polling) 637 mutex_enter(&sc->sc_lock); 638 KASSERT(sc->sc_intrxfer == NULL); 639 sc->sc_intrxfer = xfer; 640 if (!polling) 641 mutex_exit(&sc->sc_lock); 642 643 return USBD_IN_PROGRESS; 644 } 645 646 /* Abort a root interrupt request. */ 647 Static void 648 dwc2_root_intr_abort(struct usbd_xfer *xfer) 649 { 650 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 651 652 DPRINTF("xfer=%p\n", xfer); 653 654 KASSERT(mutex_owned(&sc->sc_lock)); 655 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 656 657 xfer->ux_status = USBD_CANCELLED; 658 usb_transfer_complete(xfer); 659 } 660 661 Static void 662 dwc2_root_intr_close(struct usbd_pipe *pipe) 663 { 664 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 665 666 DPRINTF("\n"); 667 668 KASSERT(mutex_owned(&sc->sc_lock)); 669 670 sc->sc_intrxfer = NULL; 671 } 672 673 Static void 674 dwc2_root_intr_done(struct usbd_xfer *xfer) 675 { 676 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 677 678 KASSERT(sc->sc_intrxfer != NULL); 679 sc->sc_intrxfer = NULL; 680 DPRINTF("\n"); 681 } 682 683 /***********************************************************************/ 684 685 Static usbd_status 686 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 687 { 688 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 689 usbd_status err; 690 691 DPRINTF("\n"); 692 693 /* Insert last in queue. */ 694 mutex_enter(&sc->sc_lock); 695 err = usb_insert_transfer(xfer); 696 mutex_exit(&sc->sc_lock); 697 if (err) 698 return err; 699 700 /* Pipe isn't running, start first */ 701 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 702 } 703 704 Static usbd_status 705 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 706 { 707 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 708 usbd_status err; 709 const bool polling = sc->sc_bus.ub_usepolling; 710 711 DPRINTF("\n"); 712 713 if (!polling) 714 mutex_enter(&sc->sc_lock); 715 xfer->ux_status = USBD_IN_PROGRESS; 716 err = dwc2_device_start(xfer); 717 if (!polling) 718 mutex_exit(&sc->sc_lock); 719 720 if (err) 721 return err; 722 723 return USBD_IN_PROGRESS; 724 } 725 726 Static void 727 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 728 { 729 #ifdef DIAGNOSTIC 730 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 731 #endif 732 KASSERT(mutex_owned(&sc->sc_lock)); 733 734 DPRINTF("xfer=%p\n", xfer); 735 dwc2_abort_xfer(xfer, USBD_CANCELLED); 736 } 737 738 Static void 739 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 740 { 741 742 DPRINTF("pipe=%p\n", pipe); 743 dwc2_close_pipe(pipe); 744 } 745 746 Static void 747 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 748 { 749 750 DPRINTF("xfer=%p\n", xfer); 751 } 752 753 /***********************************************************************/ 754 755 Static usbd_status 756 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 757 { 758 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 759 usbd_status err; 760 761 DPRINTF("xfer=%p\n", xfer); 762 763 /* Insert last in queue. */ 764 mutex_enter(&sc->sc_lock); 765 err = usb_insert_transfer(xfer); 766 767 KASSERT(err == USBD_NORMAL_COMPLETION); 768 769 xfer->ux_status = USBD_IN_PROGRESS; 770 err = dwc2_device_start(xfer); 771 mutex_exit(&sc->sc_lock); 772 773 return err; 774 } 775 776 Static void 777 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 778 { 779 #ifdef DIAGNOSTIC 780 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 781 #endif 782 KASSERT(mutex_owned(&sc->sc_lock)); 783 784 DPRINTF("xfer=%p\n", xfer); 785 dwc2_abort_xfer(xfer, USBD_CANCELLED); 786 } 787 788 Static void 789 dwc2_device_bulk_close(struct usbd_pipe *pipe) 790 { 791 792 DPRINTF("pipe=%p\n", pipe); 793 794 dwc2_close_pipe(pipe); 795 } 796 797 Static void 798 dwc2_device_bulk_done(struct usbd_xfer *xfer) 799 { 800 801 DPRINTF("xfer=%p\n", xfer); 802 } 803 804 /***********************************************************************/ 805 806 Static usbd_status 807 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 808 { 809 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 810 usbd_status err; 811 812 DPRINTF("xfer=%p\n", xfer); 813 814 /* Insert last in queue. */ 815 mutex_enter(&sc->sc_lock); 816 err = usb_insert_transfer(xfer); 817 mutex_exit(&sc->sc_lock); 818 if (err) 819 return err; 820 821 /* Pipe isn't running, start first */ 822 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 823 } 824 825 Static usbd_status 826 dwc2_device_intr_start(struct usbd_xfer *xfer) 827 { 828 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 829 struct usbd_device *dev = dpipe->pipe.up_dev; 830 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 831 usbd_status err; 832 const bool polling = sc->sc_bus.ub_usepolling; 833 834 if (!polling) 835 mutex_enter(&sc->sc_lock); 836 xfer->ux_status = USBD_IN_PROGRESS; 837 err = dwc2_device_start(xfer); 838 if (!polling) 839 mutex_exit(&sc->sc_lock); 840 841 if (err) 842 return err; 843 844 return USBD_IN_PROGRESS; 845 } 846 847 /* Abort a device interrupt request. */ 848 Static void 849 dwc2_device_intr_abort(struct usbd_xfer *xfer) 850 { 851 #ifdef DIAGNOSTIC 852 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 853 #endif 854 855 KASSERT(mutex_owned(&sc->sc_lock)); 856 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 857 858 DPRINTF("xfer=%p\n", xfer); 859 860 dwc2_abort_xfer(xfer, USBD_CANCELLED); 861 } 862 863 Static void 864 dwc2_device_intr_close(struct usbd_pipe *pipe) 865 { 866 867 DPRINTF("pipe=%p\n", pipe); 868 869 dwc2_close_pipe(pipe); 870 } 871 872 Static void 873 dwc2_device_intr_done(struct usbd_xfer *xfer) 874 { 875 876 DPRINTF("\n"); 877 } 878 879 /***********************************************************************/ 880 881 usbd_status 882 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 883 { 884 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 885 usbd_status err; 886 887 DPRINTF("xfer=%p\n", xfer); 888 889 /* Insert last in queue. */ 890 mutex_enter(&sc->sc_lock); 891 err = usb_insert_transfer(xfer); 892 893 KASSERT(err == USBD_NORMAL_COMPLETION); 894 895 xfer->ux_status = USBD_IN_PROGRESS; 896 err = dwc2_device_start(xfer); 897 mutex_exit(&sc->sc_lock); 898 899 return err; 900 } 901 902 void 903 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 904 { 905 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 906 KASSERT(mutex_owned(&sc->sc_lock)); 907 908 DPRINTF("xfer=%p\n", xfer); 909 dwc2_abort_xfer(xfer, USBD_CANCELLED); 910 } 911 912 void 913 dwc2_device_isoc_close(struct usbd_pipe *pipe) 914 { 915 DPRINTF("\n"); 916 917 dwc2_close_pipe(pipe); 918 } 919 920 void 921 dwc2_device_isoc_done(struct usbd_xfer *xfer) 922 { 923 924 DPRINTF("\n"); 925 } 926 927 928 usbd_status 929 dwc2_device_start(struct usbd_xfer *xfer) 930 { 931 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 932 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 933 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 934 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 935 struct dwc2_hcd_urb *dwc2_urb; 936 937 struct usbd_device *dev = xfer->ux_pipe->up_dev; 938 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 939 uint8_t addr = dev->ud_addr; 940 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 941 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 942 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 943 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 944 uint32_t len; 945 946 uint32_t flags = 0; 947 uint32_t off = 0; 948 int retval, err; 949 int alloc_bandwidth = 0; 950 int i; 951 952 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 953 954 if (xfertype == UE_ISOCHRONOUS || 955 xfertype == UE_INTERRUPT) { 956 mutex_spin_enter(&hsotg->lock); 957 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 958 alloc_bandwidth = 1; 959 mutex_spin_exit(&hsotg->lock); 960 } 961 962 /* 963 * For Control pipe the direction is from the request, all other 964 * transfers have been set correctly at pipe open time. 965 */ 966 if (xfertype == UE_CONTROL) { 967 usb_device_request_t *req = &xfer->ux_request; 968 969 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 970 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 971 "mps=%d\n", 972 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 973 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 974 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 975 976 /* Copy request packet to our DMA buffer */ 977 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 978 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 979 BUS_DMASYNC_PREWRITE); 980 len = UGETW(req->wLength); 981 if ((req->bmRequestType & UT_READ) == UT_READ) { 982 dir = UE_DIR_IN; 983 } else { 984 dir = UE_DIR_OUT; 985 } 986 987 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 988 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 989 len, dir == UE_DIR_IN ? "in" : "out"); 990 } else { 991 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 992 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 993 epnum, mps, dir == UT_READ ? "in" :"out"); 994 995 len = xfer->ux_length; 996 } 997 998 dwc2_urb = dxfer->urb; 999 if (!dwc2_urb) 1000 return USBD_NOMEM; 1001 1002 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 1003 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1004 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 1005 1006 dwc2_urb->priv = xfer; 1007 dwc2_urb->packet_count = xfer->ux_nframes; 1008 1009 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1010 mps); 1011 1012 if (xfertype == UE_CONTROL) { 1013 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1014 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1015 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1016 } else { 1017 /* XXXNH - % mps required? */ 1018 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1019 flags |= URB_SEND_ZERO_PACKET; 1020 } 1021 flags |= URB_GIVEBACK_ASAP; 1022 1023 /* 1024 * control transfers with no data phase don't touch usbdma, but 1025 * everything else does. 1026 */ 1027 if (!(xfertype == UE_CONTROL && len == 0)) { 1028 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1029 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1030 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1031 1032 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1033 dir == UE_DIR_IN ? 1034 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1035 } 1036 dwc2_urb->length = len; 1037 dwc2_urb->flags = flags; 1038 dwc2_urb->status = -EINPROGRESS; 1039 1040 if (xfertype == UE_INTERRUPT || 1041 xfertype == UE_ISOCHRONOUS) { 1042 uint16_t ival; 1043 1044 if (xfertype == UE_INTERRUPT && 1045 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1046 ival = dpipe->pipe.up_interval; 1047 } else { 1048 ival = ed->bInterval; 1049 } 1050 1051 if (ival < 1) { 1052 retval = -ENODEV; 1053 goto fail; 1054 } 1055 if (dev->ud_speed == USB_SPEED_HIGH || 1056 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1057 if (ival > 16) { 1058 /* 1059 * illegal with HS/FS, but there were 1060 * documentation bugs in the spec 1061 */ 1062 ival = 256; 1063 } else { 1064 ival = (1 << (ival - 1)); 1065 } 1066 } else { 1067 if (xfertype == UE_INTERRUPT && ival < 10) 1068 ival = 10; 1069 } 1070 dwc2_urb->interval = ival; 1071 } 1072 1073 /* XXXNH bring down from callers?? */ 1074 // mutex_enter(&sc->sc_lock); 1075 1076 xfer->ux_actlen = 0; 1077 1078 KASSERT(xfertype != UE_ISOCHRONOUS || 1079 xfer->ux_nframes <= dwc2_urb->packet_count); 1080 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1081 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1082 1083 for (off = i = 0; i < xfer->ux_nframes; ++i) { 1084 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1085 off, xfer->ux_frlengths[i]); 1086 1087 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1088 xfer->ux_frlengths[i]); 1089 off += xfer->ux_frlengths[i]; 1090 } 1091 1092 struct dwc2_qh *qh = dpipe->priv; 1093 struct dwc2_qtd *qtd; 1094 bool qh_allocated = false; 1095 1096 /* Create QH for the endpoint if it doesn't exist */ 1097 if (!qh) { 1098 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1099 if (!qh) { 1100 retval = -ENOMEM; 1101 goto fail; 1102 } 1103 dpipe->priv = qh; 1104 qh_allocated = true; 1105 } 1106 1107 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1108 if (!qtd) { 1109 retval = -ENOMEM; 1110 goto fail1; 1111 } 1112 memset(qtd, 0, sizeof(*qtd)); 1113 1114 /* might need to check cpu_intr_p */ 1115 mutex_spin_enter(&hsotg->lock); 1116 1117 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1118 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1119 dwc2_timeout, xfer); 1120 } 1121 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1122 if (retval) 1123 goto fail2; 1124 1125 if (alloc_bandwidth) { 1126 dwc2_allocate_bus_bandwidth(hsotg, 1127 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1128 xfer); 1129 } 1130 1131 mutex_spin_exit(&hsotg->lock); 1132 // mutex_exit(&sc->sc_lock); 1133 1134 return USBD_IN_PROGRESS; 1135 1136 fail2: 1137 callout_halt(&xfer->ux_callout, &hsotg->lock); 1138 dwc2_urb->priv = NULL; 1139 mutex_spin_exit(&hsotg->lock); 1140 pool_cache_put(sc->sc_qtdpool, qtd); 1141 1142 fail1: 1143 if (qh_allocated) { 1144 dpipe->priv = NULL; 1145 dwc2_hcd_qh_free(hsotg, qh); 1146 } 1147 fail: 1148 1149 switch (retval) { 1150 case -EINVAL: 1151 case -ENODEV: 1152 err = USBD_INVAL; 1153 break; 1154 case -ENOMEM: 1155 err = USBD_NOMEM; 1156 break; 1157 default: 1158 err = USBD_IOERROR; 1159 } 1160 1161 return err; 1162 1163 } 1164 1165 int dwc2_intr(void *p) 1166 { 1167 struct dwc2_softc *sc = p; 1168 struct dwc2_hsotg *hsotg; 1169 int ret = 0; 1170 1171 if (sc == NULL) 1172 return 0; 1173 1174 hsotg = sc->sc_hsotg; 1175 mutex_spin_enter(&hsotg->lock); 1176 1177 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1178 goto done; 1179 1180 if (sc->sc_bus.ub_usepolling) { 1181 uint32_t intrs; 1182 1183 intrs = dwc2_read_core_intr(hsotg); 1184 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1185 } else { 1186 ret = dwc2_interrupt(sc); 1187 } 1188 1189 done: 1190 mutex_spin_exit(&hsotg->lock); 1191 1192 return ret; 1193 } 1194 1195 int 1196 dwc2_interrupt(struct dwc2_softc *sc) 1197 { 1198 int ret = 0; 1199 1200 if (sc->sc_hcdenabled) { 1201 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1202 } 1203 1204 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1205 1206 return ret; 1207 } 1208 1209 /***********************************************************************/ 1210 1211 int 1212 dwc2_detach(struct dwc2_softc *sc, int flags) 1213 { 1214 int rv = 0; 1215 1216 if (sc->sc_child != NULL) 1217 rv = config_detach(sc->sc_child, flags); 1218 1219 return rv; 1220 } 1221 1222 bool 1223 dwc2_shutdown(device_t self, int flags) 1224 { 1225 struct dwc2_softc *sc = device_private(self); 1226 1227 sc = sc; 1228 1229 return true; 1230 } 1231 1232 void 1233 dwc2_childdet(device_t self, device_t child) 1234 { 1235 struct dwc2_softc *sc = device_private(self); 1236 1237 sc = sc; 1238 } 1239 1240 int 1241 dwc2_activate(device_t self, enum devact act) 1242 { 1243 struct dwc2_softc *sc = device_private(self); 1244 1245 sc = sc; 1246 1247 return 0; 1248 } 1249 1250 bool 1251 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1252 { 1253 struct dwc2_softc *sc = device_private(dv); 1254 1255 sc = sc; 1256 1257 return true; 1258 } 1259 1260 bool 1261 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1262 { 1263 struct dwc2_softc *sc = device_private(dv); 1264 1265 sc = sc; 1266 1267 return true; 1268 } 1269 1270 /***********************************************************************/ 1271 int 1272 dwc2_init(struct dwc2_softc *sc) 1273 { 1274 int err = 0; 1275 1276 sc->sc_bus.ub_hcpriv = sc; 1277 sc->sc_bus.ub_revision = USBREV_2_0; 1278 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1279 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1280 sc->sc_bus.ub_usedma = true; 1281 sc->sc_hcdenabled = false; 1282 1283 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1284 1285 TAILQ_INIT(&sc->sc_complete); 1286 1287 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1288 dwc2_rhc, sc); 1289 1290 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1291 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1292 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1293 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1294 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1295 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1296 1297 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1298 sc->sc_hsotg->hsotg_sc = sc; 1299 sc->sc_hsotg->dev = sc->sc_dev; 1300 sc->sc_hcdenabled = true; 1301 1302 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1303 struct dwc2_core_params defparams; 1304 int retval; 1305 1306 if (sc->sc_params == NULL) { 1307 /* Default all params to autodetect */ 1308 dwc2_set_all_params(&defparams, -1); 1309 sc->sc_params = &defparams; 1310 1311 /* 1312 * Disable descriptor dma mode by default as the HW can support 1313 * it, but does not support it for SPLIT transactions. 1314 */ 1315 defparams.dma_desc_enable = 0; 1316 } 1317 hsotg->dr_mode = USB_DR_MODE_HOST; 1318 1319 /* Detect config values from hardware */ 1320 retval = dwc2_get_hwparams(hsotg); 1321 if (retval) { 1322 goto fail2; 1323 } 1324 1325 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1326 dwc2_set_all_params(hsotg->core_params, -1); 1327 1328 /* Validate parameter values */ 1329 dwc2_set_parameters(hsotg, sc->sc_params); 1330 1331 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1332 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1333 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1334 retval = dwc2_gadget_init(hsotg); 1335 if (retval) 1336 goto fail2; 1337 hsotg->gadget_enabled = 1; 1338 } 1339 #endif 1340 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1341 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1342 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1343 retval = dwc2_hcd_init(hsotg); 1344 if (retval) { 1345 if (hsotg->gadget_enabled) 1346 dwc2_hsotg_remove(hsotg); 1347 goto fail2; 1348 } 1349 hsotg->hcd_enabled = 1; 1350 } 1351 #endif 1352 1353 uint32_t snpsid = hsotg->hw_params.snpsid; 1354 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1355 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1356 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1357 1358 return 0; 1359 1360 fail2: 1361 err = -retval; 1362 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1363 softint_disestablish(sc->sc_rhc_si); 1364 1365 return err; 1366 } 1367 1368 #if 0 1369 /* 1370 * curmode is a mode indication bit 0 = device, 1 = host 1371 */ 1372 static const char * const intnames[32] = { 1373 "curmode", "modemis", "otgint", "sof", 1374 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1375 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1376 "usbrst", "enumdone", "isooutdrop", "eopf", 1377 "restore_done", "epmis", "iepint", "oepint", 1378 "incompisoin", "incomplp", "fetsusp", "resetdet", 1379 "prtint", "hchint", "ptxfemp", "lpm", 1380 "conidstschng", "disconnint", "sessreqint", "wkupint" 1381 }; 1382 1383 1384 /***********************************************************************/ 1385 1386 #endif 1387 1388 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1389 int *hub_port) 1390 { 1391 struct usbd_xfer *xfer = context; 1392 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1393 struct usbd_device *dev = dpipe->pipe.up_dev; 1394 1395 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1396 *hub_port = dev->ud_myhsport->up_portno; 1397 } 1398 1399 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1400 { 1401 struct usbd_xfer *xfer = context; 1402 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1403 struct usbd_device *dev = dpipe->pipe.up_dev; 1404 1405 return dev->ud_speed; 1406 } 1407 1408 /* 1409 * Sets the final status of an URB and returns it to the upper layer. Any 1410 * required cleanup of the URB is performed. 1411 * 1412 * Must be called with interrupt disabled and spinlock held 1413 */ 1414 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1415 int status) 1416 { 1417 struct usbd_xfer *xfer; 1418 struct dwc2_xfer *dxfer; 1419 struct dwc2_softc *sc; 1420 usb_endpoint_descriptor_t *ed; 1421 uint8_t xfertype; 1422 1423 if (!qtd) { 1424 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1425 return; 1426 } 1427 1428 if (!qtd->urb) { 1429 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1430 return; 1431 } 1432 1433 xfer = qtd->urb->priv; 1434 if (!xfer) { 1435 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1436 return; 1437 } 1438 1439 /* 1440 * If software has completed it, either by cancellation 1441 * or timeout, drop it on the floor. 1442 */ 1443 if (xfer->ux_status != USBD_IN_PROGRESS) { 1444 KASSERT(xfer->ux_status == USBD_CANCELLED || 1445 xfer->ux_status == USBD_TIMEOUT); 1446 return; 1447 } 1448 1449 /* 1450 * Cancel the timeout and the task, which have not yet 1451 * run. If they have already fired, at worst they are 1452 * waiting for the lock. They will see that the xfer 1453 * is no longer in progress and give up. 1454 */ 1455 callout_stop(&xfer->ux_callout); 1456 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1457 1458 dxfer = DWC2_XFER2DXFER(xfer); 1459 sc = DWC2_XFER2SC(xfer); 1460 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1461 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1462 1463 struct dwc2_hcd_urb *urb = qtd->urb; 1464 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1465 1466 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1467 1468 if (xfertype == UE_ISOCHRONOUS) { 1469 int i; 1470 1471 xfer->ux_actlen = 0; 1472 for (i = 0; i < xfer->ux_nframes; ++i) { 1473 xfer->ux_frlengths[i] = 1474 dwc2_hcd_urb_get_iso_desc_actual_length( 1475 urb, i); 1476 xfer->ux_actlen += xfer->ux_frlengths[i]; 1477 } 1478 } 1479 1480 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1481 int i; 1482 1483 for (i = 0; i < xfer->ux_nframes; i++) 1484 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1485 i, urb->iso_descs[i].status); 1486 } 1487 1488 if (!status) { 1489 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1490 xfer->ux_actlen < xfer->ux_length) 1491 status = -EIO; 1492 } 1493 1494 switch (status) { 1495 case 0: 1496 xfer->ux_status = USBD_NORMAL_COMPLETION; 1497 break; 1498 case -EPIPE: 1499 xfer->ux_status = USBD_STALLED; 1500 break; 1501 case -ETIMEDOUT: 1502 xfer->ux_status = USBD_TIMEOUT; 1503 break; 1504 case -EPROTO: 1505 xfer->ux_status = USBD_INVAL; 1506 break; 1507 case -EIO: 1508 xfer->ux_status = USBD_IOERROR; 1509 break; 1510 case -EOVERFLOW: 1511 xfer->ux_status = USBD_IOERROR; 1512 break; 1513 default: 1514 xfer->ux_status = USBD_IOERROR; 1515 printf("%s: unknown error status %d\n", __func__, status); 1516 } 1517 1518 if (xfer->ux_status == USBD_NORMAL_COMPLETION) { 1519 /* 1520 * control transfers with no data phase don't touch dmabuf, but 1521 * everything else does. 1522 */ 1523 if (!(xfertype == UE_CONTROL && 1524 UGETW(xfer->ux_request.wLength) == 0) && 1525 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1526 ) { 1527 int rd = usbd_xfer_isread(xfer); 1528 1529 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1530 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1531 } 1532 } 1533 1534 if (xfertype == UE_ISOCHRONOUS || 1535 xfertype == UE_INTERRUPT) { 1536 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1537 1538 dwc2_free_bus_bandwidth(hsotg, 1539 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1540 xfer); 1541 } 1542 1543 qtd->urb = NULL; 1544 KASSERT(mutex_owned(&hsotg->lock)); 1545 1546 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1547 1548 mutex_spin_exit(&hsotg->lock); 1549 usb_schedsoftintr(&sc->sc_bus); 1550 mutex_spin_enter(&hsotg->lock); 1551 } 1552 1553 1554 int 1555 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1556 { 1557 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1558 1559 mutex_spin_enter(&hsotg->lock); 1560 1561 hsotg->lx_state = DWC2_L0; 1562 1563 if (dwc2_is_device_mode(hsotg)) { 1564 mutex_spin_exit(&hsotg->lock); 1565 return 0; /* why 0 ?? */ 1566 } 1567 1568 dwc2_hcd_reinit(hsotg); 1569 1570 mutex_spin_exit(&hsotg->lock); 1571 return 0; 1572 } 1573 1574 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1575 { 1576 1577 return false; 1578 } 1579
Indexes created Thu Sep 25 16:09:42 GMT 2025