dwc2.c revision 1.62
1 /* $NetBSD: dwc2.c,v 1.62 2019/12/03 13:37:50 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.62 2019/12/03 13:37:50 skrll Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 39 #include <sys/cpu.h> 40 #include <sys/device.h> 41 #include <sys/kernel.h> 42 #include <sys/kmem.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/select.h> 46 #include <sys/sysctl.h> 47 #include <sys/systm.h> 48 49 #include <machine/endian.h> 50 51 #include <dev/usb/usb.h> 52 #include <dev/usb/usbdi.h> 53 #include <dev/usb/usbdivar.h> 54 #include <dev/usb/usb_mem.h> 55 #include <dev/usb/usbroothub.h> 56 57 #include <dwc2/dwc2.h> 58 #include <dwc2/dwc2var.h> 59 60 #include "dwc2_core.h" 61 #include "dwc2_hcd.h" 62 63 #ifdef DWC2_COUNTERS 64 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 65 #else 66 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 67 #endif 68 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 69 70 #ifdef DWC2_DEBUG 71 #define DPRINTFN(n,fmt,...) do { \ 72 if (dwc2debug >= (n)) { \ 73 printf("%s: " fmt, \ 74 __FUNCTION__,## __VA_ARGS__); \ 75 } \ 76 } while (0) 77 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 78 int dwc2debug = 0; 79 80 SYSCTL_SETUP(sysctl_hw_dwc2_setup, "sysctl hw.dwc2 setup") 81 { 82 int err; 83 const struct sysctlnode *rnode; 84 const struct sysctlnode *cnode; 85 86 err = sysctl_createv(clog, 0, NULL, &rnode, 87 CTLFLAG_PERMANENT, CTLTYPE_NODE, "dwc2", 88 SYSCTL_DESCR("dwc2 global controls"), 89 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 90 91 if (err) 92 goto fail; 93 94 /* control debugging printfs */ 95 err = sysctl_createv(clog, 0, &rnode, &cnode, 96 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 97 "debug", SYSCTL_DESCR("Enable debugging output"), 98 NULL, 0, &dwc2debug, sizeof(dwc2debug), CTL_CREATE, CTL_EOL); 99 if (err) 100 goto fail; 101 102 return; 103 fail: 104 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 105 } 106 #else 107 #define DPRINTF(...) do { } while (0) 108 #define DPRINTFN(...) do { } while (0) 109 #endif 110 111 Static usbd_status dwc2_open(struct usbd_pipe *); 112 Static void dwc2_poll(struct usbd_bus *); 113 Static void dwc2_softintr(void *); 114 115 Static struct usbd_xfer * 116 dwc2_allocx(struct usbd_bus *, unsigned int); 117 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 118 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 119 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 120 void *, int); 121 122 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 123 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 124 Static void dwc2_root_intr_abort(struct usbd_xfer *); 125 Static void dwc2_root_intr_close(struct usbd_pipe *); 126 Static void dwc2_root_intr_done(struct usbd_xfer *); 127 128 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 129 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 130 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 131 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 132 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 133 134 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 135 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 136 Static void dwc2_device_bulk_close(struct usbd_pipe *); 137 Static void dwc2_device_bulk_done(struct usbd_xfer *); 138 139 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 140 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 141 Static void dwc2_device_intr_abort(struct usbd_xfer *); 142 Static void dwc2_device_intr_close(struct usbd_pipe *); 143 Static void dwc2_device_intr_done(struct usbd_xfer *); 144 145 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 146 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 147 Static void dwc2_device_isoc_close(struct usbd_pipe *); 148 Static void dwc2_device_isoc_done(struct usbd_xfer *); 149 150 Static usbd_status dwc2_device_start(struct usbd_xfer *); 151 152 Static void dwc2_close_pipe(struct usbd_pipe *); 153 Static void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 154 155 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 156 Static void dwc2_noop(struct usbd_pipe *pipe); 157 158 Static int dwc2_interrupt(struct dwc2_softc *); 159 Static void dwc2_rhc(void *); 160 161 Static void dwc2_timeout(void *); 162 Static void dwc2_timeout_task(void *); 163 164 165 static inline void 166 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 167 struct usbd_xfer *xfer) 168 { 169 } 170 171 static inline void 172 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 173 struct usbd_xfer *xfer) 174 { 175 } 176 177 Static const struct usbd_bus_methods dwc2_bus_methods = { 178 .ubm_open = dwc2_open, 179 .ubm_softint = dwc2_softintr, 180 .ubm_dopoll = dwc2_poll, 181 .ubm_allocx = dwc2_allocx, 182 .ubm_freex = dwc2_freex, 183 .ubm_getlock = dwc2_get_lock, 184 .ubm_rhctrl = dwc2_roothub_ctrl, 185 }; 186 187 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 188 .upm_transfer = dwc2_root_intr_transfer, 189 .upm_start = dwc2_root_intr_start, 190 .upm_abort = dwc2_root_intr_abort, 191 .upm_close = dwc2_root_intr_close, 192 .upm_cleartoggle = dwc2_noop, 193 .upm_done = dwc2_root_intr_done, 194 }; 195 196 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 197 .upm_transfer = dwc2_device_ctrl_transfer, 198 .upm_start = dwc2_device_ctrl_start, 199 .upm_abort = dwc2_device_ctrl_abort, 200 .upm_close = dwc2_device_ctrl_close, 201 .upm_cleartoggle = dwc2_noop, 202 .upm_done = dwc2_device_ctrl_done, 203 }; 204 205 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 206 .upm_transfer = dwc2_device_intr_transfer, 207 .upm_start = dwc2_device_intr_start, 208 .upm_abort = dwc2_device_intr_abort, 209 .upm_close = dwc2_device_intr_close, 210 .upm_cleartoggle = dwc2_device_clear_toggle, 211 .upm_done = dwc2_device_intr_done, 212 }; 213 214 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 215 .upm_transfer = dwc2_device_bulk_transfer, 216 .upm_abort = dwc2_device_bulk_abort, 217 .upm_close = dwc2_device_bulk_close, 218 .upm_cleartoggle = dwc2_device_clear_toggle, 219 .upm_done = dwc2_device_bulk_done, 220 }; 221 222 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 223 .upm_transfer = dwc2_device_isoc_transfer, 224 .upm_abort = dwc2_device_isoc_abort, 225 .upm_close = dwc2_device_isoc_close, 226 .upm_cleartoggle = dwc2_noop, 227 .upm_done = dwc2_device_isoc_done, 228 }; 229 230 struct usbd_xfer * 231 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 232 { 233 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 234 struct dwc2_xfer *dxfer; 235 struct usbd_xfer *xfer; 236 237 DPRINTFN(10, "\n"); 238 239 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 240 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 241 xfer = (struct usbd_xfer *)dxfer; 242 if (dxfer != NULL) { 243 memset(dxfer, 0, sizeof(*dxfer)); 244 245 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 246 nframes, GFP_KERNEL); 247 248 /* Initialise this always so we can call remove on it. */ 249 usb_init_task(&xfer->ux_aborttask, dwc2_timeout_task, xfer, 250 USB_TASKQ_MPSAFE); 251 #ifdef DIAGNOSTIC 252 dxfer->xfer.ux_state = XFER_BUSY; 253 #endif 254 } 255 return (struct usbd_xfer *)dxfer; 256 } 257 258 void 259 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 260 { 261 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 262 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 263 264 DPRINTFN(10, "\n"); 265 266 #ifdef DIAGNOSTIC 267 if (xfer->ux_state != XFER_BUSY && 268 xfer->ux_status != USBD_NOT_STARTED) { 269 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 270 } 271 xfer->ux_state = XFER_FREE; 272 #endif 273 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 274 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 275 pool_cache_put(sc->sc_xferpool, xfer); 276 } 277 278 Static void 279 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 280 { 281 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 282 283 *lock = &sc->sc_lock; 284 } 285 286 Static void 287 dwc2_rhc(void *addr) 288 { 289 struct dwc2_softc *sc = addr; 290 struct usbd_xfer *xfer; 291 u_char *p; 292 293 DPRINTF("\n"); 294 mutex_enter(&sc->sc_lock); 295 xfer = sc->sc_intrxfer; 296 297 if (xfer == NULL) { 298 /* Just ignore the change. */ 299 mutex_exit(&sc->sc_lock); 300 return; 301 302 } 303 /* set port bit */ 304 p = KERNADDR(&xfer->ux_dmabuf, 0); 305 306 p[0] = 0x02; /* we only have one port (1 << 1) */ 307 308 xfer->ux_actlen = xfer->ux_length; 309 xfer->ux_status = USBD_NORMAL_COMPLETION; 310 311 usb_transfer_complete(xfer); 312 mutex_exit(&sc->sc_lock); 313 } 314 315 Static void 316 dwc2_softintr(void *v) 317 { 318 struct usbd_bus *bus = v; 319 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 320 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 321 struct dwc2_xfer *dxfer; 322 323 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 324 325 mutex_spin_enter(&hsotg->lock); 326 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 327 328 KASSERTMSG(!callout_pending(&dxfer->xfer.ux_callout), 329 "xfer %p pipe %p\n", dxfer, dxfer->xfer.ux_pipe); 330 331 /* 332 * dwc2_abort_xfer will remove this transfer from the 333 * sc_complete queue 334 */ 335 /*XXXNH not tested */ 336 if (dxfer->xfer.ux_status == USBD_CANCELLED || 337 dxfer->xfer.ux_status == USBD_TIMEOUT) { 338 continue; 339 } 340 341 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 342 343 mutex_spin_exit(&hsotg->lock); 344 usb_transfer_complete(&dxfer->xfer); 345 mutex_spin_enter(&hsotg->lock); 346 } 347 mutex_spin_exit(&hsotg->lock); 348 } 349 350 Static void 351 dwc2_timeout(void *addr) 352 { 353 struct usbd_xfer *xfer = addr; 354 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 355 struct usbd_device *dev = xfer->ux_pipe->up_dev; 356 357 DPRINTF("xfer=%p\n", xfer); 358 359 mutex_enter(&sc->sc_lock); 360 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 361 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 362 mutex_exit(&sc->sc_lock); 363 } 364 365 Static void 366 dwc2_timeout_task(void *addr) 367 { 368 struct usbd_xfer *xfer = addr; 369 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 370 371 DPRINTF("xfer=%p\n", xfer); 372 373 mutex_enter(&sc->sc_lock); 374 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 375 mutex_exit(&sc->sc_lock); 376 } 377 378 usbd_status 379 dwc2_open(struct usbd_pipe *pipe) 380 { 381 struct usbd_device *dev = pipe->up_dev; 382 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 383 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 384 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 385 uint8_t addr = dev->ud_addr; 386 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 387 usbd_status err; 388 389 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 390 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 391 392 if (sc->sc_dying) { 393 return USBD_IOERROR; 394 } 395 396 if (addr == dev->ud_bus->ub_rhaddr) { 397 switch (ed->bEndpointAddress) { 398 case USB_CONTROL_ENDPOINT: 399 pipe->up_methods = &roothub_ctrl_methods; 400 break; 401 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 402 pipe->up_methods = &dwc2_root_intr_methods; 403 break; 404 default: 405 DPRINTF("bad bEndpointAddress 0x%02x\n", 406 ed->bEndpointAddress); 407 return USBD_INVAL; 408 } 409 DPRINTF("root hub pipe open\n"); 410 return USBD_NORMAL_COMPLETION; 411 } 412 413 switch (xfertype) { 414 case UE_CONTROL: 415 pipe->up_methods = &dwc2_device_ctrl_methods; 416 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 417 0, &dpipe->req_dma); 418 if (err) 419 return err; 420 break; 421 case UE_INTERRUPT: 422 pipe->up_methods = &dwc2_device_intr_methods; 423 break; 424 case UE_ISOCHRONOUS: 425 pipe->up_serialise = false; 426 pipe->up_methods = &dwc2_device_isoc_methods; 427 break; 428 case UE_BULK: 429 pipe->up_serialise = false; 430 pipe->up_methods = &dwc2_device_bulk_methods; 431 break; 432 default: 433 DPRINTF("bad xfer type %d\n", xfertype); 434 return USBD_INVAL; 435 } 436 437 /* QH */ 438 dpipe->priv = NULL; 439 440 return USBD_NORMAL_COMPLETION; 441 } 442 443 Static void 444 dwc2_poll(struct usbd_bus *bus) 445 { 446 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 447 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 448 449 mutex_spin_enter(&hsotg->lock); 450 dwc2_interrupt(sc); 451 mutex_spin_exit(&hsotg->lock); 452 } 453 454 /* 455 * Close a reqular pipe. 456 * Assumes that there are no pending transactions. 457 */ 458 Static void 459 dwc2_close_pipe(struct usbd_pipe *pipe) 460 { 461 #ifdef DIAGNOSTIC 462 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 463 #endif 464 465 KASSERT(mutex_owned(&sc->sc_lock)); 466 } 467 468 /* 469 * Abort a device request. 470 */ 471 Static void 472 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 473 { 474 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 475 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 476 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 477 struct dwc2_xfer *d, *tmp; 478 int err; 479 480 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 481 "invalid status for abort: %d", (int)status); 482 483 DPRINTF("xfer %p pipe %p status 0x%08x", xfer, xfer->ux_pipe, status); 484 485 KASSERT(mutex_owned(&sc->sc_lock)); 486 ASSERT_SLEEPABLE(); 487 488 if (status == USBD_CANCELLED) { 489 /* 490 * We are synchronously aborting. Try to stop the 491 * callout and task, but if we can't, wait for them to 492 * complete. 493 */ 494 callout_halt(&xfer->ux_callout, &sc->sc_lock); 495 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 496 USB_TASKQ_HC, &sc->sc_lock); 497 } else { 498 /* Otherwise, we are timing out. */ 499 KASSERT(status == USBD_TIMEOUT); 500 } 501 502 /* 503 * The xfer cannot have been cancelled already. It is the 504 * responsibility of the caller of usbd_abort_pipe not to try 505 * to abort a pipe multiple times, whether concurrently or 506 * sequentially. 507 */ 508 KASSERT(xfer->ux_status != USBD_CANCELLED); 509 510 /* Only the timeout, which runs only once, can time it out. */ 511 KASSERT(xfer->ux_status != USBD_TIMEOUT); 512 513 /* If anyone else beat us, we're done. */ 514 if (xfer->ux_status != USBD_IN_PROGRESS) 515 return; 516 517 /* We beat everyone else. Claim the status. */ 518 xfer->ux_status = status; 519 520 /* 521 * If we're dying, skip the hardware action and just notify the 522 * software that we're done. 523 */ 524 if (sc->sc_dying) { 525 DPRINTFN(4, "xfer %p dying 0x%08x", xfer, xfer->ux_status); 526 goto dying; 527 } 528 529 /* 530 * HC Step 1: Handle the hardware. 531 */ 532 mutex_spin_enter(&hsotg->lock); 533 /* XXXNH suboptimal */ 534 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 535 if (d == dxfer) { 536 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 537 break; 538 } 539 } 540 541 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 542 if (err) { 543 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 544 } 545 546 mutex_spin_exit(&hsotg->lock); 547 548 /* 549 * Final Step: Notify completion to waiting xfers. 550 */ 551 dying: 552 usb_transfer_complete(xfer); 553 KASSERT(mutex_owned(&sc->sc_lock)); 554 } 555 556 Static void 557 dwc2_noop(struct usbd_pipe *pipe) 558 { 559 560 } 561 562 Static void 563 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 564 { 565 566 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 567 } 568 569 /***********************************************************************/ 570 571 Static int 572 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 573 void *buf, int buflen) 574 { 575 struct dwc2_softc *sc = bus->ub_hcpriv; 576 usbd_status err = USBD_IOERROR; 577 uint16_t len, value, index; 578 int totlen = 0; 579 580 if (sc->sc_dying) 581 return -1; 582 583 DPRINTFN(4, "type=0x%02x request=%02x\n", 584 req->bmRequestType, req->bRequest); 585 586 len = UGETW(req->wLength); 587 value = UGETW(req->wValue); 588 index = UGETW(req->wIndex); 589 590 #define C(x,y) ((x) | ((y) << 8)) 591 switch (C(req->bRequest, req->bmRequestType)) { 592 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 593 DPRINTFN(8, "wValue=0x%04x\n", value); 594 595 if (len == 0) 596 break; 597 switch (value) { 598 #define sd ((usb_string_descriptor_t *)buf) 599 case C(2, UDESC_STRING): 600 /* Product */ 601 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 602 break; 603 #undef sd 604 default: 605 /* default from usbroothub */ 606 return buflen; 607 } 608 break; 609 610 case C(UR_GET_CONFIG, UT_READ_DEVICE): 611 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 612 case C(UR_GET_STATUS, UT_READ_INTERFACE): 613 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 614 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 615 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 616 /* default from usbroothub */ 617 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 618 619 return buflen; 620 621 default: 622 /* Hub requests */ 623 err = dwc2_hcd_hub_control(sc->sc_hsotg, 624 C(req->bRequest, req->bmRequestType), value, index, 625 buf, len); 626 if (err) { 627 return -1; 628 } 629 totlen = len; 630 } 631 632 return totlen; 633 } 634 635 Static usbd_status 636 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 637 { 638 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 639 usbd_status err; 640 641 DPRINTF("\n"); 642 643 /* Insert last in queue. */ 644 mutex_enter(&sc->sc_lock); 645 err = usb_insert_transfer(xfer); 646 mutex_exit(&sc->sc_lock); 647 if (err) 648 return err; 649 650 /* Pipe isn't running, start first */ 651 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 652 } 653 654 Static usbd_status 655 dwc2_root_intr_start(struct usbd_xfer *xfer) 656 { 657 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 658 const bool polling = sc->sc_bus.ub_usepolling; 659 660 DPRINTF("\n"); 661 662 if (sc->sc_dying) 663 return USBD_IOERROR; 664 665 if (!polling) 666 mutex_enter(&sc->sc_lock); 667 KASSERT(sc->sc_intrxfer == NULL); 668 sc->sc_intrxfer = xfer; 669 if (!polling) 670 mutex_exit(&sc->sc_lock); 671 672 return USBD_IN_PROGRESS; 673 } 674 675 /* Abort a root interrupt request. */ 676 Static void 677 dwc2_root_intr_abort(struct usbd_xfer *xfer) 678 { 679 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 680 681 DPRINTF("xfer=%p\n", xfer); 682 683 KASSERT(mutex_owned(&sc->sc_lock)); 684 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 685 686 xfer->ux_status = USBD_CANCELLED; 687 usb_transfer_complete(xfer); 688 } 689 690 Static void 691 dwc2_root_intr_close(struct usbd_pipe *pipe) 692 { 693 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 694 695 DPRINTF("\n"); 696 697 KASSERT(mutex_owned(&sc->sc_lock)); 698 699 sc->sc_intrxfer = NULL; 700 } 701 702 Static void 703 dwc2_root_intr_done(struct usbd_xfer *xfer) 704 { 705 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 706 707 KASSERT(sc->sc_intrxfer != NULL); 708 sc->sc_intrxfer = NULL; 709 DPRINTF("\n"); 710 } 711 712 /***********************************************************************/ 713 714 Static usbd_status 715 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 716 { 717 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 718 usbd_status err; 719 720 DPRINTF("\n"); 721 722 /* Insert last in queue. */ 723 mutex_enter(&sc->sc_lock); 724 err = usb_insert_transfer(xfer); 725 mutex_exit(&sc->sc_lock); 726 if (err) 727 return err; 728 729 /* Pipe isn't running, start first */ 730 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 731 } 732 733 Static usbd_status 734 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 735 { 736 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 737 usbd_status err; 738 const bool polling = sc->sc_bus.ub_usepolling; 739 740 DPRINTF("\n"); 741 742 if (!polling) 743 mutex_enter(&sc->sc_lock); 744 xfer->ux_status = USBD_IN_PROGRESS; 745 err = dwc2_device_start(xfer); 746 if (!polling) 747 mutex_exit(&sc->sc_lock); 748 749 if (err) 750 return err; 751 752 return USBD_IN_PROGRESS; 753 } 754 755 Static void 756 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 757 { 758 #ifdef DIAGNOSTIC 759 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 760 #endif 761 KASSERT(mutex_owned(&sc->sc_lock)); 762 763 DPRINTF("xfer=%p\n", xfer); 764 dwc2_abort_xfer(xfer, USBD_CANCELLED); 765 } 766 767 Static void 768 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 769 { 770 771 DPRINTF("pipe=%p\n", pipe); 772 dwc2_close_pipe(pipe); 773 } 774 775 Static void 776 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 777 { 778 779 DPRINTF("xfer=%p\n", xfer); 780 } 781 782 /***********************************************************************/ 783 784 Static usbd_status 785 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 786 { 787 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 788 usbd_status err; 789 790 DPRINTF("xfer=%p\n", xfer); 791 792 /* Insert last in queue. */ 793 mutex_enter(&sc->sc_lock); 794 err = usb_insert_transfer(xfer); 795 796 KASSERT(err == USBD_NORMAL_COMPLETION); 797 798 xfer->ux_status = USBD_IN_PROGRESS; 799 err = dwc2_device_start(xfer); 800 mutex_exit(&sc->sc_lock); 801 802 return err; 803 } 804 805 Static void 806 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 807 { 808 #ifdef DIAGNOSTIC 809 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 810 #endif 811 KASSERT(mutex_owned(&sc->sc_lock)); 812 813 DPRINTF("xfer=%p\n", xfer); 814 dwc2_abort_xfer(xfer, USBD_CANCELLED); 815 } 816 817 Static void 818 dwc2_device_bulk_close(struct usbd_pipe *pipe) 819 { 820 821 DPRINTF("pipe=%p\n", pipe); 822 823 dwc2_close_pipe(pipe); 824 } 825 826 Static void 827 dwc2_device_bulk_done(struct usbd_xfer *xfer) 828 { 829 830 DPRINTF("xfer=%p\n", xfer); 831 } 832 833 /***********************************************************************/ 834 835 Static usbd_status 836 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 837 { 838 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 839 usbd_status err; 840 841 DPRINTF("xfer=%p\n", xfer); 842 843 /* Insert last in queue. */ 844 mutex_enter(&sc->sc_lock); 845 err = usb_insert_transfer(xfer); 846 mutex_exit(&sc->sc_lock); 847 if (err) 848 return err; 849 850 /* Pipe isn't running, start first */ 851 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 852 } 853 854 Static usbd_status 855 dwc2_device_intr_start(struct usbd_xfer *xfer) 856 { 857 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 858 struct usbd_device *dev = dpipe->pipe.up_dev; 859 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 860 usbd_status err; 861 const bool polling = sc->sc_bus.ub_usepolling; 862 863 if (!polling) 864 mutex_enter(&sc->sc_lock); 865 xfer->ux_status = USBD_IN_PROGRESS; 866 err = dwc2_device_start(xfer); 867 if (!polling) 868 mutex_exit(&sc->sc_lock); 869 870 if (err) 871 return err; 872 873 return USBD_IN_PROGRESS; 874 } 875 876 /* Abort a device interrupt request. */ 877 Static void 878 dwc2_device_intr_abort(struct usbd_xfer *xfer) 879 { 880 #ifdef DIAGNOSTIC 881 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 882 #endif 883 884 KASSERT(mutex_owned(&sc->sc_lock)); 885 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 886 887 DPRINTF("xfer=%p\n", xfer); 888 889 dwc2_abort_xfer(xfer, USBD_CANCELLED); 890 } 891 892 Static void 893 dwc2_device_intr_close(struct usbd_pipe *pipe) 894 { 895 896 DPRINTF("pipe=%p\n", pipe); 897 898 dwc2_close_pipe(pipe); 899 } 900 901 Static void 902 dwc2_device_intr_done(struct usbd_xfer *xfer) 903 { 904 905 DPRINTF("\n"); 906 } 907 908 /***********************************************************************/ 909 910 usbd_status 911 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 912 { 913 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 914 usbd_status err; 915 916 DPRINTF("xfer=%p\n", xfer); 917 918 /* Insert last in queue. */ 919 mutex_enter(&sc->sc_lock); 920 err = usb_insert_transfer(xfer); 921 922 KASSERT(err == USBD_NORMAL_COMPLETION); 923 924 xfer->ux_status = USBD_IN_PROGRESS; 925 err = dwc2_device_start(xfer); 926 mutex_exit(&sc->sc_lock); 927 928 return err; 929 } 930 931 void 932 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 933 { 934 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 935 KASSERT(mutex_owned(&sc->sc_lock)); 936 937 DPRINTF("xfer=%p\n", xfer); 938 dwc2_abort_xfer(xfer, USBD_CANCELLED); 939 } 940 941 void 942 dwc2_device_isoc_close(struct usbd_pipe *pipe) 943 { 944 DPRINTF("\n"); 945 946 dwc2_close_pipe(pipe); 947 } 948 949 void 950 dwc2_device_isoc_done(struct usbd_xfer *xfer) 951 { 952 953 DPRINTF("\n"); 954 } 955 956 957 usbd_status 958 dwc2_device_start(struct usbd_xfer *xfer) 959 { 960 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 961 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 962 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 963 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 964 struct dwc2_hcd_urb *dwc2_urb; 965 966 struct usbd_device *dev = xfer->ux_pipe->up_dev; 967 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 968 uint8_t addr = dev->ud_addr; 969 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 970 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 971 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 972 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 973 uint32_t len; 974 975 uint32_t flags = 0; 976 uint32_t off = 0; 977 int retval, err; 978 int alloc_bandwidth = 0; 979 int i; 980 981 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 982 983 if (xfertype == UE_ISOCHRONOUS || 984 xfertype == UE_INTERRUPT) { 985 mutex_spin_enter(&hsotg->lock); 986 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 987 alloc_bandwidth = 1; 988 mutex_spin_exit(&hsotg->lock); 989 } 990 991 /* 992 * For Control pipe the direction is from the request, all other 993 * transfers have been set correctly at pipe open time. 994 */ 995 if (xfertype == UE_CONTROL) { 996 usb_device_request_t *req = &xfer->ux_request; 997 998 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 999 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 1000 "mps=%d\n", 1001 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 1002 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 1003 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 1004 1005 /* Copy request packet to our DMA buffer */ 1006 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 1007 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 1008 BUS_DMASYNC_PREWRITE); 1009 len = UGETW(req->wLength); 1010 if ((req->bmRequestType & UT_READ) == UT_READ) { 1011 dir = UE_DIR_IN; 1012 } else { 1013 dir = UE_DIR_OUT; 1014 } 1015 1016 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 1017 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 1018 len, dir == UE_DIR_IN ? "in" : "out"); 1019 } else { 1020 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 1021 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 1022 epnum, mps, dir == UT_READ ? "in" :"out"); 1023 1024 len = xfer->ux_length; 1025 } 1026 1027 dwc2_urb = dxfer->urb; 1028 if (!dwc2_urb) 1029 return USBD_NOMEM; 1030 1031 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 1032 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1033 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 1034 1035 dwc2_urb->priv = xfer; 1036 dwc2_urb->packet_count = xfer->ux_nframes; 1037 1038 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1039 mps); 1040 1041 if (xfertype == UE_CONTROL) { 1042 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1043 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1044 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1045 } else { 1046 /* XXXNH - % mps required? */ 1047 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1048 flags |= URB_SEND_ZERO_PACKET; 1049 } 1050 flags |= URB_GIVEBACK_ASAP; 1051 1052 /* 1053 * control transfers with no data phase don't touch usbdma, but 1054 * everything else does. 1055 */ 1056 if (!(xfertype == UE_CONTROL && len == 0)) { 1057 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1058 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1059 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1060 1061 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1062 dir == UE_DIR_IN ? 1063 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1064 } 1065 dwc2_urb->length = len; 1066 dwc2_urb->flags = flags; 1067 dwc2_urb->status = -EINPROGRESS; 1068 1069 if (xfertype == UE_INTERRUPT || 1070 xfertype == UE_ISOCHRONOUS) { 1071 uint16_t ival; 1072 1073 if (xfertype == UE_INTERRUPT && 1074 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1075 ival = dpipe->pipe.up_interval; 1076 } else { 1077 ival = ed->bInterval; 1078 } 1079 1080 if (ival < 1) { 1081 retval = -ENODEV; 1082 goto fail; 1083 } 1084 if (dev->ud_speed == USB_SPEED_HIGH || 1085 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1086 if (ival > 16) { 1087 /* 1088 * illegal with HS/FS, but there were 1089 * documentation bugs in the spec 1090 */ 1091 ival = 256; 1092 } else { 1093 ival = (1 << (ival - 1)); 1094 } 1095 } else { 1096 if (xfertype == UE_INTERRUPT && ival < 10) 1097 ival = 10; 1098 } 1099 dwc2_urb->interval = ival; 1100 } 1101 1102 /* XXXNH bring down from callers?? */ 1103 // mutex_enter(&sc->sc_lock); 1104 1105 xfer->ux_actlen = 0; 1106 1107 KASSERT(xfertype != UE_ISOCHRONOUS || 1108 xfer->ux_nframes <= dwc2_urb->packet_count); 1109 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1110 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1111 1112 for (off = i = 0; i < xfer->ux_nframes; ++i) { 1113 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1114 off, xfer->ux_frlengths[i]); 1115 1116 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1117 xfer->ux_frlengths[i]); 1118 off += xfer->ux_frlengths[i]; 1119 } 1120 1121 struct dwc2_qh *qh = dpipe->priv; 1122 struct dwc2_qtd *qtd; 1123 bool qh_allocated = false; 1124 1125 /* Create QH for the endpoint if it doesn't exist */ 1126 if (!qh) { 1127 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1128 if (!qh) { 1129 retval = -ENOMEM; 1130 goto fail; 1131 } 1132 dpipe->priv = qh; 1133 qh_allocated = true; 1134 } 1135 1136 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1137 if (!qtd) { 1138 retval = -ENOMEM; 1139 goto fail1; 1140 } 1141 memset(qtd, 0, sizeof(*qtd)); 1142 1143 /* might need to check cpu_intr_p */ 1144 mutex_spin_enter(&hsotg->lock); 1145 1146 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 1147 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 1148 dwc2_timeout, xfer); 1149 } 1150 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1151 if (retval) 1152 goto fail2; 1153 1154 if (alloc_bandwidth) { 1155 dwc2_allocate_bus_bandwidth(hsotg, 1156 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1157 xfer); 1158 } 1159 1160 mutex_spin_exit(&hsotg->lock); 1161 // mutex_exit(&sc->sc_lock); 1162 1163 return USBD_IN_PROGRESS; 1164 1165 fail2: 1166 callout_halt(&xfer->ux_callout, &hsotg->lock); 1167 dwc2_urb->priv = NULL; 1168 mutex_spin_exit(&hsotg->lock); 1169 pool_cache_put(sc->sc_qtdpool, qtd); 1170 1171 fail1: 1172 if (qh_allocated) { 1173 dpipe->priv = NULL; 1174 dwc2_hcd_qh_free(hsotg, qh); 1175 } 1176 fail: 1177 1178 switch (retval) { 1179 case -EINVAL: 1180 case -ENODEV: 1181 err = USBD_INVAL; 1182 break; 1183 case -ENOMEM: 1184 err = USBD_NOMEM; 1185 break; 1186 default: 1187 err = USBD_IOERROR; 1188 } 1189 1190 return err; 1191 1192 } 1193 1194 int dwc2_intr(void *p) 1195 { 1196 struct dwc2_softc *sc = p; 1197 struct dwc2_hsotg *hsotg; 1198 int ret = 0; 1199 1200 if (sc == NULL) 1201 return 0; 1202 1203 hsotg = sc->sc_hsotg; 1204 mutex_spin_enter(&hsotg->lock); 1205 1206 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1207 goto done; 1208 1209 if (sc->sc_bus.ub_usepolling) { 1210 uint32_t intrs; 1211 1212 intrs = dwc2_read_core_intr(hsotg); 1213 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1214 } else { 1215 ret = dwc2_interrupt(sc); 1216 } 1217 1218 done: 1219 mutex_spin_exit(&hsotg->lock); 1220 1221 return ret; 1222 } 1223 1224 int 1225 dwc2_interrupt(struct dwc2_softc *sc) 1226 { 1227 int ret = 0; 1228 1229 if (sc->sc_hcdenabled) { 1230 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1231 } 1232 1233 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1234 1235 return ret; 1236 } 1237 1238 /***********************************************************************/ 1239 1240 int 1241 dwc2_detach(struct dwc2_softc *sc, int flags) 1242 { 1243 int rv = 0; 1244 1245 if (sc->sc_child != NULL) 1246 rv = config_detach(sc->sc_child, flags); 1247 1248 return rv; 1249 } 1250 1251 bool 1252 dwc2_shutdown(device_t self, int flags) 1253 { 1254 struct dwc2_softc *sc = device_private(self); 1255 1256 sc = sc; 1257 1258 return true; 1259 } 1260 1261 void 1262 dwc2_childdet(device_t self, device_t child) 1263 { 1264 struct dwc2_softc *sc = device_private(self); 1265 1266 sc = sc; 1267 } 1268 1269 int 1270 dwc2_activate(device_t self, enum devact act) 1271 { 1272 struct dwc2_softc *sc = device_private(self); 1273 1274 sc = sc; 1275 1276 return 0; 1277 } 1278 1279 bool 1280 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1281 { 1282 struct dwc2_softc *sc = device_private(dv); 1283 1284 sc = sc; 1285 1286 return true; 1287 } 1288 1289 bool 1290 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1291 { 1292 struct dwc2_softc *sc = device_private(dv); 1293 1294 sc = sc; 1295 1296 return true; 1297 } 1298 1299 /***********************************************************************/ 1300 int 1301 dwc2_init(struct dwc2_softc *sc) 1302 { 1303 int err = 0; 1304 1305 err = linux_workqueue_init(); 1306 if (err) 1307 return err; 1308 1309 sc->sc_bus.ub_hcpriv = sc; 1310 sc->sc_bus.ub_revision = USBREV_2_0; 1311 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1312 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1313 sc->sc_bus.ub_usedma = true; 1314 sc->sc_hcdenabled = false; 1315 1316 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1317 1318 TAILQ_INIT(&sc->sc_complete); 1319 1320 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1321 dwc2_rhc, sc); 1322 1323 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1324 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1325 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1326 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1327 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1328 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1329 1330 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1331 sc->sc_hsotg->hsotg_sc = sc; 1332 sc->sc_hsotg->dev = sc->sc_dev; 1333 sc->sc_hcdenabled = true; 1334 1335 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1336 struct dwc2_core_params defparams; 1337 int retval; 1338 1339 if (sc->sc_params == NULL) { 1340 /* Default all params to autodetect */ 1341 dwc2_set_all_params(&defparams, -1); 1342 sc->sc_params = &defparams; 1343 1344 /* 1345 * Disable descriptor dma mode by default as the HW can support 1346 * it, but does not support it for SPLIT transactions. 1347 */ 1348 defparams.dma_desc_enable = 0; 1349 } 1350 hsotg->dr_mode = USB_DR_MODE_HOST; 1351 1352 /* Detect config values from hardware */ 1353 retval = dwc2_get_hwparams(hsotg); 1354 if (retval) { 1355 goto fail2; 1356 } 1357 1358 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1359 dwc2_set_all_params(hsotg->core_params, -1); 1360 1361 /* Validate parameter values */ 1362 dwc2_set_parameters(hsotg, sc->sc_params); 1363 1364 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1365 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1366 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1367 retval = dwc2_gadget_init(hsotg); 1368 if (retval) 1369 goto fail2; 1370 hsotg->gadget_enabled = 1; 1371 } 1372 #endif 1373 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1374 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1375 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1376 retval = dwc2_hcd_init(hsotg); 1377 if (retval) { 1378 if (hsotg->gadget_enabled) 1379 dwc2_hsotg_remove(hsotg); 1380 goto fail2; 1381 } 1382 hsotg->hcd_enabled = 1; 1383 } 1384 #endif 1385 1386 uint32_t snpsid = hsotg->hw_params.snpsid; 1387 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1388 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1389 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1390 1391 return 0; 1392 1393 fail2: 1394 err = -retval; 1395 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1396 softint_disestablish(sc->sc_rhc_si); 1397 1398 return err; 1399 } 1400 1401 #if 0 1402 /* 1403 * curmode is a mode indication bit 0 = device, 1 = host 1404 */ 1405 static const char * const intnames[32] = { 1406 "curmode", "modemis", "otgint", "sof", 1407 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1408 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1409 "usbrst", "enumdone", "isooutdrop", "eopf", 1410 "restore_done", "epmis", "iepint", "oepint", 1411 "incompisoin", "incomplp", "fetsusp", "resetdet", 1412 "prtint", "hchint", "ptxfemp", "lpm", 1413 "conidstschng", "disconnint", "sessreqint", "wkupint" 1414 }; 1415 1416 1417 /***********************************************************************/ 1418 1419 #endif 1420 1421 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1422 int *hub_port) 1423 { 1424 struct usbd_xfer *xfer = context; 1425 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1426 struct usbd_device *dev = dpipe->pipe.up_dev; 1427 1428 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1429 *hub_port = dev->ud_myhsport->up_portno; 1430 } 1431 1432 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1433 { 1434 struct usbd_xfer *xfer = context; 1435 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1436 struct usbd_device *dev = dpipe->pipe.up_dev; 1437 1438 return dev->ud_speed; 1439 } 1440 1441 /* 1442 * Sets the final status of an URB and returns it to the upper layer. Any 1443 * required cleanup of the URB is performed. 1444 * 1445 * Must be called with interrupt disabled and spinlock held 1446 */ 1447 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1448 int status) 1449 { 1450 struct usbd_xfer *xfer; 1451 struct dwc2_xfer *dxfer; 1452 struct dwc2_softc *sc; 1453 usb_endpoint_descriptor_t *ed; 1454 uint8_t xfertype; 1455 1456 if (!qtd) { 1457 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1458 return; 1459 } 1460 1461 if (!qtd->urb) { 1462 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1463 return; 1464 } 1465 1466 xfer = qtd->urb->priv; 1467 if (!xfer) { 1468 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1469 return; 1470 } 1471 1472 /* 1473 * If software has completed it, either by cancellation 1474 * or timeout, drop it on the floor. 1475 */ 1476 if (xfer->ux_status != USBD_IN_PROGRESS) { 1477 KASSERT(xfer->ux_status == USBD_CANCELLED || 1478 xfer->ux_status == USBD_TIMEOUT); 1479 return; 1480 } 1481 1482 /* 1483 * Cancel the timeout and the task, which have not yet 1484 * run. If they have already fired, at worst they are 1485 * waiting for the lock. They will see that the xfer 1486 * is no longer in progress and give up. 1487 */ 1488 callout_stop(&xfer->ux_callout); 1489 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1490 1491 dxfer = DWC2_XFER2DXFER(xfer); 1492 sc = DWC2_XFER2SC(xfer); 1493 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1494 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1495 1496 struct dwc2_hcd_urb *urb = qtd->urb; 1497 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1498 1499 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1500 1501 if (xfertype == UE_ISOCHRONOUS) { 1502 int i; 1503 1504 xfer->ux_actlen = 0; 1505 for (i = 0; i < xfer->ux_nframes; ++i) { 1506 xfer->ux_frlengths[i] = 1507 dwc2_hcd_urb_get_iso_desc_actual_length( 1508 urb, i); 1509 xfer->ux_actlen += xfer->ux_frlengths[i]; 1510 } 1511 } 1512 1513 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1514 int i; 1515 1516 for (i = 0; i < xfer->ux_nframes; i++) 1517 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1518 i, urb->iso_descs[i].status); 1519 } 1520 1521 if (!status) { 1522 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1523 xfer->ux_actlen < xfer->ux_length) 1524 status = -EIO; 1525 } 1526 1527 switch (status) { 1528 case 0: 1529 xfer->ux_status = USBD_NORMAL_COMPLETION; 1530 break; 1531 case -EPIPE: 1532 xfer->ux_status = USBD_STALLED; 1533 break; 1534 case -ETIMEDOUT: 1535 xfer->ux_status = USBD_TIMEOUT; 1536 break; 1537 case -EPROTO: 1538 xfer->ux_status = USBD_INVAL; 1539 break; 1540 case -EIO: 1541 xfer->ux_status = USBD_IOERROR; 1542 break; 1543 case -EOVERFLOW: 1544 xfer->ux_status = USBD_IOERROR; 1545 break; 1546 default: 1547 xfer->ux_status = USBD_IOERROR; 1548 printf("%s: unknown error status %d\n", __func__, status); 1549 } 1550 1551 if (xfer->ux_status == USBD_NORMAL_COMPLETION) { 1552 /* 1553 * control transfers with no data phase don't touch dmabuf, but 1554 * everything else does. 1555 */ 1556 if (!(xfertype == UE_CONTROL && 1557 UGETW(xfer->ux_request.wLength) == 0) && 1558 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1559 ) { 1560 int rd = usbd_xfer_isread(xfer); 1561 1562 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1563 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1564 } 1565 } 1566 1567 if (xfertype == UE_ISOCHRONOUS || 1568 xfertype == UE_INTERRUPT) { 1569 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1570 1571 dwc2_free_bus_bandwidth(hsotg, 1572 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1573 xfer); 1574 } 1575 1576 qtd->urb = NULL; 1577 KASSERT(mutex_owned(&hsotg->lock)); 1578 1579 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1580 1581 mutex_spin_exit(&hsotg->lock); 1582 usb_schedsoftintr(&sc->sc_bus); 1583 mutex_spin_enter(&hsotg->lock); 1584 } 1585 1586 1587 int 1588 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1589 { 1590 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1591 1592 mutex_spin_enter(&hsotg->lock); 1593 1594 hsotg->lx_state = DWC2_L0; 1595 1596 if (dwc2_is_device_mode(hsotg)) { 1597 mutex_spin_exit(&hsotg->lock); 1598 return 0; /* why 0 ?? */ 1599 } 1600 1601 dwc2_hcd_reinit(hsotg); 1602 1603 mutex_spin_exit(&hsotg->lock); 1604 return 0; 1605 } 1606 1607 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1608 { 1609 1610 return false; 1611 } 1612
Indexes created Tue Sep 23 02:09:52 GMT 2025