dwc2.c revision 1.70
1 /* $NetBSD: dwc2.c,v 1.70 2020/02/15 13:56:56 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.70 2020/02/15 13:56:56 riastradh Exp $"); 34 35 #include "opt_usb.h" 36 37 #include <sys/param.h> 38 39 #include <sys/cpu.h> 40 #include <sys/device.h> 41 #include <sys/kernel.h> 42 #include <sys/kmem.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/select.h> 46 #include <sys/sysctl.h> 47 #include <sys/systm.h> 48 49 #include <machine/endian.h> 50 51 #include <dev/usb/usb.h> 52 #include <dev/usb/usbdi.h> 53 #include <dev/usb/usbdivar.h> 54 #include <dev/usb/usb_mem.h> 55 #include <dev/usb/usbroothub.h> 56 57 #include <dwc2/dwc2.h> 58 #include <dwc2/dwc2var.h> 59 60 #include "dwc2_core.h" 61 #include "dwc2_hcd.h" 62 63 #ifdef DWC2_COUNTERS 64 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 65 #else 66 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 67 #endif 68 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 69 70 #ifdef DWC2_DEBUG 71 #define DPRINTFN(n,fmt,...) do { \ 72 if (dwc2debug >= (n)) { \ 73 printf("%s: " fmt, \ 74 __FUNCTION__,## __VA_ARGS__); \ 75 } \ 76 } while (0) 77 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 78 int dwc2debug = 0; 79 80 SYSCTL_SETUP(sysctl_hw_dwc2_setup, "sysctl hw.dwc2 setup") 81 { 82 int err; 83 const struct sysctlnode *rnode; 84 const struct sysctlnode *cnode; 85 86 err = sysctl_createv(clog, 0, NULL, &rnode, 87 CTLFLAG_PERMANENT, CTLTYPE_NODE, "dwc2", 88 SYSCTL_DESCR("dwc2 global controls"), 89 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 90 91 if (err) 92 goto fail; 93 94 /* control debugging printfs */ 95 err = sysctl_createv(clog, 0, &rnode, &cnode, 96 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 97 "debug", SYSCTL_DESCR("Enable debugging output"), 98 NULL, 0, &dwc2debug, sizeof(dwc2debug), CTL_CREATE, CTL_EOL); 99 if (err) 100 goto fail; 101 102 return; 103 fail: 104 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 105 } 106 #else 107 #define DPRINTF(...) do { } while (0) 108 #define DPRINTFN(...) do { } while (0) 109 #endif 110 111 Static usbd_status dwc2_open(struct usbd_pipe *); 112 Static void dwc2_poll(struct usbd_bus *); 113 Static void dwc2_softintr(void *); 114 115 Static struct usbd_xfer * 116 dwc2_allocx(struct usbd_bus *, unsigned int); 117 Static void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 118 Static void dwc2_get_lock(struct usbd_bus *, kmutex_t **); 119 Static bool dwc2_dying(struct usbd_bus *); 120 Static int dwc2_roothub_ctrl(struct usbd_bus *, usb_device_request_t *, 121 void *, int); 122 123 Static usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 124 Static usbd_status dwc2_root_intr_start(struct usbd_xfer *); 125 Static void dwc2_root_intr_abort(struct usbd_xfer *); 126 Static void dwc2_root_intr_close(struct usbd_pipe *); 127 Static void dwc2_root_intr_done(struct usbd_xfer *); 128 129 Static usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 130 Static usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 131 Static void dwc2_device_ctrl_abort(struct usbd_xfer *); 132 Static void dwc2_device_ctrl_close(struct usbd_pipe *); 133 Static void dwc2_device_ctrl_done(struct usbd_xfer *); 134 135 Static usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 136 Static void dwc2_device_bulk_abort(struct usbd_xfer *); 137 Static void dwc2_device_bulk_close(struct usbd_pipe *); 138 Static void dwc2_device_bulk_done(struct usbd_xfer *); 139 140 Static usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 141 Static usbd_status dwc2_device_intr_start(struct usbd_xfer *); 142 Static void dwc2_device_intr_abort(struct usbd_xfer *); 143 Static void dwc2_device_intr_close(struct usbd_pipe *); 144 Static void dwc2_device_intr_done(struct usbd_xfer *); 145 146 Static usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 147 Static void dwc2_device_isoc_abort(struct usbd_xfer *); 148 Static void dwc2_device_isoc_close(struct usbd_pipe *); 149 Static void dwc2_device_isoc_done(struct usbd_xfer *); 150 151 Static usbd_status dwc2_device_start(struct usbd_xfer *); 152 153 Static void dwc2_close_pipe(struct usbd_pipe *); 154 Static void dwc2_abortx(struct usbd_xfer *); 155 156 Static void dwc2_device_clear_toggle(struct usbd_pipe *); 157 Static void dwc2_noop(struct usbd_pipe *pipe); 158 159 Static int dwc2_interrupt(struct dwc2_softc *); 160 Static void dwc2_rhc(void *); 161 162 163 static inline void 164 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 165 struct usbd_xfer *xfer) 166 { 167 } 168 169 static inline void 170 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 171 struct usbd_xfer *xfer) 172 { 173 } 174 175 Static const struct usbd_bus_methods dwc2_bus_methods = { 176 .ubm_open = dwc2_open, 177 .ubm_softint = dwc2_softintr, 178 .ubm_dopoll = dwc2_poll, 179 .ubm_allocx = dwc2_allocx, 180 .ubm_freex = dwc2_freex, 181 .ubm_abortx = dwc2_abortx, 182 .ubm_dying = dwc2_dying, 183 .ubm_getlock = dwc2_get_lock, 184 .ubm_rhctrl = dwc2_roothub_ctrl, 185 }; 186 187 Static const struct usbd_pipe_methods dwc2_root_intr_methods = { 188 .upm_transfer = dwc2_root_intr_transfer, 189 .upm_start = dwc2_root_intr_start, 190 .upm_abort = dwc2_root_intr_abort, 191 .upm_close = dwc2_root_intr_close, 192 .upm_cleartoggle = dwc2_noop, 193 .upm_done = dwc2_root_intr_done, 194 }; 195 196 Static const struct usbd_pipe_methods dwc2_device_ctrl_methods = { 197 .upm_transfer = dwc2_device_ctrl_transfer, 198 .upm_start = dwc2_device_ctrl_start, 199 .upm_abort = dwc2_device_ctrl_abort, 200 .upm_close = dwc2_device_ctrl_close, 201 .upm_cleartoggle = dwc2_noop, 202 .upm_done = dwc2_device_ctrl_done, 203 }; 204 205 Static const struct usbd_pipe_methods dwc2_device_intr_methods = { 206 .upm_transfer = dwc2_device_intr_transfer, 207 .upm_start = dwc2_device_intr_start, 208 .upm_abort = dwc2_device_intr_abort, 209 .upm_close = dwc2_device_intr_close, 210 .upm_cleartoggle = dwc2_device_clear_toggle, 211 .upm_done = dwc2_device_intr_done, 212 }; 213 214 Static const struct usbd_pipe_methods dwc2_device_bulk_methods = { 215 .upm_transfer = dwc2_device_bulk_transfer, 216 .upm_abort = dwc2_device_bulk_abort, 217 .upm_close = dwc2_device_bulk_close, 218 .upm_cleartoggle = dwc2_device_clear_toggle, 219 .upm_done = dwc2_device_bulk_done, 220 }; 221 222 Static const struct usbd_pipe_methods dwc2_device_isoc_methods = { 223 .upm_transfer = dwc2_device_isoc_transfer, 224 .upm_abort = dwc2_device_isoc_abort, 225 .upm_close = dwc2_device_isoc_close, 226 .upm_cleartoggle = dwc2_noop, 227 .upm_done = dwc2_device_isoc_done, 228 }; 229 230 struct usbd_xfer * 231 dwc2_allocx(struct usbd_bus *bus, unsigned int nframes) 232 { 233 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 234 struct dwc2_xfer *dxfer; 235 236 DPRINTFN(10, "\n"); 237 238 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 239 dxfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 240 if (dxfer != NULL) { 241 memset(dxfer, 0, sizeof(*dxfer)); 242 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 243 nframes, GFP_KERNEL); 244 #ifdef DIAGNOSTIC 245 dxfer->xfer.ux_state = XFER_BUSY; 246 #endif 247 } 248 return (struct usbd_xfer *)dxfer; 249 } 250 251 void 252 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 253 { 254 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 255 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 256 257 DPRINTFN(10, "\n"); 258 259 #ifdef DIAGNOSTIC 260 if (xfer->ux_state != XFER_BUSY && 261 xfer->ux_status != USBD_NOT_STARTED) { 262 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 263 } 264 xfer->ux_state = XFER_FREE; 265 #endif 266 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 267 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, dxfer->urb->packet_count); 268 pool_cache_put(sc->sc_xferpool, xfer); 269 } 270 271 Static bool 272 dwc2_dying(struct usbd_bus *bus) 273 { 274 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 275 276 return sc->sc_dying; 277 } 278 279 Static void 280 dwc2_get_lock(struct usbd_bus *bus, kmutex_t **lock) 281 { 282 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 283 284 *lock = &sc->sc_lock; 285 } 286 287 Static void 288 dwc2_rhc(void *addr) 289 { 290 struct dwc2_softc *sc = addr; 291 struct usbd_xfer *xfer; 292 u_char *p; 293 294 DPRINTF("\n"); 295 mutex_enter(&sc->sc_lock); 296 xfer = sc->sc_intrxfer; 297 298 if (xfer == NULL) { 299 /* Just ignore the change. */ 300 mutex_exit(&sc->sc_lock); 301 return; 302 303 } 304 KASSERT(xfer->ux_status == USBD_IN_PROGRESS); 305 306 /* set port bit */ 307 p = KERNADDR(&xfer->ux_dmabuf, 0); 308 309 p[0] = 0x02; /* we only have one port (1 << 1) */ 310 311 xfer->ux_actlen = xfer->ux_length; 312 xfer->ux_status = USBD_NORMAL_COMPLETION; 313 314 usb_transfer_complete(xfer); 315 mutex_exit(&sc->sc_lock); 316 } 317 318 Static void 319 dwc2_softintr(void *v) 320 { 321 struct usbd_bus *bus = v; 322 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 323 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 324 struct dwc2_xfer *dxfer, *next; 325 TAILQ_HEAD(, dwc2_xfer) claimed = TAILQ_HEAD_INITIALIZER(claimed); 326 327 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 328 329 /* 330 * Grab all the xfers that have not been aborted or timed out. 331 * Do so under a single lock -- without dropping it to run 332 * usb_transfer_complete as we go -- so that dwc2_abortx won't 333 * remove next out from under us during iteration when we've 334 * dropped the lock. 335 */ 336 mutex_spin_enter(&hsotg->lock); 337 TAILQ_FOREACH_SAFE(dxfer, &sc->sc_complete, xnext, next) { 338 if (!usbd_xfer_trycomplete(&dxfer->xfer)) 339 /* 340 * The hard interrput handler decided to 341 * complete the xfer, and put it on sc_complete 342 * to pass it to us in the soft interrupt 343 * handler, but in the time between hard 344 * interrupt and soft interrupt, the xfer was 345 * aborted or timed out and we lost the race. 346 */ 347 continue; 348 KASSERT(dxfer->xfer.ux_status == USBD_IN_PROGRESS); 349 KASSERT(dxfer->intr_status != USBD_CANCELLED); 350 KASSERT(dxfer->intr_status != USBD_TIMEOUT); 351 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 352 TAILQ_INSERT_TAIL(&claimed, dxfer, xnext); 353 } 354 mutex_spin_exit(&hsotg->lock); 355 356 /* Now complete them. */ 357 while (!TAILQ_EMPTY(&claimed)) { 358 dxfer = TAILQ_FIRST(&claimed); 359 KASSERT(dxfer->xfer.ux_status == USBD_IN_PROGRESS); 360 KASSERT(dxfer->intr_status != USBD_CANCELLED); 361 KASSERT(dxfer->intr_status != USBD_TIMEOUT); 362 TAILQ_REMOVE(&claimed, dxfer, xnext); 363 364 dxfer->xfer.ux_status = dxfer->intr_status; 365 usb_transfer_complete(&dxfer->xfer); 366 } 367 } 368 369 usbd_status 370 dwc2_open(struct usbd_pipe *pipe) 371 { 372 struct usbd_device *dev = pipe->up_dev; 373 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 374 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 375 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 376 uint8_t addr = dev->ud_addr; 377 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 378 usbd_status err; 379 380 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 381 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 382 383 if (sc->sc_dying) { 384 return USBD_IOERROR; 385 } 386 387 if (addr == dev->ud_bus->ub_rhaddr) { 388 switch (ed->bEndpointAddress) { 389 case USB_CONTROL_ENDPOINT: 390 pipe->up_methods = &roothub_ctrl_methods; 391 break; 392 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 393 pipe->up_methods = &dwc2_root_intr_methods; 394 break; 395 default: 396 DPRINTF("bad bEndpointAddress 0x%02x\n", 397 ed->bEndpointAddress); 398 return USBD_INVAL; 399 } 400 DPRINTF("root hub pipe open\n"); 401 return USBD_NORMAL_COMPLETION; 402 } 403 404 switch (xfertype) { 405 case UE_CONTROL: 406 pipe->up_methods = &dwc2_device_ctrl_methods; 407 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 408 0, &dpipe->req_dma); 409 if (err) 410 return err; 411 break; 412 case UE_INTERRUPT: 413 pipe->up_methods = &dwc2_device_intr_methods; 414 break; 415 case UE_ISOCHRONOUS: 416 pipe->up_serialise = false; 417 pipe->up_methods = &dwc2_device_isoc_methods; 418 break; 419 case UE_BULK: 420 pipe->up_serialise = false; 421 pipe->up_methods = &dwc2_device_bulk_methods; 422 break; 423 default: 424 DPRINTF("bad xfer type %d\n", xfertype); 425 return USBD_INVAL; 426 } 427 428 /* QH */ 429 dpipe->priv = NULL; 430 431 return USBD_NORMAL_COMPLETION; 432 } 433 434 Static void 435 dwc2_poll(struct usbd_bus *bus) 436 { 437 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 438 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 439 440 mutex_spin_enter(&hsotg->lock); 441 dwc2_interrupt(sc); 442 mutex_spin_exit(&hsotg->lock); 443 } 444 445 /* 446 * Close a reqular pipe. 447 * Assumes that there are no pending transactions. 448 */ 449 Static void 450 dwc2_close_pipe(struct usbd_pipe *pipe) 451 { 452 #ifdef DIAGNOSTIC 453 struct dwc2_softc *sc = pipe->up_dev->ud_bus->ub_hcpriv; 454 #endif 455 456 KASSERT(mutex_owned(&sc->sc_lock)); 457 } 458 459 /* 460 * Abort a device request. 461 */ 462 Static void 463 dwc2_abortx(struct usbd_xfer *xfer) 464 { 465 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 466 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 467 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 468 struct dwc2_xfer *d; 469 int err; 470 471 DPRINTF("xfer %p pipe %p status 0x%08x", xfer, xfer->ux_pipe, 472 xfer->ux_status); 473 474 KASSERT(mutex_owned(&sc->sc_lock)); 475 ASSERT_SLEEPABLE(); 476 477 KASSERTMSG((xfer->ux_status == USBD_CANCELLED || 478 xfer->ux_status == USBD_TIMEOUT), 479 "bad abort status: %d", xfer->ux_status); 480 481 mutex_spin_enter(&hsotg->lock); 482 483 /* 484 * Check whether we aborted or timed out after the hardware 485 * completion interrupt determined that it's done but before 486 * the soft interrupt could actually complete it. If so, it's 487 * too late for the soft interrupt -- at this point we've 488 * already committed to abort it or time it out, so we need to 489 * take it off the softint's list of work in case the caller, 490 * say, frees the xfer before the softint runs. 491 * 492 * This logic is unusual among host controller drivers, and 493 * happens because dwc2 decides to complete xfers in the hard 494 * interrupt handler rather than in the soft interrupt handler, 495 * but usb_transfer_complete must be deferred to softint -- and 496 * we happened to swoop in between the hard interrupt and the 497 * soft interrupt. Other host controller drivers do almost all 498 * processing in the softint so there's no intermediate stage. 499 * 500 * Fortunately, this linear search to discern the intermediate 501 * stage is not likely to be a serious performance impact 502 * because it happens only on abort or timeout. 503 */ 504 TAILQ_FOREACH(d, &sc->sc_complete, xnext) { 505 if (d == dxfer) { 506 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 507 break; 508 } 509 } 510 511 /* 512 * If we're dying, skip the hardware action and just notify the 513 * software that we're done. 514 */ 515 if (sc->sc_dying) { 516 DPRINTFN(4, "xfer %p dying 0x%08x", xfer, xfer->ux_status); 517 goto dying; 518 } 519 520 /* 521 * HC Step 1: Handle the hardware. 522 */ 523 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 524 if (err) { 525 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 526 } 527 528 dying: 529 mutex_spin_exit(&hsotg->lock); 530 531 /* 532 * Final Step: Notify completion to waiting xfers. 533 */ 534 usb_transfer_complete(xfer); 535 KASSERT(mutex_owned(&sc->sc_lock)); 536 } 537 538 Static void 539 dwc2_noop(struct usbd_pipe *pipe) 540 { 541 542 } 543 544 Static void 545 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 546 { 547 548 DPRINTF("toggle %d -> 0", pipe->up_endpoint->ue_toggle); 549 } 550 551 /***********************************************************************/ 552 553 Static int 554 dwc2_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 555 void *buf, int buflen) 556 { 557 struct dwc2_softc *sc = bus->ub_hcpriv; 558 usbd_status err = USBD_IOERROR; 559 uint16_t len, value, index; 560 int totlen = 0; 561 562 if (sc->sc_dying) 563 return -1; 564 565 DPRINTFN(4, "type=0x%02x request=%02x\n", 566 req->bmRequestType, req->bRequest); 567 568 len = UGETW(req->wLength); 569 value = UGETW(req->wValue); 570 index = UGETW(req->wIndex); 571 572 #define C(x,y) ((x) | ((y) << 8)) 573 switch (C(req->bRequest, req->bmRequestType)) { 574 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 575 DPRINTFN(8, "wValue=0x%04x\n", value); 576 577 if (len == 0) 578 break; 579 switch (value) { 580 #define sd ((usb_string_descriptor_t *)buf) 581 case C(2, UDESC_STRING): 582 /* Product */ 583 totlen = usb_makestrdesc(sd, len, "DWC2 root hub"); 584 break; 585 #undef sd 586 default: 587 /* default from usbroothub */ 588 return buflen; 589 } 590 break; 591 592 case C(UR_GET_CONFIG, UT_READ_DEVICE): 593 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 594 case C(UR_GET_STATUS, UT_READ_INTERFACE): 595 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 596 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 597 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 598 /* default from usbroothub */ 599 DPRINTFN(4, "returning %d (usbroothub default)", buflen); 600 601 return buflen; 602 603 default: 604 /* Hub requests */ 605 err = dwc2_hcd_hub_control(sc->sc_hsotg, 606 C(req->bRequest, req->bmRequestType), value, index, 607 buf, len); 608 if (err) { 609 return -1; 610 } 611 totlen = len; 612 } 613 614 return totlen; 615 } 616 617 Static usbd_status 618 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 619 { 620 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 621 usbd_status err; 622 623 DPRINTF("\n"); 624 625 /* Insert last in queue. */ 626 mutex_enter(&sc->sc_lock); 627 err = usb_insert_transfer(xfer); 628 mutex_exit(&sc->sc_lock); 629 if (err) 630 return err; 631 632 /* Pipe isn't running, start first */ 633 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 634 } 635 636 Static usbd_status 637 dwc2_root_intr_start(struct usbd_xfer *xfer) 638 { 639 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 640 const bool polling = sc->sc_bus.ub_usepolling; 641 642 DPRINTF("\n"); 643 644 if (sc->sc_dying) 645 return USBD_IOERROR; 646 647 if (!polling) 648 mutex_enter(&sc->sc_lock); 649 KASSERT(sc->sc_intrxfer == NULL); 650 sc->sc_intrxfer = xfer; 651 xfer->ux_status = USBD_IN_PROGRESS; 652 if (!polling) 653 mutex_exit(&sc->sc_lock); 654 655 return USBD_IN_PROGRESS; 656 } 657 658 /* Abort a root interrupt request. */ 659 Static void 660 dwc2_root_intr_abort(struct usbd_xfer *xfer) 661 { 662 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 663 664 DPRINTF("xfer=%p\n", xfer); 665 666 KASSERT(mutex_owned(&sc->sc_lock)); 667 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 668 669 /* If xfer has already completed, nothing to do here. */ 670 if (sc->sc_intrxfer == NULL) 671 return; 672 673 /* 674 * Otherwise, sc->sc_intrxfer had better be this transfer. 675 * Cancel it. 676 */ 677 KASSERT(sc->sc_intrxfer == xfer); 678 KASSERT(xfer->ux_status == USBD_IN_PROGRESS); 679 xfer->ux_status = USBD_CANCELLED; 680 usb_transfer_complete(xfer); 681 } 682 683 Static void 684 dwc2_root_intr_close(struct usbd_pipe *pipe) 685 { 686 struct dwc2_softc *sc __diagused = DWC2_PIPE2SC(pipe); 687 688 DPRINTF("\n"); 689 690 KASSERT(mutex_owned(&sc->sc_lock)); 691 692 /* 693 * Caller must guarantee the xfer has completed first, by 694 * closing the pipe only after normal completion or an abort. 695 */ 696 KASSERT(sc->sc_intrxfer == NULL); 697 } 698 699 Static void 700 dwc2_root_intr_done(struct usbd_xfer *xfer) 701 { 702 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 703 704 DPRINTF("\n"); 705 706 /* Claim the xfer so it doesn't get completed again. */ 707 KASSERT(sc->sc_intrxfer == xfer); 708 KASSERT(xfer->ux_status != USBD_IN_PROGRESS); 709 sc->sc_intrxfer = NULL; 710 } 711 712 /***********************************************************************/ 713 714 Static usbd_status 715 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 716 { 717 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 718 usbd_status err; 719 720 DPRINTF("\n"); 721 722 /* Insert last in queue. */ 723 mutex_enter(&sc->sc_lock); 724 err = usb_insert_transfer(xfer); 725 mutex_exit(&sc->sc_lock); 726 if (err) 727 return err; 728 729 /* Pipe isn't running, start first */ 730 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 731 } 732 733 Static usbd_status 734 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 735 { 736 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 737 usbd_status err; 738 const bool polling = sc->sc_bus.ub_usepolling; 739 740 DPRINTF("\n"); 741 742 if (!polling) 743 mutex_enter(&sc->sc_lock); 744 xfer->ux_status = USBD_IN_PROGRESS; 745 err = dwc2_device_start(xfer); 746 if (!polling) 747 mutex_exit(&sc->sc_lock); 748 749 if (err) 750 return err; 751 752 return USBD_IN_PROGRESS; 753 } 754 755 Static void 756 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 757 { 758 #ifdef DIAGNOSTIC 759 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 760 #endif 761 KASSERT(mutex_owned(&sc->sc_lock)); 762 763 DPRINTF("xfer=%p\n", xfer); 764 usbd_xfer_abort(xfer); 765 } 766 767 Static void 768 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 769 { 770 771 DPRINTF("pipe=%p\n", pipe); 772 dwc2_close_pipe(pipe); 773 } 774 775 Static void 776 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 777 { 778 779 DPRINTF("xfer=%p\n", xfer); 780 } 781 782 /***********************************************************************/ 783 784 Static usbd_status 785 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 786 { 787 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 788 usbd_status err; 789 790 DPRINTF("xfer=%p\n", xfer); 791 792 /* Insert last in queue. */ 793 mutex_enter(&sc->sc_lock); 794 err = usb_insert_transfer(xfer); 795 796 KASSERT(err == USBD_NORMAL_COMPLETION); 797 798 xfer->ux_status = USBD_IN_PROGRESS; 799 err = dwc2_device_start(xfer); 800 mutex_exit(&sc->sc_lock); 801 802 return err; 803 } 804 805 Static void 806 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 807 { 808 #ifdef DIAGNOSTIC 809 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 810 #endif 811 KASSERT(mutex_owned(&sc->sc_lock)); 812 813 DPRINTF("xfer=%p\n", xfer); 814 usbd_xfer_abort(xfer); 815 } 816 817 Static void 818 dwc2_device_bulk_close(struct usbd_pipe *pipe) 819 { 820 821 DPRINTF("pipe=%p\n", pipe); 822 823 dwc2_close_pipe(pipe); 824 } 825 826 Static void 827 dwc2_device_bulk_done(struct usbd_xfer *xfer) 828 { 829 830 DPRINTF("xfer=%p\n", xfer); 831 } 832 833 /***********************************************************************/ 834 835 Static usbd_status 836 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 837 { 838 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 839 usbd_status err; 840 841 DPRINTF("xfer=%p\n", xfer); 842 843 /* Insert last in queue. */ 844 mutex_enter(&sc->sc_lock); 845 err = usb_insert_transfer(xfer); 846 mutex_exit(&sc->sc_lock); 847 if (err) 848 return err; 849 850 /* Pipe isn't running, start first */ 851 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 852 } 853 854 Static usbd_status 855 dwc2_device_intr_start(struct usbd_xfer *xfer) 856 { 857 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 858 struct usbd_device *dev = dpipe->pipe.up_dev; 859 struct dwc2_softc *sc = dev->ud_bus->ub_hcpriv; 860 usbd_status err; 861 const bool polling = sc->sc_bus.ub_usepolling; 862 863 if (!polling) 864 mutex_enter(&sc->sc_lock); 865 xfer->ux_status = USBD_IN_PROGRESS; 866 err = dwc2_device_start(xfer); 867 if (!polling) 868 mutex_exit(&sc->sc_lock); 869 870 if (err) 871 return err; 872 873 return USBD_IN_PROGRESS; 874 } 875 876 /* Abort a device interrupt request. */ 877 Static void 878 dwc2_device_intr_abort(struct usbd_xfer *xfer) 879 { 880 #ifdef DIAGNOSTIC 881 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 882 #endif 883 884 KASSERT(mutex_owned(&sc->sc_lock)); 885 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 886 887 DPRINTF("xfer=%p\n", xfer); 888 usbd_xfer_abort(xfer); 889 } 890 891 Static void 892 dwc2_device_intr_close(struct usbd_pipe *pipe) 893 { 894 895 DPRINTF("pipe=%p\n", pipe); 896 897 dwc2_close_pipe(pipe); 898 } 899 900 Static void 901 dwc2_device_intr_done(struct usbd_xfer *xfer) 902 { 903 904 DPRINTF("\n"); 905 } 906 907 /***********************************************************************/ 908 909 usbd_status 910 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 911 { 912 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 913 usbd_status err; 914 915 DPRINTF("xfer=%p\n", xfer); 916 917 /* Insert last in queue. */ 918 mutex_enter(&sc->sc_lock); 919 err = usb_insert_transfer(xfer); 920 921 KASSERT(err == USBD_NORMAL_COMPLETION); 922 923 xfer->ux_status = USBD_IN_PROGRESS; 924 err = dwc2_device_start(xfer); 925 mutex_exit(&sc->sc_lock); 926 927 return err; 928 } 929 930 void 931 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 932 { 933 struct dwc2_softc *sc __diagused = DWC2_XFER2SC(xfer); 934 KASSERT(mutex_owned(&sc->sc_lock)); 935 936 DPRINTF("xfer=%p\n", xfer); 937 usbd_xfer_abort(xfer); 938 } 939 940 void 941 dwc2_device_isoc_close(struct usbd_pipe *pipe) 942 { 943 DPRINTF("\n"); 944 945 dwc2_close_pipe(pipe); 946 } 947 948 void 949 dwc2_device_isoc_done(struct usbd_xfer *xfer) 950 { 951 952 DPRINTF("\n"); 953 } 954 955 956 usbd_status 957 dwc2_device_start(struct usbd_xfer *xfer) 958 { 959 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 960 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 961 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 962 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 963 struct dwc2_hcd_urb *dwc2_urb; 964 965 struct usbd_device *dev = xfer->ux_pipe->up_dev; 966 usb_endpoint_descriptor_t *ed = xfer->ux_pipe->up_endpoint->ue_edesc; 967 uint8_t addr = dev->ud_addr; 968 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 969 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 970 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 971 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 972 uint32_t len; 973 974 uint32_t flags = 0; 975 uint32_t off = 0; 976 int retval, err; 977 int alloc_bandwidth = 0; 978 979 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->ux_pipe); 980 981 if (xfertype == UE_ISOCHRONOUS || 982 xfertype == UE_INTERRUPT) { 983 mutex_spin_enter(&hsotg->lock); 984 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 985 alloc_bandwidth = 1; 986 mutex_spin_exit(&hsotg->lock); 987 } 988 989 /* 990 * For Control pipe the direction is from the request, all other 991 * transfers have been set correctly at pipe open time. 992 */ 993 if (xfertype == UE_CONTROL) { 994 usb_device_request_t *req = &xfer->ux_request; 995 996 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 997 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 998 "mps=%d\n", 999 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 1000 UGETW(req->wIndex), UGETW(req->wLength), dev->ud_addr, 1001 epnum, dir == UT_READ ? "in" :"out", dev->ud_speed, mps); 1002 1003 /* Copy request packet to our DMA buffer */ 1004 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 1005 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 1006 BUS_DMASYNC_PREWRITE); 1007 len = UGETW(req->wLength); 1008 if ((req->bmRequestType & UT_READ) == UT_READ) { 1009 dir = UE_DIR_IN; 1010 } else { 1011 dir = UE_DIR_OUT; 1012 } 1013 1014 DPRINTFN(3, "req = %p dma = %" PRIxBUSADDR " len %d dir %s\n", 1015 KERNADDR(&dpipe->req_dma, 0), DMAADDR(&dpipe->req_dma, 0), 1016 len, dir == UE_DIR_IN ? "in" : "out"); 1017 } else if (xfertype == UE_ISOCHRONOUS) { 1018 DPRINTFN(3, "xfer=%p nframes=%d flags=%d addr=%d endpt=%d," 1019 " mps=%d dir %s\n", xfer, xfer->ux_nframes, xfer->ux_flags, addr, 1020 epnum, mps, dir == UT_READ ? "in" :"out"); 1021 1022 len = 0; 1023 for (size_t i = 0; i < xfer->ux_nframes; i++) 1024 len += xfer->ux_frlengths[i]; 1025 } else { 1026 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 1027 " mps=%d dir %s\n", xfer, xfer->ux_length, xfer->ux_flags, addr, 1028 epnum, mps, dir == UT_READ ? "in" :"out"); 1029 1030 len = xfer->ux_length; 1031 } 1032 1033 dwc2_urb = dxfer->urb; 1034 if (!dwc2_urb) 1035 return USBD_NOMEM; 1036 1037 KASSERT(dwc2_urb->packet_count == xfer->ux_nframes); 1038 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1039 sizeof(dwc2_urb->iso_descs[0]) * dwc2_urb->packet_count); 1040 1041 dwc2_urb->priv = xfer; 1042 dwc2_urb->packet_count = xfer->ux_nframes; 1043 1044 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1045 mps); 1046 1047 if (xfertype == UE_CONTROL) { 1048 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1049 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1050 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1051 } else { 1052 /* XXXNH - % mps required? */ 1053 if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1054 flags |= URB_SEND_ZERO_PACKET; 1055 } 1056 flags |= URB_GIVEBACK_ASAP; 1057 1058 /* 1059 * control transfers with no data phase don't touch usbdma, but 1060 * everything else does. 1061 */ 1062 if (!(xfertype == UE_CONTROL && len == 0)) { 1063 dwc2_urb->usbdma = &xfer->ux_dmabuf; 1064 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1065 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1066 1067 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1068 dir == UE_DIR_IN ? 1069 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1070 } 1071 dwc2_urb->length = len; 1072 dwc2_urb->flags = flags; 1073 dwc2_urb->status = -EINPROGRESS; 1074 1075 if (xfertype == UE_INTERRUPT || 1076 xfertype == UE_ISOCHRONOUS) { 1077 uint16_t ival; 1078 1079 if (xfertype == UE_INTERRUPT && 1080 dpipe->pipe.up_interval != USBD_DEFAULT_INTERVAL) { 1081 ival = dpipe->pipe.up_interval; 1082 } else { 1083 ival = ed->bInterval; 1084 } 1085 1086 if (ival < 1) { 1087 retval = -ENODEV; 1088 goto fail; 1089 } 1090 if (dev->ud_speed == USB_SPEED_HIGH || 1091 (dev->ud_speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1092 if (ival > 16) { 1093 /* 1094 * illegal with HS/FS, but there were 1095 * documentation bugs in the spec 1096 */ 1097 ival = 256; 1098 } else { 1099 ival = (1 << (ival - 1)); 1100 } 1101 } else { 1102 if (xfertype == UE_INTERRUPT && ival < 10) 1103 ival = 10; 1104 } 1105 dwc2_urb->interval = ival; 1106 } 1107 1108 /* XXXNH bring down from callers?? */ 1109 // mutex_enter(&sc->sc_lock); 1110 1111 xfer->ux_actlen = 0; 1112 1113 KASSERT(xfertype != UE_ISOCHRONOUS || 1114 xfer->ux_nframes <= dwc2_urb->packet_count); 1115 KASSERTMSG(xfer->ux_nframes == 0 || xfertype == UE_ISOCHRONOUS, 1116 "nframes %d xfertype %d\n", xfer->ux_nframes, xfertype); 1117 1118 off = 0; 1119 for (size_t i = 0; i < xfer->ux_nframes; ++i) { 1120 DPRINTFN(3, "xfer=%p frame=%zd offset=%d length=%d\n", xfer, i, 1121 off, xfer->ux_frlengths[i]); 1122 1123 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1124 xfer->ux_frlengths[i]); 1125 off += xfer->ux_frlengths[i]; 1126 } 1127 1128 struct dwc2_qh *qh = dpipe->priv; 1129 struct dwc2_qtd *qtd; 1130 bool qh_allocated = false; 1131 1132 /* Create QH for the endpoint if it doesn't exist */ 1133 if (!qh) { 1134 qh = dwc2_hcd_qh_create(hsotg, dwc2_urb, GFP_ATOMIC); 1135 if (!qh) { 1136 retval = -ENOMEM; 1137 goto fail; 1138 } 1139 dpipe->priv = qh; 1140 qh_allocated = true; 1141 } 1142 1143 qtd = pool_cache_get(sc->sc_qtdpool, PR_NOWAIT); 1144 if (!qtd) { 1145 retval = -ENOMEM; 1146 goto fail1; 1147 } 1148 memset(qtd, 0, sizeof(*qtd)); 1149 1150 /* might need to check cpu_intr_p */ 1151 mutex_spin_enter(&hsotg->lock); 1152 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, qh, qtd); 1153 if (retval) 1154 goto fail2; 1155 usbd_xfer_schedule_timeout(xfer); 1156 xfer->ux_status = USBD_IN_PROGRESS; 1157 1158 if (alloc_bandwidth) { 1159 dwc2_allocate_bus_bandwidth(hsotg, 1160 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1161 xfer); 1162 } 1163 1164 mutex_spin_exit(&hsotg->lock); 1165 // mutex_exit(&sc->sc_lock); 1166 1167 return USBD_IN_PROGRESS; 1168 1169 fail2: 1170 dwc2_urb->priv = NULL; 1171 mutex_spin_exit(&hsotg->lock); 1172 pool_cache_put(sc->sc_qtdpool, qtd); 1173 1174 fail1: 1175 if (qh_allocated) { 1176 dpipe->priv = NULL; 1177 dwc2_hcd_qh_free(hsotg, qh); 1178 } 1179 fail: 1180 1181 switch (retval) { 1182 case -EINVAL: 1183 case -ENODEV: 1184 err = USBD_INVAL; 1185 break; 1186 case -ENOMEM: 1187 err = USBD_NOMEM; 1188 break; 1189 default: 1190 err = USBD_IOERROR; 1191 } 1192 1193 return err; 1194 1195 } 1196 1197 int dwc2_intr(void *p) 1198 { 1199 struct dwc2_softc *sc = p; 1200 struct dwc2_hsotg *hsotg; 1201 int ret = 0; 1202 1203 if (sc == NULL) 1204 return 0; 1205 1206 hsotg = sc->sc_hsotg; 1207 mutex_spin_enter(&hsotg->lock); 1208 1209 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1210 goto done; 1211 1212 if (sc->sc_bus.ub_usepolling) { 1213 uint32_t intrs; 1214 1215 intrs = dwc2_read_core_intr(hsotg); 1216 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1217 } else { 1218 ret = dwc2_interrupt(sc); 1219 } 1220 1221 done: 1222 mutex_spin_exit(&hsotg->lock); 1223 1224 return ret; 1225 } 1226 1227 int 1228 dwc2_interrupt(struct dwc2_softc *sc) 1229 { 1230 int ret = 0; 1231 1232 if (sc->sc_hcdenabled) { 1233 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1234 } 1235 1236 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1237 1238 return ret; 1239 } 1240 1241 /***********************************************************************/ 1242 1243 int 1244 dwc2_detach(struct dwc2_softc *sc, int flags) 1245 { 1246 int rv = 0; 1247 1248 if (sc->sc_child != NULL) 1249 rv = config_detach(sc->sc_child, flags); 1250 1251 return rv; 1252 } 1253 1254 bool 1255 dwc2_shutdown(device_t self, int flags) 1256 { 1257 struct dwc2_softc *sc = device_private(self); 1258 1259 sc = sc; 1260 1261 return true; 1262 } 1263 1264 void 1265 dwc2_childdet(device_t self, device_t child) 1266 { 1267 struct dwc2_softc *sc = device_private(self); 1268 1269 sc = sc; 1270 } 1271 1272 int 1273 dwc2_activate(device_t self, enum devact act) 1274 { 1275 struct dwc2_softc *sc = device_private(self); 1276 1277 sc = sc; 1278 1279 return 0; 1280 } 1281 1282 bool 1283 dwc2_resume(device_t dv, const pmf_qual_t *qual) 1284 { 1285 struct dwc2_softc *sc = device_private(dv); 1286 1287 sc = sc; 1288 1289 return true; 1290 } 1291 1292 bool 1293 dwc2_suspend(device_t dv, const pmf_qual_t *qual) 1294 { 1295 struct dwc2_softc *sc = device_private(dv); 1296 1297 sc = sc; 1298 1299 return true; 1300 } 1301 1302 /***********************************************************************/ 1303 int 1304 dwc2_init(struct dwc2_softc *sc) 1305 { 1306 int err = 0; 1307 1308 err = linux_workqueue_init(); 1309 if (err) 1310 return err; 1311 1312 sc->sc_bus.ub_hcpriv = sc; 1313 sc->sc_bus.ub_revision = USBREV_2_0; 1314 sc->sc_bus.ub_methods = &dwc2_bus_methods; 1315 sc->sc_bus.ub_pipesize = sizeof(struct dwc2_pipe); 1316 sc->sc_bus.ub_usedma = true; 1317 sc->sc_hcdenabled = false; 1318 1319 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 1320 1321 TAILQ_INIT(&sc->sc_complete); 1322 1323 sc->sc_rhc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 1324 dwc2_rhc, sc); 1325 1326 sc->sc_xferpool = pool_cache_init(sizeof(struct dwc2_xfer), 0, 0, 0, 1327 "dwc2xfer", NULL, IPL_USB, NULL, NULL, NULL); 1328 sc->sc_qhpool = pool_cache_init(sizeof(struct dwc2_qh), 0, 0, 0, 1329 "dwc2qh", NULL, IPL_USB, NULL, NULL, NULL); 1330 sc->sc_qtdpool = pool_cache_init(sizeof(struct dwc2_qtd), 0, 0, 0, 1331 "dwc2qtd", NULL, IPL_USB, NULL, NULL, NULL); 1332 1333 sc->sc_hsotg = kmem_zalloc(sizeof(struct dwc2_hsotg), KM_SLEEP); 1334 sc->sc_hsotg->hsotg_sc = sc; 1335 sc->sc_hsotg->dev = sc->sc_dev; 1336 sc->sc_hcdenabled = true; 1337 1338 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1339 struct dwc2_core_params defparams; 1340 int retval; 1341 1342 if (sc->sc_params == NULL) { 1343 /* Default all params to autodetect */ 1344 dwc2_set_all_params(&defparams, -1); 1345 sc->sc_params = &defparams; 1346 1347 /* 1348 * Disable descriptor dma mode by default as the HW can support 1349 * it, but does not support it for SPLIT transactions. 1350 */ 1351 defparams.dma_desc_enable = 0; 1352 } 1353 hsotg->dr_mode = USB_DR_MODE_HOST; 1354 1355 /* Detect config values from hardware */ 1356 retval = dwc2_get_hwparams(hsotg); 1357 if (retval) { 1358 goto fail2; 1359 } 1360 1361 hsotg->core_params = kmem_zalloc(sizeof(*hsotg->core_params), KM_SLEEP); 1362 dwc2_set_all_params(hsotg->core_params, -1); 1363 1364 /* Validate parameter values */ 1365 dwc2_set_parameters(hsotg, sc->sc_params); 1366 1367 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 1368 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1369 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 1370 retval = dwc2_gadget_init(hsotg); 1371 if (retval) 1372 goto fail2; 1373 hsotg->gadget_enabled = 1; 1374 } 1375 #endif 1376 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || \ 1377 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1378 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 1379 retval = dwc2_hcd_init(hsotg); 1380 if (retval) { 1381 if (hsotg->gadget_enabled) 1382 dwc2_hsotg_remove(hsotg); 1383 goto fail2; 1384 } 1385 hsotg->hcd_enabled = 1; 1386 } 1387 #endif 1388 1389 uint32_t snpsid = hsotg->hw_params.snpsid; 1390 aprint_verbose_dev(sc->sc_dev, "Core Release: %x.%x%x%x (snpsid=%x)\n", 1391 snpsid >> 12 & 0xf, snpsid >> 8 & 0xf, 1392 snpsid >> 4 & 0xf, snpsid & 0xf, snpsid); 1393 1394 return 0; 1395 1396 fail2: 1397 err = -retval; 1398 kmem_free(sc->sc_hsotg, sizeof(struct dwc2_hsotg)); 1399 softint_disestablish(sc->sc_rhc_si); 1400 1401 return err; 1402 } 1403 1404 #if 0 1405 /* 1406 * curmode is a mode indication bit 0 = device, 1 = host 1407 */ 1408 static const char * const intnames[32] = { 1409 "curmode", "modemis", "otgint", "sof", 1410 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1411 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1412 "usbrst", "enumdone", "isooutdrop", "eopf", 1413 "restore_done", "epmis", "iepint", "oepint", 1414 "incompisoin", "incomplp", "fetsusp", "resetdet", 1415 "prtint", "hchint", "ptxfemp", "lpm", 1416 "conidstschng", "disconnint", "sessreqint", "wkupint" 1417 }; 1418 1419 1420 /***********************************************************************/ 1421 1422 #endif 1423 1424 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1425 int *hub_port) 1426 { 1427 struct usbd_xfer *xfer = context; 1428 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1429 struct usbd_device *dev = dpipe->pipe.up_dev; 1430 1431 *hub_addr = dev->ud_myhsport->up_parent->ud_addr; 1432 *hub_port = dev->ud_myhsport->up_portno; 1433 } 1434 1435 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1436 { 1437 struct usbd_xfer *xfer = context; 1438 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1439 struct usbd_device *dev = dpipe->pipe.up_dev; 1440 1441 return dev->ud_speed; 1442 } 1443 1444 /* 1445 * Sets the final status of an URB and returns it to the upper layer. Any 1446 * required cleanup of the URB is performed. 1447 * 1448 * Must be called with interrupt disabled and spinlock held 1449 */ 1450 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1451 int status) 1452 { 1453 struct usbd_xfer *xfer; 1454 struct dwc2_xfer *dxfer; 1455 struct dwc2_softc *sc; 1456 usb_endpoint_descriptor_t *ed; 1457 uint8_t xfertype; 1458 1459 KASSERT(mutex_owned(&hsotg->lock)); 1460 1461 if (!qtd) { 1462 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1463 return; 1464 } 1465 1466 if (!qtd->urb) { 1467 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1468 return; 1469 } 1470 1471 xfer = qtd->urb->priv; 1472 if (!xfer) { 1473 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1474 return; 1475 } 1476 1477 dxfer = DWC2_XFER2DXFER(xfer); 1478 sc = DWC2_XFER2SC(xfer); 1479 ed = xfer->ux_pipe->up_endpoint->ue_edesc; 1480 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1481 1482 struct dwc2_hcd_urb *urb = qtd->urb; 1483 xfer->ux_actlen = dwc2_hcd_urb_get_actual_length(urb); 1484 1485 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->ux_actlen); 1486 1487 if (xfertype == UE_ISOCHRONOUS) { 1488 xfer->ux_actlen = 0; 1489 for (size_t i = 0; i < xfer->ux_nframes; ++i) { 1490 xfer->ux_frlengths[i] = 1491 dwc2_hcd_urb_get_iso_desc_actual_length( 1492 urb, i); 1493 DPRINTFN(1, "xfer=%p frame=%zu length=%d\n", xfer, i, 1494 xfer->ux_frlengths[i]); 1495 xfer->ux_actlen += xfer->ux_frlengths[i]; 1496 } 1497 DPRINTFN(1, "xfer=%p actlen=%d (isoc)\n", xfer, xfer->ux_actlen); 1498 } 1499 1500 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1501 for (size_t i = 0; i < xfer->ux_nframes; i++) 1502 dev_vdbg(hsotg->dev, " ISO Desc %zu status %d\n", 1503 i, urb->iso_descs[i].status); 1504 } 1505 1506 if (!status) { 1507 if (!(xfer->ux_flags & USBD_SHORT_XFER_OK) && 1508 xfer->ux_actlen < xfer->ux_length) 1509 status = -EIO; 1510 } 1511 1512 switch (status) { 1513 case 0: 1514 dxfer->intr_status = USBD_NORMAL_COMPLETION; 1515 break; 1516 case -EPIPE: 1517 dxfer->intr_status = USBD_STALLED; 1518 break; 1519 case -EPROTO: 1520 dxfer->intr_status = USBD_INVAL; 1521 break; 1522 case -EIO: 1523 dxfer->intr_status = USBD_IOERROR; 1524 break; 1525 case -EOVERFLOW: 1526 dxfer->intr_status = USBD_IOERROR; 1527 break; 1528 default: 1529 dxfer->intr_status = USBD_IOERROR; 1530 printf("%s: unknown error status %d\n", __func__, status); 1531 } 1532 1533 if (dxfer->intr_status == USBD_NORMAL_COMPLETION) { 1534 /* 1535 * control transfers with no data phase don't touch dmabuf, but 1536 * everything else does. 1537 */ 1538 if (!(xfertype == UE_CONTROL && 1539 UGETW(xfer->ux_request.wLength) == 0) && 1540 xfer->ux_actlen > 0 /* XXX PR/53503 */ 1541 ) { 1542 int rd = usbd_xfer_isread(xfer); 1543 1544 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_actlen, 1545 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1546 } 1547 } 1548 1549 if (xfertype == UE_ISOCHRONOUS || 1550 xfertype == UE_INTERRUPT) { 1551 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1552 1553 dwc2_free_bus_bandwidth(hsotg, 1554 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1555 xfer); 1556 } 1557 1558 qtd->urb = NULL; 1559 KASSERT(mutex_owned(&hsotg->lock)); 1560 1561 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1562 1563 mutex_spin_exit(&hsotg->lock); 1564 usb_schedsoftintr(&sc->sc_bus); 1565 mutex_spin_enter(&hsotg->lock); 1566 } 1567 1568 1569 int 1570 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1571 { 1572 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1573 1574 mutex_spin_enter(&hsotg->lock); 1575 1576 hsotg->lx_state = DWC2_L0; 1577 1578 if (dwc2_is_device_mode(hsotg)) { 1579 mutex_spin_exit(&hsotg->lock); 1580 return 0; /* why 0 ?? */ 1581 } 1582 1583 dwc2_hcd_reinit(hsotg); 1584 1585 mutex_spin_exit(&hsotg->lock); 1586 return 0; 1587 } 1588 1589 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1590 { 1591 1592 return false; 1593 } 1594
Indexes created Tue Sep 23 22:09:46 GMT 2025