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dwc2.h revision 1.8
      1  1.8     skrll /*	$NetBSD: dwc2.h,v 1.8 2016/02/19 21:10:18 skrll Exp $	*/
      2  1.1     skrll 
      3  1.1     skrll /*-
      4  1.1     skrll  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5  1.1     skrll  * All rights reserved.
      6  1.1     skrll  *
      7  1.1     skrll  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     skrll  * by Nick Hudson
      9  1.1     skrll  *
     10  1.1     skrll  * Redistribution and use in source and binary forms, with or without
     11  1.1     skrll  * modification, are permitted provided that the following conditions
     12  1.1     skrll  * are met:
     13  1.1     skrll  * 1. Redistributions of source code must retain the above copyright
     14  1.1     skrll  *    notice, this list of conditions and the following disclaimer.
     15  1.1     skrll  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     skrll  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     skrll  *    documentation and/or other materials provided with the distribution.
     18  1.1     skrll  *
     19  1.1     skrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1     skrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1     skrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1     skrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1     skrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1     skrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1     skrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1     skrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1     skrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1     skrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1     skrll  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1     skrll  */
     31  1.1     skrll 
     32  1.1     skrll #ifndef _EXTERNAL_BSD_DWC2_DWC2_H_
     33  1.1     skrll #define _EXTERNAL_BSD_DWC2_DWC2_H_
     34  1.1     skrll 
     35  1.1     skrll #include <sys/param.h>
     36  1.6     skrll 
     37  1.6     skrll #include <sys/callout.h>
     38  1.1     skrll #include <sys/kernel.h>
     39  1.7     skrll #include <sys/proc.h>
     40  1.1     skrll #include <sys/workqueue.h>
     41  1.1     skrll 
     42  1.1     skrll #include <linux/list.h>
     43  1.1     skrll 
     44  1.4  macallan #include "opt_usb.h"
     45  1.1     skrll // #define VERBOSE_DEBUG
     46  1.1     skrll // #define DWC2_DUMP_FRREM
     47  1.1     skrll // #define CONFIG_USB_DWC2_TRACK_MISSED_SOFS
     48  1.1     skrll 
     49  1.7     skrll #define CONFIG_USB_DWC2_HOST		1
     50  1.7     skrll #define CONFIG_USB_DWC2_DUAL_ROLE	0
     51  1.7     skrll #define CONFIG_USB_DWC2_PERIPHERAL	0
     52  1.7     skrll 
     53  1.1     skrll typedef int irqreturn_t;
     54  1.1     skrll #define	IRQ_NONE 0
     55  1.1     skrll #define IRQ_HANDLED 1
     56  1.1     skrll 
     57  1.1     skrll #define	u8	uint8_t
     58  1.1     skrll #define	u16	uint16_t
     59  1.1     skrll #define	s16	int16_t
     60  1.1     skrll #define	u32	uint32_t
     61  1.1     skrll #define	u64	uint64_t
     62  1.1     skrll 
     63  1.1     skrll #define	dma_addr_t	bus_addr_t
     64  1.1     skrll 
     65  1.1     skrll #define DWC2_READ_4(hsotg, reg) \
     66  1.1     skrll     bus_space_read_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg))
     67  1.1     skrll #define DWC2_WRITE_4(hsotg, reg, data)  \
     68  1.1     skrll     bus_space_write_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg), (data));
     69  1.1     skrll 
     70  1.1     skrll #ifdef DWC2_DEBUG
     71  1.1     skrll extern int dwc2debug;
     72  1.1     skrll #define WARN_ON(x)	KASSERT(!(x))
     73  1.1     skrll 
     74  1.1     skrll #define	dev_info(d,fmt,...) do {			\
     75  1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     76  1.1     skrll 	    ## __VA_ARGS__);				\
     77  1.1     skrll } while (0)
     78  1.1     skrll #define	dev_warn(d,fmt,...) do {			\
     79  1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     80  1.1     skrll 	    ## __VA_ARGS__);				\
     81  1.1     skrll } while (0)
     82  1.1     skrll #define	dev_err(d,fmt,...) do {				\
     83  1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     84  1.1     skrll 	    ## __VA_ARGS__);				\
     85  1.1     skrll } while (0)
     86  1.1     skrll #define	dev_dbg(d,fmt,...) do {				\
     87  1.1     skrll 	if (dwc2debug >= 1) {				\
     88  1.1     skrll 	    printf("%s: " fmt, device_xname(d), 	\
     89  1.1     skrll 		    ## __VA_ARGS__);			\
     90  1.1     skrll 	}						\
     91  1.1     skrll } while (0)
     92  1.1     skrll #define	dev_vdbg(d,fmt,...) do {			\
     93  1.1     skrll 	if (dwc2debug >= 2) {				\
     94  1.1     skrll 	    printf("%s: " fmt, device_xname(d), 	\
     95  1.1     skrll 		    ## __VA_ARGS__);			\
     96  1.1     skrll 	}						\
     97  1.1     skrll } while (0)
     98  1.1     skrll #else
     99  1.1     skrll #define WARN_ON(x)
    100  1.1     skrll #define	dev_info(...) do { } while (0)
    101  1.1     skrll #define	dev_warn(...) do { } while (0)
    102  1.1     skrll #define	dev_err(...) do { } while (0)
    103  1.1     skrll #define	dev_dbg(...) do { } while (0)
    104  1.1     skrll #define	dev_vdbg(...) do { } while (0)
    105  1.1     skrll #endif
    106  1.1     skrll 
    107  1.1     skrll #define jiffies			hardclock_ticks
    108  1.1     skrll #define msecs_to_jiffies	mstohz
    109  1.1     skrll 
    110  1.1     skrll #define gfp_t		int
    111  1.1     skrll #define GFP_KERNEL	 KM_SLEEP
    112  1.1     skrll #define GFP_ATOMIC	 KM_NOSLEEP
    113  1.1     skrll 
    114  1.1     skrll enum usb_otg_state {
    115  1.1     skrll 	OTG_STATE_RESERVED = 0,
    116  1.1     skrll 
    117  1.1     skrll 	OTG_STATE_A_HOST,
    118  1.1     skrll 	OTG_STATE_A_PERIPHERAL,
    119  1.1     skrll 	OTG_STATE_A_SUSPEND,
    120  1.1     skrll 	OTG_STATE_B_HOST,
    121  1.1     skrll 	OTG_STATE_B_PERIPHERAL,
    122  1.1     skrll };
    123  1.1     skrll 
    124  1.1     skrll #define usleep_range(l, u)	do { DELAY(u); } while (0)
    125  1.1     skrll 
    126  1.1     skrll #define spinlock_t		kmutex_t
    127  1.5     skrll #define spin_lock_init(lock)	mutex_init(lock, MUTEX_DEFAULT, IPL_VM)
    128  1.1     skrll #define	spin_lock(l)		do { mutex_spin_enter(l); } while (0)
    129  1.1     skrll #define	spin_unlock(l)		do { mutex_spin_exit(l); } while (0)
    130  1.1     skrll 
    131  1.1     skrll #define	spin_lock_irqsave(l, f)		\
    132  1.1     skrll 	do { mutex_spin_enter(l); (void)(f); } while (0)
    133  1.1     skrll 
    134  1.1     skrll #define	spin_unlock_irqrestore(l, f)	\
    135  1.1     skrll 	do { mutex_spin_exit(l); (void)(f); } while (0)
    136  1.1     skrll 
    137  1.1     skrll #define	IRQ_RETVAL(r)	(r)
    138  1.1     skrll 
    139  1.1     skrll #define	USB_ENDPOINT_XFER_CONTROL	UE_CONTROL		/* 0 */
    140  1.1     skrll #define	USB_ENDPOINT_XFER_ISOC		UE_ISOCHRONOUS		/* 1 */
    141  1.1     skrll #define	USB_ENDPOINT_XFER_BULK		UE_BULK			/* 2 */
    142  1.1     skrll #define	USB_ENDPOINT_XFER_INT		UE_INTERRUPT		/* 3 */
    143  1.1     skrll 
    144  1.1     skrll #define USB_DIR_IN			UE_DIR_IN
    145  1.1     skrll #define USB_DIR_OUT			UE_DIR_OUT
    146  1.1     skrll 
    147  1.1     skrll #define	USB_PORT_FEAT_CONNECTION	UHF_PORT_CONNECTION
    148  1.1     skrll #define	USB_PORT_FEAT_ENABLE		UHF_PORT_ENABLE
    149  1.1     skrll #define	USB_PORT_FEAT_SUSPEND		UHF_PORT_SUSPEND
    150  1.1     skrll #define	USB_PORT_FEAT_OVER_CURRENT	UHF_PORT_OVER_CURRENT
    151  1.1     skrll #define	USB_PORT_FEAT_RESET		UHF_PORT_RESET
    152  1.1     skrll // #define	USB_PORT_FEAT_L1		5	/* L1 suspend */
    153  1.1     skrll #define	USB_PORT_FEAT_POWER		UHF_PORT_POWER
    154  1.1     skrll #define	USB_PORT_FEAT_LOWSPEED		UHF_PORT_LOW_SPEED
    155  1.1     skrll #define	USB_PORT_FEAT_C_CONNECTION	UHF_C_PORT_CONNECTION
    156  1.1     skrll #define	USB_PORT_FEAT_C_ENABLE		UHF_C_PORT_ENABLE
    157  1.1     skrll #define	USB_PORT_FEAT_C_SUSPEND		UHF_C_PORT_SUSPEND
    158  1.1     skrll #define	USB_PORT_FEAT_C_OVER_CURRENT	UHF_C_PORT_OVER_CURRENT
    159  1.1     skrll #define	USB_PORT_FEAT_C_RESET		UHF_C_PORT_RESET
    160  1.1     skrll #define	USB_PORT_FEAT_TEST              UHF_PORT_TEST
    161  1.1     skrll #define	USB_PORT_FEAT_INDICATOR         UHF_PORT_INDICATOR
    162  1.1     skrll #define	USB_PORT_FEAT_C_PORT_L1         UHF_C_PORT_L1
    163  1.1     skrll 
    164  1.1     skrll #define	C_HUB_LOCAL_POWER		UHF_C_HUB_LOCAL_POWER
    165  1.1     skrll #define	C_HUB_OVER_CURRENT		UHF_C_HUB_OVER_CURRENT
    166  1.1     skrll 
    167  1.1     skrll #define USB_REQ_GET_STATUS		UR_GET_STATUS
    168  1.1     skrll #define USB_REQ_CLEAR_FEATURE		UR_CLEAR_FEATURE
    169  1.1     skrll #define USB_REQ_SET_FEATURE		UR_SET_FEATURE
    170  1.1     skrll #define USB_REQ_GET_DESCRIPTOR		UR_GET_DESCRIPTOR
    171  1.1     skrll 
    172  1.1     skrll #define	ClearHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_CLEAR_FEATURE)
    173  1.1     skrll #define	ClearPortFeature	((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_CLEAR_FEATURE)
    174  1.1     skrll #define	GetHubDescriptor	((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_DESCRIPTOR)
    175  1.1     skrll #define	GetHubStatus		((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_STATUS)
    176  1.1     skrll #define	GetPortStatus		((UT_READ_CLASS_OTHER << 8) | USB_REQ_GET_STATUS)
    177  1.1     skrll #define	SetHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_SET_FEATURE)
    178  1.1     skrll #define	SetPortFeature		((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_SET_FEATURE)
    179  1.1     skrll 
    180  1.1     skrll #define	USB_PORT_STAT_CONNECTION	UPS_CURRENT_CONNECT_STATUS
    181  1.1     skrll #define	USB_PORT_STAT_ENABLE		UPS_PORT_ENABLED
    182  1.1     skrll #define	USB_PORT_STAT_SUSPEND		UPS_SUSPEND
    183  1.1     skrll #define	USB_PORT_STAT_OVERCURRENT	UPS_OVERCURRENT_INDICATOR
    184  1.1     skrll #define	USB_PORT_STAT_RESET		UPS_RESET
    185  1.1     skrll #define	USB_PORT_STAT_L1		UPS_PORT_L1
    186  1.1     skrll #define	USB_PORT_STAT_POWER		UPS_PORT_POWER
    187  1.1     skrll #define	USB_PORT_STAT_LOW_SPEED		UPS_LOW_SPEED
    188  1.1     skrll #define	USB_PORT_STAT_HIGH_SPEED        UPS_HIGH_SPEED
    189  1.1     skrll #define	USB_PORT_STAT_TEST              UPS_PORT_TEST
    190  1.1     skrll #define	USB_PORT_STAT_INDICATOR         UPS_PORT_INDICATOR
    191  1.1     skrll 
    192  1.1     skrll #define	USB_PORT_STAT_C_CONNECTION	UPS_C_CONNECT_STATUS
    193  1.1     skrll #define	USB_PORT_STAT_C_ENABLE		UPS_C_PORT_ENABLED
    194  1.1     skrll #define	USB_PORT_STAT_C_SUSPEND		UPS_C_SUSPEND
    195  1.1     skrll #define	USB_PORT_STAT_C_OVERCURRENT	UPS_C_OVERCURRENT_INDICATOR
    196  1.1     skrll #define	USB_PORT_STAT_C_RESET		UPS_C_PORT_RESET
    197  1.1     skrll #define	USB_PORT_STAT_C_L1		UPS_C_PORT_L1
    198  1.1     skrll 
    199  1.7     skrll #define	USB_DT_HUB			UDESC_HUB
    200  1.7     skrll 
    201  1.7     skrll /* See USB 2.0 spec Table 11-13, offset 3 */
    202  1.7     skrll #define HUB_CHAR_LPSM		UHD_PWR
    203  1.7     skrll #define HUB_CHAR_COMMON_LPSM	UHD_PWR_GANGED
    204  1.7     skrll #define HUB_CHAR_INDV_PORT_LPSM	UHD_PWR_INDIVIDUAL
    205  1.7     skrll #define HUB_CHAR_NO_LPSM	UHD_PWR_NO_SWITCH
    206  1.7     skrll 
    207  1.7     skrll #define HUB_CHAR_COMPOUND	UHD_COMPOUND
    208  1.7     skrll 
    209  1.7     skrll #define HUB_CHAR_OCPM		UHD_OC
    210  1.7     skrll #define HUB_CHAR_COMMON_OCPM	UHD_OC_GLOBAL
    211  1.7     skrll #define HUB_CHAR_INDV_PORT_OCPM	UHD_OC_INDIVIDUAL
    212  1.7     skrll #define HUB_CHAR_NO_OCPM	UHD_OC_NONE
    213  1.7     skrll 
    214  1.7     skrll #define HUB_CHAR_TTTT		UHD_TT_THINK
    215  1.7     skrll #define HUB_CHAR_PORTIND	UHD_PORT_IND
    216  1.7     skrll 
    217  1.7     skrll enum usb_dr_mode {
    218  1.7     skrll 	USB_DR_MODE_UNKNOWN,
    219  1.7     skrll 	USB_DR_MODE_HOST,
    220  1.7     skrll 	USB_DR_MODE_PERIPHERAL,
    221  1.7     skrll 	USB_DR_MODE_OTG,
    222  1.7     skrll };
    223  1.7     skrll 
    224  1.7     skrll struct usb_phy;
    225  1.7     skrll struct usb_hcd;
    226  1.7     skrll 
    227  1.7     skrll static inline int
    228  1.7     skrll usb_phy_set_suspend(struct usb_phy *x, int suspend)
    229  1.7     skrll {
    230  1.7     skrll 
    231  1.7     skrll 	return 0;
    232  1.7     skrll }
    233  1.7     skrll 
    234  1.7     skrll static inline void
    235  1.7     skrll usb_hcd_resume_root_hub(struct usb_hcd *hcd)
    236  1.7     skrll {
    237  1.7     skrll 
    238  1.7     skrll 	return;
    239  1.7     skrll }
    240  1.7     skrll 
    241  1.7     skrll static inline int
    242  1.7     skrll usb_disabled(void)
    243  1.7     skrll {
    244  1.7     skrll 
    245  1.7     skrll 	return 0;
    246  1.7     skrll }
    247  1.7     skrll 
    248  1.1     skrll static inline void
    249  1.1     skrll udelay(unsigned long usecs)
    250  1.1     skrll {
    251  1.7     skrll 
    252  1.1     skrll 	DELAY(usecs);
    253  1.1     skrll }
    254  1.1     skrll 
    255  1.7     skrll static inline void
    256  1.7     skrll ndelay(unsigned long nsecs)
    257  1.7     skrll {
    258  1.7     skrll 
    259  1.7     skrll 	DELAY(nsecs / 1000);
    260  1.7     skrll }
    261  1.7     skrll 
    262  1.7     skrll static inline void
    263  1.8     skrll msleep(unsigned int msec)
    264  1.7     skrll {
    265  1.8     skrll 	if (cold ||
    266  1.8     skrll 	    ((hz < 1000) && (msec < (1000/hz))))
    267  1.8     skrll 		udelay(msec * 1000);
    268  1.8     skrll 	else
    269  1.8     skrll 		(void)kpause("mdelay", false, mstohz(msec), NULL);
    270  1.7     skrll }
    271  1.7     skrll 
    272  1.1     skrll #define	EREMOTEIO	EIO
    273  1.1     skrll #define	ECOMM		EIO
    274  1.7     skrll #define	ENOTSUPP	ENOTSUP
    275  1.1     skrll 
    276  1.1     skrll #define NS_TO_US(ns)	((ns + 500L) / 1000L)
    277  1.1     skrll 
    278  1.7     skrll #define USB_RESUME_TIMEOUT	40 /* ms */
    279  1.7     skrll 
    280  1.1     skrll void dw_callout(void *);
    281  1.1     skrll void dwc2_worker(struct work *, void *);
    282  1.1     skrll 
    283  1.1     skrll struct delayed_work {
    284  1.1     skrll 	struct work work;
    285  1.1     skrll 	struct callout dw_timer;
    286  1.1     skrll 
    287  1.1     skrll 	struct workqueue *dw_wq;
    288  1.1     skrll };
    289  1.1     skrll 
    290  1.1     skrll static inline void
    291  1.1     skrll INIT_DELAYED_WORK(struct delayed_work *dw, void (*fn)(struct work *))
    292  1.1     skrll {
    293  1.1     skrll 	callout_init(&dw->dw_timer, CALLOUT_MPSAFE);
    294  1.1     skrll }
    295  1.1     skrll 
    296  1.1     skrll static inline void
    297  1.1     skrll queue_delayed_work(struct workqueue *wq, struct delayed_work *dw, int j)
    298  1.1     skrll {
    299  1.1     skrll 	callout_reset(&dw->dw_timer, j, dw_callout, dw);
    300  1.1     skrll }
    301  1.1     skrll 
    302  1.1     skrll #endif
    303