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dwc2.h revision 1.9.16.1
      1  1.9.16.1  pgoyette /*	$NetBSD: dwc2.h,v 1.9.16.1 2018/09/06 06:56:37 pgoyette Exp $	*/
      2       1.1     skrll 
      3       1.1     skrll /*-
      4       1.1     skrll  * Copyright (c) 2013 The NetBSD Foundation, Inc.
      5       1.1     skrll  * All rights reserved.
      6       1.1     skrll  *
      7       1.1     skrll  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1     skrll  * by Nick Hudson
      9       1.1     skrll  *
     10       1.1     skrll  * Redistribution and use in source and binary forms, with or without
     11       1.1     skrll  * modification, are permitted provided that the following conditions
     12       1.1     skrll  * are met:
     13       1.1     skrll  * 1. Redistributions of source code must retain the above copyright
     14       1.1     skrll  *    notice, this list of conditions and the following disclaimer.
     15       1.1     skrll  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1     skrll  *    notice, this list of conditions and the following disclaimer in the
     17       1.1     skrll  *    documentation and/or other materials provided with the distribution.
     18       1.1     skrll  *
     19       1.1     skrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1     skrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1     skrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1     skrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1     skrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1     skrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1     skrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1     skrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1     skrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1     skrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1     skrll  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1     skrll  */
     31       1.1     skrll 
     32       1.1     skrll #ifndef _EXTERNAL_BSD_DWC2_DWC2_H_
     33       1.1     skrll #define _EXTERNAL_BSD_DWC2_DWC2_H_
     34       1.1     skrll 
     35       1.1     skrll #include <sys/param.h>
     36       1.6     skrll 
     37       1.6     skrll #include <sys/callout.h>
     38       1.1     skrll #include <sys/kernel.h>
     39       1.7     skrll #include <sys/proc.h>
     40       1.1     skrll #include <sys/workqueue.h>
     41       1.1     skrll 
     42       1.1     skrll #include <linux/list.h>
     43       1.9     skrll #include <linux/workqueue.h>
     44       1.1     skrll 
     45       1.4  macallan #include "opt_usb.h"
     46       1.1     skrll // #define VERBOSE_DEBUG
     47       1.1     skrll // #define DWC2_DUMP_FRREM
     48       1.1     skrll // #define CONFIG_USB_DWC2_TRACK_MISSED_SOFS
     49       1.1     skrll 
     50       1.7     skrll #define CONFIG_USB_DWC2_HOST		1
     51       1.7     skrll #define CONFIG_USB_DWC2_DUAL_ROLE	0
     52       1.7     skrll #define CONFIG_USB_DWC2_PERIPHERAL	0
     53       1.7     skrll 
     54       1.1     skrll typedef int irqreturn_t;
     55       1.1     skrll #define	IRQ_NONE 0
     56       1.1     skrll #define IRQ_HANDLED 1
     57       1.1     skrll 
     58       1.1     skrll #define	u8	uint8_t
     59       1.1     skrll #define	u16	uint16_t
     60       1.1     skrll #define	s16	int16_t
     61       1.1     skrll #define	u32	uint32_t
     62       1.1     skrll #define	u64	uint64_t
     63       1.1     skrll 
     64       1.1     skrll #define	dma_addr_t	bus_addr_t
     65       1.1     skrll 
     66       1.1     skrll #define DWC2_READ_4(hsotg, reg) \
     67       1.1     skrll     bus_space_read_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg))
     68       1.1     skrll #define DWC2_WRITE_4(hsotg, reg, data)  \
     69       1.1     skrll     bus_space_write_4((hsotg)->hsotg_sc->sc_iot, (hsotg)->hsotg_sc->sc_ioh, (reg), (data));
     70       1.1     skrll 
     71       1.1     skrll #ifdef DWC2_DEBUG
     72       1.1     skrll extern int dwc2debug;
     73       1.1     skrll #define WARN_ON(x)	KASSERT(!(x))
     74       1.1     skrll 
     75       1.1     skrll #define	dev_info(d,fmt,...) do {			\
     76       1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     77       1.1     skrll 	    ## __VA_ARGS__);				\
     78       1.1     skrll } while (0)
     79       1.1     skrll #define	dev_warn(d,fmt,...) do {			\
     80       1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     81       1.1     skrll 	    ## __VA_ARGS__);				\
     82       1.1     skrll } while (0)
     83       1.1     skrll #define	dev_err(d,fmt,...) do {				\
     84       1.1     skrll 	printf("%s: " fmt, device_xname(d), 		\
     85       1.1     skrll 	    ## __VA_ARGS__);				\
     86       1.1     skrll } while (0)
     87       1.1     skrll #define	dev_dbg(d,fmt,...) do {				\
     88       1.1     skrll 	if (dwc2debug >= 1) {				\
     89       1.1     skrll 	    printf("%s: " fmt, device_xname(d), 	\
     90       1.1     skrll 		    ## __VA_ARGS__);			\
     91       1.1     skrll 	}						\
     92       1.1     skrll } while (0)
     93       1.1     skrll #define	dev_vdbg(d,fmt,...) do {			\
     94       1.1     skrll 	if (dwc2debug >= 2) {				\
     95       1.1     skrll 	    printf("%s: " fmt, device_xname(d), 	\
     96       1.1     skrll 		    ## __VA_ARGS__);			\
     97       1.1     skrll 	}						\
     98       1.1     skrll } while (0)
     99       1.1     skrll #else
    100       1.1     skrll #define WARN_ON(x)
    101       1.1     skrll #define	dev_info(...) do { } while (0)
    102       1.1     skrll #define	dev_warn(...) do { } while (0)
    103       1.1     skrll #define	dev_err(...) do { } while (0)
    104       1.1     skrll #define	dev_dbg(...) do { } while (0)
    105       1.1     skrll #define	dev_vdbg(...) do { } while (0)
    106       1.1     skrll #endif
    107       1.1     skrll 
    108       1.1     skrll #define jiffies			hardclock_ticks
    109       1.1     skrll #define msecs_to_jiffies	mstohz
    110       1.1     skrll 
    111       1.1     skrll enum usb_otg_state {
    112       1.1     skrll 	OTG_STATE_RESERVED = 0,
    113       1.1     skrll 
    114       1.1     skrll 	OTG_STATE_A_HOST,
    115       1.1     skrll 	OTG_STATE_A_PERIPHERAL,
    116       1.1     skrll 	OTG_STATE_A_SUSPEND,
    117       1.1     skrll 	OTG_STATE_B_HOST,
    118       1.1     skrll 	OTG_STATE_B_PERIPHERAL,
    119       1.1     skrll };
    120       1.1     skrll 
    121       1.1     skrll #define usleep_range(l, u)	do { DELAY(u); } while (0)
    122       1.1     skrll 
    123       1.1     skrll #define spinlock_t		kmutex_t
    124       1.5     skrll #define spin_lock_init(lock)	mutex_init(lock, MUTEX_DEFAULT, IPL_VM)
    125       1.1     skrll #define	spin_lock(l)		do { mutex_spin_enter(l); } while (0)
    126       1.1     skrll #define	spin_unlock(l)		do { mutex_spin_exit(l); } while (0)
    127       1.1     skrll 
    128       1.1     skrll #define	spin_lock_irqsave(l, f)		\
    129       1.1     skrll 	do { mutex_spin_enter(l); (void)(f); } while (0)
    130       1.1     skrll 
    131       1.1     skrll #define	spin_unlock_irqrestore(l, f)	\
    132       1.1     skrll 	do { mutex_spin_exit(l); (void)(f); } while (0)
    133       1.1     skrll 
    134       1.1     skrll #define	IRQ_RETVAL(r)	(r)
    135       1.1     skrll 
    136       1.1     skrll #define	USB_ENDPOINT_XFER_CONTROL	UE_CONTROL		/* 0 */
    137       1.1     skrll #define	USB_ENDPOINT_XFER_ISOC		UE_ISOCHRONOUS		/* 1 */
    138       1.1     skrll #define	USB_ENDPOINT_XFER_BULK		UE_BULK			/* 2 */
    139       1.1     skrll #define	USB_ENDPOINT_XFER_INT		UE_INTERRUPT		/* 3 */
    140       1.1     skrll 
    141       1.1     skrll #define USB_DIR_IN			UE_DIR_IN
    142       1.1     skrll #define USB_DIR_OUT			UE_DIR_OUT
    143       1.1     skrll 
    144       1.1     skrll #define	USB_PORT_FEAT_CONNECTION	UHF_PORT_CONNECTION
    145       1.1     skrll #define	USB_PORT_FEAT_ENABLE		UHF_PORT_ENABLE
    146       1.1     skrll #define	USB_PORT_FEAT_SUSPEND		UHF_PORT_SUSPEND
    147       1.1     skrll #define	USB_PORT_FEAT_OVER_CURRENT	UHF_PORT_OVER_CURRENT
    148       1.1     skrll #define	USB_PORT_FEAT_RESET		UHF_PORT_RESET
    149       1.1     skrll // #define	USB_PORT_FEAT_L1		5	/* L1 suspend */
    150       1.1     skrll #define	USB_PORT_FEAT_POWER		UHF_PORT_POWER
    151       1.1     skrll #define	USB_PORT_FEAT_LOWSPEED		UHF_PORT_LOW_SPEED
    152       1.1     skrll #define	USB_PORT_FEAT_C_CONNECTION	UHF_C_PORT_CONNECTION
    153       1.1     skrll #define	USB_PORT_FEAT_C_ENABLE		UHF_C_PORT_ENABLE
    154       1.1     skrll #define	USB_PORT_FEAT_C_SUSPEND		UHF_C_PORT_SUSPEND
    155       1.1     skrll #define	USB_PORT_FEAT_C_OVER_CURRENT	UHF_C_PORT_OVER_CURRENT
    156       1.1     skrll #define	USB_PORT_FEAT_C_RESET		UHF_C_PORT_RESET
    157       1.1     skrll #define	USB_PORT_FEAT_TEST              UHF_PORT_TEST
    158       1.1     skrll #define	USB_PORT_FEAT_INDICATOR         UHF_PORT_INDICATOR
    159       1.1     skrll #define	USB_PORT_FEAT_C_PORT_L1         UHF_C_PORT_L1
    160       1.1     skrll 
    161       1.1     skrll #define	C_HUB_LOCAL_POWER		UHF_C_HUB_LOCAL_POWER
    162       1.1     skrll #define	C_HUB_OVER_CURRENT		UHF_C_HUB_OVER_CURRENT
    163       1.1     skrll 
    164       1.1     skrll #define USB_REQ_GET_STATUS		UR_GET_STATUS
    165       1.1     skrll #define USB_REQ_CLEAR_FEATURE		UR_CLEAR_FEATURE
    166       1.1     skrll #define USB_REQ_SET_FEATURE		UR_SET_FEATURE
    167       1.1     skrll #define USB_REQ_GET_DESCRIPTOR		UR_GET_DESCRIPTOR
    168       1.1     skrll 
    169       1.1     skrll #define	ClearHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_CLEAR_FEATURE)
    170       1.1     skrll #define	ClearPortFeature	((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_CLEAR_FEATURE)
    171       1.1     skrll #define	GetHubDescriptor	((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_DESCRIPTOR)
    172       1.1     skrll #define	GetHubStatus		((UT_READ_CLASS_DEVICE << 8) | USB_REQ_GET_STATUS)
    173       1.1     skrll #define	GetPortStatus		((UT_READ_CLASS_OTHER << 8) | USB_REQ_GET_STATUS)
    174       1.1     skrll #define	SetHubFeature		((UT_WRITE_CLASS_DEVICE << 8) | USB_REQ_SET_FEATURE)
    175       1.1     skrll #define	SetPortFeature		((UT_WRITE_CLASS_OTHER << 8) | USB_REQ_SET_FEATURE)
    176       1.1     skrll 
    177       1.1     skrll #define	USB_PORT_STAT_CONNECTION	UPS_CURRENT_CONNECT_STATUS
    178       1.1     skrll #define	USB_PORT_STAT_ENABLE		UPS_PORT_ENABLED
    179       1.1     skrll #define	USB_PORT_STAT_SUSPEND		UPS_SUSPEND
    180       1.1     skrll #define	USB_PORT_STAT_OVERCURRENT	UPS_OVERCURRENT_INDICATOR
    181       1.1     skrll #define	USB_PORT_STAT_RESET		UPS_RESET
    182       1.1     skrll #define	USB_PORT_STAT_L1		UPS_PORT_L1
    183       1.1     skrll #define	USB_PORT_STAT_POWER		UPS_PORT_POWER
    184       1.1     skrll #define	USB_PORT_STAT_LOW_SPEED		UPS_LOW_SPEED
    185       1.1     skrll #define	USB_PORT_STAT_HIGH_SPEED        UPS_HIGH_SPEED
    186       1.1     skrll #define	USB_PORT_STAT_TEST              UPS_PORT_TEST
    187       1.1     skrll #define	USB_PORT_STAT_INDICATOR         UPS_PORT_INDICATOR
    188       1.1     skrll 
    189       1.1     skrll #define	USB_PORT_STAT_C_CONNECTION	UPS_C_CONNECT_STATUS
    190       1.1     skrll #define	USB_PORT_STAT_C_ENABLE		UPS_C_PORT_ENABLED
    191       1.1     skrll #define	USB_PORT_STAT_C_SUSPEND		UPS_C_SUSPEND
    192       1.1     skrll #define	USB_PORT_STAT_C_OVERCURRENT	UPS_C_OVERCURRENT_INDICATOR
    193       1.1     skrll #define	USB_PORT_STAT_C_RESET		UPS_C_PORT_RESET
    194       1.1     skrll #define	USB_PORT_STAT_C_L1		UPS_C_PORT_L1
    195       1.1     skrll 
    196       1.7     skrll #define	USB_DT_HUB			UDESC_HUB
    197       1.7     skrll 
    198       1.7     skrll /* See USB 2.0 spec Table 11-13, offset 3 */
    199       1.7     skrll #define HUB_CHAR_LPSM		UHD_PWR
    200       1.7     skrll #define HUB_CHAR_COMMON_LPSM	UHD_PWR_GANGED
    201       1.7     skrll #define HUB_CHAR_INDV_PORT_LPSM	UHD_PWR_INDIVIDUAL
    202       1.7     skrll #define HUB_CHAR_NO_LPSM	UHD_PWR_NO_SWITCH
    203       1.7     skrll 
    204       1.7     skrll #define HUB_CHAR_COMPOUND	UHD_COMPOUND
    205       1.7     skrll 
    206       1.7     skrll #define HUB_CHAR_OCPM		UHD_OC
    207       1.7     skrll #define HUB_CHAR_COMMON_OCPM	UHD_OC_GLOBAL
    208       1.7     skrll #define HUB_CHAR_INDV_PORT_OCPM	UHD_OC_INDIVIDUAL
    209       1.7     skrll #define HUB_CHAR_NO_OCPM	UHD_OC_NONE
    210       1.7     skrll 
    211       1.7     skrll #define HUB_CHAR_TTTT		UHD_TT_THINK
    212       1.7     skrll #define HUB_CHAR_PORTIND	UHD_PORT_IND
    213       1.7     skrll 
    214       1.7     skrll enum usb_dr_mode {
    215       1.7     skrll 	USB_DR_MODE_UNKNOWN,
    216       1.7     skrll 	USB_DR_MODE_HOST,
    217       1.7     skrll 	USB_DR_MODE_PERIPHERAL,
    218       1.7     skrll 	USB_DR_MODE_OTG,
    219       1.7     skrll };
    220       1.7     skrll 
    221       1.7     skrll struct usb_phy;
    222       1.7     skrll struct usb_hcd;
    223       1.7     skrll 
    224       1.7     skrll static inline int
    225       1.7     skrll usb_phy_set_suspend(struct usb_phy *x, int suspend)
    226       1.7     skrll {
    227       1.7     skrll 
    228       1.7     skrll 	return 0;
    229       1.7     skrll }
    230       1.7     skrll 
    231       1.7     skrll static inline void
    232       1.7     skrll usb_hcd_resume_root_hub(struct usb_hcd *hcd)
    233       1.7     skrll {
    234       1.7     skrll 
    235       1.7     skrll 	return;
    236       1.7     skrll }
    237       1.7     skrll 
    238       1.7     skrll static inline int
    239       1.7     skrll usb_disabled(void)
    240       1.7     skrll {
    241       1.7     skrll 
    242       1.7     skrll 	return 0;
    243       1.7     skrll }
    244       1.7     skrll 
    245       1.1     skrll static inline void
    246       1.1     skrll udelay(unsigned long usecs)
    247       1.1     skrll {
    248       1.7     skrll 
    249       1.1     skrll 	DELAY(usecs);
    250       1.1     skrll }
    251       1.1     skrll 
    252       1.7     skrll static inline void
    253       1.7     skrll ndelay(unsigned long nsecs)
    254       1.7     skrll {
    255       1.7     skrll 
    256       1.7     skrll 	DELAY(nsecs / 1000);
    257       1.7     skrll }
    258       1.7     skrll 
    259       1.7     skrll static inline void
    260       1.8     skrll msleep(unsigned int msec)
    261       1.7     skrll {
    262       1.8     skrll 	if (cold ||
    263       1.8     skrll 	    ((hz < 1000) && (msec < (1000/hz))))
    264       1.8     skrll 		udelay(msec * 1000);
    265       1.8     skrll 	else
    266       1.8     skrll 		(void)kpause("mdelay", false, mstohz(msec), NULL);
    267       1.7     skrll }
    268       1.7     skrll 
    269       1.1     skrll #define	EREMOTEIO	EIO
    270       1.1     skrll #define	ECOMM		EIO
    271       1.7     skrll #define	ENOTSUPP	ENOTSUP
    272       1.1     skrll 
    273       1.1     skrll #define NS_TO_US(ns)	((ns + 500L) / 1000L)
    274       1.1     skrll 
    275       1.7     skrll #define USB_RESUME_TIMEOUT	40 /* ms */
    276       1.7     skrll 
    277       1.1     skrll #endif
    278