dwc2var.h revision 1.4 1 1.4 hikaru /* $NetBSD: dwc2var.h,v 1.4 2015/05/01 06:58:40 hikaru Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * This code is derived from software contributed to The NetBSD Foundation
8 1.1 skrll * by Nick Hudson
9 1.1 skrll *
10 1.1 skrll * Redistribution and use in source and binary forms, with or without
11 1.1 skrll * modification, are permitted provided that the following conditions
12 1.1 skrll * are met:
13 1.1 skrll * 1. Redistributions of source code must retain the above copyright
14 1.1 skrll * notice, this list of conditions and the following disclaimer.
15 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 skrll * notice, this list of conditions and the following disclaimer in the
17 1.1 skrll * documentation and/or other materials provided with the distribution.
18 1.1 skrll *
19 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 skrll * POSSIBILITY OF SUCH DAMAGE.
30 1.1 skrll */
31 1.1 skrll
32 1.1 skrll #ifndef _DWC2VAR_H_
33 1.1 skrll #define _DWC2VAR_H_
34 1.1 skrll
35 1.1 skrll #include <sys/pool.h>
36 1.1 skrll
37 1.1 skrll #define DWC2_MAXISOCPACKETS 16
38 1.1 skrll struct dwc2_hsotg;
39 1.1 skrll struct dwc2_qtd;
40 1.1 skrll
41 1.1 skrll struct dwc2_xfer {
42 1.1 skrll struct usbd_xfer xfer; /* Needs to be first */
43 1.1 skrll struct usb_task abort_task;
44 1.1 skrll
45 1.1 skrll struct dwc2_hcd_urb *urb;
46 1.1 skrll int packet_count;
47 1.1 skrll
48 1.1 skrll TAILQ_ENTRY(dwc2_xfer) xnext; /* list of complete xfers */
49 1.1 skrll };
50 1.1 skrll
51 1.1 skrll struct dwc2_pipe {
52 1.1 skrll struct usbd_pipe pipe; /* Must be first */
53 1.1 skrll
54 1.1 skrll /* Current transfer */
55 1.1 skrll void *priv; /* QH */
56 1.1 skrll
57 1.1 skrll /* DMA buffer for control endpoint requests */
58 1.1 skrll usb_dma_t req_dma;
59 1.1 skrll };
60 1.1 skrll
61 1.1 skrll
62 1.1 skrll #define DWC2_BUS2SC(bus) ((bus)->hci_private)
63 1.1 skrll #define DWC2_PIPE2SC(pipe) DWC2_BUS2SC((pipe)->device->bus)
64 1.1 skrll #define DWC2_XFER2SC(xfer) DWC2_PIPE2SC((xfer)->pipe)
65 1.1 skrll #define DWC2_DPIPE2SC(d) DWC2_BUS2SC((d)->pipe.device->bus)
66 1.1 skrll
67 1.1 skrll #define DWC2_XFER2DXFER(x) (struct dwc2_xfer *)(x)
68 1.1 skrll
69 1.1 skrll #define DWC2_XFER2DPIPE(x) (struct dwc2_pipe *)(x)->pipe;
70 1.1 skrll #define DWC2_PIPE2DPIPE(p) (struct dwc2_pipe *)(p)
71 1.1 skrll
72 1.1 skrll
73 1.1 skrll typedef struct dwc2_softc {
74 1.1 skrll device_t sc_dev;
75 1.1 skrll
76 1.1 skrll bus_space_tag_t sc_iot;
77 1.1 skrll bus_space_handle_t sc_ioh;
78 1.1 skrll bus_dma_tag_t sc_dmat;
79 1.1 skrll struct dwc2_core_params *sc_params;
80 1.4 hikaru int (*sc_set_dma_addr)(device_t, bus_addr_t, int);
81 1.1 skrll
82 1.1 skrll /*
83 1.1 skrll * Private
84 1.1 skrll */
85 1.1 skrll
86 1.1 skrll struct usbd_bus sc_bus;
87 1.1 skrll struct dwc2_hsotg *sc_hsotg;
88 1.1 skrll
89 1.1 skrll kmutex_t sc_lock;
90 1.1 skrll
91 1.1 skrll bool sc_hcdenabled;
92 1.1 skrll void *sc_rhc_si;
93 1.1 skrll
94 1.1 skrll usbd_xfer_handle sc_intrxfer;
95 1.1 skrll
96 1.1 skrll device_t sc_child; /* /dev/usb# device */
97 1.1 skrll char sc_dying;
98 1.1 skrll struct usb_dma_reserve sc_dma_reserve;
99 1.1 skrll
100 1.1 skrll char sc_vendor[32]; /* vendor string for root hub */
101 1.1 skrll int sc_id_vendor; /* vendor ID for root hub */
102 1.1 skrll
103 1.1 skrll TAILQ_HEAD(, dwc2_xfer) sc_complete; /* complete transfers */
104 1.1 skrll
105 1.1 skrll uint8_t sc_addr; /* device address */
106 1.1 skrll uint8_t sc_conf; /* device configuration */
107 1.1 skrll
108 1.1 skrll pool_cache_t sc_xferpool;
109 1.1 skrll pool_cache_t sc_qhpool;
110 1.1 skrll pool_cache_t sc_qtdpool;
111 1.1 skrll
112 1.1 skrll } dwc2_softc_t;
113 1.1 skrll
114 1.1 skrll int dwc2_init(struct dwc2_softc *);
115 1.1 skrll int dwc2_intr(void *);
116 1.1 skrll int dwc2_detach(dwc2_softc_t *, int);
117 1.1 skrll bool dwc2_shutdown(device_t, int);
118 1.1 skrll void dwc2_childdet(device_t, device_t);
119 1.1 skrll int dwc2_activate(device_t, enum devact);
120 1.1 skrll bool dwc2_resume(device_t, const pmf_qual_t *);
121 1.1 skrll bool dwc2_suspend(device_t, const pmf_qual_t *);
122 1.1 skrll
123 1.1 skrll void dwc2_worker(struct work *, void *);
124 1.1 skrll
125 1.1 skrll void dwc2_host_complete(struct dwc2_hsotg *, struct dwc2_qtd *,
126 1.1 skrll int);
127 1.1 skrll
128 1.1 skrll static inline void
129 1.1 skrll dwc2_root_intr(dwc2_softc_t *sc)
130 1.1 skrll {
131 1.1 skrll
132 1.1 skrll softint_schedule(sc->sc_rhc_si);
133 1.1 skrll }
134 1.1 skrll
135 1.1 skrll #endif /* _DWC_OTGVAR_H_ */
136