Home | History | Annotate | Line # | Download | only in inc
      1  1.1  jakllsch /*	$NetBSD: efi_pxe.h,v 1.1.1.1 2014/04/01 16:16:07 jakllsch Exp $	*/
      2  1.1  jakllsch 
      3  1.1  jakllsch #ifndef _EFI_PXE_H
      4  1.1  jakllsch #define _EFI_PXE_H
      5  1.1  jakllsch 
      6  1.1  jakllsch 
      7  1.1  jakllsch /*++
      8  1.1  jakllsch Copyright (c) Intel  1999
      9  1.1  jakllsch 
     10  1.1  jakllsch Module name:
     11  1.1  jakllsch     efi_pxe.h
     12  1.1  jakllsch 
     13  1.1  jakllsch 32/64-bit PXE specification:
     14  1.1  jakllsch     alpha-4, 99-Dec-17
     15  1.1  jakllsch 
     16  1.1  jakllsch Abstract:
     17  1.1  jakllsch     This header file contains all of the PXE type definitions,
     18  1.1  jakllsch     structure prototypes, global variables and constants that
     19  1.1  jakllsch     are needed for porting PXE to EFI.
     20  1.1  jakllsch --*/
     21  1.1  jakllsch 
     22  1.1  jakllsch #pragma pack(1)
     23  1.1  jakllsch 
     24  1.1  jakllsch #define PXE_INTEL_ORDER         1   // Intel order
     25  1.1  jakllsch //#define PXE_NETWORK_ORDER         1   // network order
     26  1.1  jakllsch 
     27  1.1  jakllsch #define PXE_UINT64_SUPPORT          1   // UINT64 supported
     28  1.1  jakllsch //#define PXE_NO_UINT64_SUPPORT     1   // UINT64 not supported
     29  1.1  jakllsch 
     30  1.1  jakllsch #define PXE_BUSTYPE(a,b,c,d)            \
     31  1.1  jakllsch ((((PXE_UINT32)(d) & 0xFF) << 24) | \
     32  1.1  jakllsch (((PXE_UINT32)(c) & 0xFF) << 16) |  \
     33  1.1  jakllsch (((PXE_UINT32)(b) & 0xFF) << 8) |       \
     34  1.1  jakllsch ((PXE_UINT32)(a) & 0xFF))
     35  1.1  jakllsch 
     36  1.1  jakllsch //
     37  1.1  jakllsch // UNDI ROM ID and devive ID signature
     38  1.1  jakllsch //
     39  1.1  jakllsch #define PXE_BUSTYPE_PXE         PXE_BUSTYPE('!', 'P', 'X', 'E')
     40  1.1  jakllsch 
     41  1.1  jakllsch //
     42  1.1  jakllsch // BUS ROM ID signatures
     43  1.1  jakllsch //
     44  1.1  jakllsch #define PXE_BUSTYPE_PCI         PXE_BUSTYPE('P', 'C', 'I', 'R')
     45  1.1  jakllsch #define PXE_BUSTYPE_PC_CARD     PXE_BUSTYPE('P', 'C', 'C', 'R')
     46  1.1  jakllsch #define PXE_BUSTYPE_USB         PXE_BUSTYPE('U', 'S', 'B', 'R')
     47  1.1  jakllsch #define PXE_BUSTYPE_1394        PXE_BUSTYPE('1', '3', '9', '4')
     48  1.1  jakllsch 
     49  1.1  jakllsch #define PXE_SWAP_UINT16(n)          \
     50  1.1  jakllsch ((((PXE_UINT16)(n) & 0x00FF) << 8) |    \
     51  1.1  jakllsch (((PXE_UINT16)(n) & 0xFF00) >> 8))
     52  1.1  jakllsch 
     53  1.1  jakllsch #define PXE_SWAP_UINT32(n)              \
     54  1.1  jakllsch ((((PXE_UINT32)(n) & 0x000000FF) << 24) |   \
     55  1.1  jakllsch (((PXE_UINT32)(n) & 0x0000FF00) << 8) |     \
     56  1.1  jakllsch (((PXE_UINT32)(n) & 0x00FF0000) >> 8) |     \
     57  1.1  jakllsch (((PXE_UINT32)(n) & 0xFF000000) >> 24))
     58  1.1  jakllsch 
     59  1.1  jakllsch #if PXE_UINT64_SUPPORT != 0
     60  1.1  jakllsch #define PXE_SWAP_UINT64(n)                  \
     61  1.1  jakllsch ((((PXE_UINT64)(n) & 0x00000000000000FF) << 56) |   \
     62  1.1  jakllsch (((PXE_UINT64)(n) & 0x000000000000FF00) << 40) |    \
     63  1.1  jakllsch (((PXE_UINT64)(n) & 0x0000000000FF0000) << 24) |    \
     64  1.1  jakllsch (((PXE_UINT64)(n) & 0x00000000FF000000) << 8) | \
     65  1.1  jakllsch (((PXE_UINT64)(n) & 0x000000FF00000000) >> 8) | \
     66  1.1  jakllsch (((PXE_UINT64)(n) & 0x0000FF0000000000) >> 24) |    \
     67  1.1  jakllsch (((PXE_UINT64)(n) & 0x00FF000000000000) >> 40) |    \
     68  1.1  jakllsch (((PXE_UINT64)(n) & 0xFF00000000000000) >> 56))
     69  1.1  jakllsch #endif // PXE_UINT64_SUPPORT
     70  1.1  jakllsch 
     71  1.1  jakllsch #if PXE_NO_UINT64_SUPPORT != 0
     72  1.1  jakllsch #define PXE_SWAP_UINT64(n)                      \
     73  1.1  jakllsch {                                       \
     74  1.1  jakllsch PXE_UINT32 tmp = (PXE_UINT64)(n)[1];                \
     75  1.1  jakllsch (PXE_UINT64)(n)[1] = PXE_SWAP_UINT32((PXE_UINT64)(n)[0]);   \
     76  1.1  jakllsch (PXE_UINT64)(n)[0] = tmp;                       \
     77  1.1  jakllsch }
     78  1.1  jakllsch #endif // PXE_NO_UINT64_SUPPORT
     79  1.1  jakllsch 
     80  1.1  jakllsch #define PXE_CPBSIZE_NOT_USED            0   // zero
     81  1.1  jakllsch #define PXE_DBSIZE_NOT_USED         0   // zero
     82  1.1  jakllsch #define PXE_CPBADDR_NOT_USED        (PXE_UINT64)0       // zero
     83  1.1  jakllsch #define PXE_DBADDR_NOT_USED     (PXE_UINT64)0       // zero
     84  1.1  jakllsch 
     85  1.1  jakllsch #define PXE_CONST const
     86  1.1  jakllsch 
     87  1.1  jakllsch #define PXE_VOLATILE volatile
     88  1.1  jakllsch 
     89  1.1  jakllsch typedef void PXE_VOID;
     90  1.1  jakllsch 
     91  1.1  jakllsch typedef unsigned char PXE_UINT8;
     92  1.1  jakllsch 
     93  1.1  jakllsch typedef unsigned short PXE_UINT16;
     94  1.1  jakllsch 
     95  1.1  jakllsch typedef unsigned PXE_UINT32;
     96  1.1  jakllsch 
     97  1.1  jakllsch #if PXE_UINT64_SUPPORT != 0
     98  1.1  jakllsch // typedef unsigned long PXE_UINT64;
     99  1.1  jakllsch typedef UINT64 PXE_UINT64;
    100  1.1  jakllsch #endif // PXE_UINT64_SUPPORT
    101  1.1  jakllsch 
    102  1.1  jakllsch #if PXE_NO_UINT64_SUPPORT != 0
    103  1.1  jakllsch typedef PXE_UINT32 PXE_UINT64[2];
    104  1.1  jakllsch #endif // PXE_NO_UINT64_SUPPORT
    105  1.1  jakllsch 
    106  1.1  jakllsch typedef unsigned PXE_UINTN;
    107  1.1  jakllsch 
    108  1.1  jakllsch typedef PXE_UINT8 PXE_BOOL;
    109  1.1  jakllsch 
    110  1.1  jakllsch #define PXE_FALSE               0   // zero
    111  1.1  jakllsch #define PXE_TRUE                    (!PXE_FALSE)
    112  1.1  jakllsch 
    113  1.1  jakllsch typedef PXE_UINT16 PXE_OPCODE;
    114  1.1  jakllsch 
    115  1.1  jakllsch //
    116  1.1  jakllsch // Return UNDI operational state.
    117  1.1  jakllsch //
    118  1.1  jakllsch #define PXE_OPCODE_GET_STATE                    0x0000
    119  1.1  jakllsch 
    120  1.1  jakllsch //
    121  1.1  jakllsch // Change UNDI operational state from Stopped to Started.
    122  1.1  jakllsch //
    123  1.1  jakllsch #define PXE_OPCODE_START                    0x0001
    124  1.1  jakllsch 
    125  1.1  jakllsch //
    126  1.1  jakllsch // Change UNDI operational state from Started to Stopped.
    127  1.1  jakllsch //
    128  1.1  jakllsch #define PXE_OPCODE_STOP                     0x0002
    129  1.1  jakllsch 
    130  1.1  jakllsch //
    131  1.1  jakllsch // Get UNDI initialization information.
    132  1.1  jakllsch //
    133  1.1  jakllsch #define PXE_OPCODE_GET_INIT_INFO                0x0003
    134  1.1  jakllsch 
    135  1.1  jakllsch //
    136  1.1  jakllsch // Get NIC configuration information.
    137  1.1  jakllsch //
    138  1.1  jakllsch #define PXE_OPCODE_GET_CONFIG_INFO              0x0004
    139  1.1  jakllsch 
    140  1.1  jakllsch //
    141  1.1  jakllsch // Changed UNDI operational state from Started to Initialized.
    142  1.1  jakllsch //
    143  1.1  jakllsch #define PXE_OPCODE_INITIALIZE                   0x0005
    144  1.1  jakllsch 
    145  1.1  jakllsch //
    146  1.1  jakllsch // Re-initialize the NIC H/W.
    147  1.1  jakllsch //
    148  1.1  jakllsch #define PXE_OPCODE_RESET                    0x0006
    149  1.1  jakllsch 
    150  1.1  jakllsch //
    151  1.1  jakllsch // Change the UNDI operational state from Initialized to Started.
    152  1.1  jakllsch //
    153  1.1  jakllsch #define PXE_OPCODE_SHUTDOWN                 0x0007
    154  1.1  jakllsch 
    155  1.1  jakllsch //
    156  1.1  jakllsch // Read & change state of external interrupt enables.
    157  1.1  jakllsch //
    158  1.1  jakllsch #define PXE_OPCODE_INTERRUPT_ENABLES                0x0008
    159  1.1  jakllsch 
    160  1.1  jakllsch //
    161  1.1  jakllsch // Read & change state of packet receive filters.
    162  1.1  jakllsch //
    163  1.1  jakllsch #define PXE_OPCODE_RECEIVE_FILTERS              0x0009
    164  1.1  jakllsch 
    165  1.1  jakllsch //
    166  1.1  jakllsch // Read & change station MAC address.
    167  1.1  jakllsch //
    168  1.1  jakllsch #define PXE_OPCODE_STATION_ADDRESS              0x000A
    169  1.1  jakllsch 
    170  1.1  jakllsch //
    171  1.1  jakllsch // Read traffic statistics.
    172  1.1  jakllsch //
    173  1.1  jakllsch #define PXE_OPCODE_STATISTICS                   0x000B
    174  1.1  jakllsch 
    175  1.1  jakllsch //
    176  1.1  jakllsch // Convert multicast IP address to multicast MAC address.
    177  1.1  jakllsch //
    178  1.1  jakllsch #define PXE_OPCODE_MCAST_IP_TO_MAC              0x000C
    179  1.1  jakllsch 
    180  1.1  jakllsch //
    181  1.1  jakllsch // Read or change non-volatile storage on the NIC.
    182  1.1  jakllsch //
    183  1.1  jakllsch #define PXE_OPCODE_NVDATA                   0x000D
    184  1.1  jakllsch 
    185  1.1  jakllsch //
    186  1.1  jakllsch // Get & clear interrupt status.
    187  1.1  jakllsch //
    188  1.1  jakllsch #define PXE_OPCODE_GET_STATUS                   0x000E
    189  1.1  jakllsch 
    190  1.1  jakllsch //
    191  1.1  jakllsch // Fill media header in packet for transmit.
    192  1.1  jakllsch //
    193  1.1  jakllsch #define PXE_OPCODE_FILL_HEADER              0x000F
    194  1.1  jakllsch 
    195  1.1  jakllsch //
    196  1.1  jakllsch // Transmit packet(s).
    197  1.1  jakllsch //
    198  1.1  jakllsch #define PXE_OPCODE_TRANSMIT                 0x0010
    199  1.1  jakllsch 
    200  1.1  jakllsch //
    201  1.1  jakllsch // Receive packet.
    202  1.1  jakllsch //
    203  1.1  jakllsch #define PXE_OPCODE_RECEIVE                  0x0011
    204  1.1  jakllsch 
    205  1.1  jakllsch // last valid opcode:
    206  1.1  jakllsch #define PXE_OPCODE_VALID_MAX                    0x0011
    207  1.1  jakllsch 
    208  1.1  jakllsch //
    209  1.1  jakllsch // Last valid PXE UNDI OpCode number.
    210  1.1  jakllsch //
    211  1.1  jakllsch #define PXE_OPCODE_LAST_VALID                   0x0011
    212  1.1  jakllsch 
    213  1.1  jakllsch typedef PXE_UINT16 PXE_OPFLAGS;
    214  1.1  jakllsch 
    215  1.1  jakllsch #define PXE_OPFLAGS_NOT_USED                    0x0000
    216  1.1  jakllsch 
    217  1.1  jakllsch ////////////////////////////////////////
    218  1.1  jakllsch // UNDI Get State
    219  1.1  jakllsch //
    220  1.1  jakllsch 
    221  1.1  jakllsch // No OpFlags
    222  1.1  jakllsch 
    223  1.1  jakllsch ////////////////////////////////////////
    224  1.1  jakllsch // UNDI Start
    225  1.1  jakllsch //
    226  1.1  jakllsch 
    227  1.1  jakllsch // No OpFlags
    228  1.1  jakllsch 
    229  1.1  jakllsch ////////////////////////////////////////
    230  1.1  jakllsch // UNDI Stop
    231  1.1  jakllsch //
    232  1.1  jakllsch 
    233  1.1  jakllsch // No OpFlags
    234  1.1  jakllsch 
    235  1.1  jakllsch ////////////////////////////////////////
    236  1.1  jakllsch // UNDI Get Init Info
    237  1.1  jakllsch //
    238  1.1  jakllsch 
    239  1.1  jakllsch // No Opflags
    240  1.1  jakllsch 
    241  1.1  jakllsch ////////////////////////////////////////
    242  1.1  jakllsch // UNDI Get Config Info
    243  1.1  jakllsch //
    244  1.1  jakllsch 
    245  1.1  jakllsch // No Opflags
    246  1.1  jakllsch 
    247  1.1  jakllsch ////////////////////////////////////////
    248  1.1  jakllsch // UNDI Initialize
    249  1.1  jakllsch //
    250  1.1  jakllsch 
    251  1.1  jakllsch #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK    0x0001
    252  1.1  jakllsch #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE         0x0000
    253  1.1  jakllsch #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE  0x0001
    254  1.1  jakllsch 
    255  1.1  jakllsch ////////////////////////////////////////
    256  1.1  jakllsch // UNDI Reset
    257  1.1  jakllsch //
    258  1.1  jakllsch 
    259  1.1  jakllsch #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS        0x0001
    260  1.1  jakllsch #define PXE_OPFLAGS_RESET_DISABLE_FILTERS           0x0002
    261  1.1  jakllsch 
    262  1.1  jakllsch ////////////////////////////////////////
    263  1.1  jakllsch // UNDI Shutdown
    264  1.1  jakllsch //
    265  1.1  jakllsch 
    266  1.1  jakllsch // No OpFlags
    267  1.1  jakllsch 
    268  1.1  jakllsch ////////////////////////////////////////
    269  1.1  jakllsch // UNDI Interrupt Enables
    270  1.1  jakllsch //
    271  1.1  jakllsch 
    272  1.1  jakllsch //
    273  1.1  jakllsch // Select whether to enable or disable external interrupt signals.
    274  1.1  jakllsch // Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
    275  1.1  jakllsch //
    276  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_OPMASK                0xC000
    277  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_ENABLE                0x8000
    278  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_DISABLE           0x4000
    279  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_READ              0x0000
    280  1.1  jakllsch 
    281  1.1  jakllsch //
    282  1.1  jakllsch // Enable receive interrupts.  An external interrupt will be generated
    283  1.1  jakllsch // after a complete non-error packet has been received.
    284  1.1  jakllsch //
    285  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_RECEIVE           0x0001
    286  1.1  jakllsch 
    287  1.1  jakllsch //
    288  1.1  jakllsch // Enable transmit interrupts.  An external interrupt will be generated
    289  1.1  jakllsch // after a complete non-error packet has been transmitted.
    290  1.1  jakllsch //
    291  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_TRANSMIT          0x0002
    292  1.1  jakllsch 
    293  1.1  jakllsch //
    294  1.1  jakllsch // Enable command interrupts.  An external interrupt will be generated
    295  1.1  jakllsch // when command execution stops.
    296  1.1  jakllsch //
    297  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_COMMAND           0x0004
    298  1.1  jakllsch 
    299  1.1  jakllsch //
    300  1.1  jakllsch // Generate software interrupt.  Setting this bit generates an external
    301  1.1  jakllsch // interrupt, if it is supported by the hardware.
    302  1.1  jakllsch //
    303  1.1  jakllsch #define PXE_OPFLAGS_INTERRUPT_SOFTWARE          0x0008
    304  1.1  jakllsch 
    305  1.1  jakllsch ////////////////////////////////////////
    306  1.1  jakllsch // UNDI Receive Filters
    307  1.1  jakllsch //
    308  1.1  jakllsch 
    309  1.1  jakllsch //
    310  1.1  jakllsch // Select whether to enable or disable receive filters.
    311  1.1  jakllsch // Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
    312  1.1  jakllsch //
    313  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK           0xC000
    314  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE           0x8000
    315  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE          0x4000
    316  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_READ         0x0000
    317  1.1  jakllsch 
    318  1.1  jakllsch //
    319  1.1  jakllsch // To reset the contents of the multicast MAC address filter list,
    320  1.1  jakllsch // set this OpFlag:
    321  1.1  jakllsch //
    322  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
    323  1.1  jakllsch 
    324  1.1  jakllsch //
    325  1.1  jakllsch // Enable unicast packet receiving.  Packets sent to the current station
    326  1.1  jakllsch // MAC address will be received.
    327  1.1  jakllsch //
    328  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST          0x0001
    329  1.1  jakllsch 
    330  1.1  jakllsch //
    331  1.1  jakllsch // Enable broadcast packet receiving.  Packets sent to the broadcast
    332  1.1  jakllsch // MAC address will be received.
    333  1.1  jakllsch //
    334  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST        0x0002
    335  1.1  jakllsch 
    336  1.1  jakllsch //
    337  1.1  jakllsch // Enable filtered multicast packet receiving.  Packets sent to any
    338  1.1  jakllsch // of the multicast MAC addresses in the multicast MAC address filter
    339  1.1  jakllsch // list will be received.  If the filter list is empty, no multicast
    340  1.1  jakllsch //
    341  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST   0x0004
    342  1.1  jakllsch 
    343  1.1  jakllsch //
    344  1.1  jakllsch // Enable promiscuous packet receiving.  All packets will be received.
    345  1.1  jakllsch //
    346  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS      0x0008
    347  1.1  jakllsch 
    348  1.1  jakllsch //
    349  1.1  jakllsch // Enable promiscuous multicast packet receiving.  All multicast
    350  1.1  jakllsch // packets will be received.
    351  1.1  jakllsch //
    352  1.1  jakllsch #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST        0x0010
    353  1.1  jakllsch 
    354  1.1  jakllsch ////////////////////////////////////////
    355  1.1  jakllsch // UNDI Station Address
    356  1.1  jakllsch //
    357  1.1  jakllsch 
    358  1.1  jakllsch #define PXE_OPFLAGS_STATION_ADDRESS_READ            0x0000
    359  1.1  jakllsch #define PXE_OPFLAGS_STATION_ADDRESS_RESET           0x0001
    360  1.1  jakllsch 
    361  1.1  jakllsch ////////////////////////////////////////
    362  1.1  jakllsch // UNDI Statistics
    363  1.1  jakllsch //
    364  1.1  jakllsch 
    365  1.1  jakllsch #define PXE_OPFLAGS_STATISTICS_READ             0x0000
    366  1.1  jakllsch #define PXE_OPFLAGS_STATISTICS_RESET                0x0001
    367  1.1  jakllsch 
    368  1.1  jakllsch ////////////////////////////////////////
    369  1.1  jakllsch // UNDI MCast IP to MAC
    370  1.1  jakllsch //
    371  1.1  jakllsch 
    372  1.1  jakllsch //
    373  1.1  jakllsch // Identify the type of IP address in the CPB.
    374  1.1  jakllsch //
    375  1.1  jakllsch #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK          0x0003
    376  1.1  jakllsch #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC           0x0000
    377  1.1  jakllsch #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC           0x0001
    378  1.1  jakllsch 
    379  1.1  jakllsch ////////////////////////////////////////
    380  1.1  jakllsch // UNDI NvData
    381  1.1  jakllsch //
    382  1.1  jakllsch 
    383  1.1  jakllsch //
    384  1.1  jakllsch // Select the type of non-volatile data operation.
    385  1.1  jakllsch //
    386  1.1  jakllsch #define PXE_OPFLAGS_NVDATA_OPMASK               0x0001
    387  1.1  jakllsch #define PXE_OPFLAGS_NVDATA_READ             0x0000
    388  1.1  jakllsch #define PXE_OPFLAGS_NVDATA_WRITE                0x0001
    389  1.1  jakllsch 
    390  1.1  jakllsch ////////////////////////////////////////
    391  1.1  jakllsch // UNDI Get Status
    392  1.1  jakllsch //
    393  1.1  jakllsch 
    394  1.1  jakllsch //
    395  1.1  jakllsch // Return current interrupt status.  This will also clear any interrupts
    396  1.1  jakllsch // that are currently set.  This can be used in a polling routine.  The
    397  1.1  jakllsch // interrupt flags are still set and cleared even when the interrupts
    398  1.1  jakllsch // are disabled.
    399  1.1  jakllsch //
    400  1.1  jakllsch #define PXE_OPFLAGS_GET_INTERRUPT_STATUS            0x0001
    401  1.1  jakllsch 
    402  1.1  jakllsch //
    403  1.1  jakllsch // Return list of transmitted buffers for recycling.  Transmit buffers
    404  1.1  jakllsch // must not be changed or unallocated until they have recycled.  After
    405  1.1  jakllsch // issuing a transmit command, wait for a transmit complete interrupt.
    406  1.1  jakllsch // When a transmit complete interrupt is received, read the transmitted
    407  1.1  jakllsch // buffers.  Do not plan on getting one buffer per interrupt.  Some
    408  1.1  jakllsch // NICs and UNDIs may transmit multiple buffers per interrupt.
    409  1.1  jakllsch //
    410  1.1  jakllsch #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS         0x0002
    411  1.1  jakllsch 
    412  1.1  jakllsch ////////////////////////////////////////
    413  1.1  jakllsch // UNDI Fill Header
    414  1.1  jakllsch //
    415  1.1  jakllsch 
    416  1.1  jakllsch #define PXE_OPFLAGS_FILL_HEADER_OPMASK          0x0001
    417  1.1  jakllsch #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED          0x0001
    418  1.1  jakllsch #define PXE_OPFLAGS_FILL_HEADER_WHOLE           0x0000
    419  1.1  jakllsch 
    420  1.1  jakllsch ////////////////////////////////////////
    421  1.1  jakllsch // UNDI Transmit
    422  1.1  jakllsch //
    423  1.1  jakllsch 
    424  1.1  jakllsch //
    425  1.1  jakllsch // S/W UNDI only.  Return after the packet has been transmitted.  A
    426  1.1  jakllsch // transmit complete interrupt will still be generated and the transmit
    427  1.1  jakllsch // buffer will have to be recycled.
    428  1.1  jakllsch //
    429  1.1  jakllsch #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK          0x0001
    430  1.1  jakllsch #define PXE_OPFLAGS_TRANSMIT_BLOCK              0x0001
    431  1.1  jakllsch #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK         0x0000
    432  1.1  jakllsch 
    433  1.1  jakllsch //
    434  1.1  jakllsch //
    435  1.1  jakllsch //
    436  1.1  jakllsch #define PXE_OPFLAGS_TRANSMIT_OPMASK             0x0002
    437  1.1  jakllsch #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED         0x0002
    438  1.1  jakllsch #define PXE_OPFLAGS_TRANSMIT_WHOLE              0x0000
    439  1.1  jakllsch 
    440  1.1  jakllsch ////////////////////////////////////////
    441  1.1  jakllsch // UNDI Receive
    442  1.1  jakllsch //
    443  1.1  jakllsch 
    444  1.1  jakllsch // No OpFlags
    445  1.1  jakllsch 
    446  1.1  jakllsch typedef PXE_UINT16 PXE_STATFLAGS;
    447  1.1  jakllsch 
    448  1.1  jakllsch #define PXE_STATFLAGS_INITIALIZE                0x0000
    449  1.1  jakllsch 
    450  1.1  jakllsch ////////////////////////////////////////
    451  1.1  jakllsch // Common StatFlags that can be returned by all commands.
    452  1.1  jakllsch //
    453  1.1  jakllsch 
    454  1.1  jakllsch //
    455  1.1  jakllsch // The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
    456  1.1  jakllsch // implemented by all UNDIs.  COMMAND_QUEUED is only needed by UNDIs
    457  1.1  jakllsch // that support command queuing.
    458  1.1  jakllsch //
    459  1.1  jakllsch #define PXE_STATFLAGS_STATUS_MASK               0xC000
    460  1.1  jakllsch #define PXE_STATFLAGS_COMMAND_COMPLETE          0xC000
    461  1.1  jakllsch #define PXE_STATFLAGS_COMMAND_FAILED                0x8000
    462  1.1  jakllsch #define PXE_STATFLAGS_COMMAND_QUEUED                0x4000
    463  1.1  jakllsch //#define PXE_STATFLAGS_INITIALIZE              0x0000
    464  1.1  jakllsch 
    465  1.1  jakllsch #define PXE_STATFLAGS_DB_WRITE_TRUNCATED            0x2000
    466  1.1  jakllsch 
    467  1.1  jakllsch ////////////////////////////////////////
    468  1.1  jakllsch // UNDI Get State
    469  1.1  jakllsch //
    470  1.1  jakllsch 
    471  1.1  jakllsch #define PXE_STATFLAGS_GET_STATE_MASK                0x0003
    472  1.1  jakllsch #define PXE_STATFLAGS_GET_STATE_INITIALIZED         0x0002
    473  1.1  jakllsch #define PXE_STATFLAGS_GET_STATE_STARTED         0x0001
    474  1.1  jakllsch #define PXE_STATFLAGS_GET_STATE_STOPPED         0x0000
    475  1.1  jakllsch 
    476  1.1  jakllsch ////////////////////////////////////////
    477  1.1  jakllsch // UNDI Start
    478  1.1  jakllsch //
    479  1.1  jakllsch 
    480  1.1  jakllsch // No additional StatFlags
    481  1.1  jakllsch 
    482  1.1  jakllsch ////////////////////////////////////////
    483  1.1  jakllsch // UNDI Get Init Info
    484  1.1  jakllsch //
    485  1.1  jakllsch 
    486  1.1  jakllsch #define PXE_STATFLAGS_CABLE_DETECT_MASK          0x0001
    487  1.1  jakllsch #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
    488  1.1  jakllsch #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED     0x0001
    489  1.1  jakllsch 
    490  1.1  jakllsch 
    491  1.1  jakllsch ////////////////////////////////////////
    492  1.1  jakllsch // UNDI Initialize
    493  1.1  jakllsch //
    494  1.1  jakllsch 
    495  1.1  jakllsch #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA          0x0001
    496  1.1  jakllsch 
    497  1.1  jakllsch ////////////////////////////////////////
    498  1.1  jakllsch // UNDI Reset
    499  1.1  jakllsch //
    500  1.1  jakllsch 
    501  1.1  jakllsch #define PXE_STATFLAGS_RESET_NO_MEDIA                0x0001
    502  1.1  jakllsch 
    503  1.1  jakllsch ////////////////////////////////////////
    504  1.1  jakllsch // UNDI Shutdown
    505  1.1  jakllsch //
    506  1.1  jakllsch 
    507  1.1  jakllsch // No additional StatFlags
    508  1.1  jakllsch 
    509  1.1  jakllsch ////////////////////////////////////////
    510  1.1  jakllsch // UNDI Interrupt Enables
    511  1.1  jakllsch //
    512  1.1  jakllsch 
    513  1.1  jakllsch //
    514  1.1  jakllsch // If set, receive interrupts are enabled.
    515  1.1  jakllsch //
    516  1.1  jakllsch #define PXE_STATFLAGS_INTERRUPT_RECEIVE         0x0001
    517  1.1  jakllsch 
    518  1.1  jakllsch //
    519  1.1  jakllsch // If set, transmit interrupts are enabled.
    520  1.1  jakllsch //
    521  1.1  jakllsch #define PXE_STATFLAGS_INTERRUPT_TRANSMIT            0x0002
    522  1.1  jakllsch 
    523  1.1  jakllsch //
    524  1.1  jakllsch // If set, command interrupts are enabled.
    525  1.1  jakllsch //
    526  1.1  jakllsch #define PXE_STATFLAGS_INTERRUPT_COMMAND         0x0004
    527  1.1  jakllsch 
    528  1.1  jakllsch 
    529  1.1  jakllsch ////////////////////////////////////////
    530  1.1  jakllsch // UNDI Receive Filters
    531  1.1  jakllsch //
    532  1.1  jakllsch 
    533  1.1  jakllsch //
    534  1.1  jakllsch // If set, unicast packets will be received.
    535  1.1  jakllsch //
    536  1.1  jakllsch #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST        0x0001
    537  1.1  jakllsch 
    538  1.1  jakllsch //
    539  1.1  jakllsch // If set, broadcast packets will be received.
    540  1.1  jakllsch //
    541  1.1  jakllsch #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST      0x0002
    542  1.1  jakllsch 
    543  1.1  jakllsch //
    544  1.1  jakllsch // If set, multicast packets that match up with the multicast address
    545  1.1  jakllsch // filter list will be received.
    546  1.1  jakllsch //
    547  1.1  jakllsch #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
    548  1.1  jakllsch 
    549  1.1  jakllsch //
    550  1.1  jakllsch // If set, all packets will be received.
    551  1.1  jakllsch //
    552  1.1  jakllsch #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS        0x0008
    553  1.1  jakllsch 
    554  1.1  jakllsch //
    555  1.1  jakllsch // If set, all multicast packets will be received.
    556  1.1  jakllsch //
    557  1.1  jakllsch #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010
    558  1.1  jakllsch 
    559  1.1  jakllsch ////////////////////////////////////////
    560  1.1  jakllsch // UNDI Station Address
    561  1.1  jakllsch //
    562  1.1  jakllsch 
    563  1.1  jakllsch // No additional StatFlags
    564  1.1  jakllsch 
    565  1.1  jakllsch ////////////////////////////////////////
    566  1.1  jakllsch // UNDI Statistics
    567  1.1  jakllsch //
    568  1.1  jakllsch 
    569  1.1  jakllsch // No additional StatFlags
    570  1.1  jakllsch 
    571  1.1  jakllsch ////////////////////////////////////////
    572  1.1  jakllsch // UNDI MCast IP to MAC
    573  1.1  jakllsch //
    574  1.1  jakllsch 
    575  1.1  jakllsch // No additional StatFlags
    576  1.1  jakllsch 
    577  1.1  jakllsch ////////////////////////////////////////
    578  1.1  jakllsch // UNDI NvData
    579  1.1  jakllsch //
    580  1.1  jakllsch 
    581  1.1  jakllsch // No additional StatFlags
    582  1.1  jakllsch 
    583  1.1  jakllsch 
    584  1.1  jakllsch ////////////////////////////////////////
    585  1.1  jakllsch // UNDI Get Status
    586  1.1  jakllsch //
    587  1.1  jakllsch 
    588  1.1  jakllsch //
    589  1.1  jakllsch // Use to determine if an interrupt has occurred.
    590  1.1  jakllsch //
    591  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK     0x000F
    592  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS      0x0000
    593  1.1  jakllsch 
    594  1.1  jakllsch //
    595  1.1  jakllsch // If set, at least one receive interrupt occurred.
    596  1.1  jakllsch //
    597  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_RECEIVE            0x0001
    598  1.1  jakllsch 
    599  1.1  jakllsch //
    600  1.1  jakllsch // If set, at least one transmit interrupt occurred.
    601  1.1  jakllsch //
    602  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_TRANSMIT           0x0002
    603  1.1  jakllsch 
    604  1.1  jakllsch //
    605  1.1  jakllsch // If set, at least one command interrupt occurred.
    606  1.1  jakllsch //
    607  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_COMMAND            0x0004
    608  1.1  jakllsch 
    609  1.1  jakllsch //
    610  1.1  jakllsch // If set, at least one software interrupt occurred.
    611  1.1  jakllsch //
    612  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_SOFTWARE           0x0008
    613  1.1  jakllsch 
    614  1.1  jakllsch //
    615  1.1  jakllsch // This flag is set if the transmitted buffer queue is empty.  This flag
    616  1.1  jakllsch // will be set if all transmitted buffer addresses get written into the DB.
    617  1.1  jakllsch //
    618  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY  0x0010
    619  1.1  jakllsch 
    620  1.1  jakllsch //
    621  1.1  jakllsch // This flag is set if no transmitted buffer addresses were written
    622  1.1  jakllsch // into the DB.  (This could be because DBsize was too small.)
    623  1.1  jakllsch //
    624  1.1  jakllsch #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN  0x0020
    625  1.1  jakllsch 
    626  1.1  jakllsch ////////////////////////////////////////
    627  1.1  jakllsch // UNDI Fill Header
    628  1.1  jakllsch //
    629  1.1  jakllsch 
    630  1.1  jakllsch // No additional StatFlags
    631  1.1  jakllsch 
    632  1.1  jakllsch ////////////////////////////////////////
    633  1.1  jakllsch // UNDI Transmit
    634  1.1  jakllsch //
    635  1.1  jakllsch 
    636  1.1  jakllsch // No additional StatFlags.
    637  1.1  jakllsch 
    638  1.1  jakllsch ////////////////////////////////////////
    639  1.1  jakllsch // UNDI Receive
    640  1.1  jakllsch //
    641  1.1  jakllsch 
    642  1.1  jakllsch // No additional StatFlags.
    643  1.1  jakllsch 
    644  1.1  jakllsch typedef PXE_UINT16 PXE_STATCODE;
    645  1.1  jakllsch 
    646  1.1  jakllsch #define PXE_STATCODE_INITIALIZE             0x0000
    647  1.1  jakllsch 
    648  1.1  jakllsch ////////////////////////////////////////
    649  1.1  jakllsch // Common StatCodes returned by all UNDI commands, UNDI protocol functions
    650  1.1  jakllsch // and BC protocol functions.
    651  1.1  jakllsch //
    652  1.1  jakllsch 
    653  1.1  jakllsch #define PXE_STATCODE_SUCCESS                    0x0000
    654  1.1  jakllsch 
    655  1.1  jakllsch #define PXE_STATCODE_INVALID_CDB                0x0001
    656  1.1  jakllsch #define PXE_STATCODE_INVALID_CPB                0x0002
    657  1.1  jakllsch #define PXE_STATCODE_BUSY                   	0x0003
    658  1.1  jakllsch #define PXE_STATCODE_QUEUE_FULL             	0x0004
    659  1.1  jakllsch #define PXE_STATCODE_ALREADY_STARTED            0x0005
    660  1.1  jakllsch #define PXE_STATCODE_NOT_STARTED                0x0006
    661  1.1  jakllsch #define PXE_STATCODE_NOT_SHUTDOWN               0x0007
    662  1.1  jakllsch #define PXE_STATCODE_ALREADY_INITIALIZED        0x0008
    663  1.1  jakllsch #define PXE_STATCODE_NOT_INITIALIZED            0x0009
    664  1.1  jakllsch #define PXE_STATCODE_DEVICE_FAILURE             0x000A
    665  1.1  jakllsch #define PXE_STATCODE_NVDATA_FAILURE             0x000B
    666  1.1  jakllsch #define PXE_STATCODE_UNSUPPORTED                0x000C
    667  1.1  jakllsch #define PXE_STATCODE_BUFFER_FULL                0x000D
    668  1.1  jakllsch #define PXE_STATCODE_INVALID_PARAMETER		0x000E
    669  1.1  jakllsch #define PXE_STATCODE_INVALID_UNDI		0x000F
    670  1.1  jakllsch #define PXE_STATCODE_IPV4_NOT_SUPPORTED		0x0010
    671  1.1  jakllsch #define PXE_STATCODE_IPV6_NOT_SUPPORTED		0x0011
    672  1.1  jakllsch #define PXE_STATCODE_NOT_ENOUGH_MEMORY		0x0012
    673  1.1  jakllsch #define PXE_STATCODE_NO_DATA			0x0013
    674  1.1  jakllsch 
    675  1.1  jakllsch 
    676  1.1  jakllsch typedef PXE_UINT16 PXE_IFNUM;
    677  1.1  jakllsch 
    678  1.1  jakllsch //
    679  1.1  jakllsch // This interface number must be passed to the S/W UNDI Start command.
    680  1.1  jakllsch //
    681  1.1  jakllsch #define PXE_IFNUM_START                     0x0000
    682  1.1  jakllsch 
    683  1.1  jakllsch //
    684  1.1  jakllsch // This interface number is returned by the S/W UNDI Get State and
    685  1.1  jakllsch // Start commands if information in the CDB, CPB or DB is invalid.
    686  1.1  jakllsch //
    687  1.1  jakllsch #define PXE_IFNUM_INVALID                   0x0000
    688  1.1  jakllsch 
    689  1.1  jakllsch typedef PXE_UINT16 PXE_CONTROL;
    690  1.1  jakllsch 
    691  1.1  jakllsch //
    692  1.1  jakllsch // Setting this flag directs the UNDI to queue this command for later
    693  1.1  jakllsch // execution if the UNDI is busy and it supports command queuing.
    694  1.1  jakllsch // If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
    695  1.1  jakllsch // is returned.  If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
    696  1.1  jakllsch // error is returned.
    697  1.1  jakllsch //
    698  1.1  jakllsch #define PXE_CONTROL_QUEUE_IF_BUSY               0x0002
    699  1.1  jakllsch 
    700  1.1  jakllsch //
    701  1.1  jakllsch // These two bit values are used to determine if there are more UNDI
    702  1.1  jakllsch // CDB structures following this one.  If the link bit is set, there
    703  1.1  jakllsch // must be a CDB structure following this one.  Execution will start
    704  1.1  jakllsch // on the next CDB structure as soon as this one completes successfully.
    705  1.1  jakllsch // If an error is generated by this command, execution will stop.
    706  1.1  jakllsch //
    707  1.1  jakllsch #define PXE_CONTROL_LINK                    0x0001
    708  1.1  jakllsch #define PXE_CONTROL_LAST_CDB_IN_LIST                0x0000
    709  1.1  jakllsch 
    710  1.1  jakllsch typedef PXE_UINT8 PXE_FRAME_TYPE;
    711  1.1  jakllsch 
    712  1.1  jakllsch #define PXE_FRAME_TYPE_NONE                 0x00
    713  1.1  jakllsch #define PXE_FRAME_TYPE_UNICAST              0x01
    714  1.1  jakllsch #define PXE_FRAME_TYPE_BROADCAST                0x02
    715  1.1  jakllsch #define PXE_FRAME_TYPE_MULTICAST            0x03
    716  1.1  jakllsch #define PXE_FRAME_TYPE_PROMISCUOUS              0x04
    717  1.1  jakllsch 
    718  1.1  jakllsch typedef PXE_UINT32 PXE_IPV4;
    719  1.1  jakllsch 
    720  1.1  jakllsch typedef PXE_UINT32 PXE_IPV6[4];
    721  1.1  jakllsch #define PXE_MAC_LENGTH 32
    722  1.1  jakllsch 
    723  1.1  jakllsch typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
    724  1.1  jakllsch 
    725  1.1  jakllsch typedef PXE_UINT8 PXE_IFTYPE;
    726  1.1  jakllsch typedef PXE_UINT16 PXE_MEDIA_PROTOCOL;
    727  1.1  jakllsch 
    728  1.1  jakllsch //
    729  1.1  jakllsch // This information is from the ARP section of RFC 1700.
    730  1.1  jakllsch //
    731  1.1  jakllsch //     1 Ethernet (10Mb)                                    [JBP]
    732  1.1  jakllsch //     2 Experimental Ethernet (3Mb)                        [JBP]
    733  1.1  jakllsch //     3 Amateur Radio AX.25                                [PXK]
    734  1.1  jakllsch //     4 Proteon ProNET Token Ring                          [JBP]
    735  1.1  jakllsch //     5 Chaos                                              [GXP]
    736  1.1  jakllsch //     6 IEEE 802 Networks                                  [JBP]
    737  1.1  jakllsch //     7 ARCNET                                             [JBP]
    738  1.1  jakllsch //     8 Hyperchannel                                       [JBP]
    739  1.1  jakllsch //     9 Lanstar                                             [TU]
    740  1.1  jakllsch //    10 Autonet Short Address                             [MXB1]
    741  1.1  jakllsch //    11 LocalTalk                                         [JKR1]
    742  1.1  jakllsch //    12 LocalNet (IBM PCNet or SYTEK LocalNET)             [JXM]
    743  1.1  jakllsch //    13 Ultra link                                        [RXD2]
    744  1.1  jakllsch //    14 SMDS                                              [GXC1]
    745  1.1  jakllsch //    15 Frame Relay                                        [AGM]
    746  1.1  jakllsch //    16 Asynchronous Transmission Mode (ATM)              [JXB2]
    747  1.1  jakllsch //    17 HDLC                                               [JBP]
    748  1.1  jakllsch //    18 Fibre Channel                            [Yakov Rekhter]
    749  1.1  jakllsch //    19 Asynchronous Transmission Mode (ATM)      [Mark Laubach]
    750  1.1  jakllsch //    20 Serial Line                                        [JBP]
    751  1.1  jakllsch //    21 Asynchronous Transmission Mode (ATM)              [MXB1]
    752  1.1  jakllsch //
    753  1.1  jakllsch 
    754  1.1  jakllsch #define PXE_IFTYPE_ETHERNET                 0x01
    755  1.1  jakllsch #define PXE_IFTYPE_TOKENRING                    0x04
    756  1.1  jakllsch #define PXE_IFTYPE_FIBRE_CHANNEL                0x12
    757  1.1  jakllsch 
    758  1.1  jakllsch typedef struct s_pxe_hw_undi {
    759  1.1  jakllsch PXE_UINT32 Signature;       // PXE_ROMID_SIGNATURE
    760  1.1  jakllsch PXE_UINT8 Len;          // sizeof(PXE_HW_UNDI)
    761  1.1  jakllsch PXE_UINT8 Fudge;            // makes 8-bit cksum equal zero
    762  1.1  jakllsch PXE_UINT8 Rev;          // PXE_ROMID_REV
    763  1.1  jakllsch PXE_UINT8 IFcnt;            // physical connector count
    764  1.1  jakllsch PXE_UINT8 MajorVer;         // PXE_ROMID_MAJORVER
    765  1.1  jakllsch PXE_UINT8 MinorVer;         // PXE_ROMID_MINORVER
    766  1.1  jakllsch PXE_UINT16 reserved;        // zero, not used
    767  1.1  jakllsch PXE_UINT32 Implementation;      // implementation flags
    768  1.1  jakllsch // reserved             // vendor use
    769  1.1  jakllsch // PXE_UINT32 Status;       // status port
    770  1.1  jakllsch // PXE_UINT32 Command;      // command port
    771  1.1  jakllsch // PXE_UINT64 CDBaddr;      // CDB address port
    772  1.1  jakllsch } PXE_HW_UNDI;
    773  1.1  jakllsch 
    774  1.1  jakllsch //
    775  1.1  jakllsch // Status port bit definitions
    776  1.1  jakllsch //
    777  1.1  jakllsch 
    778  1.1  jakllsch //
    779  1.1  jakllsch // UNDI operation state
    780  1.1  jakllsch //
    781  1.1  jakllsch #define PXE_HWSTAT_STATE_MASK                   0xC0000000
    782  1.1  jakllsch #define PXE_HWSTAT_BUSY                     0xC0000000
    783  1.1  jakllsch #define PXE_HWSTAT_INITIALIZED              0x80000000
    784  1.1  jakllsch #define PXE_HWSTAT_STARTED                  0x40000000
    785  1.1  jakllsch #define PXE_HWSTAT_STOPPED                  0x00000000
    786  1.1  jakllsch 
    787  1.1  jakllsch //
    788  1.1  jakllsch // If set, last command failed
    789  1.1  jakllsch //
    790  1.1  jakllsch #define PXE_HWSTAT_COMMAND_FAILED               0x20000000
    791  1.1  jakllsch 
    792  1.1  jakllsch //
    793  1.1  jakllsch // If set, identifies enabled receive filters
    794  1.1  jakllsch //
    795  1.1  jakllsch #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
    796  1.1  jakllsch #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED           0x00000800
    797  1.1  jakllsch #define PXE_HWSTAT_BROADCAST_RX_ENABLED         0x00000400
    798  1.1  jakllsch #define PXE_HWSTAT_MULTICAST_RX_ENABLED         0x00000200
    799  1.1  jakllsch #define PXE_HWSTAT_UNICAST_RX_ENABLED           0x00000100
    800  1.1  jakllsch 
    801  1.1  jakllsch //
    802  1.1  jakllsch // If set, identifies enabled external interrupts
    803  1.1  jakllsch //
    804  1.1  jakllsch #define PXE_HWSTAT_SOFTWARE_INT_ENABLED         0x00000080
    805  1.1  jakllsch #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED          0x00000040
    806  1.1  jakllsch #define PXE_HWSTAT_PACKET_RX_INT_ENABLED            0x00000020
    807  1.1  jakllsch #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED         0x00000010
    808  1.1  jakllsch 
    809  1.1  jakllsch //
    810  1.1  jakllsch // If set, identifies pending interrupts
    811  1.1  jakllsch //
    812  1.1  jakllsch #define PXE_HWSTAT_SOFTWARE_INT_PENDING         0x00000008
    813  1.1  jakllsch #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING          0x00000004
    814  1.1  jakllsch #define PXE_HWSTAT_PACKET_RX_INT_PENDING            0x00000002
    815  1.1  jakllsch #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING         0x00000001
    816  1.1  jakllsch 
    817  1.1  jakllsch //
    818  1.1  jakllsch // Command port definitions
    819  1.1  jakllsch //
    820  1.1  jakllsch 
    821  1.1  jakllsch //
    822  1.1  jakllsch // If set, CDB identified in CDBaddr port is given to UNDI.
    823  1.1  jakllsch // If not set, other bits in this word will be processed.
    824  1.1  jakllsch //
    825  1.1  jakllsch #define PXE_HWCMD_ISSUE_COMMAND             0x80000000
    826  1.1  jakllsch #define PXE_HWCMD_INTS_AND_FILTS                0x00000000
    827  1.1  jakllsch 
    828  1.1  jakllsch //
    829  1.1  jakllsch // Use these to enable/disable receive filters.
    830  1.1  jakllsch //
    831  1.1  jakllsch #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE       0x00001000
    832  1.1  jakllsch #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE         0x00000800
    833  1.1  jakllsch #define PXE_HWCMD_BROADCAST_RX_ENABLE           0x00000400
    834  1.1  jakllsch #define PXE_HWCMD_MULTICAST_RX_ENABLE           0x00000200
    835  1.1  jakllsch #define PXE_HWCMD_UNICAST_RX_ENABLE             0x00000100
    836  1.1  jakllsch 
    837  1.1  jakllsch //
    838  1.1  jakllsch // Use these to enable/disable external interrupts
    839  1.1  jakllsch //
    840  1.1  jakllsch #define PXE_HWCMD_SOFTWARE_INT_ENABLE           0x00000080
    841  1.1  jakllsch #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE            0x00000040
    842  1.1  jakllsch #define PXE_HWCMD_PACKET_RX_INT_ENABLE          0x00000020
    843  1.1  jakllsch #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE           0x00000010
    844  1.1  jakllsch 
    845  1.1  jakllsch //
    846  1.1  jakllsch // Use these to clear pending external interrupts
    847  1.1  jakllsch //
    848  1.1  jakllsch #define PXE_HWCMD_CLEAR_SOFTWARE_INT                0x00000008
    849  1.1  jakllsch #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT         0x00000004
    850  1.1  jakllsch #define PXE_HWCMD_CLEAR_PACKET_RX_INT           0x00000002
    851  1.1  jakllsch #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT            0x00000001
    852  1.1  jakllsch 
    853  1.1  jakllsch typedef struct s_pxe_sw_undi {
    854  1.1  jakllsch PXE_UINT32 Signature;       // PXE_ROMID_SIGNATURE
    855  1.1  jakllsch PXE_UINT8 Len;          // sizeof(PXE_SW_UNDI)
    856  1.1  jakllsch PXE_UINT8 Fudge;            // makes 8-bit cksum zero
    857  1.1  jakllsch PXE_UINT8 Rev;          // PXE_ROMID_REV
    858  1.1  jakllsch PXE_UINT8 IFcnt;            // physical connector count
    859  1.1  jakllsch PXE_UINT8 MajorVer;         // PXE_ROMID_MAJORVER
    860  1.1  jakllsch PXE_UINT8 MinorVer;         // PXE_ROMID_MINORVER
    861  1.1  jakllsch PXE_UINT16 reserved1;       // zero, not used
    862  1.1  jakllsch PXE_UINT32 Implementation;      // Implementation flags
    863  1.1  jakllsch PXE_UINT64 EntryPoint;      // API entry point
    864  1.1  jakllsch PXE_UINT8 reserved2[3];     // zero, not used
    865  1.1  jakllsch PXE_UINT8 BusCnt;           // number of bustypes supported
    866  1.1  jakllsch PXE_UINT32 BusType[1];      // list of supported bustypes
    867  1.1  jakllsch } PXE_SW_UNDI;
    868  1.1  jakllsch 
    869  1.1  jakllsch typedef union u_pxe_undi {
    870  1.1  jakllsch PXE_HW_UNDI hw;
    871  1.1  jakllsch PXE_SW_UNDI sw;
    872  1.1  jakllsch } PXE_UNDI;
    873  1.1  jakllsch 
    874  1.1  jakllsch //
    875  1.1  jakllsch // Signature of !PXE structure
    876  1.1  jakllsch //
    877  1.1  jakllsch #define PXE_ROMID_SIGNATURE     PXE_BUSTYPE('!', 'P', 'X', 'E')
    878  1.1  jakllsch 
    879  1.1  jakllsch //
    880  1.1  jakllsch // !PXE structure format revision
    881  1.1  jakllsch //
    882  1.1  jakllsch #define PXE_ROMID_REV                       0x02
    883  1.1  jakllsch 
    884  1.1  jakllsch //
    885  1.1  jakllsch // UNDI command interface revision.  These are the values that get sent
    886  1.1  jakllsch // in option 94 (Client Network Interface Identifier) in the DHCP Discover
    887  1.1  jakllsch // and PXE Boot Server Request packets.
    888  1.1  jakllsch //
    889  1.1  jakllsch #define PXE_ROMID_MAJORVER                  0x03
    890  1.1  jakllsch #define PXE_ROMID_MINORVER                  0x00
    891  1.1  jakllsch 
    892  1.1  jakllsch //
    893  1.1  jakllsch // Implementation flags
    894  1.1  jakllsch //
    895  1.1  jakllsch #define PXE_ROMID_IMP_HW_UNDI                   0x80000000
    896  1.1  jakllsch #define PXE_ROMID_IMP_SW_VIRT_ADDR              0x40000000
    897  1.1  jakllsch #define PXE_ROMID_IMP_64BIT_DEVICE              0x00010000
    898  1.1  jakllsch #define PXE_ROMID_IMP_FRAG_SUPPORTED                0x00008000
    899  1.1  jakllsch #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED            0x00004000
    900  1.1  jakllsch #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED           0x00002000
    901  1.1  jakllsch #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED         0x00001000
    902  1.1  jakllsch #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK           0x00000C00
    903  1.1  jakllsch #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE          0x00000C00
    904  1.1  jakllsch #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE        0x00000800
    905  1.1  jakllsch #define PXE_ROMID_IMP_NVDATA_READ_ONLY          0x00000400
    906  1.1  jakllsch #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE          0x00000000
    907  1.1  jakllsch #define PXE_ROMID_IMP_STATISTICS_SUPPORTED          0x00000200
    908  1.1  jakllsch #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE         0x00000100
    909  1.1  jakllsch #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED    0x00000080
    910  1.1  jakllsch #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED      0x00000040
    911  1.1  jakllsch #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED        0x00000020
    912  1.1  jakllsch #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED   0x00000010
    913  1.1  jakllsch #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED        0x00000008
    914  1.1  jakllsch #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED     0x00000004
    915  1.1  jakllsch #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED       0x00000002
    916  1.1  jakllsch #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED        0x00000001
    917  1.1  jakllsch 
    918  1.1  jakllsch 
    919  1.1  jakllsch typedef struct s_pxe_cdb {
    920  1.1  jakllsch PXE_OPCODE OpCode;
    921  1.1  jakllsch PXE_OPFLAGS OpFlags;
    922  1.1  jakllsch PXE_UINT16 CPBsize;
    923  1.1  jakllsch PXE_UINT16 DBsize;
    924  1.1  jakllsch UINT64 CPBaddr;
    925  1.1  jakllsch UINT64 DBaddr;
    926  1.1  jakllsch PXE_STATCODE StatCode;
    927  1.1  jakllsch PXE_STATFLAGS StatFlags;
    928  1.1  jakllsch PXE_UINT16 IFnum;
    929  1.1  jakllsch PXE_CONTROL Control;
    930  1.1  jakllsch } PXE_CDB;
    931  1.1  jakllsch 
    932  1.1  jakllsch 
    933  1.1  jakllsch typedef union u_pxe_ip_addr {
    934  1.1  jakllsch PXE_IPV6 IPv6;
    935  1.1  jakllsch PXE_IPV4 IPv4;
    936  1.1  jakllsch } PXE_IP_ADDR;
    937  1.1  jakllsch 
    938  1.1  jakllsch typedef union pxe_device {
    939  1.1  jakllsch //
    940  1.1  jakllsch // PCI and PC Card NICs are both identified using bus, device
    941  1.1  jakllsch // and function numbers.  For PC Card, this may require PC
    942  1.1  jakllsch // Card services to be loaded in the BIOS or preboot
    943  1.1  jakllsch // environment.
    944  1.1  jakllsch //
    945  1.1  jakllsch struct {
    946  1.1  jakllsch //
    947  1.1  jakllsch // See S/W UNDI ROMID structure definition for PCI and
    948  1.1  jakllsch // PCC BusType definitions.
    949  1.1  jakllsch //
    950  1.1  jakllsch PXE_UINT32 BusType;
    951  1.1  jakllsch 
    952  1.1  jakllsch //
    953  1.1  jakllsch // Bus, device & function numbers that locate this device.
    954  1.1  jakllsch //
    955  1.1  jakllsch PXE_UINT16 Bus;
    956  1.1  jakllsch PXE_UINT8 Device;
    957  1.1  jakllsch PXE_UINT8 Function;
    958  1.1  jakllsch } PCI, PCC;
    959  1.1  jakllsch 
    960  1.1  jakllsch //
    961  1.1  jakllsch // %%TBD - More information is needed about enumerating
    962  1.1  jakllsch // USB and 1394 devices.
    963  1.1  jakllsch //
    964  1.1  jakllsch struct {
    965  1.1  jakllsch PXE_UINT32 BusType;
    966  1.1  jakllsch PXE_UINT32 tdb;
    967  1.1  jakllsch } USB, _1394;
    968  1.1  jakllsch } PXE_DEVICE;
    969  1.1  jakllsch 
    970  1.1  jakllsch // cpb and db definitions
    971  1.1  jakllsch 
    972  1.1  jakllsch #define MAX_PCI_CONFIG_LEN 64   // # of dwords
    973  1.1  jakllsch #define MAX_EEPROM_LEN 128       // #of dwords
    974  1.1  jakllsch #define MAX_XMIT_BUFFERS    32  // recycling Q length for xmit_done
    975  1.1  jakllsch #define MAX_MCAST_ADDRESS_CNT 8
    976  1.1  jakllsch 
    977  1.1  jakllsch typedef struct s_pxe_cpb_start {
    978  1.1  jakllsch     //
    979  1.1  jakllsch     // PXE_VOID Delay(PXE_UINT64 microseconds);
    980  1.1  jakllsch     //
    981  1.1  jakllsch     // UNDI will never request a delay smaller than 10 microseconds
    982  1.1  jakllsch     // and will always request delays in increments of 10 microseconds.
    983  1.1  jakllsch     // The Delay() CallBack routine must delay between n and n + 10
    984  1.1  jakllsch     // microseconds before returning control to the UNDI.
    985  1.1  jakllsch     //
    986  1.1  jakllsch     // This field cannot be set to zero.
    987  1.1  jakllsch     //
    988  1.1  jakllsch     PXE_UINT64 Delay;
    989  1.1  jakllsch 
    990  1.1  jakllsch     //
    991  1.1  jakllsch     // PXE_VOID Block(PXE_UINT32 enable);
    992  1.1  jakllsch     //
    993  1.1  jakllsch     // UNDI may need to block multi-threaded/multi-processor access to
    994  1.1  jakllsch     // critical code sections when programming or accessing the network
    995  1.1  jakllsch     // device.  To this end, a blocking service is needed by the UNDI.
    996  1.1  jakllsch     // When UNDI needs a block, it will call Block() passing a non-zero
    997  1.1  jakllsch     // value.  When UNDI no longer needs a block, it will call Block()
    998  1.1  jakllsch     // with a zero value.  When called, if the Block() is already enabled,
    999  1.1  jakllsch     // do not return control to the UNDI until the previous Block() is
   1000  1.1  jakllsch     // disabled.
   1001  1.1  jakllsch     //
   1002  1.1  jakllsch     // This field cannot be set to zero.
   1003  1.1  jakllsch     //
   1004  1.1  jakllsch     PXE_UINT64 Block;
   1005  1.1  jakllsch 
   1006  1.1  jakllsch     //
   1007  1.1  jakllsch     // PXE_VOID Virt2Phys(PXE_UINT64 virtual, PXE_UINT64 physical_ptr);
   1008  1.1  jakllsch     //
   1009  1.1  jakllsch     // UNDI will pass the virtual address of a buffer and the virtual
   1010  1.1  jakllsch     // address of a 64-bit physical buffer.  Convert the virtual address
   1011  1.1  jakllsch     // to a physical address and write the result to the physical address
   1012  1.1  jakllsch     // buffer.  If virtual and physical addresses are the same, just
   1013  1.1  jakllsch     // copy the virtual address to the physical address buffer.
   1014  1.1  jakllsch     //
   1015  1.1  jakllsch     // This field can be set to zero if virtual and physical addresses
   1016  1.1  jakllsch     // are equal.
   1017  1.1  jakllsch     //
   1018  1.1  jakllsch     PXE_UINT64 Virt2Phys;
   1019  1.1  jakllsch     //
   1020  1.1  jakllsch     // PXE_VOID Mem_IO(PXE_UINT8 read_write, PXE_UINT8 len, PXE_UINT64 port,
   1021  1.1  jakllsch     //              PXE_UINT64 buf_addr);
   1022  1.1  jakllsch     //
   1023  1.1  jakllsch     // UNDI will read or write the device io space using this call back
   1024  1.1  jakllsch     // function. It passes the number of bytes as the len parameter and it
   1025  1.1  jakllsch     // will be either 1,2,4 or 8.
   1026  1.1  jakllsch     //
   1027  1.1  jakllsch     // This field can not be set to zero.
   1028  1.1  jakllsch     //
   1029  1.1  jakllsch     PXE_UINT64 Mem_IO;
   1030  1.1  jakllsch } PXE_CPB_START;
   1031  1.1  jakllsch 
   1032  1.1  jakllsch #define PXE_DELAY_MILLISECOND                   1000
   1033  1.1  jakllsch #define PXE_DELAY_SECOND                    1000000
   1034  1.1  jakllsch #define PXE_IO_READ                     0
   1035  1.1  jakllsch #define PXE_IO_WRITE                        1
   1036  1.1  jakllsch #define PXE_MEM_READ                        2
   1037  1.1  jakllsch #define PXE_MEM_WRITE                       4
   1038  1.1  jakllsch 
   1039  1.1  jakllsch 
   1040  1.1  jakllsch typedef struct s_pxe_db_get_init_info {
   1041  1.1  jakllsch     //
   1042  1.1  jakllsch     // Minimum length of locked memory buffer that must be given to
   1043  1.1  jakllsch     // the Initialize command. Giving UNDI more memory will generally
   1044  1.1  jakllsch     // give better performance.
   1045  1.1  jakllsch     //
   1046  1.1  jakllsch     // If MemoryRequired is zero, the UNDI does not need and will not
   1047  1.1  jakllsch     // use system memory to receive and transmit packets.
   1048  1.1  jakllsch     //
   1049  1.1  jakllsch     PXE_UINT32 MemoryRequired;
   1050  1.1  jakllsch 
   1051  1.1  jakllsch     //
   1052  1.1  jakllsch     // Maximum frame data length for Tx/Rx excluding the media header.
   1053  1.1  jakllsch     //
   1054  1.1  jakllsch     PXE_UINT32 FrameDataLen;
   1055  1.1  jakllsch 
   1056  1.1  jakllsch     //
   1057  1.1  jakllsch     // Supported link speeds are in units of mega bits.  Common ethernet
   1058  1.1  jakllsch     // values are 10, 100 and 1000.  Unused LinkSpeeds[] entries are zero
   1059  1.1  jakllsch     // filled.
   1060  1.1  jakllsch     //
   1061  1.1  jakllsch     PXE_UINT32 LinkSpeeds[4];
   1062  1.1  jakllsch 
   1063  1.1  jakllsch     //
   1064  1.1  jakllsch     // Number of non-volatile storage items.
   1065  1.1  jakllsch     //
   1066  1.1  jakllsch     PXE_UINT32 NvCount;
   1067  1.1  jakllsch 
   1068  1.1  jakllsch     //
   1069  1.1  jakllsch     // Width of non-volatile storage item in bytes.  0, 1, 2 or 4
   1070  1.1  jakllsch     //
   1071  1.1  jakllsch     PXE_UINT16 NvWidth;
   1072  1.1  jakllsch 
   1073  1.1  jakllsch     //
   1074  1.1  jakllsch     // Media header length.  This is the typical media header length for
   1075  1.1  jakllsch     // this UNDI.  This information is needed when allocating receive
   1076  1.1  jakllsch     // and transmit buffers.
   1077  1.1  jakllsch     //
   1078  1.1  jakllsch     PXE_UINT16 MediaHeaderLen;
   1079  1.1  jakllsch 
   1080  1.1  jakllsch     //
   1081  1.1  jakllsch     // Number of bytes in the NIC hardware (MAC) address.
   1082  1.1  jakllsch     //
   1083  1.1  jakllsch     PXE_UINT16 HWaddrLen;
   1084  1.1  jakllsch 
   1085  1.1  jakllsch     //
   1086  1.1  jakllsch     // Maximum number of multicast MAC addresses in the multicast
   1087  1.1  jakllsch     // MAC address filter list.
   1088  1.1  jakllsch     //
   1089  1.1  jakllsch     PXE_UINT16 MCastFilterCnt;
   1090  1.1  jakllsch 
   1091  1.1  jakllsch     //
   1092  1.1  jakllsch     // Default number and size of transmit and receive buffers that will
   1093  1.1  jakllsch     // be allocated by the UNDI.  If MemoryRequired is non-zero, this
   1094  1.1  jakllsch     // allocation will come out of the memory buffer given to the Initialize
   1095  1.1  jakllsch     // command.  If MemoryRequired is zero, this allocation will come out of
   1096  1.1  jakllsch     // memory on the NIC.
   1097  1.1  jakllsch     //
   1098  1.1  jakllsch     PXE_UINT16 TxBufCnt;
   1099  1.1  jakllsch     PXE_UINT16 TxBufSize;
   1100  1.1  jakllsch     PXE_UINT16 RxBufCnt;
   1101  1.1  jakllsch     PXE_UINT16 RxBufSize;
   1102  1.1  jakllsch 
   1103  1.1  jakllsch     //
   1104  1.1  jakllsch     // Hardware interface types defined in the Assigned Numbers RFC
   1105  1.1  jakllsch     // and used in DHCP and ARP packets.
   1106  1.1  jakllsch     // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
   1107  1.1  jakllsch     //
   1108  1.1  jakllsch     PXE_UINT8 IFtype;
   1109  1.1  jakllsch 
   1110  1.1  jakllsch     //
   1111  1.1  jakllsch     // Supported duplex.  See PXE_DUPLEX_xxxxx #defines below.
   1112  1.1  jakllsch     //
   1113  1.1  jakllsch     PXE_UINT8 Duplex;
   1114  1.1  jakllsch 
   1115  1.1  jakllsch     //
   1116  1.1  jakllsch     // Supported loopback options.  See PXE_LOOPBACK_xxxxx #defines below.
   1117  1.1  jakllsch     //
   1118  1.1  jakllsch     PXE_UINT8 LoopBack;
   1119  1.1  jakllsch } PXE_DB_GET_INIT_INFO;
   1120  1.1  jakllsch 
   1121  1.1  jakllsch #define PXE_MAX_TXRX_UNIT_ETHER             1500
   1122  1.1  jakllsch 
   1123  1.1  jakllsch #define PXE_HWADDR_LEN_ETHER                    0x0006
   1124  1.1  jakllsch #define PXE_MAC_HEADER_LEN_ETHER                0x000E
   1125  1.1  jakllsch 
   1126  1.1  jakllsch #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED            1
   1127  1.1  jakllsch #define PXE_DUPLEX_FORCE_FULL_SUPPORTED         2
   1128  1.1  jakllsch 
   1129  1.1  jakllsch #define PXE_LOOPBACK_INTERNAL_SUPPORTED         1
   1130  1.1  jakllsch #define PXE_LOOPBACK_EXTERNAL_SUPPORTED         2
   1131  1.1  jakllsch 
   1132  1.1  jakllsch 
   1133  1.1  jakllsch typedef struct s_pxe_pci_config_info {
   1134  1.1  jakllsch     //
   1135  1.1  jakllsch     // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
   1136  1.1  jakllsch     // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
   1137  1.1  jakllsch     //
   1138  1.1  jakllsch     PXE_UINT32 BusType;
   1139  1.1  jakllsch 
   1140  1.1  jakllsch     //
   1141  1.1  jakllsch     // This identifies the PCI network device that this UNDI interface
   1142  1.1  jakllsch     // is bound to.
   1143  1.1  jakllsch     //
   1144  1.1  jakllsch     PXE_UINT16 Bus;
   1145  1.1  jakllsch     PXE_UINT8 Device;
   1146  1.1  jakllsch     PXE_UINT8 Function;
   1147  1.1  jakllsch 
   1148  1.1  jakllsch     //
   1149  1.1  jakllsch     // This is a copy of the PCI configuration space for this
   1150  1.1  jakllsch     // network device.
   1151  1.1  jakllsch     //
   1152  1.1  jakllsch     union {
   1153  1.1  jakllsch         PXE_UINT8 Byte[256];
   1154  1.1  jakllsch         PXE_UINT16 Word[128];
   1155  1.1  jakllsch         PXE_UINT32 Dword[64];
   1156  1.1  jakllsch     } Config;
   1157  1.1  jakllsch } PXE_PCI_CONFIG_INFO;
   1158  1.1  jakllsch 
   1159  1.1  jakllsch 
   1160  1.1  jakllsch typedef struct s_pxe_pcc_config_info {
   1161  1.1  jakllsch     //
   1162  1.1  jakllsch     // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
   1163  1.1  jakllsch     // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
   1164  1.1  jakllsch     //
   1165  1.1  jakllsch     PXE_UINT32 BusType;
   1166  1.1  jakllsch 
   1167  1.1  jakllsch     //
   1168  1.1  jakllsch     // This identifies the PCC network device that this UNDI interface
   1169  1.1  jakllsch     // is bound to.
   1170  1.1  jakllsch     //
   1171  1.1  jakllsch     PXE_UINT16 Bus;
   1172  1.1  jakllsch     PXE_UINT8 Device;
   1173  1.1  jakllsch     PXE_UINT8 Function;
   1174  1.1  jakllsch 
   1175  1.1  jakllsch     //
   1176  1.1  jakllsch     // This is a copy of the PCC configuration space for this
   1177  1.1  jakllsch     // network device.
   1178  1.1  jakllsch     //
   1179  1.1  jakllsch     union {
   1180  1.1  jakllsch         PXE_UINT8 Byte[256];
   1181  1.1  jakllsch         PXE_UINT16 Word[128];
   1182  1.1  jakllsch         PXE_UINT32 Dword[64];
   1183  1.1  jakllsch     } Config;
   1184  1.1  jakllsch } PXE_PCC_CONFIG_INFO;
   1185  1.1  jakllsch 
   1186  1.1  jakllsch 
   1187  1.1  jakllsch typedef struct s_pxe_usb_config_info {
   1188  1.1  jakllsch     PXE_UINT32 BusType;
   1189  1.1  jakllsch     // %%TBD What should we return here...
   1190  1.1  jakllsch } PXE_USB_CONFIG_INFO;
   1191  1.1  jakllsch 
   1192  1.1  jakllsch 
   1193  1.1  jakllsch typedef struct s_pxe_1394_config_info {
   1194  1.1  jakllsch     PXE_UINT32 BusType;
   1195  1.1  jakllsch     // %%TBD What should we return here...
   1196  1.1  jakllsch } PXE_1394_CONFIG_INFO;
   1197  1.1  jakllsch 
   1198  1.1  jakllsch 
   1199  1.1  jakllsch typedef union u_pxe_db_get_config_info {
   1200  1.1  jakllsch     PXE_PCI_CONFIG_INFO pci;
   1201  1.1  jakllsch     PXE_PCC_CONFIG_INFO pcc;
   1202  1.1  jakllsch     PXE_USB_CONFIG_INFO usb;
   1203  1.1  jakllsch     PXE_1394_CONFIG_INFO _1394;
   1204  1.1  jakllsch } PXE_DB_GET_CONFIG_INFO;
   1205  1.1  jakllsch 
   1206  1.1  jakllsch 
   1207  1.1  jakllsch typedef struct s_pxe_cpb_initialize {
   1208  1.1  jakllsch     //
   1209  1.1  jakllsch     // Address of first (lowest) byte of the memory buffer.  This buffer must
   1210  1.1  jakllsch     // be in contiguous physical memory and cannot be swapped out.  The UNDI
   1211  1.1  jakllsch     // will be using this for transmit and receive buffering.
   1212  1.1  jakllsch     //
   1213  1.1  jakllsch     PXE_UINT64 MemoryAddr;
   1214  1.1  jakllsch 
   1215  1.1  jakllsch     //
   1216  1.1  jakllsch     // MemoryLength must be greater than or equal to MemoryRequired
   1217  1.1  jakllsch     // returned by the Get Init Info command.
   1218  1.1  jakllsch     //
   1219  1.1  jakllsch     PXE_UINT32 MemoryLength;
   1220  1.1  jakllsch 
   1221  1.1  jakllsch     //
   1222  1.1  jakllsch     // Desired link speed in Mbit/sec.  Common ethernet values are 10, 100
   1223  1.1  jakllsch     // and 1000.  Setting a value of zero will auto-detect and/or use the
   1224  1.1  jakllsch     // default link speed (operation depends on UNDI/NIC functionality).
   1225  1.1  jakllsch     //
   1226  1.1  jakllsch     PXE_UINT32 LinkSpeed;
   1227  1.1  jakllsch 
   1228  1.1  jakllsch     //
   1229  1.1  jakllsch     // Suggested number and size of receive and transmit buffers to
   1230  1.1  jakllsch     // allocate.  If MemoryAddr and MemoryLength are non-zero, this
   1231  1.1  jakllsch     // allocation comes out of the supplied memory buffer.  If MemoryAddr
   1232  1.1  jakllsch     // and MemoryLength are zero, this allocation comes out of memory
   1233  1.1  jakllsch     // on the NIC.
   1234  1.1  jakllsch     //
   1235  1.1  jakllsch     // If these fields are set to zero, the UNDI will allocate buffer
   1236  1.1  jakllsch     // counts and sizes as it sees fit.
   1237  1.1  jakllsch     //
   1238  1.1  jakllsch     PXE_UINT16 TxBufCnt;
   1239  1.1  jakllsch     PXE_UINT16 TxBufSize;
   1240  1.1  jakllsch     PXE_UINT16 RxBufCnt;
   1241  1.1  jakllsch     PXE_UINT16 RxBufSize;
   1242  1.1  jakllsch 
   1243  1.1  jakllsch     //
   1244  1.1  jakllsch     // The following configuration parameters are optional and must be zero
   1245  1.1  jakllsch     // to use the default values.
   1246  1.1  jakllsch     //
   1247  1.1  jakllsch     PXE_UINT8 Duplex;
   1248  1.1  jakllsch 
   1249  1.1  jakllsch     PXE_UINT8 LoopBack;
   1250  1.1  jakllsch } PXE_CPB_INITIALIZE;
   1251  1.1  jakllsch 
   1252  1.1  jakllsch 
   1253  1.1  jakllsch #define PXE_DUPLEX_DEFAULT                  0x00
   1254  1.1  jakllsch #define PXE_FORCE_FULL_DUPLEX                   0x01
   1255  1.1  jakllsch #define PXE_ENABLE_FULL_DUPLEX              0x02
   1256  1.1  jakllsch 
   1257  1.1  jakllsch #define LOOPBACK_NORMAL 0
   1258  1.1  jakllsch #define LOOPBACK_INTERNAL 1
   1259  1.1  jakllsch #define LOOPBACK_EXTERNAL 2
   1260  1.1  jakllsch 
   1261  1.1  jakllsch 
   1262  1.1  jakllsch typedef struct s_pxe_db_initialize {
   1263  1.1  jakllsch     //
   1264  1.1  jakllsch     // Actual amount of memory used from the supplied memory buffer.  This
   1265  1.1  jakllsch     // may be less that the amount of memory suppllied and may be zero if
   1266  1.1  jakllsch     // the UNDI and network device do not use external memory buffers.
   1267  1.1  jakllsch     //
   1268  1.1  jakllsch     // Memory used by the UNDI and network device is allocated from the
   1269  1.1  jakllsch     // lowest memory buffer address.
   1270  1.1  jakllsch     //
   1271  1.1  jakllsch     PXE_UINT32 MemoryUsed;
   1272  1.1  jakllsch 
   1273  1.1  jakllsch     //
   1274  1.1  jakllsch     // Actual number and size of receive and transmit buffers that were
   1275  1.1  jakllsch     // allocated.
   1276  1.1  jakllsch     //
   1277  1.1  jakllsch     PXE_UINT16 TxBufCnt;
   1278  1.1  jakllsch     PXE_UINT16 TxBufSize;
   1279  1.1  jakllsch     PXE_UINT16 RxBufCnt;
   1280  1.1  jakllsch     PXE_UINT16 RxBufSize;
   1281  1.1  jakllsch } PXE_DB_INITIALIZE;
   1282  1.1  jakllsch 
   1283  1.1  jakllsch 
   1284  1.1  jakllsch typedef struct s_pxe_cpb_receive_filters {
   1285  1.1  jakllsch     //
   1286  1.1  jakllsch     // List of multicast MAC addresses.  This list, if present, will
   1287  1.1  jakllsch     // replace the existing multicast MAC address filter list.
   1288  1.1  jakllsch     //
   1289  1.1  jakllsch     PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
   1290  1.1  jakllsch } PXE_CPB_RECEIVE_FILTERS;
   1291  1.1  jakllsch 
   1292  1.1  jakllsch 
   1293  1.1  jakllsch typedef struct s_pxe_db_receive_filters {
   1294  1.1  jakllsch     //
   1295  1.1  jakllsch     // Filtered multicast MAC address list.
   1296  1.1  jakllsch     //
   1297  1.1  jakllsch     PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
   1298  1.1  jakllsch } PXE_DB_RECEIVE_FILTERS;
   1299  1.1  jakllsch 
   1300  1.1  jakllsch 
   1301  1.1  jakllsch typedef struct s_pxe_cpb_station_address {
   1302  1.1  jakllsch     //
   1303  1.1  jakllsch     // If supplied and supported, the current station MAC address
   1304  1.1  jakllsch     // will be changed.
   1305  1.1  jakllsch     //
   1306  1.1  jakllsch     PXE_MAC_ADDR StationAddr;
   1307  1.1  jakllsch } PXE_CPB_STATION_ADDRESS;
   1308  1.1  jakllsch 
   1309  1.1  jakllsch 
   1310  1.1  jakllsch typedef struct s_pxe_dpb_station_address {
   1311  1.1  jakllsch     //
   1312  1.1  jakllsch     // Current station MAC address.
   1313  1.1  jakllsch     //
   1314  1.1  jakllsch     PXE_MAC_ADDR StationAddr;
   1315  1.1  jakllsch 
   1316  1.1  jakllsch     //
   1317  1.1  jakllsch     // Station broadcast MAC address.
   1318  1.1  jakllsch     //
   1319  1.1  jakllsch     PXE_MAC_ADDR BroadcastAddr;
   1320  1.1  jakllsch 
   1321  1.1  jakllsch     //
   1322  1.1  jakllsch     // Permanent station MAC address.
   1323  1.1  jakllsch     //
   1324  1.1  jakllsch     PXE_MAC_ADDR PermanentAddr;
   1325  1.1  jakllsch } PXE_DB_STATION_ADDRESS;
   1326  1.1  jakllsch 
   1327  1.1  jakllsch 
   1328  1.1  jakllsch typedef struct s_pxe_db_statistics {
   1329  1.1  jakllsch     //
   1330  1.1  jakllsch     // Bit field identifying what statistic data is collected by the
   1331  1.1  jakllsch     // UNDI/NIC.
   1332  1.1  jakllsch     // If bit 0x00 is set, Data[0x00] is collected.
   1333  1.1  jakllsch     // If bit 0x01 is set, Data[0x01] is collected.
   1334  1.1  jakllsch     // If bit 0x20 is set, Data[0x20] is collected.
   1335  1.1  jakllsch     // If bit 0x21 is set, Data[0x21] is collected.
   1336  1.1  jakllsch     // Etc.
   1337  1.1  jakllsch     //
   1338  1.1  jakllsch     PXE_UINT64 Supported;
   1339  1.1  jakllsch 
   1340  1.1  jakllsch     //
   1341  1.1  jakllsch     // Statistic data.
   1342  1.1  jakllsch     //
   1343  1.1  jakllsch     PXE_UINT64 Data[64];
   1344  1.1  jakllsch } PXE_DB_STATISTICS;
   1345  1.1  jakllsch 
   1346  1.1  jakllsch //
   1347  1.1  jakllsch // Total number of frames received.  Includes frames with errors and
   1348  1.1  jakllsch // dropped frames.
   1349  1.1  jakllsch //
   1350  1.1  jakllsch #define PXE_STATISTICS_RX_TOTAL_FRAMES          0x00
   1351  1.1  jakllsch 
   1352  1.1  jakllsch //
   1353  1.1  jakllsch // Number of valid frames received and copied into receive buffers.
   1354  1.1  jakllsch //
   1355  1.1  jakllsch #define PXE_STATISTICS_RX_GOOD_FRAMES           0x01
   1356  1.1  jakllsch 
   1357  1.1  jakllsch //
   1358  1.1  jakllsch // Number of frames below the minimum length for the media.
   1359  1.1  jakllsch // This would be <64 for ethernet.
   1360  1.1  jakllsch //
   1361  1.1  jakllsch #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES          0x02
   1362  1.1  jakllsch 
   1363  1.1  jakllsch //
   1364  1.1  jakllsch // Number of frames longer than the maxminum length for the
   1365  1.1  jakllsch // media.  This would be >1500 for ethernet.
   1366  1.1  jakllsch //
   1367  1.1  jakllsch #define PXE_STATISTICS_RX_OVERSIZE_FRAMES           0x03
   1368  1.1  jakllsch 
   1369  1.1  jakllsch //
   1370  1.1  jakllsch // Valid frames that were dropped because receive buffers were full.
   1371  1.1  jakllsch //
   1372  1.1  jakllsch #define PXE_STATISTICS_RX_DROPPED_FRAMES            0x04
   1373  1.1  jakllsch 
   1374  1.1  jakllsch //
   1375  1.1  jakllsch // Number of valid unicast frames received and not dropped.
   1376  1.1  jakllsch //
   1377  1.1  jakllsch #define PXE_STATISTICS_RX_UNICAST_FRAMES            0x05
   1378  1.1  jakllsch 
   1379  1.1  jakllsch //
   1380  1.1  jakllsch // Number of valid broadcast frames received and not dropped.
   1381  1.1  jakllsch //
   1382  1.1  jakllsch #define PXE_STATISTICS_RX_BROADCAST_FRAMES          0x06
   1383  1.1  jakllsch 
   1384  1.1  jakllsch //
   1385  1.1  jakllsch // Number of valid mutlicast frames received and not dropped.
   1386  1.1  jakllsch //
   1387  1.1  jakllsch #define PXE_STATISTICS_RX_MULTICAST_FRAMES          0x07
   1388  1.1  jakllsch 
   1389  1.1  jakllsch //
   1390  1.1  jakllsch // Number of frames w/ CRC or alignment errors.
   1391  1.1  jakllsch //
   1392  1.1  jakllsch #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES          0x08
   1393  1.1  jakllsch 
   1394  1.1  jakllsch //
   1395  1.1  jakllsch // Total number of bytes received.  Includes frames with errors
   1396  1.1  jakllsch // and dropped frames.
   1397  1.1  jakllsch //
   1398  1.1  jakllsch #define PXE_STATISTICS_RX_TOTAL_BYTES           0x09
   1399  1.1  jakllsch 
   1400  1.1  jakllsch //
   1401  1.1  jakllsch // Transmit statistics.
   1402  1.1  jakllsch //
   1403  1.1  jakllsch #define PXE_STATISTICS_TX_TOTAL_FRAMES          0x0A
   1404  1.1  jakllsch #define PXE_STATISTICS_TX_GOOD_FRAMES           0x0B
   1405  1.1  jakllsch #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES          0x0C
   1406  1.1  jakllsch #define PXE_STATISTICS_TX_OVERSIZE_FRAMES           0x0D
   1407  1.1  jakllsch #define PXE_STATISTICS_TX_DROPPED_FRAMES            0x0E
   1408  1.1  jakllsch #define PXE_STATISTICS_TX_UNICAST_FRAMES            0x0F
   1409  1.1  jakllsch #define PXE_STATISTICS_TX_BROADCAST_FRAMES          0x10
   1410  1.1  jakllsch #define PXE_STATISTICS_TX_MULTICAST_FRAMES          0x11
   1411  1.1  jakllsch #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES          0x12
   1412  1.1  jakllsch #define PXE_STATISTICS_TX_TOTAL_BYTES           0x13
   1413  1.1  jakllsch 
   1414  1.1  jakllsch //
   1415  1.1  jakllsch // Number of collisions detection on this subnet.
   1416  1.1  jakllsch //
   1417  1.1  jakllsch #define PXE_STATISTICS_COLLISIONS               0x14
   1418  1.1  jakllsch 
   1419  1.1  jakllsch //
   1420  1.1  jakllsch // Number of frames destined for unsupported protocol.
   1421  1.1  jakllsch //
   1422  1.1  jakllsch #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL         0x15
   1423  1.1  jakllsch 
   1424  1.1  jakllsch 
   1425  1.1  jakllsch typedef struct s_pxe_cpb_mcast_ip_to_mac {
   1426  1.1  jakllsch     //
   1427  1.1  jakllsch     // Multicast IP address to be converted to multicast MAC address.
   1428  1.1  jakllsch     //
   1429  1.1  jakllsch     PXE_IP_ADDR IP;
   1430  1.1  jakllsch } PXE_CPB_MCAST_IP_TO_MAC;
   1431  1.1  jakllsch 
   1432  1.1  jakllsch 
   1433  1.1  jakllsch typedef struct s_pxe_db_mcast_ip_to_mac {
   1434  1.1  jakllsch     //
   1435  1.1  jakllsch     // Multicast MAC address.
   1436  1.1  jakllsch     //
   1437  1.1  jakllsch     PXE_MAC_ADDR MAC;
   1438  1.1  jakllsch } PXE_DB_MCAST_IP_TO_MAC;
   1439  1.1  jakllsch 
   1440  1.1  jakllsch 
   1441  1.1  jakllsch typedef struct s_pxe_cpb_nvdata_sparse {
   1442  1.1  jakllsch     //
   1443  1.1  jakllsch     // NvData item list.  Only items in this list will be updated.
   1444  1.1  jakllsch     //
   1445  1.1  jakllsch     struct {
   1446  1.1  jakllsch         //  Non-volatile storage address to be changed.
   1447  1.1  jakllsch         PXE_UINT32 Addr;
   1448  1.1  jakllsch 
   1449  1.1  jakllsch         // Data item to write into above storage address.
   1450  1.1  jakllsch 
   1451  1.1  jakllsch         union {
   1452  1.1  jakllsch             PXE_UINT8 Byte;
   1453  1.1  jakllsch             PXE_UINT16 Word;
   1454  1.1  jakllsch             PXE_UINT32 Dword;
   1455  1.1  jakllsch         } Data;
   1456  1.1  jakllsch     } Item[MAX_EEPROM_LEN];
   1457  1.1  jakllsch } PXE_CPB_NVDATA_SPARSE;
   1458  1.1  jakllsch 
   1459  1.1  jakllsch 
   1460  1.1  jakllsch //
   1461  1.1  jakllsch // When using bulk update, the size of the CPB structure must be
   1462  1.1  jakllsch // the same size as the non-volatile NIC storage.
   1463  1.1  jakllsch //
   1464  1.1  jakllsch typedef union u_pxe_cpb_nvdata_bulk {
   1465  1.1  jakllsch     //
   1466  1.1  jakllsch     // Array of byte-wide data items.
   1467  1.1  jakllsch     //
   1468  1.1  jakllsch     PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
   1469  1.1  jakllsch 
   1470  1.1  jakllsch     //
   1471  1.1  jakllsch     // Array of word-wide data items.
   1472  1.1  jakllsch     //
   1473  1.1  jakllsch     PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
   1474  1.1  jakllsch 
   1475  1.1  jakllsch     //
   1476  1.1  jakllsch     // Array of dword-wide data items.
   1477  1.1  jakllsch     //
   1478  1.1  jakllsch     PXE_UINT32 Dword[MAX_EEPROM_LEN];
   1479  1.1  jakllsch } PXE_CPB_NVDATA_BULK;
   1480  1.1  jakllsch 
   1481  1.1  jakllsch typedef struct s_pxe_db_nvdata {
   1482  1.1  jakllsch 
   1483  1.1  jakllsch     // Arrays of data items from non-volatile storage.
   1484  1.1  jakllsch 
   1485  1.1  jakllsch     union {
   1486  1.1  jakllsch         //
   1487  1.1  jakllsch         // Array of byte-wide data items.
   1488  1.1  jakllsch         //
   1489  1.1  jakllsch         PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
   1490  1.1  jakllsch 
   1491  1.1  jakllsch         //
   1492  1.1  jakllsch         // Array of word-wide data items.
   1493  1.1  jakllsch         //
   1494  1.1  jakllsch         PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
   1495  1.1  jakllsch 
   1496  1.1  jakllsch         // Array of dword-wide data items.
   1497  1.1  jakllsch 
   1498  1.1  jakllsch         PXE_UINT32 Dword[MAX_EEPROM_LEN];
   1499  1.1  jakllsch     } Data;
   1500  1.1  jakllsch } PXE_DB_NVDATA;
   1501  1.1  jakllsch 
   1502  1.1  jakllsch 
   1503  1.1  jakllsch typedef struct s_pxe_db_get_status {
   1504  1.1  jakllsch     //
   1505  1.1  jakllsch     // Length of next receive frame (header + data).  If this is zero,
   1506  1.1  jakllsch     // there is no next receive frame available.
   1507  1.1  jakllsch     //
   1508  1.1  jakllsch     PXE_UINT32 RxFrameLen;
   1509  1.1  jakllsch 
   1510  1.1  jakllsch     //
   1511  1.1  jakllsch     // Reserved, set to zero.
   1512  1.1  jakllsch     //
   1513  1.1  jakllsch     PXE_UINT32 reserved;
   1514  1.1  jakllsch 
   1515  1.1  jakllsch     //
   1516  1.1  jakllsch     //  Addresses of transmitted buffers that need to be recycled.
   1517  1.1  jakllsch     //
   1518  1.1  jakllsch     PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
   1519  1.1  jakllsch } PXE_DB_GET_STATUS;
   1520  1.1  jakllsch 
   1521  1.1  jakllsch 
   1522  1.1  jakllsch 
   1523  1.1  jakllsch typedef struct s_pxe_cpb_fill_header {
   1524  1.1  jakllsch     //
   1525  1.1  jakllsch     // Source and destination MAC addresses.  These will be copied into
   1526  1.1  jakllsch     // the media header without doing byte swapping.
   1527  1.1  jakllsch     //
   1528  1.1  jakllsch     PXE_MAC_ADDR SrcAddr;
   1529  1.1  jakllsch     PXE_MAC_ADDR DestAddr;
   1530  1.1  jakllsch 
   1531  1.1  jakllsch     //
   1532  1.1  jakllsch     // Address of first byte of media header.  The first byte of packet data
   1533  1.1  jakllsch     // follows the last byte of the media header.
   1534  1.1  jakllsch     //
   1535  1.1  jakllsch     PXE_UINT64 MediaHeader;
   1536  1.1  jakllsch 
   1537  1.1  jakllsch     //
   1538  1.1  jakllsch     // Length of packet data in bytes (not including the media header).
   1539  1.1  jakllsch     //
   1540  1.1  jakllsch     PXE_UINT32 PacketLen;
   1541  1.1  jakllsch 
   1542  1.1  jakllsch     //
   1543  1.1  jakllsch     // Protocol type.  This will be copied into the media header without
   1544  1.1  jakllsch     // doing byte swapping.  Protocol type numbers can be obtained from
   1545  1.1  jakllsch     // the Assigned Numbers RFC 1700.
   1546  1.1  jakllsch     //
   1547  1.1  jakllsch     PXE_UINT16 Protocol;
   1548  1.1  jakllsch 
   1549  1.1  jakllsch     //
   1550  1.1  jakllsch     // Length of the media header in bytes.
   1551  1.1  jakllsch     //
   1552  1.1  jakllsch     PXE_UINT16 MediaHeaderLen;
   1553  1.1  jakllsch } PXE_CPB_FILL_HEADER;
   1554  1.1  jakllsch 
   1555  1.1  jakllsch 
   1556  1.1  jakllsch #define PXE_PROTOCOL_ETHERNET_IP                0x0800
   1557  1.1  jakllsch #define PXE_PROTOCOL_ETHERNET_ARP               0x0806
   1558  1.1  jakllsch #define MAX_XMIT_FRAGMENTS 16
   1559  1.1  jakllsch 
   1560  1.1  jakllsch typedef struct s_pxe_cpb_fill_header_fragmented {
   1561  1.1  jakllsch     //
   1562  1.1  jakllsch     // Source and destination MAC addresses.  These will be copied into
   1563  1.1  jakllsch     // the media header without doing byte swapping.
   1564  1.1  jakllsch     //
   1565  1.1  jakllsch     PXE_MAC_ADDR SrcAddr;
   1566  1.1  jakllsch     PXE_MAC_ADDR DestAddr;
   1567  1.1  jakllsch 
   1568  1.1  jakllsch     //
   1569  1.1  jakllsch     // Length of packet data in bytes (not including the media header).
   1570  1.1  jakllsch     //
   1571  1.1  jakllsch     PXE_UINT32 PacketLen;
   1572  1.1  jakllsch 
   1573  1.1  jakllsch     //
   1574  1.1  jakllsch     // Protocol type.  This will be copied into the media header without
   1575  1.1  jakllsch     // doing byte swapping.  Protocol type numbers can be obtained from
   1576  1.1  jakllsch     // the Assigned Numbers RFC 1700.
   1577  1.1  jakllsch     //
   1578  1.1  jakllsch     PXE_MEDIA_PROTOCOL Protocol;
   1579  1.1  jakllsch 
   1580  1.1  jakllsch     //
   1581  1.1  jakllsch     // Length of the media header in bytes.
   1582  1.1  jakllsch     //
   1583  1.1  jakllsch     PXE_UINT16 MediaHeaderLen;
   1584  1.1  jakllsch 
   1585  1.1  jakllsch     //
   1586  1.1  jakllsch     // Number of packet fragment descriptors.
   1587  1.1  jakllsch     //
   1588  1.1  jakllsch     PXE_UINT16 FragCnt;
   1589  1.1  jakllsch 
   1590  1.1  jakllsch     //
   1591  1.1  jakllsch     // Reserved, must be set to zero.
   1592  1.1  jakllsch     //
   1593  1.1  jakllsch     PXE_UINT16 reserved;
   1594  1.1  jakllsch 
   1595  1.1  jakllsch     //
   1596  1.1  jakllsch     // Array of packet fragment descriptors.  The first byte of the media
   1597  1.1  jakllsch     // header is the first byte of the first fragment.
   1598  1.1  jakllsch     //
   1599  1.1  jakllsch     struct {
   1600  1.1  jakllsch         //
   1601  1.1  jakllsch         // Address of this packet fragment.
   1602  1.1  jakllsch         //
   1603  1.1  jakllsch         PXE_UINT64 FragAddr;
   1604  1.1  jakllsch 
   1605  1.1  jakllsch         //
   1606  1.1  jakllsch         // Length of this packet fragment.
   1607  1.1  jakllsch         //
   1608  1.1  jakllsch         PXE_UINT32 FragLen;
   1609  1.1  jakllsch 
   1610  1.1  jakllsch         //
   1611  1.1  jakllsch         // Reserved, must be set to zero.
   1612  1.1  jakllsch         //
   1613  1.1  jakllsch         PXE_UINT32 reserved;
   1614  1.1  jakllsch     } FragDesc[MAX_XMIT_FRAGMENTS];
   1615  1.1  jakllsch } PXE_CPB_FILL_HEADER_FRAGMENTED;
   1616  1.1  jakllsch 
   1617  1.1  jakllsch 
   1618  1.1  jakllsch 
   1619  1.1  jakllsch typedef struct s_pxe_cpb_transmit {
   1620  1.1  jakllsch     //
   1621  1.1  jakllsch     // Address of first byte of frame buffer.  This is also the first byte
   1622  1.1  jakllsch     // of the media header.
   1623  1.1  jakllsch     //
   1624  1.1  jakllsch     PXE_UINT64 FrameAddr;
   1625  1.1  jakllsch 
   1626  1.1  jakllsch     //
   1627  1.1  jakllsch     // Length of the data portion of the frame buffer in bytes.  Do not
   1628  1.1  jakllsch     // include the length of the media header.
   1629  1.1  jakllsch     //
   1630  1.1  jakllsch     PXE_UINT32 DataLen;
   1631  1.1  jakllsch 
   1632  1.1  jakllsch     //
   1633  1.1  jakllsch     // Length of the media header in bytes.
   1634  1.1  jakllsch     //
   1635  1.1  jakllsch     PXE_UINT16 MediaheaderLen;
   1636  1.1  jakllsch 
   1637  1.1  jakllsch     //
   1638  1.1  jakllsch     // Reserved, must be zero.
   1639  1.1  jakllsch     //
   1640  1.1  jakllsch     PXE_UINT16 reserved;
   1641  1.1  jakllsch } PXE_CPB_TRANSMIT;
   1642  1.1  jakllsch 
   1643  1.1  jakllsch 
   1644  1.1  jakllsch 
   1645  1.1  jakllsch typedef struct s_pxe_cpb_transmit_fragments {
   1646  1.1  jakllsch     //
   1647  1.1  jakllsch     // Length of packet data in bytes (not including the media header).
   1648  1.1  jakllsch     //
   1649  1.1  jakllsch     PXE_UINT32 FrameLen;
   1650  1.1  jakllsch 
   1651  1.1  jakllsch     //
   1652  1.1  jakllsch     // Length of the media header in bytes.
   1653  1.1  jakllsch     //
   1654  1.1  jakllsch     PXE_UINT16 MediaheaderLen;
   1655  1.1  jakllsch 
   1656  1.1  jakllsch     //
   1657  1.1  jakllsch     // Number of packet fragment descriptors.
   1658  1.1  jakllsch     //
   1659  1.1  jakllsch     PXE_UINT16 FragCnt;
   1660  1.1  jakllsch 
   1661  1.1  jakllsch     //
   1662  1.1  jakllsch     // Array of frame fragment descriptors.  The first byte of the first
   1663  1.1  jakllsch     // fragment is also the first byte of the media header.
   1664  1.1  jakllsch     //
   1665  1.1  jakllsch     struct {
   1666  1.1  jakllsch         //
   1667  1.1  jakllsch         // Address of this frame fragment.
   1668  1.1  jakllsch         //
   1669  1.1  jakllsch         PXE_UINT64 FragAddr;
   1670  1.1  jakllsch 
   1671  1.1  jakllsch         //
   1672  1.1  jakllsch         // Length of this frame fragment.
   1673  1.1  jakllsch         //
   1674  1.1  jakllsch         PXE_UINT32 FragLen;
   1675  1.1  jakllsch 
   1676  1.1  jakllsch         //
   1677  1.1  jakllsch         // Reserved, must be set to zero.
   1678  1.1  jakllsch         //
   1679  1.1  jakllsch         PXE_UINT32 reserved;
   1680  1.1  jakllsch     } FragDesc[MAX_XMIT_FRAGMENTS];
   1681  1.1  jakllsch } PXE_CPB_TRANSMIT_FRAGMENTS;
   1682  1.1  jakllsch 
   1683  1.1  jakllsch 
   1684  1.1  jakllsch typedef struct s_pxe_cpb_receive {
   1685  1.1  jakllsch     //
   1686  1.1  jakllsch     // Address of first byte of receive buffer.  This is also the first byte
   1687  1.1  jakllsch     // of the frame header.
   1688  1.1  jakllsch     //
   1689  1.1  jakllsch     PXE_UINT64 BufferAddr;
   1690  1.1  jakllsch 
   1691  1.1  jakllsch     //
   1692  1.1  jakllsch     // Length of receive buffer.  This must be large enough to hold the
   1693  1.1  jakllsch     // received frame (media header + data).  If the length of smaller than
   1694  1.1  jakllsch     // the received frame, data will be lost.
   1695  1.1  jakllsch     //
   1696  1.1  jakllsch     PXE_UINT32 BufferLen;
   1697  1.1  jakllsch 
   1698  1.1  jakllsch     //
   1699  1.1  jakllsch     // Reserved, must be set to zero.
   1700  1.1  jakllsch     //
   1701  1.1  jakllsch     PXE_UINT32 reserved;
   1702  1.1  jakllsch } PXE_CPB_RECEIVE;
   1703  1.1  jakllsch 
   1704  1.1  jakllsch 
   1705  1.1  jakllsch typedef struct s_pxe_db_receive {
   1706  1.1  jakllsch     //
   1707  1.1  jakllsch     // Source and destination MAC addresses from media header.
   1708  1.1  jakllsch     //
   1709  1.1  jakllsch     PXE_MAC_ADDR SrcAddr;
   1710  1.1  jakllsch     PXE_MAC_ADDR DestAddr;
   1711  1.1  jakllsch 
   1712  1.1  jakllsch     //
   1713  1.1  jakllsch     // Length of received frame.  May be larger than receive buffer size.
   1714  1.1  jakllsch     // The receive buffer will not be overwritten.  This is how to tell
   1715  1.1  jakllsch     // if data was lost because the receive buffer was too small.
   1716  1.1  jakllsch     //
   1717  1.1  jakllsch     PXE_UINT32 FrameLen;
   1718  1.1  jakllsch 
   1719  1.1  jakllsch     //
   1720  1.1  jakllsch     // Protocol type from media header.
   1721  1.1  jakllsch     //
   1722  1.1  jakllsch     PXE_MEDIA_PROTOCOL Protocol;
   1723  1.1  jakllsch 
   1724  1.1  jakllsch     //
   1725  1.1  jakllsch     // Length of media header in received frame.
   1726  1.1  jakllsch     //
   1727  1.1  jakllsch     PXE_UINT16 MediaHeaderLen;
   1728  1.1  jakllsch 
   1729  1.1  jakllsch     //
   1730  1.1  jakllsch     // Type of receive frame.
   1731  1.1  jakllsch     //
   1732  1.1  jakllsch     PXE_FRAME_TYPE Type;
   1733  1.1  jakllsch 
   1734  1.1  jakllsch     //
   1735  1.1  jakllsch     // Reserved, must be zero.
   1736  1.1  jakllsch     //
   1737  1.1  jakllsch     PXE_UINT8 reserved[7];
   1738  1.1  jakllsch 
   1739  1.1  jakllsch } PXE_DB_RECEIVE;
   1740  1.1  jakllsch 
   1741  1.1  jakllsch #pragma pack()
   1742  1.1  jakllsch 
   1743  1.1  jakllsch /* EOF - efi_pxe.h */
   1744  1.1  jakllsch #endif /* _EFI_PXE_H */
   1745  1.1  jakllsch 
   1746