efi_pxe.h revision 1.1
1 /* $NetBSD: efi_pxe.h,v 1.1 2014/04/01 16:16:07 jakllsch Exp $ */ 2 3 #ifndef _EFI_PXE_H 4 #define _EFI_PXE_H 5 6 7 /*++ 8 Copyright (c) Intel 1999 9 10 Module name: 11 efi_pxe.h 12 13 32/64-bit PXE specification: 14 alpha-4, 99-Dec-17 15 16 Abstract: 17 This header file contains all of the PXE type definitions, 18 structure prototypes, global variables and constants that 19 are needed for porting PXE to EFI. 20 --*/ 21 22 #pragma pack(1) 23 24 #define PXE_INTEL_ORDER 1 // Intel order 25 //#define PXE_NETWORK_ORDER 1 // network order 26 27 #define PXE_UINT64_SUPPORT 1 // UINT64 supported 28 //#define PXE_NO_UINT64_SUPPORT 1 // UINT64 not supported 29 30 #define PXE_BUSTYPE(a,b,c,d) \ 31 ((((PXE_UINT32)(d) & 0xFF) << 24) | \ 32 (((PXE_UINT32)(c) & 0xFF) << 16) | \ 33 (((PXE_UINT32)(b) & 0xFF) << 8) | \ 34 ((PXE_UINT32)(a) & 0xFF)) 35 36 // 37 // UNDI ROM ID and devive ID signature 38 // 39 #define PXE_BUSTYPE_PXE PXE_BUSTYPE('!', 'P', 'X', 'E') 40 41 // 42 // BUS ROM ID signatures 43 // 44 #define PXE_BUSTYPE_PCI PXE_BUSTYPE('P', 'C', 'I', 'R') 45 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE('P', 'C', 'C', 'R') 46 #define PXE_BUSTYPE_USB PXE_BUSTYPE('U', 'S', 'B', 'R') 47 #define PXE_BUSTYPE_1394 PXE_BUSTYPE('1', '3', '9', '4') 48 49 #define PXE_SWAP_UINT16(n) \ 50 ((((PXE_UINT16)(n) & 0x00FF) << 8) | \ 51 (((PXE_UINT16)(n) & 0xFF00) >> 8)) 52 53 #define PXE_SWAP_UINT32(n) \ 54 ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \ 55 (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \ 56 (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \ 57 (((PXE_UINT32)(n) & 0xFF000000) >> 24)) 58 59 #if PXE_UINT64_SUPPORT != 0 60 #define PXE_SWAP_UINT64(n) \ 61 ((((PXE_UINT64)(n) & 0x00000000000000FF) << 56) | \ 62 (((PXE_UINT64)(n) & 0x000000000000FF00) << 40) | \ 63 (((PXE_UINT64)(n) & 0x0000000000FF0000) << 24) | \ 64 (((PXE_UINT64)(n) & 0x00000000FF000000) << 8) | \ 65 (((PXE_UINT64)(n) & 0x000000FF00000000) >> 8) | \ 66 (((PXE_UINT64)(n) & 0x0000FF0000000000) >> 24) | \ 67 (((PXE_UINT64)(n) & 0x00FF000000000000) >> 40) | \ 68 (((PXE_UINT64)(n) & 0xFF00000000000000) >> 56)) 69 #endif // PXE_UINT64_SUPPORT 70 71 #if PXE_NO_UINT64_SUPPORT != 0 72 #define PXE_SWAP_UINT64(n) \ 73 { \ 74 PXE_UINT32 tmp = (PXE_UINT64)(n)[1]; \ 75 (PXE_UINT64)(n)[1] = PXE_SWAP_UINT32((PXE_UINT64)(n)[0]); \ 76 (PXE_UINT64)(n)[0] = tmp; \ 77 } 78 #endif // PXE_NO_UINT64_SUPPORT 79 80 #define PXE_CPBSIZE_NOT_USED 0 // zero 81 #define PXE_DBSIZE_NOT_USED 0 // zero 82 #define PXE_CPBADDR_NOT_USED (PXE_UINT64)0 // zero 83 #define PXE_DBADDR_NOT_USED (PXE_UINT64)0 // zero 84 85 #define PXE_CONST const 86 87 #define PXE_VOLATILE volatile 88 89 typedef void PXE_VOID; 90 91 typedef unsigned char PXE_UINT8; 92 93 typedef unsigned short PXE_UINT16; 94 95 typedef unsigned PXE_UINT32; 96 97 #if PXE_UINT64_SUPPORT != 0 98 // typedef unsigned long PXE_UINT64; 99 typedef UINT64 PXE_UINT64; 100 #endif // PXE_UINT64_SUPPORT 101 102 #if PXE_NO_UINT64_SUPPORT != 0 103 typedef PXE_UINT32 PXE_UINT64[2]; 104 #endif // PXE_NO_UINT64_SUPPORT 105 106 typedef unsigned PXE_UINTN; 107 108 typedef PXE_UINT8 PXE_BOOL; 109 110 #define PXE_FALSE 0 // zero 111 #define PXE_TRUE (!PXE_FALSE) 112 113 typedef PXE_UINT16 PXE_OPCODE; 114 115 // 116 // Return UNDI operational state. 117 // 118 #define PXE_OPCODE_GET_STATE 0x0000 119 120 // 121 // Change UNDI operational state from Stopped to Started. 122 // 123 #define PXE_OPCODE_START 0x0001 124 125 // 126 // Change UNDI operational state from Started to Stopped. 127 // 128 #define PXE_OPCODE_STOP 0x0002 129 130 // 131 // Get UNDI initialization information. 132 // 133 #define PXE_OPCODE_GET_INIT_INFO 0x0003 134 135 // 136 // Get NIC configuration information. 137 // 138 #define PXE_OPCODE_GET_CONFIG_INFO 0x0004 139 140 // 141 // Changed UNDI operational state from Started to Initialized. 142 // 143 #define PXE_OPCODE_INITIALIZE 0x0005 144 145 // 146 // Re-initialize the NIC H/W. 147 // 148 #define PXE_OPCODE_RESET 0x0006 149 150 // 151 // Change the UNDI operational state from Initialized to Started. 152 // 153 #define PXE_OPCODE_SHUTDOWN 0x0007 154 155 // 156 // Read & change state of external interrupt enables. 157 // 158 #define PXE_OPCODE_INTERRUPT_ENABLES 0x0008 159 160 // 161 // Read & change state of packet receive filters. 162 // 163 #define PXE_OPCODE_RECEIVE_FILTERS 0x0009 164 165 // 166 // Read & change station MAC address. 167 // 168 #define PXE_OPCODE_STATION_ADDRESS 0x000A 169 170 // 171 // Read traffic statistics. 172 // 173 #define PXE_OPCODE_STATISTICS 0x000B 174 175 // 176 // Convert multicast IP address to multicast MAC address. 177 // 178 #define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C 179 180 // 181 // Read or change non-volatile storage on the NIC. 182 // 183 #define PXE_OPCODE_NVDATA 0x000D 184 185 // 186 // Get & clear interrupt status. 187 // 188 #define PXE_OPCODE_GET_STATUS 0x000E 189 190 // 191 // Fill media header in packet for transmit. 192 // 193 #define PXE_OPCODE_FILL_HEADER 0x000F 194 195 // 196 // Transmit packet(s). 197 // 198 #define PXE_OPCODE_TRANSMIT 0x0010 199 200 // 201 // Receive packet. 202 // 203 #define PXE_OPCODE_RECEIVE 0x0011 204 205 // last valid opcode: 206 #define PXE_OPCODE_VALID_MAX 0x0011 207 208 // 209 // Last valid PXE UNDI OpCode number. 210 // 211 #define PXE_OPCODE_LAST_VALID 0x0011 212 213 typedef PXE_UINT16 PXE_OPFLAGS; 214 215 #define PXE_OPFLAGS_NOT_USED 0x0000 216 217 //////////////////////////////////////// 218 // UNDI Get State 219 // 220 221 // No OpFlags 222 223 //////////////////////////////////////// 224 // UNDI Start 225 // 226 227 // No OpFlags 228 229 //////////////////////////////////////// 230 // UNDI Stop 231 // 232 233 // No OpFlags 234 235 //////////////////////////////////////// 236 // UNDI Get Init Info 237 // 238 239 // No Opflags 240 241 //////////////////////////////////////// 242 // UNDI Get Config Info 243 // 244 245 // No Opflags 246 247 //////////////////////////////////////// 248 // UNDI Initialize 249 // 250 251 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001 252 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000 253 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001 254 255 //////////////////////////////////////// 256 // UNDI Reset 257 // 258 259 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001 260 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002 261 262 //////////////////////////////////////// 263 // UNDI Shutdown 264 // 265 266 // No OpFlags 267 268 //////////////////////////////////////// 269 // UNDI Interrupt Enables 270 // 271 272 // 273 // Select whether to enable or disable external interrupt signals. 274 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS. 275 // 276 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000 277 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000 278 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000 279 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000 280 281 // 282 // Enable receive interrupts. An external interrupt will be generated 283 // after a complete non-error packet has been received. 284 // 285 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001 286 287 // 288 // Enable transmit interrupts. An external interrupt will be generated 289 // after a complete non-error packet has been transmitted. 290 // 291 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002 292 293 // 294 // Enable command interrupts. An external interrupt will be generated 295 // when command execution stops. 296 // 297 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004 298 299 // 300 // Generate software interrupt. Setting this bit generates an external 301 // interrupt, if it is supported by the hardware. 302 // 303 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008 304 305 //////////////////////////////////////// 306 // UNDI Receive Filters 307 // 308 309 // 310 // Select whether to enable or disable receive filters. 311 // Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE. 312 // 313 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000 314 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000 315 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000 316 #define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000 317 318 // 319 // To reset the contents of the multicast MAC address filter list, 320 // set this OpFlag: 321 // 322 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000 323 324 // 325 // Enable unicast packet receiving. Packets sent to the current station 326 // MAC address will be received. 327 // 328 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001 329 330 // 331 // Enable broadcast packet receiving. Packets sent to the broadcast 332 // MAC address will be received. 333 // 334 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 335 336 // 337 // Enable filtered multicast packet receiving. Packets sent to any 338 // of the multicast MAC addresses in the multicast MAC address filter 339 // list will be received. If the filter list is empty, no multicast 340 // 341 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 342 343 // 344 // Enable promiscuous packet receiving. All packets will be received. 345 // 346 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 347 348 // 349 // Enable promiscuous multicast packet receiving. All multicast 350 // packets will be received. 351 // 352 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 353 354 //////////////////////////////////////// 355 // UNDI Station Address 356 // 357 358 #define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000 359 #define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001 360 361 //////////////////////////////////////// 362 // UNDI Statistics 363 // 364 365 #define PXE_OPFLAGS_STATISTICS_READ 0x0000 366 #define PXE_OPFLAGS_STATISTICS_RESET 0x0001 367 368 //////////////////////////////////////// 369 // UNDI MCast IP to MAC 370 // 371 372 // 373 // Identify the type of IP address in the CPB. 374 // 375 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003 376 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000 377 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001 378 379 //////////////////////////////////////// 380 // UNDI NvData 381 // 382 383 // 384 // Select the type of non-volatile data operation. 385 // 386 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001 387 #define PXE_OPFLAGS_NVDATA_READ 0x0000 388 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001 389 390 //////////////////////////////////////// 391 // UNDI Get Status 392 // 393 394 // 395 // Return current interrupt status. This will also clear any interrupts 396 // that are currently set. This can be used in a polling routine. The 397 // interrupt flags are still set and cleared even when the interrupts 398 // are disabled. 399 // 400 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001 401 402 // 403 // Return list of transmitted buffers for recycling. Transmit buffers 404 // must not be changed or unallocated until they have recycled. After 405 // issuing a transmit command, wait for a transmit complete interrupt. 406 // When a transmit complete interrupt is received, read the transmitted 407 // buffers. Do not plan on getting one buffer per interrupt. Some 408 // NICs and UNDIs may transmit multiple buffers per interrupt. 409 // 410 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002 411 412 //////////////////////////////////////// 413 // UNDI Fill Header 414 // 415 416 #define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001 417 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001 418 #define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000 419 420 //////////////////////////////////////// 421 // UNDI Transmit 422 // 423 424 // 425 // S/W UNDI only. Return after the packet has been transmitted. A 426 // transmit complete interrupt will still be generated and the transmit 427 // buffer will have to be recycled. 428 // 429 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001 430 #define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001 431 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000 432 433 // 434 // 435 // 436 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002 437 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002 438 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000 439 440 //////////////////////////////////////// 441 // UNDI Receive 442 // 443 444 // No OpFlags 445 446 typedef PXE_UINT16 PXE_STATFLAGS; 447 448 #define PXE_STATFLAGS_INITIALIZE 0x0000 449 450 //////////////////////////////////////// 451 // Common StatFlags that can be returned by all commands. 452 // 453 454 // 455 // The COMMAND_COMPLETE and COMMAND_FAILED status flags must be 456 // implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs 457 // that support command queuing. 458 // 459 #define PXE_STATFLAGS_STATUS_MASK 0xC000 460 #define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000 461 #define PXE_STATFLAGS_COMMAND_FAILED 0x8000 462 #define PXE_STATFLAGS_COMMAND_QUEUED 0x4000 463 //#define PXE_STATFLAGS_INITIALIZE 0x0000 464 465 #define PXE_STATFLAGS_DB_WRITE_TRUNCATED 0x2000 466 467 //////////////////////////////////////// 468 // UNDI Get State 469 // 470 471 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003 472 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002 473 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001 474 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000 475 476 //////////////////////////////////////// 477 // UNDI Start 478 // 479 480 // No additional StatFlags 481 482 //////////////////////////////////////// 483 // UNDI Get Init Info 484 // 485 486 #define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001 487 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000 488 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001 489 490 491 //////////////////////////////////////// 492 // UNDI Initialize 493 // 494 495 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001 496 497 //////////////////////////////////////// 498 // UNDI Reset 499 // 500 501 #define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001 502 503 //////////////////////////////////////// 504 // UNDI Shutdown 505 // 506 507 // No additional StatFlags 508 509 //////////////////////////////////////// 510 // UNDI Interrupt Enables 511 // 512 513 // 514 // If set, receive interrupts are enabled. 515 // 516 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001 517 518 // 519 // If set, transmit interrupts are enabled. 520 // 521 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002 522 523 // 524 // If set, command interrupts are enabled. 525 // 526 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004 527 528 529 //////////////////////////////////////// 530 // UNDI Receive Filters 531 // 532 533 // 534 // If set, unicast packets will be received. 535 // 536 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001 537 538 // 539 // If set, broadcast packets will be received. 540 // 541 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 542 543 // 544 // If set, multicast packets that match up with the multicast address 545 // filter list will be received. 546 // 547 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 548 549 // 550 // If set, all packets will be received. 551 // 552 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 553 554 // 555 // If set, all multicast packets will be received. 556 // 557 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 558 559 //////////////////////////////////////// 560 // UNDI Station Address 561 // 562 563 // No additional StatFlags 564 565 //////////////////////////////////////// 566 // UNDI Statistics 567 // 568 569 // No additional StatFlags 570 571 //////////////////////////////////////// 572 // UNDI MCast IP to MAC 573 // 574 575 // No additional StatFlags 576 577 //////////////////////////////////////// 578 // UNDI NvData 579 // 580 581 // No additional StatFlags 582 583 584 //////////////////////////////////////// 585 // UNDI Get Status 586 // 587 588 // 589 // Use to determine if an interrupt has occurred. 590 // 591 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F 592 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000 593 594 // 595 // If set, at least one receive interrupt occurred. 596 // 597 #define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001 598 599 // 600 // If set, at least one transmit interrupt occurred. 601 // 602 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002 603 604 // 605 // If set, at least one command interrupt occurred. 606 // 607 #define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004 608 609 // 610 // If set, at least one software interrupt occurred. 611 // 612 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008 613 614 // 615 // This flag is set if the transmitted buffer queue is empty. This flag 616 // will be set if all transmitted buffer addresses get written into the DB. 617 // 618 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010 619 620 // 621 // This flag is set if no transmitted buffer addresses were written 622 // into the DB. (This could be because DBsize was too small.) 623 // 624 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020 625 626 //////////////////////////////////////// 627 // UNDI Fill Header 628 // 629 630 // No additional StatFlags 631 632 //////////////////////////////////////// 633 // UNDI Transmit 634 // 635 636 // No additional StatFlags. 637 638 //////////////////////////////////////// 639 // UNDI Receive 640 // 641 642 // No additional StatFlags. 643 644 typedef PXE_UINT16 PXE_STATCODE; 645 646 #define PXE_STATCODE_INITIALIZE 0x0000 647 648 //////////////////////////////////////// 649 // Common StatCodes returned by all UNDI commands, UNDI protocol functions 650 // and BC protocol functions. 651 // 652 653 #define PXE_STATCODE_SUCCESS 0x0000 654 655 #define PXE_STATCODE_INVALID_CDB 0x0001 656 #define PXE_STATCODE_INVALID_CPB 0x0002 657 #define PXE_STATCODE_BUSY 0x0003 658 #define PXE_STATCODE_QUEUE_FULL 0x0004 659 #define PXE_STATCODE_ALREADY_STARTED 0x0005 660 #define PXE_STATCODE_NOT_STARTED 0x0006 661 #define PXE_STATCODE_NOT_SHUTDOWN 0x0007 662 #define PXE_STATCODE_ALREADY_INITIALIZED 0x0008 663 #define PXE_STATCODE_NOT_INITIALIZED 0x0009 664 #define PXE_STATCODE_DEVICE_FAILURE 0x000A 665 #define PXE_STATCODE_NVDATA_FAILURE 0x000B 666 #define PXE_STATCODE_UNSUPPORTED 0x000C 667 #define PXE_STATCODE_BUFFER_FULL 0x000D 668 #define PXE_STATCODE_INVALID_PARAMETER 0x000E 669 #define PXE_STATCODE_INVALID_UNDI 0x000F 670 #define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010 671 #define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011 672 #define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012 673 #define PXE_STATCODE_NO_DATA 0x0013 674 675 676 typedef PXE_UINT16 PXE_IFNUM; 677 678 // 679 // This interface number must be passed to the S/W UNDI Start command. 680 // 681 #define PXE_IFNUM_START 0x0000 682 683 // 684 // This interface number is returned by the S/W UNDI Get State and 685 // Start commands if information in the CDB, CPB or DB is invalid. 686 // 687 #define PXE_IFNUM_INVALID 0x0000 688 689 typedef PXE_UINT16 PXE_CONTROL; 690 691 // 692 // Setting this flag directs the UNDI to queue this command for later 693 // execution if the UNDI is busy and it supports command queuing. 694 // If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error 695 // is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL 696 // error is returned. 697 // 698 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002 699 700 // 701 // These two bit values are used to determine if there are more UNDI 702 // CDB structures following this one. If the link bit is set, there 703 // must be a CDB structure following this one. Execution will start 704 // on the next CDB structure as soon as this one completes successfully. 705 // If an error is generated by this command, execution will stop. 706 // 707 #define PXE_CONTROL_LINK 0x0001 708 #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000 709 710 typedef PXE_UINT8 PXE_FRAME_TYPE; 711 712 #define PXE_FRAME_TYPE_NONE 0x00 713 #define PXE_FRAME_TYPE_UNICAST 0x01 714 #define PXE_FRAME_TYPE_BROADCAST 0x02 715 #define PXE_FRAME_TYPE_MULTICAST 0x03 716 #define PXE_FRAME_TYPE_PROMISCUOUS 0x04 717 718 typedef PXE_UINT32 PXE_IPV4; 719 720 typedef PXE_UINT32 PXE_IPV6[4]; 721 #define PXE_MAC_LENGTH 32 722 723 typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH]; 724 725 typedef PXE_UINT8 PXE_IFTYPE; 726 typedef PXE_UINT16 PXE_MEDIA_PROTOCOL; 727 728 // 729 // This information is from the ARP section of RFC 1700. 730 // 731 // 1 Ethernet (10Mb) [JBP] 732 // 2 Experimental Ethernet (3Mb) [JBP] 733 // 3 Amateur Radio AX.25 [PXK] 734 // 4 Proteon ProNET Token Ring [JBP] 735 // 5 Chaos [GXP] 736 // 6 IEEE 802 Networks [JBP] 737 // 7 ARCNET [JBP] 738 // 8 Hyperchannel [JBP] 739 // 9 Lanstar [TU] 740 // 10 Autonet Short Address [MXB1] 741 // 11 LocalTalk [JKR1] 742 // 12 LocalNet (IBM PCNet or SYTEK LocalNET) [JXM] 743 // 13 Ultra link [RXD2] 744 // 14 SMDS [GXC1] 745 // 15 Frame Relay [AGM] 746 // 16 Asynchronous Transmission Mode (ATM) [JXB2] 747 // 17 HDLC [JBP] 748 // 18 Fibre Channel [Yakov Rekhter] 749 // 19 Asynchronous Transmission Mode (ATM) [Mark Laubach] 750 // 20 Serial Line [JBP] 751 // 21 Asynchronous Transmission Mode (ATM) [MXB1] 752 // 753 754 #define PXE_IFTYPE_ETHERNET 0x01 755 #define PXE_IFTYPE_TOKENRING 0x04 756 #define PXE_IFTYPE_FIBRE_CHANNEL 0x12 757 758 typedef struct s_pxe_hw_undi { 759 PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE 760 PXE_UINT8 Len; // sizeof(PXE_HW_UNDI) 761 PXE_UINT8 Fudge; // makes 8-bit cksum equal zero 762 PXE_UINT8 Rev; // PXE_ROMID_REV 763 PXE_UINT8 IFcnt; // physical connector count 764 PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER 765 PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER 766 PXE_UINT16 reserved; // zero, not used 767 PXE_UINT32 Implementation; // implementation flags 768 // reserved // vendor use 769 // PXE_UINT32 Status; // status port 770 // PXE_UINT32 Command; // command port 771 // PXE_UINT64 CDBaddr; // CDB address port 772 } PXE_HW_UNDI; 773 774 // 775 // Status port bit definitions 776 // 777 778 // 779 // UNDI operation state 780 // 781 #define PXE_HWSTAT_STATE_MASK 0xC0000000 782 #define PXE_HWSTAT_BUSY 0xC0000000 783 #define PXE_HWSTAT_INITIALIZED 0x80000000 784 #define PXE_HWSTAT_STARTED 0x40000000 785 #define PXE_HWSTAT_STOPPED 0x00000000 786 787 // 788 // If set, last command failed 789 // 790 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000 791 792 // 793 // If set, identifies enabled receive filters 794 // 795 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000 796 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800 797 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400 798 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200 799 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100 800 801 // 802 // If set, identifies enabled external interrupts 803 // 804 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080 805 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040 806 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020 807 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010 808 809 // 810 // If set, identifies pending interrupts 811 // 812 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008 813 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004 814 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002 815 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001 816 817 // 818 // Command port definitions 819 // 820 821 // 822 // If set, CDB identified in CDBaddr port is given to UNDI. 823 // If not set, other bits in this word will be processed. 824 // 825 #define PXE_HWCMD_ISSUE_COMMAND 0x80000000 826 #define PXE_HWCMD_INTS_AND_FILTS 0x00000000 827 828 // 829 // Use these to enable/disable receive filters. 830 // 831 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000 832 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800 833 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400 834 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200 835 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100 836 837 // 838 // Use these to enable/disable external interrupts 839 // 840 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080 841 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040 842 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020 843 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010 844 845 // 846 // Use these to clear pending external interrupts 847 // 848 #define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008 849 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004 850 #define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002 851 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001 852 853 typedef struct s_pxe_sw_undi { 854 PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE 855 PXE_UINT8 Len; // sizeof(PXE_SW_UNDI) 856 PXE_UINT8 Fudge; // makes 8-bit cksum zero 857 PXE_UINT8 Rev; // PXE_ROMID_REV 858 PXE_UINT8 IFcnt; // physical connector count 859 PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER 860 PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER 861 PXE_UINT16 reserved1; // zero, not used 862 PXE_UINT32 Implementation; // Implementation flags 863 PXE_UINT64 EntryPoint; // API entry point 864 PXE_UINT8 reserved2[3]; // zero, not used 865 PXE_UINT8 BusCnt; // number of bustypes supported 866 PXE_UINT32 BusType[1]; // list of supported bustypes 867 } PXE_SW_UNDI; 868 869 typedef union u_pxe_undi { 870 PXE_HW_UNDI hw; 871 PXE_SW_UNDI sw; 872 } PXE_UNDI; 873 874 // 875 // Signature of !PXE structure 876 // 877 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE('!', 'P', 'X', 'E') 878 879 // 880 // !PXE structure format revision 881 // 882 #define PXE_ROMID_REV 0x02 883 884 // 885 // UNDI command interface revision. These are the values that get sent 886 // in option 94 (Client Network Interface Identifier) in the DHCP Discover 887 // and PXE Boot Server Request packets. 888 // 889 #define PXE_ROMID_MAJORVER 0x03 890 #define PXE_ROMID_MINORVER 0x00 891 892 // 893 // Implementation flags 894 // 895 #define PXE_ROMID_IMP_HW_UNDI 0x80000000 896 #define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000 897 #define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000 898 #define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000 899 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000 900 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000 901 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000 902 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00 903 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00 904 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800 905 #define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400 906 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000 907 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200 908 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100 909 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080 910 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040 911 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020 912 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010 913 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008 914 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004 915 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002 916 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001 917 918 919 typedef struct s_pxe_cdb { 920 PXE_OPCODE OpCode; 921 PXE_OPFLAGS OpFlags; 922 PXE_UINT16 CPBsize; 923 PXE_UINT16 DBsize; 924 UINT64 CPBaddr; 925 UINT64 DBaddr; 926 PXE_STATCODE StatCode; 927 PXE_STATFLAGS StatFlags; 928 PXE_UINT16 IFnum; 929 PXE_CONTROL Control; 930 } PXE_CDB; 931 932 933 typedef union u_pxe_ip_addr { 934 PXE_IPV6 IPv6; 935 PXE_IPV4 IPv4; 936 } PXE_IP_ADDR; 937 938 typedef union pxe_device { 939 // 940 // PCI and PC Card NICs are both identified using bus, device 941 // and function numbers. For PC Card, this may require PC 942 // Card services to be loaded in the BIOS or preboot 943 // environment. 944 // 945 struct { 946 // 947 // See S/W UNDI ROMID structure definition for PCI and 948 // PCC BusType definitions. 949 // 950 PXE_UINT32 BusType; 951 952 // 953 // Bus, device & function numbers that locate this device. 954 // 955 PXE_UINT16 Bus; 956 PXE_UINT8 Device; 957 PXE_UINT8 Function; 958 } PCI, PCC; 959 960 // 961 // %%TBD - More information is needed about enumerating 962 // USB and 1394 devices. 963 // 964 struct { 965 PXE_UINT32 BusType; 966 PXE_UINT32 tdb; 967 } USB, _1394; 968 } PXE_DEVICE; 969 970 // cpb and db definitions 971 972 #define MAX_PCI_CONFIG_LEN 64 // # of dwords 973 #define MAX_EEPROM_LEN 128 // #of dwords 974 #define MAX_XMIT_BUFFERS 32 // recycling Q length for xmit_done 975 #define MAX_MCAST_ADDRESS_CNT 8 976 977 typedef struct s_pxe_cpb_start { 978 // 979 // PXE_VOID Delay(PXE_UINT64 microseconds); 980 // 981 // UNDI will never request a delay smaller than 10 microseconds 982 // and will always request delays in increments of 10 microseconds. 983 // The Delay() CallBack routine must delay between n and n + 10 984 // microseconds before returning control to the UNDI. 985 // 986 // This field cannot be set to zero. 987 // 988 PXE_UINT64 Delay; 989 990 // 991 // PXE_VOID Block(PXE_UINT32 enable); 992 // 993 // UNDI may need to block multi-threaded/multi-processor access to 994 // critical code sections when programming or accessing the network 995 // device. To this end, a blocking service is needed by the UNDI. 996 // When UNDI needs a block, it will call Block() passing a non-zero 997 // value. When UNDI no longer needs a block, it will call Block() 998 // with a zero value. When called, if the Block() is already enabled, 999 // do not return control to the UNDI until the previous Block() is 1000 // disabled. 1001 // 1002 // This field cannot be set to zero. 1003 // 1004 PXE_UINT64 Block; 1005 1006 // 1007 // PXE_VOID Virt2Phys(PXE_UINT64 virtual, PXE_UINT64 physical_ptr); 1008 // 1009 // UNDI will pass the virtual address of a buffer and the virtual 1010 // address of a 64-bit physical buffer. Convert the virtual address 1011 // to a physical address and write the result to the physical address 1012 // buffer. If virtual and physical addresses are the same, just 1013 // copy the virtual address to the physical address buffer. 1014 // 1015 // This field can be set to zero if virtual and physical addresses 1016 // are equal. 1017 // 1018 PXE_UINT64 Virt2Phys; 1019 // 1020 // PXE_VOID Mem_IO(PXE_UINT8 read_write, PXE_UINT8 len, PXE_UINT64 port, 1021 // PXE_UINT64 buf_addr); 1022 // 1023 // UNDI will read or write the device io space using this call back 1024 // function. It passes the number of bytes as the len parameter and it 1025 // will be either 1,2,4 or 8. 1026 // 1027 // This field can not be set to zero. 1028 // 1029 PXE_UINT64 Mem_IO; 1030 } PXE_CPB_START; 1031 1032 #define PXE_DELAY_MILLISECOND 1000 1033 #define PXE_DELAY_SECOND 1000000 1034 #define PXE_IO_READ 0 1035 #define PXE_IO_WRITE 1 1036 #define PXE_MEM_READ 2 1037 #define PXE_MEM_WRITE 4 1038 1039 1040 typedef struct s_pxe_db_get_init_info { 1041 // 1042 // Minimum length of locked memory buffer that must be given to 1043 // the Initialize command. Giving UNDI more memory will generally 1044 // give better performance. 1045 // 1046 // If MemoryRequired is zero, the UNDI does not need and will not 1047 // use system memory to receive and transmit packets. 1048 // 1049 PXE_UINT32 MemoryRequired; 1050 1051 // 1052 // Maximum frame data length for Tx/Rx excluding the media header. 1053 // 1054 PXE_UINT32 FrameDataLen; 1055 1056 // 1057 // Supported link speeds are in units of mega bits. Common ethernet 1058 // values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero 1059 // filled. 1060 // 1061 PXE_UINT32 LinkSpeeds[4]; 1062 1063 // 1064 // Number of non-volatile storage items. 1065 // 1066 PXE_UINT32 NvCount; 1067 1068 // 1069 // Width of non-volatile storage item in bytes. 0, 1, 2 or 4 1070 // 1071 PXE_UINT16 NvWidth; 1072 1073 // 1074 // Media header length. This is the typical media header length for 1075 // this UNDI. This information is needed when allocating receive 1076 // and transmit buffers. 1077 // 1078 PXE_UINT16 MediaHeaderLen; 1079 1080 // 1081 // Number of bytes in the NIC hardware (MAC) address. 1082 // 1083 PXE_UINT16 HWaddrLen; 1084 1085 // 1086 // Maximum number of multicast MAC addresses in the multicast 1087 // MAC address filter list. 1088 // 1089 PXE_UINT16 MCastFilterCnt; 1090 1091 // 1092 // Default number and size of transmit and receive buffers that will 1093 // be allocated by the UNDI. If MemoryRequired is non-zero, this 1094 // allocation will come out of the memory buffer given to the Initialize 1095 // command. If MemoryRequired is zero, this allocation will come out of 1096 // memory on the NIC. 1097 // 1098 PXE_UINT16 TxBufCnt; 1099 PXE_UINT16 TxBufSize; 1100 PXE_UINT16 RxBufCnt; 1101 PXE_UINT16 RxBufSize; 1102 1103 // 1104 // Hardware interface types defined in the Assigned Numbers RFC 1105 // and used in DHCP and ARP packets. 1106 // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros. 1107 // 1108 PXE_UINT8 IFtype; 1109 1110 // 1111 // Supported duplex. See PXE_DUPLEX_xxxxx #defines below. 1112 // 1113 PXE_UINT8 Duplex; 1114 1115 // 1116 // Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below. 1117 // 1118 PXE_UINT8 LoopBack; 1119 } PXE_DB_GET_INIT_INFO; 1120 1121 #define PXE_MAX_TXRX_UNIT_ETHER 1500 1122 1123 #define PXE_HWADDR_LEN_ETHER 0x0006 1124 #define PXE_MAC_HEADER_LEN_ETHER 0x000E 1125 1126 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1 1127 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2 1128 1129 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1 1130 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2 1131 1132 1133 typedef struct s_pxe_pci_config_info { 1134 // 1135 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union. 1136 // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI. 1137 // 1138 PXE_UINT32 BusType; 1139 1140 // 1141 // This identifies the PCI network device that this UNDI interface 1142 // is bound to. 1143 // 1144 PXE_UINT16 Bus; 1145 PXE_UINT8 Device; 1146 PXE_UINT8 Function; 1147 1148 // 1149 // This is a copy of the PCI configuration space for this 1150 // network device. 1151 // 1152 union { 1153 PXE_UINT8 Byte[256]; 1154 PXE_UINT16 Word[128]; 1155 PXE_UINT32 Dword[64]; 1156 } Config; 1157 } PXE_PCI_CONFIG_INFO; 1158 1159 1160 typedef struct s_pxe_pcc_config_info { 1161 // 1162 // This is the flag field for the PXE_DB_GET_CONFIG_INFO union. 1163 // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC. 1164 // 1165 PXE_UINT32 BusType; 1166 1167 // 1168 // This identifies the PCC network device that this UNDI interface 1169 // is bound to. 1170 // 1171 PXE_UINT16 Bus; 1172 PXE_UINT8 Device; 1173 PXE_UINT8 Function; 1174 1175 // 1176 // This is a copy of the PCC configuration space for this 1177 // network device. 1178 // 1179 union { 1180 PXE_UINT8 Byte[256]; 1181 PXE_UINT16 Word[128]; 1182 PXE_UINT32 Dword[64]; 1183 } Config; 1184 } PXE_PCC_CONFIG_INFO; 1185 1186 1187 typedef struct s_pxe_usb_config_info { 1188 PXE_UINT32 BusType; 1189 // %%TBD What should we return here... 1190 } PXE_USB_CONFIG_INFO; 1191 1192 1193 typedef struct s_pxe_1394_config_info { 1194 PXE_UINT32 BusType; 1195 // %%TBD What should we return here... 1196 } PXE_1394_CONFIG_INFO; 1197 1198 1199 typedef union u_pxe_db_get_config_info { 1200 PXE_PCI_CONFIG_INFO pci; 1201 PXE_PCC_CONFIG_INFO pcc; 1202 PXE_USB_CONFIG_INFO usb; 1203 PXE_1394_CONFIG_INFO _1394; 1204 } PXE_DB_GET_CONFIG_INFO; 1205 1206 1207 typedef struct s_pxe_cpb_initialize { 1208 // 1209 // Address of first (lowest) byte of the memory buffer. This buffer must 1210 // be in contiguous physical memory and cannot be swapped out. The UNDI 1211 // will be using this for transmit and receive buffering. 1212 // 1213 PXE_UINT64 MemoryAddr; 1214 1215 // 1216 // MemoryLength must be greater than or equal to MemoryRequired 1217 // returned by the Get Init Info command. 1218 // 1219 PXE_UINT32 MemoryLength; 1220 1221 // 1222 // Desired link speed in Mbit/sec. Common ethernet values are 10, 100 1223 // and 1000. Setting a value of zero will auto-detect and/or use the 1224 // default link speed (operation depends on UNDI/NIC functionality). 1225 // 1226 PXE_UINT32 LinkSpeed; 1227 1228 // 1229 // Suggested number and size of receive and transmit buffers to 1230 // allocate. If MemoryAddr and MemoryLength are non-zero, this 1231 // allocation comes out of the supplied memory buffer. If MemoryAddr 1232 // and MemoryLength are zero, this allocation comes out of memory 1233 // on the NIC. 1234 // 1235 // If these fields are set to zero, the UNDI will allocate buffer 1236 // counts and sizes as it sees fit. 1237 // 1238 PXE_UINT16 TxBufCnt; 1239 PXE_UINT16 TxBufSize; 1240 PXE_UINT16 RxBufCnt; 1241 PXE_UINT16 RxBufSize; 1242 1243 // 1244 // The following configuration parameters are optional and must be zero 1245 // to use the default values. 1246 // 1247 PXE_UINT8 Duplex; 1248 1249 PXE_UINT8 LoopBack; 1250 } PXE_CPB_INITIALIZE; 1251 1252 1253 #define PXE_DUPLEX_DEFAULT 0x00 1254 #define PXE_FORCE_FULL_DUPLEX 0x01 1255 #define PXE_ENABLE_FULL_DUPLEX 0x02 1256 1257 #define LOOPBACK_NORMAL 0 1258 #define LOOPBACK_INTERNAL 1 1259 #define LOOPBACK_EXTERNAL 2 1260 1261 1262 typedef struct s_pxe_db_initialize { 1263 // 1264 // Actual amount of memory used from the supplied memory buffer. This 1265 // may be less that the amount of memory suppllied and may be zero if 1266 // the UNDI and network device do not use external memory buffers. 1267 // 1268 // Memory used by the UNDI and network device is allocated from the 1269 // lowest memory buffer address. 1270 // 1271 PXE_UINT32 MemoryUsed; 1272 1273 // 1274 // Actual number and size of receive and transmit buffers that were 1275 // allocated. 1276 // 1277 PXE_UINT16 TxBufCnt; 1278 PXE_UINT16 TxBufSize; 1279 PXE_UINT16 RxBufCnt; 1280 PXE_UINT16 RxBufSize; 1281 } PXE_DB_INITIALIZE; 1282 1283 1284 typedef struct s_pxe_cpb_receive_filters { 1285 // 1286 // List of multicast MAC addresses. This list, if present, will 1287 // replace the existing multicast MAC address filter list. 1288 // 1289 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; 1290 } PXE_CPB_RECEIVE_FILTERS; 1291 1292 1293 typedef struct s_pxe_db_receive_filters { 1294 // 1295 // Filtered multicast MAC address list. 1296 // 1297 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT]; 1298 } PXE_DB_RECEIVE_FILTERS; 1299 1300 1301 typedef struct s_pxe_cpb_station_address { 1302 // 1303 // If supplied and supported, the current station MAC address 1304 // will be changed. 1305 // 1306 PXE_MAC_ADDR StationAddr; 1307 } PXE_CPB_STATION_ADDRESS; 1308 1309 1310 typedef struct s_pxe_dpb_station_address { 1311 // 1312 // Current station MAC address. 1313 // 1314 PXE_MAC_ADDR StationAddr; 1315 1316 // 1317 // Station broadcast MAC address. 1318 // 1319 PXE_MAC_ADDR BroadcastAddr; 1320 1321 // 1322 // Permanent station MAC address. 1323 // 1324 PXE_MAC_ADDR PermanentAddr; 1325 } PXE_DB_STATION_ADDRESS; 1326 1327 1328 typedef struct s_pxe_db_statistics { 1329 // 1330 // Bit field identifying what statistic data is collected by the 1331 // UNDI/NIC. 1332 // If bit 0x00 is set, Data[0x00] is collected. 1333 // If bit 0x01 is set, Data[0x01] is collected. 1334 // If bit 0x20 is set, Data[0x20] is collected. 1335 // If bit 0x21 is set, Data[0x21] is collected. 1336 // Etc. 1337 // 1338 PXE_UINT64 Supported; 1339 1340 // 1341 // Statistic data. 1342 // 1343 PXE_UINT64 Data[64]; 1344 } PXE_DB_STATISTICS; 1345 1346 // 1347 // Total number of frames received. Includes frames with errors and 1348 // dropped frames. 1349 // 1350 #define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00 1351 1352 // 1353 // Number of valid frames received and copied into receive buffers. 1354 // 1355 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01 1356 1357 // 1358 // Number of frames below the minimum length for the media. 1359 // This would be <64 for ethernet. 1360 // 1361 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02 1362 1363 // 1364 // Number of frames longer than the maxminum length for the 1365 // media. This would be >1500 for ethernet. 1366 // 1367 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03 1368 1369 // 1370 // Valid frames that were dropped because receive buffers were full. 1371 // 1372 #define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04 1373 1374 // 1375 // Number of valid unicast frames received and not dropped. 1376 // 1377 #define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05 1378 1379 // 1380 // Number of valid broadcast frames received and not dropped. 1381 // 1382 #define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06 1383 1384 // 1385 // Number of valid mutlicast frames received and not dropped. 1386 // 1387 #define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07 1388 1389 // 1390 // Number of frames w/ CRC or alignment errors. 1391 // 1392 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08 1393 1394 // 1395 // Total number of bytes received. Includes frames with errors 1396 // and dropped frames. 1397 // 1398 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09 1399 1400 // 1401 // Transmit statistics. 1402 // 1403 #define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A 1404 #define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B 1405 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C 1406 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D 1407 #define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E 1408 #define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F 1409 #define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10 1410 #define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11 1411 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12 1412 #define PXE_STATISTICS_TX_TOTAL_BYTES 0x13 1413 1414 // 1415 // Number of collisions detection on this subnet. 1416 // 1417 #define PXE_STATISTICS_COLLISIONS 0x14 1418 1419 // 1420 // Number of frames destined for unsupported protocol. 1421 // 1422 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15 1423 1424 1425 typedef struct s_pxe_cpb_mcast_ip_to_mac { 1426 // 1427 // Multicast IP address to be converted to multicast MAC address. 1428 // 1429 PXE_IP_ADDR IP; 1430 } PXE_CPB_MCAST_IP_TO_MAC; 1431 1432 1433 typedef struct s_pxe_db_mcast_ip_to_mac { 1434 // 1435 // Multicast MAC address. 1436 // 1437 PXE_MAC_ADDR MAC; 1438 } PXE_DB_MCAST_IP_TO_MAC; 1439 1440 1441 typedef struct s_pxe_cpb_nvdata_sparse { 1442 // 1443 // NvData item list. Only items in this list will be updated. 1444 // 1445 struct { 1446 // Non-volatile storage address to be changed. 1447 PXE_UINT32 Addr; 1448 1449 // Data item to write into above storage address. 1450 1451 union { 1452 PXE_UINT8 Byte; 1453 PXE_UINT16 Word; 1454 PXE_UINT32 Dword; 1455 } Data; 1456 } Item[MAX_EEPROM_LEN]; 1457 } PXE_CPB_NVDATA_SPARSE; 1458 1459 1460 // 1461 // When using bulk update, the size of the CPB structure must be 1462 // the same size as the non-volatile NIC storage. 1463 // 1464 typedef union u_pxe_cpb_nvdata_bulk { 1465 // 1466 // Array of byte-wide data items. 1467 // 1468 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; 1469 1470 // 1471 // Array of word-wide data items. 1472 // 1473 PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; 1474 1475 // 1476 // Array of dword-wide data items. 1477 // 1478 PXE_UINT32 Dword[MAX_EEPROM_LEN]; 1479 } PXE_CPB_NVDATA_BULK; 1480 1481 typedef struct s_pxe_db_nvdata { 1482 1483 // Arrays of data items from non-volatile storage. 1484 1485 union { 1486 // 1487 // Array of byte-wide data items. 1488 // 1489 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2]; 1490 1491 // 1492 // Array of word-wide data items. 1493 // 1494 PXE_UINT16 Word[MAX_EEPROM_LEN << 1]; 1495 1496 // Array of dword-wide data items. 1497 1498 PXE_UINT32 Dword[MAX_EEPROM_LEN]; 1499 } Data; 1500 } PXE_DB_NVDATA; 1501 1502 1503 typedef struct s_pxe_db_get_status { 1504 // 1505 // Length of next receive frame (header + data). If this is zero, 1506 // there is no next receive frame available. 1507 // 1508 PXE_UINT32 RxFrameLen; 1509 1510 // 1511 // Reserved, set to zero. 1512 // 1513 PXE_UINT32 reserved; 1514 1515 // 1516 // Addresses of transmitted buffers that need to be recycled. 1517 // 1518 PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS]; 1519 } PXE_DB_GET_STATUS; 1520 1521 1522 1523 typedef struct s_pxe_cpb_fill_header { 1524 // 1525 // Source and destination MAC addresses. These will be copied into 1526 // the media header without doing byte swapping. 1527 // 1528 PXE_MAC_ADDR SrcAddr; 1529 PXE_MAC_ADDR DestAddr; 1530 1531 // 1532 // Address of first byte of media header. The first byte of packet data 1533 // follows the last byte of the media header. 1534 // 1535 PXE_UINT64 MediaHeader; 1536 1537 // 1538 // Length of packet data in bytes (not including the media header). 1539 // 1540 PXE_UINT32 PacketLen; 1541 1542 // 1543 // Protocol type. This will be copied into the media header without 1544 // doing byte swapping. Protocol type numbers can be obtained from 1545 // the Assigned Numbers RFC 1700. 1546 // 1547 PXE_UINT16 Protocol; 1548 1549 // 1550 // Length of the media header in bytes. 1551 // 1552 PXE_UINT16 MediaHeaderLen; 1553 } PXE_CPB_FILL_HEADER; 1554 1555 1556 #define PXE_PROTOCOL_ETHERNET_IP 0x0800 1557 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806 1558 #define MAX_XMIT_FRAGMENTS 16 1559 1560 typedef struct s_pxe_cpb_fill_header_fragmented { 1561 // 1562 // Source and destination MAC addresses. These will be copied into 1563 // the media header without doing byte swapping. 1564 // 1565 PXE_MAC_ADDR SrcAddr; 1566 PXE_MAC_ADDR DestAddr; 1567 1568 // 1569 // Length of packet data in bytes (not including the media header). 1570 // 1571 PXE_UINT32 PacketLen; 1572 1573 // 1574 // Protocol type. This will be copied into the media header without 1575 // doing byte swapping. Protocol type numbers can be obtained from 1576 // the Assigned Numbers RFC 1700. 1577 // 1578 PXE_MEDIA_PROTOCOL Protocol; 1579 1580 // 1581 // Length of the media header in bytes. 1582 // 1583 PXE_UINT16 MediaHeaderLen; 1584 1585 // 1586 // Number of packet fragment descriptors. 1587 // 1588 PXE_UINT16 FragCnt; 1589 1590 // 1591 // Reserved, must be set to zero. 1592 // 1593 PXE_UINT16 reserved; 1594 1595 // 1596 // Array of packet fragment descriptors. The first byte of the media 1597 // header is the first byte of the first fragment. 1598 // 1599 struct { 1600 // 1601 // Address of this packet fragment. 1602 // 1603 PXE_UINT64 FragAddr; 1604 1605 // 1606 // Length of this packet fragment. 1607 // 1608 PXE_UINT32 FragLen; 1609 1610 // 1611 // Reserved, must be set to zero. 1612 // 1613 PXE_UINT32 reserved; 1614 } FragDesc[MAX_XMIT_FRAGMENTS]; 1615 } PXE_CPB_FILL_HEADER_FRAGMENTED; 1616 1617 1618 1619 typedef struct s_pxe_cpb_transmit { 1620 // 1621 // Address of first byte of frame buffer. This is also the first byte 1622 // of the media header. 1623 // 1624 PXE_UINT64 FrameAddr; 1625 1626 // 1627 // Length of the data portion of the frame buffer in bytes. Do not 1628 // include the length of the media header. 1629 // 1630 PXE_UINT32 DataLen; 1631 1632 // 1633 // Length of the media header in bytes. 1634 // 1635 PXE_UINT16 MediaheaderLen; 1636 1637 // 1638 // Reserved, must be zero. 1639 // 1640 PXE_UINT16 reserved; 1641 } PXE_CPB_TRANSMIT; 1642 1643 1644 1645 typedef struct s_pxe_cpb_transmit_fragments { 1646 // 1647 // Length of packet data in bytes (not including the media header). 1648 // 1649 PXE_UINT32 FrameLen; 1650 1651 // 1652 // Length of the media header in bytes. 1653 // 1654 PXE_UINT16 MediaheaderLen; 1655 1656 // 1657 // Number of packet fragment descriptors. 1658 // 1659 PXE_UINT16 FragCnt; 1660 1661 // 1662 // Array of frame fragment descriptors. The first byte of the first 1663 // fragment is also the first byte of the media header. 1664 // 1665 struct { 1666 // 1667 // Address of this frame fragment. 1668 // 1669 PXE_UINT64 FragAddr; 1670 1671 // 1672 // Length of this frame fragment. 1673 // 1674 PXE_UINT32 FragLen; 1675 1676 // 1677 // Reserved, must be set to zero. 1678 // 1679 PXE_UINT32 reserved; 1680 } FragDesc[MAX_XMIT_FRAGMENTS]; 1681 } PXE_CPB_TRANSMIT_FRAGMENTS; 1682 1683 1684 typedef struct s_pxe_cpb_receive { 1685 // 1686 // Address of first byte of receive buffer. This is also the first byte 1687 // of the frame header. 1688 // 1689 PXE_UINT64 BufferAddr; 1690 1691 // 1692 // Length of receive buffer. This must be large enough to hold the 1693 // received frame (media header + data). If the length of smaller than 1694 // the received frame, data will be lost. 1695 // 1696 PXE_UINT32 BufferLen; 1697 1698 // 1699 // Reserved, must be set to zero. 1700 // 1701 PXE_UINT32 reserved; 1702 } PXE_CPB_RECEIVE; 1703 1704 1705 typedef struct s_pxe_db_receive { 1706 // 1707 // Source and destination MAC addresses from media header. 1708 // 1709 PXE_MAC_ADDR SrcAddr; 1710 PXE_MAC_ADDR DestAddr; 1711 1712 // 1713 // Length of received frame. May be larger than receive buffer size. 1714 // The receive buffer will not be overwritten. This is how to tell 1715 // if data was lost because the receive buffer was too small. 1716 // 1717 PXE_UINT32 FrameLen; 1718 1719 // 1720 // Protocol type from media header. 1721 // 1722 PXE_MEDIA_PROTOCOL Protocol; 1723 1724 // 1725 // Length of media header in received frame. 1726 // 1727 PXE_UINT16 MediaHeaderLen; 1728 1729 // 1730 // Type of receive frame. 1731 // 1732 PXE_FRAME_TYPE Type; 1733 1734 // 1735 // Reserved, must be zero. 1736 // 1737 PXE_UINT8 reserved[7]; 1738 1739 } PXE_DB_RECEIVE; 1740 1741 #pragma pack() 1742 1743 /* EOF - efi_pxe.h */ 1744 #endif /* _EFI_PXE_H */ 1745 1746
Indexes created Mon Sep 29 21:09:56 GMT 2025