efipciio.h revision 1.1
1 /* $NetBSD: efipciio.h,v 1.1 2014/04/01 16:16:07 jakllsch Exp $ */ 2 3 #ifndef _EFI_PCI_IO_H 4 #define _EFI_PCI_IO_H 5 6 #define EFI_PCI_IO_PROTOCOL \ 7 { 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x02, 0x9a} } 8 9 INTERFACE_DECL(_EFI_PCI_IO); 10 11 typedef enum { 12 EfiPciIoWidthUint8, 13 EfiPciIoWidthUint16, 14 EfiPciIoWidthUint32, 15 EfiPciIoWidthUint64, 16 EfiPciIoWidthFifoUint8, 17 EfiPciIoWidthFifoUint16, 18 EfiPciIoWidthFifoUint32, 19 EfiPciIoWidthFifoUint64, 20 EfiPciIoWidthFillUint8, 21 EfiPciIoWidthFillUint16, 22 EfiPciIoWidthFillUint32, 23 EfiPciIoWidthFillUint64, 24 EfiPciIoWidthMaximum 25 } EFI_PCI_IO_PROTOCOL_WIDTH; 26 27 #define EFI_PCI_IO_PASS_THROUGH_BAR 0xff 28 29 typedef 30 EFI_STATUS 31 (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM) ( 32 IN struct _EFI_PCI_IO *This, 33 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 34 IN UINT8 BarIndex, 35 IN UINT64 Offset, 36 IN UINT64 Mask, 37 IN UINT64 Value, 38 IN UINT64 Delay, 39 OUT UINT64 *Result 40 ); 41 42 typedef 43 EFI_STATUS 44 (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM) ( 45 IN struct _EFI_PCI_IO *This, 46 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 47 IN UINT8 BarIndex, 48 IN UINT64 Offset, 49 IN UINTN Count, 50 IN OUT VOID *Buffer 51 ); 52 53 typedef struct { 54 EFI_PCI_IO_PROTOCOL_IO_MEM Read; 55 EFI_PCI_IO_PROTOCOL_IO_MEM Write; 56 } EFI_PCI_IO_PROTOCOL_ACCESS; 57 58 typedef 59 EFI_STATUS 60 (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG) ( 61 IN struct _EFI_PCI_IO *This, 62 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 63 IN UINT32 Offset, 64 IN UINTN Count, 65 IN OUT VOID *Buffer 66 ); 67 68 typedef struct { 69 EFI_PCI_IO_PROTOCOL_CONFIG Read; 70 EFI_PCI_IO_PROTOCOL_CONFIG Write; 71 } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS; 72 73 typedef 74 EFI_STATUS 75 (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM) ( 76 IN struct _EFI_PCI_IO *This, 77 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 78 IN UINT8 DestBarIndex, 79 IN UINT64 DestOffset, 80 IN UINT8 SrcBarIndex, 81 IN UINT64 SrcOffset, 82 IN UINTN Count 83 ); 84 85 typedef enum { 86 EfiPciIoOperationBusMasterRead, 87 EfiPciIoOperationBusMasterWrite, 88 EfiPciIoOperationBusMasterCommonBuffer, 89 EfiPciIoOperationMaximum 90 } EFI_PCI_IO_PROTOCOL_OPERATION; 91 92 typedef 93 EFI_STATUS 94 (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP) ( 95 IN struct _EFI_PCI_IO *This, 96 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, 97 IN VOID *HostAddress, 98 IN OUT UINTN *NumberOfBytes, 99 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, 100 OUT VOID **Mapping 101 ); 102 103 typedef 104 EFI_STATUS 105 (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP) ( 106 IN struct _EFI_PCI_IO *This, 107 IN VOID *Mapping 108 ); 109 110 typedef 111 EFI_STATUS 112 (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER) ( 113 IN struct _EFI_PCI_IO *This, 114 IN EFI_ALLOCATE_TYPE Type, 115 IN EFI_MEMORY_TYPE MemoryType, 116 IN UINTN Pages, 117 OUT VOID **HostAddress, 118 IN UINT64 Attributes 119 ); 120 121 typedef 122 EFI_STATUS 123 (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER) ( 124 IN struct _EFI_PCI_IO *This, 125 IN UINTN Pages, 126 IN VOID *HostAddress 127 ); 128 129 typedef 130 EFI_STATUS 131 (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH) ( 132 IN struct _EFI_PCI_IO *This 133 ); 134 135 typedef 136 EFI_STATUS 137 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION) ( 138 IN struct _EFI_PCI_IO *This, 139 OUT UINTN *SegmentNumber, 140 OUT UINTN *BusNumber, 141 OUT UINTN *DeviceNumber, 142 OUT UINTN *FunctionNumber 143 ); 144 145 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 146 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 147 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 148 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 149 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 150 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 151 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 152 #define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 153 #define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 154 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 155 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 156 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 157 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 158 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 159 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 160 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 161 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 162 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 163 164 typedef enum { 165 EfiPciIoAttributeOperationGet, 166 EfiPciIoAttributeOperationSet, 167 EfiPciIoAttributeOperationEnable, 168 EfiPciIoAttributeOperationDisable, 169 EfiPciIoAttributeOperationSupported, 170 EfiPciIoAttributeOperationMaximum 171 } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION; 172 173 typedef 174 EFI_STATUS 175 (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES) ( 176 IN struct _EFI_PCI_IO *This, 177 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, 178 IN UINT64 Attributes, 179 OUT UINT64 *Result OPTIONAL 180 ); 181 182 typedef 183 EFI_STATUS 184 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES) ( 185 IN struct _EFI_PCI_IO *This, 186 IN UINT8 BarIndex, 187 OUT UINT64 *Supports OPTIONAL, 188 OUT VOID **Resources OPTIONAL 189 ); 190 191 typedef 192 EFI_STATUS 193 (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES) ( 194 IN struct _EFI_PCI_IO *This, 195 IN UINT64 Attributes, 196 IN UINT8 BarIndex, 197 IN OUT UINT64 *Offset, 198 IN OUT UINT64 *Length 199 ); 200 201 typedef struct _EFI_PCI_IO { 202 EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem; 203 EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo; 204 EFI_PCI_IO_PROTOCOL_ACCESS Mem; 205 EFI_PCI_IO_PROTOCOL_ACCESS Io; 206 EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci; 207 EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem; 208 EFI_PCI_IO_PROTOCOL_MAP Map; 209 EFI_PCI_IO_PROTOCOL_UNMAP Unmap; 210 EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer; 211 EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer; 212 EFI_PCI_IO_PROTOCOL_FLUSH Flush; 213 EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation; 214 EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes; 215 EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes; 216 EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes; 217 UINT64 RomSize; 218 VOID *RomImage; 219 } EFI_PCI_IO; 220 221 #endif /* _EFI_PCI_IO_H */ 222
Indexes created Tue Sep 30 20:09:53 GMT 2025