sljitLir.h revision 1.3 1 1.3 alnsn /* $NetBSD: sljitLir.h,v 1.3 2016/05/29 17:09:33 alnsn Exp $ */
2 1.2 alnsn
3 1.1 alnsn /*
4 1.1 alnsn * Stack-less Just-In-Time compiler
5 1.1 alnsn *
6 1.1 alnsn * Copyright 2009-2012 Zoltan Herczeg (hzmester (at) freemail.hu). All rights reserved.
7 1.1 alnsn *
8 1.1 alnsn * Redistribution and use in source and binary forms, with or without modification, are
9 1.1 alnsn * permitted provided that the following conditions are met:
10 1.1 alnsn *
11 1.1 alnsn * 1. Redistributions of source code must retain the above copyright notice, this list of
12 1.1 alnsn * conditions and the following disclaimer.
13 1.1 alnsn *
14 1.1 alnsn * 2. Redistributions in binary form must reproduce the above copyright notice, this list
15 1.1 alnsn * of conditions and the following disclaimer in the documentation and/or other materials
16 1.1 alnsn * provided with the distribution.
17 1.1 alnsn *
18 1.1 alnsn * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
19 1.1 alnsn * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 alnsn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
21 1.1 alnsn * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 alnsn * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 1.1 alnsn * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 1.1 alnsn * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 alnsn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 1.1 alnsn * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 alnsn */
28 1.1 alnsn
29 1.1 alnsn #ifndef _SLJIT_LIR_H_
30 1.1 alnsn #define _SLJIT_LIR_H_
31 1.1 alnsn
32 1.1 alnsn /*
33 1.1 alnsn ------------------------------------------------------------------------
34 1.1 alnsn Stack-Less JIT compiler for multiple architectures (x86, ARM, PowerPC)
35 1.1 alnsn ------------------------------------------------------------------------
36 1.1 alnsn
37 1.1 alnsn Short description
38 1.1 alnsn Advantages:
39 1.2 alnsn - The execution can be continued from any LIR instruction. In other
40 1.2 alnsn words, it is possible to jump to any label from anywhere, even from
41 1.2 alnsn a code fragment, which is compiled later, if both compiled code
42 1.2 alnsn shares the same context. See sljit_emit_enter for more details
43 1.2 alnsn - Supports self modifying code: target of (conditional) jump and call
44 1.2 alnsn instructions and some constant values can be dynamically modified
45 1.2 alnsn during runtime
46 1.1 alnsn - although it is not suggested to do it frequently
47 1.2 alnsn - can be used for inline caching: save an important value once
48 1.2 alnsn in the instruction stream
49 1.2 alnsn - since this feature limits the optimization possibilities, a
50 1.2 alnsn special flag must be passed at compile time when these
51 1.2 alnsn instructions are emitted
52 1.1 alnsn - A fixed stack space can be allocated for local variables
53 1.1 alnsn - The compiler is thread-safe
54 1.1 alnsn - The compiler is highly configurable through preprocessor macros.
55 1.1 alnsn You can disable unneeded features (multithreading in single
56 1.1 alnsn threaded applications), and you can use your own system functions
57 1.1 alnsn (including memory allocators). See sljitConfig.h
58 1.1 alnsn Disadvantages:
59 1.2 alnsn - No automatic register allocation, and temporary results are
60 1.2 alnsn not stored on the stack. (hence the name comes)
61 1.1 alnsn In practice:
62 1.1 alnsn - This approach is very effective for interpreters
63 1.1 alnsn - One of the saved registers typically points to a stack interface
64 1.2 alnsn - It can jump to any exception handler anytime (even if it belongs
65 1.2 alnsn to another function)
66 1.2 alnsn - Hot paths can be modified during runtime reflecting the changes
67 1.1 alnsn of the fastest execution path of the dynamic language
68 1.1 alnsn - SLJIT supports complex memory addressing modes
69 1.2 alnsn - mainly position and context independent code (except some cases)
70 1.1 alnsn
71 1.1 alnsn For valgrind users:
72 1.1 alnsn - pass --smc-check=all argument to valgrind, since JIT is a "self-modifying code"
73 1.1 alnsn */
74 1.1 alnsn
75 1.1 alnsn #if !(defined SLJIT_NO_DEFAULT_CONFIG && SLJIT_NO_DEFAULT_CONFIG)
76 1.1 alnsn #include "sljitConfig.h"
77 1.1 alnsn #endif
78 1.1 alnsn
79 1.1 alnsn /* The following header file defines useful macros for fine tuning
80 1.2 alnsn sljit based code generators. They are listed in the beginning
81 1.1 alnsn of sljitConfigInternal.h */
82 1.1 alnsn
83 1.1 alnsn #include "sljitConfigInternal.h"
84 1.1 alnsn
85 1.1 alnsn /* --------------------------------------------------------------------- */
86 1.1 alnsn /* Error codes */
87 1.1 alnsn /* --------------------------------------------------------------------- */
88 1.1 alnsn
89 1.1 alnsn /* Indicates no error. */
90 1.1 alnsn #define SLJIT_SUCCESS 0
91 1.1 alnsn /* After the call of sljit_generate_code(), the error code of the compiler
92 1.1 alnsn is set to this value to avoid future sljit calls (in debug mode at least).
93 1.1 alnsn The complier should be freed after sljit_generate_code(). */
94 1.1 alnsn #define SLJIT_ERR_COMPILED 1
95 1.1 alnsn /* Cannot allocate non executable memory. */
96 1.1 alnsn #define SLJIT_ERR_ALLOC_FAILED 2
97 1.1 alnsn /* Cannot allocate executable memory.
98 1.1 alnsn Only for sljit_generate_code() */
99 1.1 alnsn #define SLJIT_ERR_EX_ALLOC_FAILED 3
100 1.3 alnsn /* Return value for SLJIT_CONFIG_UNSUPPORTED placeholder architecture. */
101 1.1 alnsn #define SLJIT_ERR_UNSUPPORTED 4
102 1.3 alnsn /* An ivalid argument is passed to any SLJIT function. */
103 1.3 alnsn #define SLJIT_ERR_BAD_ARGUMENT 5
104 1.1 alnsn
105 1.1 alnsn /* --------------------------------------------------------------------- */
106 1.1 alnsn /* Registers */
107 1.1 alnsn /* --------------------------------------------------------------------- */
108 1.1 alnsn
109 1.3 alnsn /*
110 1.3 alnsn Scratch (R) registers: registers whose may not preserve their values
111 1.3 alnsn across function calls.
112 1.3 alnsn
113 1.3 alnsn Saved (S) registers: registers whose preserve their values across
114 1.3 alnsn function calls.
115 1.3 alnsn
116 1.3 alnsn The scratch and saved register sets are overlap. The last scratch register
117 1.3 alnsn is the first saved register, the one before the last is the second saved
118 1.3 alnsn register, and so on.
119 1.3 alnsn
120 1.3 alnsn If an architecture provides two scratch and three saved registers,
121 1.3 alnsn its scratch and saved register sets are the following:
122 1.3 alnsn
123 1.3 alnsn R0 | [S4] | R0 and S4 represent the same physical register
124 1.3 alnsn R1 | [S3] | R1 and S3 represent the same physical register
125 1.3 alnsn [R2] | S2 | R2 and S2 represent the same physical register
126 1.3 alnsn [R3] | S1 | R3 and S1 represent the same physical register
127 1.3 alnsn [R4] | S0 | R4 and S0 represent the same physical register
128 1.3 alnsn
129 1.3 alnsn Note: SLJIT_NUMBER_OF_SCRATCH_REGISTERS would be 2 and
130 1.3 alnsn SLJIT_NUMBER_OF_SAVED_REGISTERS would be 3 for this architecture.
131 1.3 alnsn
132 1.3 alnsn Note: On all supported architectures SLJIT_NUMBER_OF_REGISTERS >= 10
133 1.3 alnsn and SLJIT_NUMBER_OF_SAVED_REGISTERS >= 5. However, 4 registers
134 1.3 alnsn are virtual on x86-32. See below.
135 1.3 alnsn
136 1.3 alnsn The purpose of this definition is convenience. Although a register
137 1.3 alnsn is either scratch register or saved register, SLJIT allows accessing
138 1.3 alnsn them from the other set. For example, four registers can be used as
139 1.3 alnsn scratch registers and the fifth one as saved register on the architecture
140 1.3 alnsn above. Of course the last two scratch registers (R2 and R3) from this
141 1.3 alnsn four will be saved on the stack, because they are defined as saved
142 1.3 alnsn registers in the application binary interface. Still R2 and R3 can be
143 1.3 alnsn used for referencing to these registers instead of S2 and S1, which
144 1.3 alnsn makes easier to write platform independent code. Scratch registers
145 1.3 alnsn can be saved registers in a similar way, but these extra saved
146 1.3 alnsn registers will not be preserved across function calls! Hence the
147 1.3 alnsn application must save them on those platforms, where the number of
148 1.3 alnsn saved registers is too low. This can be done by copy them onto
149 1.3 alnsn the stack and restore them after a function call.
150 1.3 alnsn
151 1.3 alnsn Note: To emphasize that registers assigned to R2-R4 are saved
152 1.3 alnsn registers, they are enclosed by square brackets. S3-S4
153 1.3 alnsn are marked in a similar way.
154 1.3 alnsn
155 1.3 alnsn Note: sljit_emit_enter and sljit_set_context defines whether a register
156 1.3 alnsn is S or R register. E.g: when 3 scratches and 1 saved is mapped
157 1.3 alnsn by sljit_emit_enter, the allowed register set will be: R0-R2 and
158 1.3 alnsn S0. Although S2 is mapped to the same position as R2, it does not
159 1.3 alnsn available in the current configuration. Furthermore the R3 (S1)
160 1.3 alnsn register does not available as well.
161 1.3 alnsn */
162 1.3 alnsn
163 1.3 alnsn /* When SLJIT_UNUSED is specified as destination, the result is discarded. */
164 1.1 alnsn #define SLJIT_UNUSED 0
165 1.1 alnsn
166 1.3 alnsn /* Scratch registers. */
167 1.3 alnsn #define SLJIT_R0 1
168 1.3 alnsn #define SLJIT_R1 2
169 1.3 alnsn #define SLJIT_R2 3
170 1.3 alnsn /* Note: on x86-32, R3 - R6 (same as S3 - S6) are emulated (they
171 1.3 alnsn are allocated on the stack). These registers are called virtual
172 1.3 alnsn and cannot be used for memory addressing (cannot be part of
173 1.3 alnsn any SLJIT_MEM1, SLJIT_MEM2 construct). There is no such
174 1.3 alnsn limitation on other CPUs. See sljit_get_register_index(). */
175 1.3 alnsn #define SLJIT_R3 4
176 1.3 alnsn #define SLJIT_R4 5
177 1.3 alnsn #define SLJIT_R5 6
178 1.3 alnsn #define SLJIT_R6 7
179 1.3 alnsn #define SLJIT_R7 8
180 1.3 alnsn #define SLJIT_R8 9
181 1.3 alnsn #define SLJIT_R9 10
182 1.3 alnsn /* All R registers provided by the architecture can be accessed by SLJIT_R(i)
183 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_REGISTERS. */
184 1.3 alnsn #define SLJIT_R(i) (1 + (i))
185 1.3 alnsn
186 1.3 alnsn /* Saved registers. */
187 1.3 alnsn #define SLJIT_S0 (SLJIT_NUMBER_OF_REGISTERS)
188 1.3 alnsn #define SLJIT_S1 (SLJIT_NUMBER_OF_REGISTERS - 1)
189 1.3 alnsn #define SLJIT_S2 (SLJIT_NUMBER_OF_REGISTERS - 2)
190 1.3 alnsn /* Note: on x86-32, S3 - S6 (same as R3 - R6) are emulated (they
191 1.3 alnsn are allocated on the stack). These registers are called virtual
192 1.3 alnsn and cannot be used for memory addressing (cannot be part of
193 1.3 alnsn any SLJIT_MEM1, SLJIT_MEM2 construct). There is no such
194 1.3 alnsn limitation on other CPUs. See sljit_get_register_index(). */
195 1.3 alnsn #define SLJIT_S3 (SLJIT_NUMBER_OF_REGISTERS - 3)
196 1.3 alnsn #define SLJIT_S4 (SLJIT_NUMBER_OF_REGISTERS - 4)
197 1.3 alnsn #define SLJIT_S5 (SLJIT_NUMBER_OF_REGISTERS - 5)
198 1.3 alnsn #define SLJIT_S6 (SLJIT_NUMBER_OF_REGISTERS - 6)
199 1.3 alnsn #define SLJIT_S7 (SLJIT_NUMBER_OF_REGISTERS - 7)
200 1.3 alnsn #define SLJIT_S8 (SLJIT_NUMBER_OF_REGISTERS - 8)
201 1.3 alnsn #define SLJIT_S9 (SLJIT_NUMBER_OF_REGISTERS - 9)
202 1.3 alnsn /* All S registers provided by the architecture can be accessed by SLJIT_S(i)
203 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_SAVED_REGISTERS. */
204 1.3 alnsn #define SLJIT_S(i) (SLJIT_NUMBER_OF_REGISTERS - (i))
205 1.3 alnsn
206 1.3 alnsn /* Registers >= SLJIT_FIRST_SAVED_REG are saved registers. */
207 1.3 alnsn #define SLJIT_FIRST_SAVED_REG (SLJIT_S0 - SLJIT_NUMBER_OF_SAVED_REGISTERS + 1)
208 1.3 alnsn
209 1.3 alnsn /* The SLJIT_SP provides direct access to the linear stack space allocated by
210 1.3 alnsn sljit_emit_enter. It can only be used in the following form: SLJIT_MEM1(SLJIT_SP).
211 1.3 alnsn The immediate offset is extended by the relative stack offset automatically.
212 1.3 alnsn The sljit_get_local_base can be used to obtain the absolute offset. */
213 1.3 alnsn #define SLJIT_SP (SLJIT_NUMBER_OF_REGISTERS + 1)
214 1.1 alnsn
215 1.1 alnsn /* Return with machine word. */
216 1.1 alnsn
217 1.3 alnsn #define SLJIT_RETURN_REG SLJIT_R0
218 1.1 alnsn
219 1.1 alnsn /* x86 prefers specific registers for special purposes. In case of shift
220 1.3 alnsn by register it supports only SLJIT_R2 for shift argument
221 1.1 alnsn (which is the src2 argument of sljit_emit_op2). If another register is
222 1.1 alnsn used, sljit must exchange data between registers which cause a minor
223 1.1 alnsn slowdown. Other architectures has no such limitation. */
224 1.1 alnsn
225 1.3 alnsn #define SLJIT_PREF_SHIFT_REG SLJIT_R2
226 1.1 alnsn
227 1.1 alnsn /* --------------------------------------------------------------------- */
228 1.1 alnsn /* Floating point registers */
229 1.1 alnsn /* --------------------------------------------------------------------- */
230 1.1 alnsn
231 1.3 alnsn /* Each floating point register can store a 32 or a 64 bit precision
232 1.3 alnsn value. The FR and FS register sets are overlap in the same way as R
233 1.3 alnsn and S register sets. See above. */
234 1.3 alnsn
235 1.1 alnsn /* Note: SLJIT_UNUSED as destination is not valid for floating point
236 1.3 alnsn operations, since they cannot be used for setting flags. */
237 1.1 alnsn
238 1.3 alnsn /* Floating point scratch registers. */
239 1.3 alnsn #define SLJIT_FR0 1
240 1.3 alnsn #define SLJIT_FR1 2
241 1.3 alnsn #define SLJIT_FR2 3
242 1.3 alnsn #define SLJIT_FR3 4
243 1.3 alnsn #define SLJIT_FR4 5
244 1.3 alnsn #define SLJIT_FR5 6
245 1.3 alnsn /* All FR registers provided by the architecture can be accessed by SLJIT_FR(i)
246 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_FLOAT_REGISTERS. */
247 1.3 alnsn #define SLJIT_FR(i) (1 + (i))
248 1.3 alnsn
249 1.3 alnsn /* Floating point saved registers. */
250 1.3 alnsn #define SLJIT_FS0 (SLJIT_NUMBER_OF_FLOAT_REGISTERS)
251 1.3 alnsn #define SLJIT_FS1 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 1)
252 1.3 alnsn #define SLJIT_FS2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 2)
253 1.3 alnsn #define SLJIT_FS3 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 3)
254 1.3 alnsn #define SLJIT_FS4 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 4)
255 1.3 alnsn #define SLJIT_FS5 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 5)
256 1.3 alnsn /* All S registers provided by the architecture can be accessed by SLJIT_FS(i)
257 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_SAVED_FLOAT_REGISTERS. */
258 1.3 alnsn #define SLJIT_FS(i) (SLJIT_NUMBER_OF_FLOAT_REGISTERS - (i))
259 1.2 alnsn
260 1.3 alnsn /* Float registers >= SLJIT_FIRST_SAVED_FLOAT_REG are saved registers. */
261 1.3 alnsn #define SLJIT_FIRST_SAVED_FLOAT_REG (SLJIT_FS0 - SLJIT_NUMBER_OF_SAVED_FLOAT_REGISTERS + 1)
262 1.1 alnsn
263 1.1 alnsn /* --------------------------------------------------------------------- */
264 1.1 alnsn /* Main structures and functions */
265 1.1 alnsn /* --------------------------------------------------------------------- */
266 1.1 alnsn
267 1.3 alnsn /*
268 1.3 alnsn The following structures are private, and can be changed in the
269 1.3 alnsn future. Keeping them here allows code inlining.
270 1.3 alnsn */
271 1.3 alnsn
272 1.1 alnsn struct sljit_memory_fragment {
273 1.1 alnsn struct sljit_memory_fragment *next;
274 1.1 alnsn sljit_uw used_size;
275 1.2 alnsn /* Must be aligned to sljit_sw. */
276 1.3 alnsn sljit_u8 memory[1];
277 1.1 alnsn };
278 1.1 alnsn
279 1.1 alnsn struct sljit_label {
280 1.1 alnsn struct sljit_label *next;
281 1.1 alnsn sljit_uw addr;
282 1.1 alnsn /* The maximum size difference. */
283 1.1 alnsn sljit_uw size;
284 1.1 alnsn };
285 1.1 alnsn
286 1.1 alnsn struct sljit_jump {
287 1.1 alnsn struct sljit_jump *next;
288 1.1 alnsn sljit_uw addr;
289 1.2 alnsn sljit_sw flags;
290 1.1 alnsn union {
291 1.1 alnsn sljit_uw target;
292 1.1 alnsn struct sljit_label* label;
293 1.1 alnsn } u;
294 1.1 alnsn };
295 1.1 alnsn
296 1.1 alnsn struct sljit_const {
297 1.1 alnsn struct sljit_const *next;
298 1.1 alnsn sljit_uw addr;
299 1.1 alnsn };
300 1.1 alnsn
301 1.1 alnsn struct sljit_compiler {
302 1.3 alnsn sljit_s32 error;
303 1.3 alnsn sljit_s32 options;
304 1.1 alnsn
305 1.1 alnsn struct sljit_label *labels;
306 1.1 alnsn struct sljit_jump *jumps;
307 1.1 alnsn struct sljit_const *consts;
308 1.1 alnsn struct sljit_label *last_label;
309 1.1 alnsn struct sljit_jump *last_jump;
310 1.1 alnsn struct sljit_const *last_const;
311 1.1 alnsn
312 1.3 alnsn void *allocator_data;
313 1.1 alnsn struct sljit_memory_fragment *buf;
314 1.1 alnsn struct sljit_memory_fragment *abuf;
315 1.1 alnsn
316 1.3 alnsn /* Used scratch registers. */
317 1.3 alnsn sljit_s32 scratches;
318 1.1 alnsn /* Used saved registers. */
319 1.3 alnsn sljit_s32 saveds;
320 1.3 alnsn /* Used float scratch registers. */
321 1.3 alnsn sljit_s32 fscratches;
322 1.3 alnsn /* Used float saved registers. */
323 1.3 alnsn sljit_s32 fsaveds;
324 1.1 alnsn /* Local stack size. */
325 1.3 alnsn sljit_s32 local_size;
326 1.1 alnsn /* Code size. */
327 1.1 alnsn sljit_uw size;
328 1.1 alnsn /* For statistical purposes. */
329 1.1 alnsn sljit_uw executable_size;
330 1.1 alnsn
331 1.1 alnsn #if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
332 1.3 alnsn sljit_s32 args;
333 1.1 alnsn #endif
334 1.1 alnsn
335 1.1 alnsn #if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
336 1.3 alnsn sljit_s32 mode32;
337 1.1 alnsn #endif
338 1.1 alnsn
339 1.3 alnsn #if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86)
340 1.3 alnsn sljit_s32 flags_saved;
341 1.1 alnsn #endif
342 1.1 alnsn
343 1.1 alnsn #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
344 1.1 alnsn /* Constant pool handling. */
345 1.1 alnsn sljit_uw *cpool;
346 1.3 alnsn sljit_u8 *cpool_unique;
347 1.1 alnsn sljit_uw cpool_diff;
348 1.1 alnsn sljit_uw cpool_fill;
349 1.1 alnsn /* Other members. */
350 1.1 alnsn /* Contains pointer, "ldr pc, [...]" pairs. */
351 1.1 alnsn sljit_uw patches;
352 1.1 alnsn #endif
353 1.1 alnsn
354 1.1 alnsn #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) || (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
355 1.1 alnsn /* Temporary fields. */
356 1.1 alnsn sljit_uw shift_imm;
357 1.3 alnsn sljit_s32 cache_arg;
358 1.2 alnsn sljit_sw cache_argw;
359 1.1 alnsn #endif
360 1.1 alnsn
361 1.1 alnsn #if (defined SLJIT_CONFIG_ARM_THUMB2 && SLJIT_CONFIG_ARM_THUMB2)
362 1.3 alnsn sljit_s32 cache_arg;
363 1.2 alnsn sljit_sw cache_argw;
364 1.2 alnsn #endif
365 1.2 alnsn
366 1.2 alnsn #if (defined SLJIT_CONFIG_ARM_64 && SLJIT_CONFIG_ARM_64)
367 1.3 alnsn sljit_s32 cache_arg;
368 1.2 alnsn sljit_sw cache_argw;
369 1.1 alnsn #endif
370 1.1 alnsn
371 1.3 alnsn #if (defined SLJIT_CONFIG_PPC && SLJIT_CONFIG_PPC)
372 1.2 alnsn sljit_sw imm;
373 1.3 alnsn sljit_s32 cache_arg;
374 1.2 alnsn sljit_sw cache_argw;
375 1.2 alnsn #endif
376 1.2 alnsn
377 1.3 alnsn #if (defined SLJIT_CONFIG_MIPS && SLJIT_CONFIG_MIPS)
378 1.3 alnsn sljit_s32 delay_slot;
379 1.3 alnsn sljit_s32 cache_arg;
380 1.2 alnsn sljit_sw cache_argw;
381 1.2 alnsn #endif
382 1.2 alnsn
383 1.2 alnsn #if (defined SLJIT_CONFIG_SPARC_32 && SLJIT_CONFIG_SPARC_32)
384 1.3 alnsn sljit_s32 delay_slot;
385 1.3 alnsn sljit_s32 cache_arg;
386 1.2 alnsn sljit_sw cache_argw;
387 1.1 alnsn #endif
388 1.1 alnsn
389 1.2 alnsn #if (defined SLJIT_CONFIG_TILEGX && SLJIT_CONFIG_TILEGX)
390 1.3 alnsn sljit_s32 cache_arg;
391 1.2 alnsn sljit_sw cache_argw;
392 1.1 alnsn #endif
393 1.1 alnsn
394 1.1 alnsn #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
395 1.1 alnsn FILE* verbose;
396 1.1 alnsn #endif
397 1.1 alnsn
398 1.3 alnsn #if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) \
399 1.3 alnsn || (defined SLJIT_DEBUG && SLJIT_DEBUG)
400 1.1 alnsn /* Local size passed to the functions. */
401 1.3 alnsn sljit_s32 logical_local_size;
402 1.1 alnsn #endif
403 1.1 alnsn
404 1.3 alnsn #if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) \
405 1.3 alnsn || (defined SLJIT_DEBUG && SLJIT_DEBUG) \
406 1.3 alnsn || (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
407 1.3 alnsn sljit_s32 skip_checks;
408 1.1 alnsn #endif
409 1.1 alnsn };
410 1.1 alnsn
411 1.1 alnsn /* --------------------------------------------------------------------- */
412 1.1 alnsn /* Main functions */
413 1.1 alnsn /* --------------------------------------------------------------------- */
414 1.1 alnsn
415 1.3 alnsn /* Creates an sljit compiler. The allocator_data is required by some
416 1.3 alnsn custom memory managers. This pointer is passed to SLJIT_MALLOC
417 1.3 alnsn and SLJIT_FREE macros. Most allocators (including the default
418 1.3 alnsn one) ignores this value, and it is recommended to pass NULL
419 1.3 alnsn as a dummy value for allocator_data.
420 1.3 alnsn
421 1.1 alnsn Returns NULL if failed. */
422 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_compiler* sljit_create_compiler(void *allocator_data);
423 1.2 alnsn
424 1.3 alnsn /* Frees everything except the compiled machine code. */
425 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_free_compiler(struct sljit_compiler *compiler);
426 1.1 alnsn
427 1.2 alnsn /* Returns the current error code. If an error is occurred, future sljit
428 1.2 alnsn calls which uses the same compiler argument returns early with the same
429 1.2 alnsn error code. Thus there is no need for checking the error after every
430 1.2 alnsn call, it is enough to do it before the code is compiled. Removing
431 1.2 alnsn these checks increases the performance of the compiling process. */
432 1.3 alnsn static SLJIT_INLINE sljit_s32 sljit_get_compiler_error(struct sljit_compiler *compiler) { return compiler->error; }
433 1.3 alnsn
434 1.3 alnsn /* Sets the compiler error code to SLJIT_ERR_ALLOC_FAILED except
435 1.3 alnsn if an error was detected before. After the error code is set
436 1.3 alnsn the compiler behaves as if the allocation failure happened
437 1.3 alnsn during an sljit function call. This can greatly simplify error
438 1.3 alnsn checking, since only the compiler status needs to be checked
439 1.3 alnsn after the compilation. */
440 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_compiler_memory_error(struct sljit_compiler *compiler);
441 1.1 alnsn
442 1.1 alnsn /*
443 1.1 alnsn Allocate a small amount of memory. The size must be <= 64 bytes on 32 bit,
444 1.2 alnsn and <= 128 bytes on 64 bit architectures. The memory area is owned by the
445 1.2 alnsn compiler, and freed by sljit_free_compiler. The returned pointer is
446 1.2 alnsn sizeof(sljit_sw) aligned. Excellent for allocating small blocks during
447 1.2 alnsn the compiling, and no need to worry about freeing them. The size is
448 1.2 alnsn enough to contain at most 16 pointers. If the size is outside of the range,
449 1.2 alnsn the function will return with NULL. However, this return value does not
450 1.2 alnsn indicate that there is no more memory (does not set the current error code
451 1.2 alnsn of the compiler to out-of-memory status).
452 1.1 alnsn */
453 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void* sljit_alloc_memory(struct sljit_compiler *compiler, sljit_s32 size);
454 1.1 alnsn
455 1.1 alnsn #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
456 1.1 alnsn /* Passing NULL disables verbose. */
457 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_compiler_verbose(struct sljit_compiler *compiler, FILE* verbose);
458 1.1 alnsn #endif
459 1.1 alnsn
460 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler);
461 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_free_code(void* code);
462 1.1 alnsn
463 1.1 alnsn /*
464 1.2 alnsn After the machine code generation is finished we can retrieve the allocated
465 1.2 alnsn executable memory size, although this area may not be fully filled with
466 1.2 alnsn instructions depending on some optimizations. This function is useful only
467 1.2 alnsn for statistical purposes.
468 1.1 alnsn
469 1.1 alnsn Before a successful code generation, this function returns with 0.
470 1.1 alnsn */
471 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_generated_code_size(struct sljit_compiler *compiler) { return compiler->executable_size; }
472 1.1 alnsn
473 1.2 alnsn /* Instruction generation. Returns with any error code. If there is no
474 1.2 alnsn error, they return with SLJIT_SUCCESS. */
475 1.1 alnsn
476 1.1 alnsn /*
477 1.3 alnsn The executable code is a function call from the viewpoint of the C
478 1.3 alnsn language. The function calls must obey to the ABI (Application
479 1.3 alnsn Binary Interface) of the platform, which specify the purpose of
480 1.3 alnsn all machine registers and stack handling among other things. The
481 1.3 alnsn sljit_emit_enter function emits the necessary instructions for
482 1.3 alnsn setting up a new context for the executable code and moves function
483 1.3 alnsn arguments to the saved registers. Furthermore the options argument
484 1.3 alnsn can be used to pass configuration options to the compiler. The
485 1.3 alnsn available options are listed before sljit_emit_enter.
486 1.3 alnsn
487 1.3 alnsn The number of sljit_sw arguments passed to the generated function
488 1.3 alnsn are specified in the "args" parameter. The number of arguments must
489 1.3 alnsn be less than or equal to 3. The first argument goes to SLJIT_S0,
490 1.3 alnsn the second goes to SLJIT_S1 and so on. The register set used by
491 1.3 alnsn the function must be declared as well. The number of scratch and
492 1.3 alnsn saved registers used by the function must be passed to sljit_emit_enter.
493 1.3 alnsn Only R registers between R0 and "scratches" argument can be used
494 1.3 alnsn later. E.g. if "scratches" is set to 2, the register set will be
495 1.3 alnsn limited to R0 and R1. The S registers and the floating point
496 1.3 alnsn registers ("fscratches" and "fsaveds") are specified in a similar
497 1.3 alnsn way. The sljit_emit_enter is also capable of allocating a stack
498 1.3 alnsn space for local variables. The "local_size" argument contains the
499 1.3 alnsn size in bytes of this local area and its staring address is stored
500 1.3 alnsn in SLJIT_SP. The memory area between SLJIT_SP (inclusive) and
501 1.3 alnsn SLJIT_SP + local_size (exclusive) can be modified freely until
502 1.3 alnsn the function returns. The stack space is not initialized.
503 1.3 alnsn
504 1.3 alnsn Note: the following conditions must met:
505 1.3 alnsn 0 <= scratches <= SLJIT_NUMBER_OF_REGISTERS
506 1.3 alnsn 0 <= saveds <= SLJIT_NUMBER_OF_REGISTERS
507 1.3 alnsn scratches + saveds <= SLJIT_NUMBER_OF_REGISTERS
508 1.3 alnsn 0 <= fscratches <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
509 1.3 alnsn 0 <= fsaveds <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
510 1.3 alnsn fscratches + fsaveds <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
511 1.1 alnsn
512 1.2 alnsn Note: every call of sljit_emit_enter and sljit_set_context
513 1.3 alnsn overwrites the previous context.
514 1.3 alnsn */
515 1.3 alnsn
516 1.3 alnsn /* The absolute address returned by sljit_get_local_base with
517 1.3 alnsn offset 0 is aligned to sljit_d. Otherwise it is aligned to sljit_uw. */
518 1.3 alnsn #define SLJIT_DOUBLE_ALIGNMENT 0x00000001
519 1.1 alnsn
520 1.3 alnsn /* The local_size must be >= 0 and <= SLJIT_MAX_LOCAL_SIZE. */
521 1.1 alnsn #define SLJIT_MAX_LOCAL_SIZE 65536
522 1.1 alnsn
523 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
524 1.3 alnsn sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
525 1.3 alnsn sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size);
526 1.1 alnsn
527 1.1 alnsn /* The machine code has a context (which contains the local stack space size,
528 1.1 alnsn number of used registers, etc.) which initialized by sljit_emit_enter. Several
529 1.1 alnsn functions (like sljit_emit_return) requres this context to be able to generate
530 1.1 alnsn the appropriate code. However, some code fragments (like inline cache) may have
531 1.3 alnsn no normal entry point so their context is unknown for the compiler. Their context
532 1.3 alnsn can be provided to the compiler by the sljit_set_context function.
533 1.1 alnsn
534 1.1 alnsn Note: every call of sljit_emit_enter and sljit_set_context overwrites
535 1.1 alnsn the previous context. */
536 1.1 alnsn
537 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
538 1.3 alnsn sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
539 1.3 alnsn sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size);
540 1.1 alnsn
541 1.1 alnsn /* Return from machine code. The op argument can be SLJIT_UNUSED which means the
542 1.1 alnsn function does not return with anything or any opcode between SLJIT_MOV and
543 1.2 alnsn SLJIT_MOV_P (see sljit_emit_op1). As for src and srcw they must be 0 if op
544 1.1 alnsn is SLJIT_UNUSED, otherwise see below the description about source and
545 1.1 alnsn destination arguments. */
546 1.1 alnsn
547 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op,
548 1.3 alnsn sljit_s32 src, sljit_sw srcw);
549 1.2 alnsn
550 1.2 alnsn /* Fast calling mechanism for utility functions (see SLJIT_FAST_CALL). All registers and
551 1.2 alnsn even the stack frame is passed to the callee. The return address is preserved in
552 1.2 alnsn dst/dstw by sljit_emit_fast_enter (the type of the value stored by this function
553 1.2 alnsn is sljit_p), and sljit_emit_fast_return can use this as a return value later. */
554 1.2 alnsn
555 1.2 alnsn /* Note: only for sljit specific, non ABI compilant calls. Fast, since only a few machine
556 1.2 alnsn instructions are needed. Excellent for small uility functions, where saving registers
557 1.2 alnsn and setting up a new stack frame would cost too much performance. However, it is still
558 1.2 alnsn possible to return to the address of the caller (or anywhere else). */
559 1.1 alnsn
560 1.1 alnsn /* Note: flags are not changed (unlike sljit_emit_enter / sljit_emit_return). */
561 1.1 alnsn
562 1.1 alnsn /* Note: although sljit_emit_fast_return could be replaced by an ijump, it is not suggested,
563 1.1 alnsn since many architectures do clever branch prediction on call / return instruction pairs. */
564 1.1 alnsn
565 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw);
566 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw);
567 1.1 alnsn
568 1.1 alnsn /*
569 1.1 alnsn Source and destination values for arithmetical instructions
570 1.1 alnsn imm - a simple immediate value (cannot be used as a destination)
571 1.1 alnsn reg - any of the registers (immediate argument must be 0)
572 1.1 alnsn [imm] - absolute immediate memory address
573 1.1 alnsn [reg+imm] - indirect memory address
574 1.1 alnsn [reg+(reg<<imm)] - indirect indexed memory address (shift must be between 0 and 3)
575 1.2 alnsn useful for (byte, half, int, sljit_sw) array access
576 1.1 alnsn (fully supported by both x86 and ARM architectures, and cheap operation on others)
577 1.1 alnsn */
578 1.1 alnsn
579 1.1 alnsn /*
580 1.1 alnsn IMPORATNT NOTE: memory access MUST be naturally aligned except
581 1.1 alnsn SLJIT_UNALIGNED macro is defined and its value is 1.
582 1.1 alnsn
583 1.1 alnsn length | alignment
584 1.1 alnsn ---------+-----------
585 1.2 alnsn byte | 1 byte (any physical_address is accepted)
586 1.2 alnsn half | 2 byte (physical_address & 0x1 == 0)
587 1.2 alnsn int | 4 byte (physical_address & 0x3 == 0)
588 1.2 alnsn word | 4 byte if SLJIT_32BIT_ARCHITECTURE is defined and its value is 1
589 1.1 alnsn | 8 byte if SLJIT_64BIT_ARCHITECTURE is defined and its value is 1
590 1.2 alnsn pointer | size of sljit_p type (4 byte on 32 bit machines, 4 or 8 byte
591 1.2 alnsn | on 64 bit machines)
592 1.1 alnsn
593 1.2 alnsn Note: Different architectures have different addressing limitations.
594 1.2 alnsn A single instruction is enough for the following addressing
595 1.2 alnsn modes. Other adrressing modes are emulated by instruction
596 1.2 alnsn sequences. This information could help to improve those code
597 1.2 alnsn generators which focuses only a few architectures.
598 1.2 alnsn
599 1.2 alnsn x86: [reg+imm], -2^32+1 <= imm <= 2^32-1 (full address space on x86-32)
600 1.2 alnsn [reg+(reg<<imm)] is supported
601 1.2 alnsn [imm], -2^32+1 <= imm <= 2^32-1 is supported
602 1.2 alnsn Write-back is not supported
603 1.2 alnsn arm: [reg+imm], -4095 <= imm <= 4095 or -255 <= imm <= 255 for signed
604 1.2 alnsn bytes, any halfs or floating point values)
605 1.2 alnsn [reg+(reg<<imm)] is supported
606 1.2 alnsn Write-back is supported
607 1.2 alnsn arm-t2: [reg+imm], -255 <= imm <= 4095
608 1.2 alnsn [reg+(reg<<imm)] is supported
609 1.2 alnsn Write back is supported only for [reg+imm], where -255 <= imm <= 255
610 1.2 alnsn ppc: [reg+imm], -65536 <= imm <= 65535. 64 bit loads/stores and 32 bit
611 1.2 alnsn signed load on 64 bit requires immediates divisible by 4.
612 1.2 alnsn [reg+imm] is not supported for signed 8 bit values.
613 1.2 alnsn [reg+reg] is supported
614 1.2 alnsn Write-back is supported except for one instruction: 32 bit signed
615 1.2 alnsn load with [reg+imm] addressing mode on 64 bit.
616 1.2 alnsn mips: [reg+imm], -65536 <= imm <= 65535
617 1.2 alnsn sparc: [reg+imm], -4096 <= imm <= 4095
618 1.2 alnsn [reg+reg] is supported
619 1.1 alnsn */
620 1.1 alnsn
621 1.1 alnsn /* Register output: simply the name of the register.
622 1.1 alnsn For destination, you can use SLJIT_UNUSED as well. */
623 1.2 alnsn #define SLJIT_MEM 0x80
624 1.1 alnsn #define SLJIT_MEM0() (SLJIT_MEM)
625 1.1 alnsn #define SLJIT_MEM1(r1) (SLJIT_MEM | (r1))
626 1.2 alnsn #define SLJIT_MEM2(r1, r2) (SLJIT_MEM | (r1) | ((r2) << 8))
627 1.2 alnsn #define SLJIT_IMM 0x40
628 1.1 alnsn
629 1.3 alnsn /* Set 32 bit operation mode (I) on 64 bit CPUs. This flag is ignored on 32
630 1.3 alnsn bit CPUs. When this flag is set for an arithmetic operation, only the
631 1.3 alnsn lower 32 bit of the input register(s) are used, and the CPU status flags
632 1.3 alnsn are set according to the 32 bit result. Although the higher 32 bit of
633 1.3 alnsn the input and the result registers are not defined by SLJIT, it might be
634 1.3 alnsn defined by the CPU architecture (e.g. MIPS). To satisfy these requirements
635 1.3 alnsn all source registers must be computed by operations where this flag is
636 1.3 alnsn also set. In other words 32 and 64 bit arithmetic operations cannot be
637 1.3 alnsn mixed. The only exception is SLJIT_IMOV and SLJIT_IMOVU whose source
638 1.3 alnsn register can hold any 32 or 64 bit value. This source register is
639 1.3 alnsn converted to a 32 bit compatible format. SLJIT does not generate any
640 1.3 alnsn instructions on certain CPUs (e.g. on x86 and ARM) if the source and
641 1.3 alnsn destination operands are the same registers. Affects sljit_emit_op0,
642 1.3 alnsn sljit_emit_op1 and sljit_emit_op2. */
643 1.3 alnsn #define SLJIT_I32_OP 0x100
644 1.1 alnsn
645 1.3 alnsn /* F32 precision mode (SP). This flag is similar to SLJIT_I32_OP, just
646 1.2 alnsn it applies to floating point registers (it is even the same bit). When
647 1.3 alnsn this flag is passed, the CPU performs 32 bit floating point operations.
648 1.3 alnsn Similar to SLJIT_I32_OP, all register arguments must be computed by
649 1.3 alnsn floating point operations where this flag is also set. Affects
650 1.2 alnsn sljit_emit_fop1, sljit_emit_fop2 and sljit_emit_fcmp. */
651 1.3 alnsn #define SLJIT_F32_OP 0x100
652 1.2 alnsn
653 1.1 alnsn /* Common CPU status flags for all architectures (x86, ARM, PPC)
654 1.1 alnsn - carry flag
655 1.1 alnsn - overflow flag
656 1.1 alnsn - zero flag
657 1.1 alnsn - negative/positive flag (depends on arc)
658 1.1 alnsn On mips, these flags are emulated by software. */
659 1.1 alnsn
660 1.1 alnsn /* By default, the instructions may, or may not set the CPU status flags.
661 1.1 alnsn Forcing to set or keep status flags can be done with the following flags: */
662 1.1 alnsn
663 1.1 alnsn /* Note: sljit tries to emit the minimum number of instructions. Using these
664 1.1 alnsn flags can increase them, so use them wisely to avoid unnecessary code generation. */
665 1.1 alnsn
666 1.1 alnsn /* Set Equal (Zero) status flag (E). */
667 1.1 alnsn #define SLJIT_SET_E 0x0200
668 1.2 alnsn /* Set unsigned status flag (U). */
669 1.2 alnsn #define SLJIT_SET_U 0x0400
670 1.1 alnsn /* Set signed status flag (S). */
671 1.2 alnsn #define SLJIT_SET_S 0x0800
672 1.1 alnsn /* Set signed overflow flag (O). */
673 1.1 alnsn #define SLJIT_SET_O 0x1000
674 1.1 alnsn /* Set carry flag (C).
675 1.1 alnsn Note: Kinda unsigned overflow, but behaves differently on various cpus. */
676 1.1 alnsn #define SLJIT_SET_C 0x2000
677 1.1 alnsn /* Do not modify the flags (K).
678 1.1 alnsn Note: This flag cannot be combined with any other SLJIT_SET_* flag. */
679 1.1 alnsn #define SLJIT_KEEP_FLAGS 0x4000
680 1.1 alnsn
681 1.1 alnsn /* Notes:
682 1.1 alnsn - you cannot postpone conditional jump instructions except if noted that
683 1.1 alnsn the instruction does not set flags (See: SLJIT_KEEP_FLAGS).
684 1.1 alnsn - flag combinations: '|' means 'logical or'. */
685 1.1 alnsn
686 1.3 alnsn /* Starting index of opcodes for sljit_emit_op0. */
687 1.3 alnsn #define SLJIT_OP0_BASE 0
688 1.3 alnsn
689 1.1 alnsn /* Flags: - (never set any flags)
690 1.3 alnsn Note: breakpoint instruction is not supported by all architectures (e.g. ppc)
691 1.1 alnsn It falls back to SLJIT_NOP in those cases. */
692 1.3 alnsn #define SLJIT_BREAKPOINT (SLJIT_OP0_BASE + 0)
693 1.1 alnsn /* Flags: - (never set any flags)
694 1.1 alnsn Note: may or may not cause an extra cycle wait
695 1.1 alnsn it can even decrease the runtime in a few cases. */
696 1.3 alnsn #define SLJIT_NOP (SLJIT_OP0_BASE + 1)
697 1.2 alnsn /* Flags: - (may destroy flags)
698 1.3 alnsn Unsigned multiplication of SLJIT_R0 and SLJIT_R1.
699 1.3 alnsn Result is placed into SLJIT_R1:SLJIT_R0 (high:low) word */
700 1.3 alnsn #define SLJIT_LMUL_UW (SLJIT_OP0_BASE + 2)
701 1.2 alnsn /* Flags: - (may destroy flags)
702 1.3 alnsn Signed multiplication of SLJIT_R0 and SLJIT_R1.
703 1.3 alnsn Result is placed into SLJIT_R1:SLJIT_R0 (high:low) word */
704 1.3 alnsn #define SLJIT_LMUL_SW (SLJIT_OP0_BASE + 3)
705 1.3 alnsn /* Flags: I - (may destroy flags)
706 1.3 alnsn Unsigned divide of the value in SLJIT_R0 by the value in SLJIT_R1.
707 1.3 alnsn The result is placed into SLJIT_R0 and the remainder into SLJIT_R1.
708 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined. */
709 1.3 alnsn #define SLJIT_DIVMOD_UW (SLJIT_OP0_BASE + 4)
710 1.3 alnsn #define SLJIT_DIVMOD_U32 (SLJIT_DIVMOD_UW | SLJIT_I32_OP)
711 1.2 alnsn /* Flags: I - (may destroy flags)
712 1.3 alnsn Signed divide of the value in SLJIT_R0 by the value in SLJIT_R1.
713 1.3 alnsn The result is placed into SLJIT_R0 and the remainder into SLJIT_R1.
714 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined.
715 1.3 alnsn Note: if SLJIT_R1 is -1 and SLJIT_R0 is integer min (0x800..00),
716 1.3 alnsn the behaviour is undefined. */
717 1.3 alnsn #define SLJIT_DIVMOD_SW (SLJIT_OP0_BASE + 5)
718 1.3 alnsn #define SLJIT_DIVMOD_S32 (SLJIT_DIVMOD_SW | SLJIT_I32_OP)
719 1.2 alnsn /* Flags: I - (may destroy flags)
720 1.3 alnsn Unsigned divide of the value in SLJIT_R0 by the value in SLJIT_R1.
721 1.3 alnsn The result is placed into SLJIT_R0. SLJIT_R1 preserves its value.
722 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined. */
723 1.3 alnsn #define SLJIT_DIV_UW (SLJIT_OP0_BASE + 6)
724 1.3 alnsn #define SLJIT_DIV_U32 (SLJIT_DIV_UW | SLJIT_I32_OP)
725 1.3 alnsn /* Flags: I - (may destroy flags)
726 1.3 alnsn Signed divide of the value in SLJIT_R0 by the value in SLJIT_R1.
727 1.3 alnsn The result is placed into SLJIT_R0. SLJIT_R1 preserves its value.
728 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined.
729 1.3 alnsn Note: if SLJIT_R1 is -1 and SLJIT_R0 is integer min (0x800..00),
730 1.3 alnsn the behaviour is undefined. */
731 1.3 alnsn #define SLJIT_DIV_SW (SLJIT_OP0_BASE + 7)
732 1.3 alnsn #define SLJIT_DIV_S32 (SLJIT_DIV_SW | SLJIT_I32_OP)
733 1.3 alnsn
734 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op);
735 1.1 alnsn
736 1.3 alnsn /* Starting index of opcodes for sljit_emit_op1. */
737 1.3 alnsn #define SLJIT_OP1_BASE 32
738 1.1 alnsn
739 1.1 alnsn /* Notes for MOV instructions:
740 1.2 alnsn U = Mov with update (pre form). If source or destination defined as SLJIT_MEM1(r1)
741 1.1 alnsn or SLJIT_MEM2(r1, r2), r1 is increased by the sum of r2 and the constant argument
742 1.1 alnsn UB = unsigned byte (8 bit)
743 1.1 alnsn SB = signed byte (8 bit)
744 1.2 alnsn UH = unsigned half (16 bit)
745 1.2 alnsn SH = signed half (16 bit)
746 1.2 alnsn UI = unsigned int (32 bit)
747 1.2 alnsn SI = signed int (32 bit)
748 1.2 alnsn P = pointer (sljit_p) size */
749 1.1 alnsn
750 1.1 alnsn /* Flags: - (never set any flags) */
751 1.3 alnsn #define SLJIT_MOV (SLJIT_OP1_BASE + 0)
752 1.2 alnsn /* Flags: I - (never set any flags) */
753 1.3 alnsn #define SLJIT_MOV_U8 (SLJIT_OP1_BASE + 1)
754 1.3 alnsn #define SLJIT_MOV32_U8 (SLJIT_MOV_U8 | SLJIT_I32_OP)
755 1.2 alnsn /* Flags: I - (never set any flags) */
756 1.3 alnsn #define SLJIT_MOV_S8 (SLJIT_OP1_BASE + 2)
757 1.3 alnsn #define SLJIT_MOV32_S8 (SLJIT_MOV_S8 | SLJIT_I32_OP)
758 1.2 alnsn /* Flags: I - (never set any flags) */
759 1.3 alnsn #define SLJIT_MOV_U16 (SLJIT_OP1_BASE + 3)
760 1.3 alnsn #define SLJIT_MOV32_U16 (SLJIT_MOV_U16 | SLJIT_I32_OP)
761 1.2 alnsn /* Flags: I - (never set any flags) */
762 1.3 alnsn #define SLJIT_MOV_S16 (SLJIT_OP1_BASE + 4)
763 1.3 alnsn #define SLJIT_MOV32_S16 (SLJIT_MOV_S16 | SLJIT_I32_OP)
764 1.2 alnsn /* Flags: I - (never set any flags)
765 1.3 alnsn Note: no SLJIT_MOV32_U32 form, since it is the same as SLJIT_MOV32 */
766 1.3 alnsn #define SLJIT_MOV_U32 (SLJIT_OP1_BASE + 5)
767 1.2 alnsn /* Flags: I - (never set any flags)
768 1.3 alnsn Note: no SLJIT_MOV32_S32 form, since it is the same as SLJIT_MOV32 */
769 1.3 alnsn #define SLJIT_MOV_S32 (SLJIT_OP1_BASE + 6)
770 1.3 alnsn /* Flags: I - (never set any flags) */
771 1.3 alnsn #define SLJIT_MOV32 (SLJIT_MOV_S32 | SLJIT_I32_OP)
772 1.1 alnsn /* Flags: - (never set any flags) */
773 1.3 alnsn #define SLJIT_MOV_P (SLJIT_OP1_BASE + 7)
774 1.1 alnsn /* Flags: - (never set any flags) */
775 1.3 alnsn #define SLJIT_MOVU (SLJIT_OP1_BASE + 8)
776 1.2 alnsn /* Flags: I - (never set any flags) */
777 1.3 alnsn #define SLJIT_MOVU_U8 (SLJIT_OP1_BASE + 9)
778 1.3 alnsn #define SLJIT_MOVU32_U8 (SLJIT_MOVU_U8 | SLJIT_I32_OP)
779 1.2 alnsn /* Flags: I - (never set any flags) */
780 1.3 alnsn #define SLJIT_MOVU_S8 (SLJIT_OP1_BASE + 10)
781 1.3 alnsn #define SLJIT_MOVU32_S8 (SLJIT_MOVU_S8 | SLJIT_I32_OP)
782 1.2 alnsn /* Flags: I - (never set any flags) */
783 1.3 alnsn #define SLJIT_MOVU_U16 (SLJIT_OP1_BASE + 11)
784 1.3 alnsn #define SLJIT_MOVU32_U16 (SLJIT_MOVU_U16 | SLJIT_I32_OP)
785 1.2 alnsn /* Flags: I - (never set any flags) */
786 1.3 alnsn #define SLJIT_MOVU_S16 (SLJIT_OP1_BASE + 12)
787 1.3 alnsn #define SLJIT_MOVU32_S16 (SLJIT_MOVU_S16 | SLJIT_I32_OP)
788 1.2 alnsn /* Flags: I - (never set any flags)
789 1.3 alnsn Note: no SLJIT_MOVU32_U32 form, since it is the same as SLJIT_MOVU32 */
790 1.3 alnsn #define SLJIT_MOVU_U32 (SLJIT_OP1_BASE + 13)
791 1.2 alnsn /* Flags: I - (never set any flags)
792 1.3 alnsn Note: no SLJIT_MOVU32_S32 form, since it is the same as SLJIT_MOVU32 */
793 1.3 alnsn #define SLJIT_MOVU_S32 (SLJIT_OP1_BASE + 14)
794 1.3 alnsn /* Flags: I - (never set any flags) */
795 1.3 alnsn #define SLJIT_MOVU32 (SLJIT_MOVU_S32 | SLJIT_I32_OP)
796 1.1 alnsn /* Flags: - (never set any flags) */
797 1.3 alnsn #define SLJIT_MOVU_P (SLJIT_OP1_BASE + 15)
798 1.1 alnsn /* Flags: I | E | K */
799 1.3 alnsn #define SLJIT_NOT (SLJIT_OP1_BASE + 16)
800 1.3 alnsn #define SLJIT_NOT32 (SLJIT_NOT | SLJIT_I32_OP)
801 1.1 alnsn /* Flags: I | E | O | K */
802 1.3 alnsn #define SLJIT_NEG (SLJIT_OP1_BASE + 17)
803 1.3 alnsn #define SLJIT_NEG32 (SLJIT_NEG | SLJIT_I32_OP)
804 1.1 alnsn /* Count leading zeroes
805 1.2 alnsn Flags: I | E | K
806 1.2 alnsn Important note! Sparc 32 does not support K flag, since
807 1.2 alnsn the required popc instruction is introduced only in sparc 64. */
808 1.3 alnsn #define SLJIT_CLZ (SLJIT_OP1_BASE + 18)
809 1.3 alnsn #define SLJIT_CLZ32 (SLJIT_CLZ | SLJIT_I32_OP)
810 1.3 alnsn
811 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
812 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
813 1.3 alnsn sljit_s32 src, sljit_sw srcw);
814 1.2 alnsn
815 1.3 alnsn /* Starting index of opcodes for sljit_emit_op2. */
816 1.3 alnsn #define SLJIT_OP2_BASE 96
817 1.1 alnsn
818 1.1 alnsn /* Flags: I | E | O | C | K */
819 1.3 alnsn #define SLJIT_ADD (SLJIT_OP2_BASE + 0)
820 1.3 alnsn #define SLJIT_ADD32 (SLJIT_ADD | SLJIT_I32_OP)
821 1.1 alnsn /* Flags: I | C | K */
822 1.3 alnsn #define SLJIT_ADDC (SLJIT_OP2_BASE + 1)
823 1.3 alnsn #define SLJIT_ADDC32 (SLJIT_ADDC | SLJIT_I32_OP)
824 1.2 alnsn /* Flags: I | E | U | S | O | C | K */
825 1.3 alnsn #define SLJIT_SUB (SLJIT_OP2_BASE + 2)
826 1.3 alnsn #define SLJIT_SUB32 (SLJIT_SUB | SLJIT_I32_OP)
827 1.1 alnsn /* Flags: I | C | K */
828 1.3 alnsn #define SLJIT_SUBC (SLJIT_OP2_BASE + 3)
829 1.3 alnsn #define SLJIT_SUBC32 (SLJIT_SUBC | SLJIT_I32_OP)
830 1.1 alnsn /* Note: integer mul
831 1.1 alnsn Flags: I | O (see SLJIT_C_MUL_*) | K */
832 1.3 alnsn #define SLJIT_MUL (SLJIT_OP2_BASE + 4)
833 1.3 alnsn #define SLJIT_MUL32 (SLJIT_MUL | SLJIT_I32_OP)
834 1.1 alnsn /* Flags: I | E | K */
835 1.3 alnsn #define SLJIT_AND (SLJIT_OP2_BASE + 5)
836 1.3 alnsn #define SLJIT_AND32 (SLJIT_AND | SLJIT_I32_OP)
837 1.1 alnsn /* Flags: I | E | K */
838 1.3 alnsn #define SLJIT_OR (SLJIT_OP2_BASE + 6)
839 1.3 alnsn #define SLJIT_OR32 (SLJIT_OR | SLJIT_I32_OP)
840 1.1 alnsn /* Flags: I | E | K */
841 1.3 alnsn #define SLJIT_XOR (SLJIT_OP2_BASE + 7)
842 1.3 alnsn #define SLJIT_XOR32 (SLJIT_XOR | SLJIT_I32_OP)
843 1.1 alnsn /* Flags: I | E | K
844 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
845 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
846 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
847 1.3 alnsn to bit_length - 1, the result is undefined. */
848 1.3 alnsn #define SLJIT_SHL (SLJIT_OP2_BASE + 8)
849 1.3 alnsn #define SLJIT_SHL32 (SLJIT_SHL | SLJIT_I32_OP)
850 1.1 alnsn /* Flags: I | E | K
851 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
852 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
853 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
854 1.3 alnsn to bit_length - 1, the result is undefined. */
855 1.3 alnsn #define SLJIT_LSHR (SLJIT_OP2_BASE + 9)
856 1.3 alnsn #define SLJIT_LSHR32 (SLJIT_LSHR | SLJIT_I32_OP)
857 1.1 alnsn /* Flags: I | E | K
858 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
859 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
860 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
861 1.3 alnsn to bit_length - 1, the result is undefined. */
862 1.3 alnsn #define SLJIT_ASHR (SLJIT_OP2_BASE + 10)
863 1.3 alnsn #define SLJIT_ASHR32 (SLJIT_ASHR | SLJIT_I32_OP)
864 1.3 alnsn
865 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
866 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
867 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
868 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
869 1.1 alnsn
870 1.3 alnsn /* Returns with non-zero if fpu is available. */
871 1.1 alnsn
872 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void);
873 1.2 alnsn
874 1.3 alnsn /* Starting index of opcodes for sljit_emit_fop1. */
875 1.3 alnsn #define SLJIT_FOP1_BASE 128
876 1.2 alnsn
877 1.3 alnsn /* Flags: SP - (never set any flags) */
878 1.3 alnsn #define SLJIT_MOV_F64 (SLJIT_FOP1_BASE + 0)
879 1.3 alnsn #define SLJIT_MOV_F32 (SLJIT_MOV_F64 | SLJIT_F32_OP)
880 1.3 alnsn /* Convert opcodes: CONV[DST_TYPE].FROM[SRC_TYPE]
881 1.3 alnsn SRC/DST TYPE can be: D - double, S - single, W - signed word, I - signed int
882 1.3 alnsn Rounding mode when the destination is W or I: round towards zero. */
883 1.3 alnsn /* Flags: SP - (never set any flags) */
884 1.3 alnsn #define SLJIT_CONV_F64_FROM_F32 (SLJIT_FOP1_BASE + 1)
885 1.3 alnsn #define SLJIT_CONV_F32_FROM_F64 (SLJIT_CONV_F64_FROM_F32 | SLJIT_F32_OP)
886 1.3 alnsn /* Flags: SP - (never set any flags) */
887 1.3 alnsn #define SLJIT_CONV_SW_FROM_F64 (SLJIT_FOP1_BASE + 2)
888 1.3 alnsn #define SLJIT_CONV_SW_FROM_F32 (SLJIT_CONV_SW_FROM_F64 | SLJIT_F32_OP)
889 1.3 alnsn /* Flags: SP - (never set any flags) */
890 1.3 alnsn #define SLJIT_CONV_S32_FROM_F64 (SLJIT_FOP1_BASE + 3)
891 1.3 alnsn #define SLJIT_CONV_S32_FROM_F32 (SLJIT_CONV_S32_FROM_F64 | SLJIT_F32_OP)
892 1.3 alnsn /* Flags: SP - (never set any flags) */
893 1.3 alnsn #define SLJIT_CONV_F64_FROM_SW (SLJIT_FOP1_BASE + 4)
894 1.3 alnsn #define SLJIT_CONV_F32_FROM_SW (SLJIT_CONV_F64_FROM_SW | SLJIT_F32_OP)
895 1.3 alnsn /* Flags: SP - (never set any flags) */
896 1.3 alnsn #define SLJIT_CONV_F64_FROM_S32 (SLJIT_FOP1_BASE + 5)
897 1.3 alnsn #define SLJIT_CONV_F32_FROM_S32 (SLJIT_CONV_F64_FROM_S32 | SLJIT_F32_OP)
898 1.3 alnsn /* Note: dst is the left and src is the right operand for SLJIT_CMPD.
899 1.3 alnsn Note: NaN check is always performed. If SLJIT_C_FLOAT_UNORDERED flag
900 1.3 alnsn is set, the comparison result is unpredictable.
901 1.2 alnsn Flags: SP | E | S (see SLJIT_C_FLOAT_*) */
902 1.3 alnsn #define SLJIT_CMP_F64 (SLJIT_FOP1_BASE + 6)
903 1.3 alnsn #define SLJIT_CMP_F32 (SLJIT_CMP_F64 | SLJIT_F32_OP)
904 1.2 alnsn /* Flags: SP - (never set any flags) */
905 1.3 alnsn #define SLJIT_NEG_F64 (SLJIT_FOP1_BASE + 7)
906 1.3 alnsn #define SLJIT_NEG_F32 (SLJIT_NEG_F64 | SLJIT_F32_OP)
907 1.2 alnsn /* Flags: SP - (never set any flags) */
908 1.3 alnsn #define SLJIT_ABS_F64 (SLJIT_FOP1_BASE + 8)
909 1.3 alnsn #define SLJIT_ABS_F32 (SLJIT_ABS_F64 | SLJIT_F32_OP)
910 1.3 alnsn
911 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
912 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
913 1.3 alnsn sljit_s32 src, sljit_sw srcw);
914 1.2 alnsn
915 1.3 alnsn /* Starting index of opcodes for sljit_emit_fop2. */
916 1.3 alnsn #define SLJIT_FOP2_BASE 160
917 1.2 alnsn
918 1.2 alnsn /* Flags: SP - (never set any flags) */
919 1.3 alnsn #define SLJIT_ADD_F64 (SLJIT_FOP2_BASE + 0)
920 1.3 alnsn #define SLJIT_ADD_F32 (SLJIT_ADD_F64 | SLJIT_F32_OP)
921 1.2 alnsn /* Flags: SP - (never set any flags) */
922 1.3 alnsn #define SLJIT_SUB_F64 (SLJIT_FOP2_BASE + 1)
923 1.3 alnsn #define SLJIT_SUB_F32 (SLJIT_SUB_F64 | SLJIT_F32_OP)
924 1.2 alnsn /* Flags: SP - (never set any flags) */
925 1.3 alnsn #define SLJIT_MUL_F64 (SLJIT_FOP2_BASE + 2)
926 1.3 alnsn #define SLJIT_MUL_F32 (SLJIT_MUL_F64 | SLJIT_F32_OP)
927 1.2 alnsn /* Flags: SP - (never set any flags) */
928 1.3 alnsn #define SLJIT_DIV_F64 (SLJIT_FOP2_BASE + 3)
929 1.3 alnsn #define SLJIT_DIV_F32 (SLJIT_DIV_F64 | SLJIT_F32_OP)
930 1.2 alnsn
931 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
932 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
933 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
934 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
935 1.1 alnsn
936 1.1 alnsn /* Label and jump instructions. */
937 1.1 alnsn
938 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler);
939 1.1 alnsn
940 1.3 alnsn /* Invert (negate) conditional type: xor (^) with 0x1 */
941 1.1 alnsn
942 1.3 alnsn /* Integer comparison types. */
943 1.3 alnsn #define SLJIT_EQUAL 0
944 1.3 alnsn #define SLJIT_EQUAL32 (SLJIT_EQUAL | SLJIT_I32_OP)
945 1.3 alnsn #define SLJIT_ZERO 0
946 1.3 alnsn #define SLJIT_ZERO32 (SLJIT_ZERO | SLJIT_I32_OP)
947 1.3 alnsn #define SLJIT_NOT_EQUAL 1
948 1.3 alnsn #define SLJIT_NOT_EQUAL32 (SLJIT_NOT_EQUAL | SLJIT_I32_OP)
949 1.3 alnsn #define SLJIT_NOT_ZERO 1
950 1.3 alnsn #define SLJIT_NOT_ZERO32 (SLJIT_NOT_ZERO | SLJIT_I32_OP)
951 1.3 alnsn
952 1.3 alnsn #define SLJIT_LESS 2
953 1.3 alnsn #define SLJIT_LESS32 (SLJIT_LESS | SLJIT_I32_OP)
954 1.3 alnsn #define SLJIT_GREATER_EQUAL 3
955 1.3 alnsn #define SLJIT_GREATER_EQUAL32 (SLJIT_GREATER_EQUAL | SLJIT_I32_OP)
956 1.3 alnsn #define SLJIT_GREATER 4
957 1.3 alnsn #define SLJIT_GREATER32 (SLJIT_GREATER | SLJIT_I32_OP)
958 1.3 alnsn #define SLJIT_LESS_EQUAL 5
959 1.3 alnsn #define SLJIT_LESS_EQUAL32 (SLJIT_LESS_EQUAL | SLJIT_I32_OP)
960 1.3 alnsn #define SLJIT_SIG_LESS 6
961 1.3 alnsn #define SLJIT_SIG_LESS32 (SLJIT_SIG_LESS | SLJIT_I32_OP)
962 1.3 alnsn #define SLJIT_SIG_GREATER_EQUAL 7
963 1.3 alnsn #define SLJIT_SIG_GREATER_EQUAL32 (SLJIT_SIG_GREATER_EQUAL | SLJIT_I32_OP)
964 1.3 alnsn #define SLJIT_SIG_GREATER 8
965 1.3 alnsn #define SLJIT_SIG_GREATER32 (SLJIT_SIG_GREATER | SLJIT_I32_OP)
966 1.3 alnsn #define SLJIT_SIG_LESS_EQUAL 9
967 1.3 alnsn #define SLJIT_SIG_LESS_EQUAL32 (SLJIT_SIG_LESS_EQUAL | SLJIT_I32_OP)
968 1.3 alnsn
969 1.3 alnsn #define SLJIT_OVERFLOW 10
970 1.3 alnsn #define SLJIT_OVERFLOW32 (SLJIT_OVERFLOW | SLJIT_I32_OP)
971 1.3 alnsn #define SLJIT_NOT_OVERFLOW 11
972 1.3 alnsn #define SLJIT_NOT_OVERFLOW32 (SLJIT_NOT_OVERFLOW | SLJIT_I32_OP)
973 1.3 alnsn
974 1.3 alnsn #define SLJIT_MUL_OVERFLOW 12
975 1.3 alnsn #define SLJIT_MUL_OVERFLOW32 (SLJIT_MUL_OVERFLOW | SLJIT_I32_OP)
976 1.3 alnsn #define SLJIT_MUL_NOT_OVERFLOW 13
977 1.3 alnsn #define SLJIT_MUL_NOT_OVERFLOW32 (SLJIT_MUL_NOT_OVERFLOW | SLJIT_I32_OP)
978 1.3 alnsn
979 1.3 alnsn /* Floating point comparison types. */
980 1.3 alnsn #define SLJIT_EQUAL_F64 14
981 1.3 alnsn #define SLJIT_EQUAL_F32 (SLJIT_EQUAL_F64 | SLJIT_F32_OP)
982 1.3 alnsn #define SLJIT_NOT_EQUAL_F64 15
983 1.3 alnsn #define SLJIT_NOT_EQUAL_F32 (SLJIT_NOT_EQUAL_F64 | SLJIT_F32_OP)
984 1.3 alnsn #define SLJIT_LESS_F64 16
985 1.3 alnsn #define SLJIT_LESS_F32 (SLJIT_LESS_F64 | SLJIT_F32_OP)
986 1.3 alnsn #define SLJIT_GREATER_EQUAL_F64 17
987 1.3 alnsn #define SLJIT_GREATER_EQUAL_F32 (SLJIT_GREATER_EQUAL_F64 | SLJIT_F32_OP)
988 1.3 alnsn #define SLJIT_GREATER_F64 18
989 1.3 alnsn #define SLJIT_GREATER_F32 (SLJIT_GREATER_F64 | SLJIT_F32_OP)
990 1.3 alnsn #define SLJIT_LESS_EQUAL_F64 19
991 1.3 alnsn #define SLJIT_LESS_EQUAL_F32 (SLJIT_LESS_EQUAL_F64 | SLJIT_F32_OP)
992 1.3 alnsn #define SLJIT_UNORDERED_F64 20
993 1.3 alnsn #define SLJIT_UNORDERED_F32 (SLJIT_UNORDERED_F64 | SLJIT_F32_OP)
994 1.3 alnsn #define SLJIT_ORDERED_F64 21
995 1.3 alnsn #define SLJIT_ORDERED_F32 (SLJIT_ORDERED_F64 | SLJIT_F32_OP)
996 1.3 alnsn
997 1.3 alnsn /* Unconditional jump types. */
998 1.1 alnsn #define SLJIT_JUMP 22
999 1.1 alnsn #define SLJIT_FAST_CALL 23
1000 1.1 alnsn #define SLJIT_CALL0 24
1001 1.1 alnsn #define SLJIT_CALL1 25
1002 1.1 alnsn #define SLJIT_CALL2 26
1003 1.1 alnsn #define SLJIT_CALL3 27
1004 1.1 alnsn
1005 1.1 alnsn /* Fast calling method. See sljit_emit_fast_enter / sljit_emit_fast_return. */
1006 1.1 alnsn
1007 1.1 alnsn /* The target can be changed during runtime (see: sljit_set_jump_addr). */
1008 1.1 alnsn #define SLJIT_REWRITABLE_JUMP 0x1000
1009 1.1 alnsn
1010 1.1 alnsn /* Emit a jump instruction. The destination is not set, only the type of the jump.
1011 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_CALL3
1012 1.1 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1013 1.1 alnsn Flags: - (never set any flags) for both conditional and unconditional jumps.
1014 1.1 alnsn Flags: destroy all flags for calls. */
1015 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type);
1016 1.1 alnsn
1017 1.1 alnsn /* Basic arithmetic comparison. In most architectures it is implemented as
1018 1.1 alnsn an SLJIT_SUB operation (with SLJIT_UNUSED destination and setting
1019 1.1 alnsn appropriate flags) followed by a sljit_emit_jump. However some
1020 1.3 alnsn architectures (i.e: ARM64 or MIPS) may employ special optimizations here.
1021 1.3 alnsn It is suggested to use this comparison form when appropriate.
1022 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_I_SIG_LESS_EQUAL
1023 1.3 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1024 1.1 alnsn Flags: destroy flags. */
1025 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type,
1026 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
1027 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
1028 1.1 alnsn
1029 1.1 alnsn /* Basic floating point comparison. In most architectures it is implemented as
1030 1.1 alnsn an SLJIT_FCMP operation (setting appropriate flags) followed by a
1031 1.1 alnsn sljit_emit_jump. However some architectures (i.e: MIPS) may employ
1032 1.1 alnsn special optimizations here. It is suggested to use this comparison form
1033 1.1 alnsn when appropriate.
1034 1.3 alnsn type must be between SLJIT_EQUAL_F64 and SLJIT_ORDERED_F32
1035 1.3 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1036 1.1 alnsn Flags: destroy flags.
1037 1.1 alnsn Note: if either operand is NaN, the behaviour is undefined for
1038 1.3 alnsn types up to SLJIT_S_LESS_EQUAL. */
1039 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type,
1040 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
1041 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
1042 1.1 alnsn
1043 1.1 alnsn /* Set the destination of the jump to this label. */
1044 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_label(struct sljit_jump *jump, struct sljit_label* label);
1045 1.2 alnsn /* Set the destination address of the jump to this label. */
1046 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_target(struct sljit_jump *jump, sljit_uw target);
1047 1.1 alnsn
1048 1.1 alnsn /* Call function or jump anywhere. Both direct and indirect form
1049 1.1 alnsn type must be between SLJIT_JUMP and SLJIT_CALL3
1050 1.1 alnsn Direct form: set src to SLJIT_IMM() and srcw to the address
1051 1.1 alnsn Indirect form: any other valid addressing mode
1052 1.1 alnsn Flags: - (never set any flags) for unconditional jumps.
1053 1.1 alnsn Flags: destroy all flags for calls. */
1054 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw);
1055 1.1 alnsn
1056 1.2 alnsn /* Perform the operation using the conditional flags as the second argument.
1057 1.3 alnsn Type must always be between SLJIT_EQUAL and SLJIT_S_ORDERED. The value
1058 1.3 alnsn represented by the type is 1, if the condition represented by the type
1059 1.2 alnsn is fulfilled, and 0 otherwise.
1060 1.2 alnsn
1061 1.3 alnsn If op == SLJIT_MOV, SLJIT_MOV_S32, SLJIT_MOV_U32:
1062 1.2 alnsn Set dst to the value represented by the type (0 or 1).
1063 1.2 alnsn Src must be SLJIT_UNUSED, and srcw must be 0
1064 1.1 alnsn Flags: - (never set any flags)
1065 1.2 alnsn If op == SLJIT_OR, op == SLJIT_AND, op == SLJIT_XOR
1066 1.2 alnsn Performs the binary operation using src as the first, and the value
1067 1.2 alnsn represented by type as the second argument.
1068 1.2 alnsn Important note: only dst=src and dstw=srcw is supported at the moment!
1069 1.2 alnsn Flags: I | E | K
1070 1.2 alnsn Note: sljit_emit_op_flags does nothing, if dst is SLJIT_UNUSED (regardless of op). */
1071 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
1072 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
1073 1.3 alnsn sljit_s32 src, sljit_sw srcw,
1074 1.3 alnsn sljit_s32 type);
1075 1.1 alnsn
1076 1.3 alnsn /* Copies the base address of SLJIT_SP + offset to dst.
1077 1.1 alnsn Flags: - (never set any flags) */
1078 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset);
1079 1.1 alnsn
1080 1.1 alnsn /* The constant can be changed runtime (see: sljit_set_const)
1081 1.1 alnsn Flags: - (never set any flags) */
1082 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value);
1083 1.1 alnsn
1084 1.1 alnsn /* After the code generation the address for label, jump and const instructions
1085 1.2 alnsn are computed. Since these structures are freed by sljit_free_compiler, the
1086 1.1 alnsn addresses must be preserved by the user program elsewere. */
1087 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_label_addr(struct sljit_label *label) { return label->addr; }
1088 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_jump_addr(struct sljit_jump *jump) { return jump->addr; }
1089 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_const_addr(struct sljit_const *const_) { return const_->addr; }
1090 1.1 alnsn
1091 1.1 alnsn /* Only the address is required to rewrite the code. */
1092 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr);
1093 1.2 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant);
1094 1.1 alnsn
1095 1.1 alnsn /* --------------------------------------------------------------------- */
1096 1.1 alnsn /* Miscellaneous utility functions */
1097 1.1 alnsn /* --------------------------------------------------------------------- */
1098 1.1 alnsn
1099 1.1 alnsn #define SLJIT_MAJOR_VERSION 0
1100 1.3 alnsn #define SLJIT_MINOR_VERSION 93
1101 1.1 alnsn
1102 1.2 alnsn /* Get the human readable name of the platform. Can be useful on platforms
1103 1.2 alnsn like ARM, where ARM and Thumb2 functions can be mixed, and
1104 1.2 alnsn it is useful to know the type of the code generator. */
1105 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void);
1106 1.1 alnsn
1107 1.2 alnsn /* Portable helper function to get an offset of a member. */
1108 1.2 alnsn #define SLJIT_OFFSETOF(base, member) ((sljit_sw)(&((base*)0x10)->member) - 0x10)
1109 1.1 alnsn
1110 1.1 alnsn #if (defined SLJIT_UTIL_GLOBAL_LOCK && SLJIT_UTIL_GLOBAL_LOCK)
1111 1.1 alnsn /* This global lock is useful to compile common functions. */
1112 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_grab_lock(void);
1113 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_release_lock(void);
1114 1.1 alnsn #endif
1115 1.1 alnsn
1116 1.1 alnsn #if (defined SLJIT_UTIL_STACK && SLJIT_UTIL_STACK)
1117 1.1 alnsn
1118 1.1 alnsn /* The sljit_stack is a utiliy feature of sljit, which allocates a
1119 1.1 alnsn writable memory region between base (inclusive) and limit (exclusive).
1120 1.1 alnsn Both base and limit is a pointer, and base is always <= than limit.
1121 1.1 alnsn This feature uses the "address space reserve" feature
1122 1.1 alnsn of modern operating systems. Basically we don't need to allocate a
1123 1.1 alnsn huge memory block in one step for the worst case, we can start with
1124 1.1 alnsn a smaller chunk and extend it later. Since the address space is
1125 1.1 alnsn reserved, the data never copied to other regions, thus it is safe
1126 1.1 alnsn to store pointers here. */
1127 1.1 alnsn
1128 1.1 alnsn /* Note: The base field is aligned to PAGE_SIZE bytes (usually 4k or more).
1129 1.1 alnsn Note: stack growing should not happen in small steps: 4k, 16k or even
1130 1.1 alnsn bigger growth is better.
1131 1.1 alnsn Note: this structure may not be supported by all operating systems.
1132 1.1 alnsn Some kind of fallback mechanism is suggested when SLJIT_UTIL_STACK
1133 1.1 alnsn is not defined. */
1134 1.1 alnsn
1135 1.1 alnsn struct sljit_stack {
1136 1.1 alnsn /* User data, anything can be stored here.
1137 1.1 alnsn Starting with the same value as base. */
1138 1.1 alnsn sljit_uw top;
1139 1.1 alnsn /* These members are read only. */
1140 1.1 alnsn sljit_uw base;
1141 1.1 alnsn sljit_uw limit;
1142 1.1 alnsn sljit_uw max_limit;
1143 1.1 alnsn };
1144 1.1 alnsn
1145 1.1 alnsn /* Returns NULL if unsuccessful.
1146 1.3 alnsn Note: limit and max_limit contains the size for stack allocation.
1147 1.3 alnsn Note: the top field is initialized to base.
1148 1.3 alnsn Note: see sljit_create_compiler for the explanation of allocator_data. */
1149 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_stack* SLJIT_CALL sljit_allocate_stack(sljit_uw limit, sljit_uw max_limit, void *allocator_data);
1150 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_free_stack(struct sljit_stack *stack, void *allocator_data);
1151 1.1 alnsn
1152 1.1 alnsn /* Can be used to increase (allocate) or decrease (free) the memory area.
1153 1.1 alnsn Returns with a non-zero value if unsuccessful. If new_limit is greater than
1154 1.1 alnsn max_limit, it will fail. It is very easy to implement a stack data structure,
1155 1.1 alnsn since the growth ratio can be added to the current limit, and sljit_stack_resize
1156 1.1 alnsn will do all the necessary checks. The fields of the stack are not changed if
1157 1.1 alnsn sljit_stack_resize fails. */
1158 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_sw SLJIT_CALL sljit_stack_resize(struct sljit_stack *stack, sljit_uw new_limit);
1159 1.1 alnsn
1160 1.1 alnsn #endif /* (defined SLJIT_UTIL_STACK && SLJIT_UTIL_STACK) */
1161 1.1 alnsn
1162 1.1 alnsn #if !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL)
1163 1.1 alnsn
1164 1.1 alnsn /* Get the entry address of a given function. */
1165 1.2 alnsn #define SLJIT_FUNC_OFFSET(func_name) ((sljit_sw)func_name)
1166 1.1 alnsn
1167 1.1 alnsn #else /* !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL) */
1168 1.1 alnsn
1169 1.1 alnsn /* All JIT related code should be placed in the same context (library, binary, etc.). */
1170 1.1 alnsn
1171 1.2 alnsn #define SLJIT_FUNC_OFFSET(func_name) (*(sljit_sw*)(void*)func_name)
1172 1.1 alnsn
1173 1.1 alnsn /* For powerpc64, the function pointers point to a context descriptor. */
1174 1.1 alnsn struct sljit_function_context {
1175 1.2 alnsn sljit_sw addr;
1176 1.2 alnsn sljit_sw r2;
1177 1.2 alnsn sljit_sw r11;
1178 1.1 alnsn };
1179 1.1 alnsn
1180 1.1 alnsn /* Fill the context arguments using the addr and the function.
1181 1.1 alnsn If func_ptr is NULL, it will not be set to the address of context
1182 1.1 alnsn If addr is NULL, the function address also comes from the func pointer. */
1183 1.2 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_function_context(void** func_ptr, struct sljit_function_context* context, sljit_sw addr, void* func);
1184 1.1 alnsn
1185 1.1 alnsn #endif /* !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL) */
1186 1.1 alnsn
1187 1.3 alnsn /* --------------------------------------------------------------------- */
1188 1.3 alnsn /* CPU specific functions */
1189 1.3 alnsn /* --------------------------------------------------------------------- */
1190 1.3 alnsn
1191 1.3 alnsn /* The following function is a helper function for sljit_emit_op_custom.
1192 1.3 alnsn It returns with the real machine register index ( >=0 ) of any SLJIT_R,
1193 1.3 alnsn SLJIT_S and SLJIT_SP registers.
1194 1.3 alnsn
1195 1.3 alnsn Note: it returns with -1 for virtual registers (only on x86-32). */
1196 1.3 alnsn
1197 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg);
1198 1.3 alnsn
1199 1.3 alnsn /* The following function is a helper function for sljit_emit_op_custom.
1200 1.3 alnsn It returns with the real machine register index of any SLJIT_FLOAT register.
1201 1.3 alnsn
1202 1.3 alnsn Note: the index is always an even number on ARM (except ARM-64), MIPS, and SPARC. */
1203 1.3 alnsn
1204 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg);
1205 1.3 alnsn
1206 1.3 alnsn /* Any instruction can be inserted into the instruction stream by
1207 1.3 alnsn sljit_emit_op_custom. It has a similar purpose as inline assembly.
1208 1.3 alnsn The size parameter must match to the instruction size of the target
1209 1.3 alnsn architecture:
1210 1.3 alnsn
1211 1.3 alnsn x86: 0 < size <= 15. The instruction argument can be byte aligned.
1212 1.3 alnsn Thumb2: if size == 2, the instruction argument must be 2 byte aligned.
1213 1.3 alnsn if size == 4, the instruction argument must be 4 byte aligned.
1214 1.3 alnsn Otherwise: size must be 4 and instruction argument must be 4 byte aligned. */
1215 1.3 alnsn
1216 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1217 1.3 alnsn void *instruction, sljit_s32 size);
1218 1.3 alnsn
1219 1.3 alnsn #if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86)
1220 1.3 alnsn
1221 1.3 alnsn /* Returns with non-zero if sse2 is available. */
1222 1.3 alnsn
1223 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_is_sse2_available(void);
1224 1.3 alnsn
1225 1.3 alnsn /* Returns with non-zero if cmov instruction is available. */
1226 1.3 alnsn
1227 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_is_cmov_available(void);
1228 1.3 alnsn
1229 1.3 alnsn /* Emit a conditional mov instruction on x86 CPUs. This instruction
1230 1.3 alnsn moves src to destination, if the condition is satisfied. Unlike
1231 1.3 alnsn other arithmetic instructions, destination must be a register.
1232 1.3 alnsn Before such instructions are emitted, cmov support should be
1233 1.3 alnsn checked by sljit_x86_is_cmov_available function.
1234 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_S_ORDERED
1235 1.3 alnsn dst_reg must be a valid register and it can be combined
1236 1.3 alnsn with SLJIT_I32_OP to perform 32 bit arithmetic
1237 1.3 alnsn Flags: I - (never set any flags)
1238 1.3 alnsn */
1239 1.3 alnsn
1240 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_emit_cmov(struct sljit_compiler *compiler,
1241 1.3 alnsn sljit_s32 type,
1242 1.3 alnsn sljit_s32 dst_reg,
1243 1.3 alnsn sljit_s32 src, sljit_sw srcw);
1244 1.3 alnsn
1245 1.3 alnsn #endif
1246 1.3 alnsn
1247 1.1 alnsn #endif /* _SLJIT_LIR_H_ */
1248