sljitLir.h revision 1.4 1 1.4 alnsn /* $NetBSD: sljitLir.h,v 1.4 2019/01/20 23:14:16 alnsn Exp $ */
2 1.2 alnsn
3 1.1 alnsn /*
4 1.1 alnsn * Stack-less Just-In-Time compiler
5 1.1 alnsn *
6 1.4 alnsn * Copyright Zoltan Herczeg (hzmester (at) freemail.hu). All rights reserved.
7 1.1 alnsn *
8 1.1 alnsn * Redistribution and use in source and binary forms, with or without modification, are
9 1.1 alnsn * permitted provided that the following conditions are met:
10 1.1 alnsn *
11 1.1 alnsn * 1. Redistributions of source code must retain the above copyright notice, this list of
12 1.1 alnsn * conditions and the following disclaimer.
13 1.1 alnsn *
14 1.1 alnsn * 2. Redistributions in binary form must reproduce the above copyright notice, this list
15 1.1 alnsn * of conditions and the following disclaimer in the documentation and/or other materials
16 1.1 alnsn * provided with the distribution.
17 1.1 alnsn *
18 1.1 alnsn * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
19 1.1 alnsn * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 alnsn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
21 1.1 alnsn * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 alnsn * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 1.1 alnsn * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 1.1 alnsn * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 alnsn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 1.1 alnsn * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 alnsn */
28 1.1 alnsn
29 1.1 alnsn #ifndef _SLJIT_LIR_H_
30 1.1 alnsn #define _SLJIT_LIR_H_
31 1.1 alnsn
32 1.1 alnsn /*
33 1.1 alnsn ------------------------------------------------------------------------
34 1.1 alnsn Stack-Less JIT compiler for multiple architectures (x86, ARM, PowerPC)
35 1.1 alnsn ------------------------------------------------------------------------
36 1.1 alnsn
37 1.1 alnsn Short description
38 1.1 alnsn Advantages:
39 1.2 alnsn - The execution can be continued from any LIR instruction. In other
40 1.2 alnsn words, it is possible to jump to any label from anywhere, even from
41 1.2 alnsn a code fragment, which is compiled later, if both compiled code
42 1.2 alnsn shares the same context. See sljit_emit_enter for more details
43 1.2 alnsn - Supports self modifying code: target of (conditional) jump and call
44 1.2 alnsn instructions and some constant values can be dynamically modified
45 1.2 alnsn during runtime
46 1.1 alnsn - although it is not suggested to do it frequently
47 1.2 alnsn - can be used for inline caching: save an important value once
48 1.2 alnsn in the instruction stream
49 1.2 alnsn - since this feature limits the optimization possibilities, a
50 1.2 alnsn special flag must be passed at compile time when these
51 1.2 alnsn instructions are emitted
52 1.1 alnsn - A fixed stack space can be allocated for local variables
53 1.1 alnsn - The compiler is thread-safe
54 1.1 alnsn - The compiler is highly configurable through preprocessor macros.
55 1.1 alnsn You can disable unneeded features (multithreading in single
56 1.1 alnsn threaded applications), and you can use your own system functions
57 1.1 alnsn (including memory allocators). See sljitConfig.h
58 1.1 alnsn Disadvantages:
59 1.2 alnsn - No automatic register allocation, and temporary results are
60 1.2 alnsn not stored on the stack. (hence the name comes)
61 1.1 alnsn In practice:
62 1.1 alnsn - This approach is very effective for interpreters
63 1.1 alnsn - One of the saved registers typically points to a stack interface
64 1.2 alnsn - It can jump to any exception handler anytime (even if it belongs
65 1.2 alnsn to another function)
66 1.2 alnsn - Hot paths can be modified during runtime reflecting the changes
67 1.1 alnsn of the fastest execution path of the dynamic language
68 1.1 alnsn - SLJIT supports complex memory addressing modes
69 1.2 alnsn - mainly position and context independent code (except some cases)
70 1.1 alnsn
71 1.1 alnsn For valgrind users:
72 1.1 alnsn - pass --smc-check=all argument to valgrind, since JIT is a "self-modifying code"
73 1.1 alnsn */
74 1.1 alnsn
75 1.1 alnsn #if !(defined SLJIT_NO_DEFAULT_CONFIG && SLJIT_NO_DEFAULT_CONFIG)
76 1.1 alnsn #include "sljitConfig.h"
77 1.1 alnsn #endif
78 1.1 alnsn
79 1.1 alnsn /* The following header file defines useful macros for fine tuning
80 1.2 alnsn sljit based code generators. They are listed in the beginning
81 1.1 alnsn of sljitConfigInternal.h */
82 1.1 alnsn
83 1.1 alnsn #include "sljitConfigInternal.h"
84 1.1 alnsn
85 1.1 alnsn /* --------------------------------------------------------------------- */
86 1.1 alnsn /* Error codes */
87 1.1 alnsn /* --------------------------------------------------------------------- */
88 1.1 alnsn
89 1.1 alnsn /* Indicates no error. */
90 1.1 alnsn #define SLJIT_SUCCESS 0
91 1.1 alnsn /* After the call of sljit_generate_code(), the error code of the compiler
92 1.1 alnsn is set to this value to avoid future sljit calls (in debug mode at least).
93 1.1 alnsn The complier should be freed after sljit_generate_code(). */
94 1.1 alnsn #define SLJIT_ERR_COMPILED 1
95 1.1 alnsn /* Cannot allocate non executable memory. */
96 1.1 alnsn #define SLJIT_ERR_ALLOC_FAILED 2
97 1.1 alnsn /* Cannot allocate executable memory.
98 1.1 alnsn Only for sljit_generate_code() */
99 1.1 alnsn #define SLJIT_ERR_EX_ALLOC_FAILED 3
100 1.3 alnsn /* Return value for SLJIT_CONFIG_UNSUPPORTED placeholder architecture. */
101 1.1 alnsn #define SLJIT_ERR_UNSUPPORTED 4
102 1.3 alnsn /* An ivalid argument is passed to any SLJIT function. */
103 1.3 alnsn #define SLJIT_ERR_BAD_ARGUMENT 5
104 1.4 alnsn /* Dynamic code modification is not enabled. */
105 1.4 alnsn #define SLJIT_ERR_DYN_CODE_MOD 6
106 1.1 alnsn
107 1.1 alnsn /* --------------------------------------------------------------------- */
108 1.1 alnsn /* Registers */
109 1.1 alnsn /* --------------------------------------------------------------------- */
110 1.1 alnsn
111 1.3 alnsn /*
112 1.3 alnsn Scratch (R) registers: registers whose may not preserve their values
113 1.3 alnsn across function calls.
114 1.3 alnsn
115 1.3 alnsn Saved (S) registers: registers whose preserve their values across
116 1.3 alnsn function calls.
117 1.3 alnsn
118 1.3 alnsn The scratch and saved register sets are overlap. The last scratch register
119 1.3 alnsn is the first saved register, the one before the last is the second saved
120 1.3 alnsn register, and so on.
121 1.3 alnsn
122 1.3 alnsn If an architecture provides two scratch and three saved registers,
123 1.3 alnsn its scratch and saved register sets are the following:
124 1.3 alnsn
125 1.3 alnsn R0 | [S4] | R0 and S4 represent the same physical register
126 1.3 alnsn R1 | [S3] | R1 and S3 represent the same physical register
127 1.3 alnsn [R2] | S2 | R2 and S2 represent the same physical register
128 1.3 alnsn [R3] | S1 | R3 and S1 represent the same physical register
129 1.3 alnsn [R4] | S0 | R4 and S0 represent the same physical register
130 1.3 alnsn
131 1.3 alnsn Note: SLJIT_NUMBER_OF_SCRATCH_REGISTERS would be 2 and
132 1.3 alnsn SLJIT_NUMBER_OF_SAVED_REGISTERS would be 3 for this architecture.
133 1.3 alnsn
134 1.3 alnsn Note: On all supported architectures SLJIT_NUMBER_OF_REGISTERS >= 10
135 1.3 alnsn and SLJIT_NUMBER_OF_SAVED_REGISTERS >= 5. However, 4 registers
136 1.3 alnsn are virtual on x86-32. See below.
137 1.3 alnsn
138 1.3 alnsn The purpose of this definition is convenience. Although a register
139 1.3 alnsn is either scratch register or saved register, SLJIT allows accessing
140 1.3 alnsn them from the other set. For example, four registers can be used as
141 1.3 alnsn scratch registers and the fifth one as saved register on the architecture
142 1.3 alnsn above. Of course the last two scratch registers (R2 and R3) from this
143 1.3 alnsn four will be saved on the stack, because they are defined as saved
144 1.3 alnsn registers in the application binary interface. Still R2 and R3 can be
145 1.3 alnsn used for referencing to these registers instead of S2 and S1, which
146 1.3 alnsn makes easier to write platform independent code. Scratch registers
147 1.3 alnsn can be saved registers in a similar way, but these extra saved
148 1.3 alnsn registers will not be preserved across function calls! Hence the
149 1.3 alnsn application must save them on those platforms, where the number of
150 1.3 alnsn saved registers is too low. This can be done by copy them onto
151 1.3 alnsn the stack and restore them after a function call.
152 1.3 alnsn
153 1.3 alnsn Note: To emphasize that registers assigned to R2-R4 are saved
154 1.3 alnsn registers, they are enclosed by square brackets. S3-S4
155 1.3 alnsn are marked in a similar way.
156 1.3 alnsn
157 1.3 alnsn Note: sljit_emit_enter and sljit_set_context defines whether a register
158 1.3 alnsn is S or R register. E.g: when 3 scratches and 1 saved is mapped
159 1.3 alnsn by sljit_emit_enter, the allowed register set will be: R0-R2 and
160 1.3 alnsn S0. Although S2 is mapped to the same position as R2, it does not
161 1.3 alnsn available in the current configuration. Furthermore the R3 (S1)
162 1.3 alnsn register does not available as well.
163 1.3 alnsn */
164 1.3 alnsn
165 1.3 alnsn /* When SLJIT_UNUSED is specified as destination, the result is discarded. */
166 1.1 alnsn #define SLJIT_UNUSED 0
167 1.1 alnsn
168 1.3 alnsn /* Scratch registers. */
169 1.3 alnsn #define SLJIT_R0 1
170 1.3 alnsn #define SLJIT_R1 2
171 1.3 alnsn #define SLJIT_R2 3
172 1.3 alnsn /* Note: on x86-32, R3 - R6 (same as S3 - S6) are emulated (they
173 1.3 alnsn are allocated on the stack). These registers are called virtual
174 1.3 alnsn and cannot be used for memory addressing (cannot be part of
175 1.3 alnsn any SLJIT_MEM1, SLJIT_MEM2 construct). There is no such
176 1.3 alnsn limitation on other CPUs. See sljit_get_register_index(). */
177 1.3 alnsn #define SLJIT_R3 4
178 1.3 alnsn #define SLJIT_R4 5
179 1.3 alnsn #define SLJIT_R5 6
180 1.3 alnsn #define SLJIT_R6 7
181 1.3 alnsn #define SLJIT_R7 8
182 1.3 alnsn #define SLJIT_R8 9
183 1.3 alnsn #define SLJIT_R9 10
184 1.3 alnsn /* All R registers provided by the architecture can be accessed by SLJIT_R(i)
185 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_REGISTERS. */
186 1.3 alnsn #define SLJIT_R(i) (1 + (i))
187 1.3 alnsn
188 1.3 alnsn /* Saved registers. */
189 1.3 alnsn #define SLJIT_S0 (SLJIT_NUMBER_OF_REGISTERS)
190 1.3 alnsn #define SLJIT_S1 (SLJIT_NUMBER_OF_REGISTERS - 1)
191 1.3 alnsn #define SLJIT_S2 (SLJIT_NUMBER_OF_REGISTERS - 2)
192 1.3 alnsn /* Note: on x86-32, S3 - S6 (same as R3 - R6) are emulated (they
193 1.3 alnsn are allocated on the stack). These registers are called virtual
194 1.3 alnsn and cannot be used for memory addressing (cannot be part of
195 1.3 alnsn any SLJIT_MEM1, SLJIT_MEM2 construct). There is no such
196 1.3 alnsn limitation on other CPUs. See sljit_get_register_index(). */
197 1.3 alnsn #define SLJIT_S3 (SLJIT_NUMBER_OF_REGISTERS - 3)
198 1.3 alnsn #define SLJIT_S4 (SLJIT_NUMBER_OF_REGISTERS - 4)
199 1.3 alnsn #define SLJIT_S5 (SLJIT_NUMBER_OF_REGISTERS - 5)
200 1.3 alnsn #define SLJIT_S6 (SLJIT_NUMBER_OF_REGISTERS - 6)
201 1.3 alnsn #define SLJIT_S7 (SLJIT_NUMBER_OF_REGISTERS - 7)
202 1.3 alnsn #define SLJIT_S8 (SLJIT_NUMBER_OF_REGISTERS - 8)
203 1.3 alnsn #define SLJIT_S9 (SLJIT_NUMBER_OF_REGISTERS - 9)
204 1.3 alnsn /* All S registers provided by the architecture can be accessed by SLJIT_S(i)
205 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_SAVED_REGISTERS. */
206 1.3 alnsn #define SLJIT_S(i) (SLJIT_NUMBER_OF_REGISTERS - (i))
207 1.3 alnsn
208 1.3 alnsn /* Registers >= SLJIT_FIRST_SAVED_REG are saved registers. */
209 1.3 alnsn #define SLJIT_FIRST_SAVED_REG (SLJIT_S0 - SLJIT_NUMBER_OF_SAVED_REGISTERS + 1)
210 1.3 alnsn
211 1.3 alnsn /* The SLJIT_SP provides direct access to the linear stack space allocated by
212 1.3 alnsn sljit_emit_enter. It can only be used in the following form: SLJIT_MEM1(SLJIT_SP).
213 1.3 alnsn The immediate offset is extended by the relative stack offset automatically.
214 1.3 alnsn The sljit_get_local_base can be used to obtain the absolute offset. */
215 1.3 alnsn #define SLJIT_SP (SLJIT_NUMBER_OF_REGISTERS + 1)
216 1.1 alnsn
217 1.1 alnsn /* Return with machine word. */
218 1.1 alnsn
219 1.3 alnsn #define SLJIT_RETURN_REG SLJIT_R0
220 1.1 alnsn
221 1.1 alnsn /* x86 prefers specific registers for special purposes. In case of shift
222 1.3 alnsn by register it supports only SLJIT_R2 for shift argument
223 1.1 alnsn (which is the src2 argument of sljit_emit_op2). If another register is
224 1.1 alnsn used, sljit must exchange data between registers which cause a minor
225 1.1 alnsn slowdown. Other architectures has no such limitation. */
226 1.1 alnsn
227 1.3 alnsn #define SLJIT_PREF_SHIFT_REG SLJIT_R2
228 1.1 alnsn
229 1.1 alnsn /* --------------------------------------------------------------------- */
230 1.1 alnsn /* Floating point registers */
231 1.1 alnsn /* --------------------------------------------------------------------- */
232 1.1 alnsn
233 1.3 alnsn /* Each floating point register can store a 32 or a 64 bit precision
234 1.3 alnsn value. The FR and FS register sets are overlap in the same way as R
235 1.3 alnsn and S register sets. See above. */
236 1.3 alnsn
237 1.1 alnsn /* Note: SLJIT_UNUSED as destination is not valid for floating point
238 1.3 alnsn operations, since they cannot be used for setting flags. */
239 1.1 alnsn
240 1.3 alnsn /* Floating point scratch registers. */
241 1.3 alnsn #define SLJIT_FR0 1
242 1.3 alnsn #define SLJIT_FR1 2
243 1.3 alnsn #define SLJIT_FR2 3
244 1.3 alnsn #define SLJIT_FR3 4
245 1.3 alnsn #define SLJIT_FR4 5
246 1.3 alnsn #define SLJIT_FR5 6
247 1.3 alnsn /* All FR registers provided by the architecture can be accessed by SLJIT_FR(i)
248 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_FLOAT_REGISTERS. */
249 1.3 alnsn #define SLJIT_FR(i) (1 + (i))
250 1.3 alnsn
251 1.3 alnsn /* Floating point saved registers. */
252 1.3 alnsn #define SLJIT_FS0 (SLJIT_NUMBER_OF_FLOAT_REGISTERS)
253 1.3 alnsn #define SLJIT_FS1 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 1)
254 1.3 alnsn #define SLJIT_FS2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 2)
255 1.3 alnsn #define SLJIT_FS3 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 3)
256 1.3 alnsn #define SLJIT_FS4 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 4)
257 1.3 alnsn #define SLJIT_FS5 (SLJIT_NUMBER_OF_FLOAT_REGISTERS - 5)
258 1.3 alnsn /* All S registers provided by the architecture can be accessed by SLJIT_FS(i)
259 1.3 alnsn The i parameter must be >= 0 and < SLJIT_NUMBER_OF_SAVED_FLOAT_REGISTERS. */
260 1.3 alnsn #define SLJIT_FS(i) (SLJIT_NUMBER_OF_FLOAT_REGISTERS - (i))
261 1.2 alnsn
262 1.3 alnsn /* Float registers >= SLJIT_FIRST_SAVED_FLOAT_REG are saved registers. */
263 1.3 alnsn #define SLJIT_FIRST_SAVED_FLOAT_REG (SLJIT_FS0 - SLJIT_NUMBER_OF_SAVED_FLOAT_REGISTERS + 1)
264 1.1 alnsn
265 1.1 alnsn /* --------------------------------------------------------------------- */
266 1.1 alnsn /* Main structures and functions */
267 1.1 alnsn /* --------------------------------------------------------------------- */
268 1.1 alnsn
269 1.3 alnsn /*
270 1.3 alnsn The following structures are private, and can be changed in the
271 1.3 alnsn future. Keeping them here allows code inlining.
272 1.3 alnsn */
273 1.3 alnsn
274 1.1 alnsn struct sljit_memory_fragment {
275 1.1 alnsn struct sljit_memory_fragment *next;
276 1.1 alnsn sljit_uw used_size;
277 1.2 alnsn /* Must be aligned to sljit_sw. */
278 1.3 alnsn sljit_u8 memory[1];
279 1.1 alnsn };
280 1.1 alnsn
281 1.1 alnsn struct sljit_label {
282 1.1 alnsn struct sljit_label *next;
283 1.1 alnsn sljit_uw addr;
284 1.1 alnsn /* The maximum size difference. */
285 1.1 alnsn sljit_uw size;
286 1.1 alnsn };
287 1.1 alnsn
288 1.1 alnsn struct sljit_jump {
289 1.1 alnsn struct sljit_jump *next;
290 1.1 alnsn sljit_uw addr;
291 1.2 alnsn sljit_sw flags;
292 1.1 alnsn union {
293 1.1 alnsn sljit_uw target;
294 1.1 alnsn struct sljit_label* label;
295 1.1 alnsn } u;
296 1.1 alnsn };
297 1.1 alnsn
298 1.1 alnsn struct sljit_const {
299 1.1 alnsn struct sljit_const *next;
300 1.1 alnsn sljit_uw addr;
301 1.1 alnsn };
302 1.1 alnsn
303 1.1 alnsn struct sljit_compiler {
304 1.3 alnsn sljit_s32 error;
305 1.3 alnsn sljit_s32 options;
306 1.1 alnsn
307 1.1 alnsn struct sljit_label *labels;
308 1.1 alnsn struct sljit_jump *jumps;
309 1.1 alnsn struct sljit_const *consts;
310 1.1 alnsn struct sljit_label *last_label;
311 1.1 alnsn struct sljit_jump *last_jump;
312 1.1 alnsn struct sljit_const *last_const;
313 1.1 alnsn
314 1.3 alnsn void *allocator_data;
315 1.1 alnsn struct sljit_memory_fragment *buf;
316 1.1 alnsn struct sljit_memory_fragment *abuf;
317 1.1 alnsn
318 1.3 alnsn /* Used scratch registers. */
319 1.3 alnsn sljit_s32 scratches;
320 1.1 alnsn /* Used saved registers. */
321 1.3 alnsn sljit_s32 saveds;
322 1.3 alnsn /* Used float scratch registers. */
323 1.3 alnsn sljit_s32 fscratches;
324 1.3 alnsn /* Used float saved registers. */
325 1.3 alnsn sljit_s32 fsaveds;
326 1.1 alnsn /* Local stack size. */
327 1.3 alnsn sljit_s32 local_size;
328 1.1 alnsn /* Code size. */
329 1.1 alnsn sljit_uw size;
330 1.4 alnsn /* Relative offset of the executable mapping from the writable mapping. */
331 1.4 alnsn sljit_uw executable_offset;
332 1.4 alnsn /* Executable size for statistical purposes. */
333 1.1 alnsn sljit_uw executable_size;
334 1.1 alnsn
335 1.1 alnsn #if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
336 1.3 alnsn sljit_s32 args;
337 1.4 alnsn sljit_s32 locals_offset;
338 1.4 alnsn sljit_s32 saveds_offset;
339 1.1 alnsn #endif
340 1.1 alnsn
341 1.1 alnsn #if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
342 1.3 alnsn sljit_s32 mode32;
343 1.4 alnsn #ifdef _WIN64
344 1.4 alnsn sljit_s32 locals_offset;
345 1.1 alnsn #endif
346 1.1 alnsn #endif
347 1.1 alnsn
348 1.1 alnsn #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
349 1.1 alnsn /* Constant pool handling. */
350 1.1 alnsn sljit_uw *cpool;
351 1.3 alnsn sljit_u8 *cpool_unique;
352 1.1 alnsn sljit_uw cpool_diff;
353 1.1 alnsn sljit_uw cpool_fill;
354 1.1 alnsn /* Other members. */
355 1.1 alnsn /* Contains pointer, "ldr pc, [...]" pairs. */
356 1.1 alnsn sljit_uw patches;
357 1.1 alnsn #endif
358 1.1 alnsn
359 1.1 alnsn #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) || (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
360 1.1 alnsn /* Temporary fields. */
361 1.1 alnsn sljit_uw shift_imm;
362 1.2 alnsn #endif
363 1.2 alnsn
364 1.2 alnsn #if (defined SLJIT_CONFIG_ARM_64 && SLJIT_CONFIG_ARM_64)
365 1.3 alnsn sljit_s32 cache_arg;
366 1.2 alnsn sljit_sw cache_argw;
367 1.1 alnsn #endif
368 1.1 alnsn
369 1.3 alnsn #if (defined SLJIT_CONFIG_PPC && SLJIT_CONFIG_PPC)
370 1.2 alnsn sljit_sw imm;
371 1.3 alnsn sljit_s32 cache_arg;
372 1.2 alnsn sljit_sw cache_argw;
373 1.2 alnsn #endif
374 1.2 alnsn
375 1.3 alnsn #if (defined SLJIT_CONFIG_MIPS && SLJIT_CONFIG_MIPS)
376 1.3 alnsn sljit_s32 delay_slot;
377 1.3 alnsn sljit_s32 cache_arg;
378 1.2 alnsn sljit_sw cache_argw;
379 1.2 alnsn #endif
380 1.2 alnsn
381 1.2 alnsn #if (defined SLJIT_CONFIG_SPARC_32 && SLJIT_CONFIG_SPARC_32)
382 1.3 alnsn sljit_s32 delay_slot;
383 1.3 alnsn sljit_s32 cache_arg;
384 1.2 alnsn sljit_sw cache_argw;
385 1.1 alnsn #endif
386 1.1 alnsn
387 1.2 alnsn #if (defined SLJIT_CONFIG_TILEGX && SLJIT_CONFIG_TILEGX)
388 1.3 alnsn sljit_s32 cache_arg;
389 1.2 alnsn sljit_sw cache_argw;
390 1.1 alnsn #endif
391 1.1 alnsn
392 1.1 alnsn #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
393 1.1 alnsn FILE* verbose;
394 1.1 alnsn #endif
395 1.1 alnsn
396 1.3 alnsn #if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) \
397 1.3 alnsn || (defined SLJIT_DEBUG && SLJIT_DEBUG)
398 1.4 alnsn /* Flags specified by the last arithmetic instruction.
399 1.4 alnsn It contains the type of the variable flag. */
400 1.4 alnsn sljit_s32 last_flags;
401 1.1 alnsn /* Local size passed to the functions. */
402 1.3 alnsn sljit_s32 logical_local_size;
403 1.1 alnsn #endif
404 1.1 alnsn
405 1.3 alnsn #if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) \
406 1.3 alnsn || (defined SLJIT_DEBUG && SLJIT_DEBUG) \
407 1.3 alnsn || (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
408 1.4 alnsn /* Trust arguments when the API function is called. */
409 1.3 alnsn sljit_s32 skip_checks;
410 1.1 alnsn #endif
411 1.1 alnsn };
412 1.1 alnsn
413 1.1 alnsn /* --------------------------------------------------------------------- */
414 1.1 alnsn /* Main functions */
415 1.1 alnsn /* --------------------------------------------------------------------- */
416 1.1 alnsn
417 1.3 alnsn /* Creates an sljit compiler. The allocator_data is required by some
418 1.3 alnsn custom memory managers. This pointer is passed to SLJIT_MALLOC
419 1.3 alnsn and SLJIT_FREE macros. Most allocators (including the default
420 1.3 alnsn one) ignores this value, and it is recommended to pass NULL
421 1.3 alnsn as a dummy value for allocator_data.
422 1.3 alnsn
423 1.1 alnsn Returns NULL if failed. */
424 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_compiler* sljit_create_compiler(void *allocator_data);
425 1.2 alnsn
426 1.3 alnsn /* Frees everything except the compiled machine code. */
427 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_free_compiler(struct sljit_compiler *compiler);
428 1.1 alnsn
429 1.2 alnsn /* Returns the current error code. If an error is occurred, future sljit
430 1.2 alnsn calls which uses the same compiler argument returns early with the same
431 1.2 alnsn error code. Thus there is no need for checking the error after every
432 1.2 alnsn call, it is enough to do it before the code is compiled. Removing
433 1.2 alnsn these checks increases the performance of the compiling process. */
434 1.3 alnsn static SLJIT_INLINE sljit_s32 sljit_get_compiler_error(struct sljit_compiler *compiler) { return compiler->error; }
435 1.3 alnsn
436 1.3 alnsn /* Sets the compiler error code to SLJIT_ERR_ALLOC_FAILED except
437 1.3 alnsn if an error was detected before. After the error code is set
438 1.3 alnsn the compiler behaves as if the allocation failure happened
439 1.3 alnsn during an sljit function call. This can greatly simplify error
440 1.3 alnsn checking, since only the compiler status needs to be checked
441 1.3 alnsn after the compilation. */
442 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_compiler_memory_error(struct sljit_compiler *compiler);
443 1.1 alnsn
444 1.1 alnsn /*
445 1.1 alnsn Allocate a small amount of memory. The size must be <= 64 bytes on 32 bit,
446 1.2 alnsn and <= 128 bytes on 64 bit architectures. The memory area is owned by the
447 1.2 alnsn compiler, and freed by sljit_free_compiler. The returned pointer is
448 1.2 alnsn sizeof(sljit_sw) aligned. Excellent for allocating small blocks during
449 1.2 alnsn the compiling, and no need to worry about freeing them. The size is
450 1.2 alnsn enough to contain at most 16 pointers. If the size is outside of the range,
451 1.2 alnsn the function will return with NULL. However, this return value does not
452 1.2 alnsn indicate that there is no more memory (does not set the current error code
453 1.2 alnsn of the compiler to out-of-memory status).
454 1.1 alnsn */
455 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void* sljit_alloc_memory(struct sljit_compiler *compiler, sljit_s32 size);
456 1.1 alnsn
457 1.1 alnsn #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE)
458 1.1 alnsn /* Passing NULL disables verbose. */
459 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_compiler_verbose(struct sljit_compiler *compiler, FILE* verbose);
460 1.1 alnsn #endif
461 1.1 alnsn
462 1.4 alnsn /*
463 1.4 alnsn Create executable code from the sljit instruction stream. This is the final step
464 1.4 alnsn of the code generation so no more instructions can be added after this call.
465 1.4 alnsn */
466 1.4 alnsn
467 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler);
468 1.4 alnsn
469 1.4 alnsn /* Free executable code. */
470 1.4 alnsn
471 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_free_code(void* code);
472 1.1 alnsn
473 1.1 alnsn /*
474 1.4 alnsn When the protected executable allocator is used the JIT code is mapped
475 1.4 alnsn twice. The first mapping has read/write and the second mapping has read/exec
476 1.4 alnsn permissions. This function returns with the relative offset of the executable
477 1.4 alnsn mapping using the writable mapping as the base after the machine code is
478 1.4 alnsn successfully generated. The returned value is always 0 for the normal executable
479 1.4 alnsn allocator, since it uses only one mapping with read/write/exec permissions.
480 1.4 alnsn Dynamic code modifications requires this value.
481 1.4 alnsn
482 1.4 alnsn Before a successful code generation, this function returns with 0.
483 1.4 alnsn */
484 1.4 alnsn static SLJIT_INLINE sljit_sw sljit_get_executable_offset(struct sljit_compiler *compiler) { return compiler->executable_offset; }
485 1.4 alnsn
486 1.4 alnsn /*
487 1.4 alnsn The executable memory consumption of the generated code can be retrieved by
488 1.4 alnsn this function. The returned value can be used for statistical purposes.
489 1.1 alnsn
490 1.1 alnsn Before a successful code generation, this function returns with 0.
491 1.1 alnsn */
492 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_generated_code_size(struct sljit_compiler *compiler) { return compiler->executable_size; }
493 1.1 alnsn
494 1.2 alnsn /* Instruction generation. Returns with any error code. If there is no
495 1.2 alnsn error, they return with SLJIT_SUCCESS. */
496 1.1 alnsn
497 1.1 alnsn /*
498 1.3 alnsn The executable code is a function call from the viewpoint of the C
499 1.3 alnsn language. The function calls must obey to the ABI (Application
500 1.3 alnsn Binary Interface) of the platform, which specify the purpose of
501 1.3 alnsn all machine registers and stack handling among other things. The
502 1.3 alnsn sljit_emit_enter function emits the necessary instructions for
503 1.3 alnsn setting up a new context for the executable code and moves function
504 1.3 alnsn arguments to the saved registers. Furthermore the options argument
505 1.3 alnsn can be used to pass configuration options to the compiler. The
506 1.3 alnsn available options are listed before sljit_emit_enter.
507 1.3 alnsn
508 1.3 alnsn The number of sljit_sw arguments passed to the generated function
509 1.3 alnsn are specified in the "args" parameter. The number of arguments must
510 1.3 alnsn be less than or equal to 3. The first argument goes to SLJIT_S0,
511 1.3 alnsn the second goes to SLJIT_S1 and so on. The register set used by
512 1.3 alnsn the function must be declared as well. The number of scratch and
513 1.3 alnsn saved registers used by the function must be passed to sljit_emit_enter.
514 1.3 alnsn Only R registers between R0 and "scratches" argument can be used
515 1.3 alnsn later. E.g. if "scratches" is set to 2, the register set will be
516 1.3 alnsn limited to R0 and R1. The S registers and the floating point
517 1.3 alnsn registers ("fscratches" and "fsaveds") are specified in a similar
518 1.3 alnsn way. The sljit_emit_enter is also capable of allocating a stack
519 1.3 alnsn space for local variables. The "local_size" argument contains the
520 1.3 alnsn size in bytes of this local area and its staring address is stored
521 1.3 alnsn in SLJIT_SP. The memory area between SLJIT_SP (inclusive) and
522 1.3 alnsn SLJIT_SP + local_size (exclusive) can be modified freely until
523 1.3 alnsn the function returns. The stack space is not initialized.
524 1.3 alnsn
525 1.3 alnsn Note: the following conditions must met:
526 1.3 alnsn 0 <= scratches <= SLJIT_NUMBER_OF_REGISTERS
527 1.3 alnsn 0 <= saveds <= SLJIT_NUMBER_OF_REGISTERS
528 1.3 alnsn scratches + saveds <= SLJIT_NUMBER_OF_REGISTERS
529 1.3 alnsn 0 <= fscratches <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
530 1.3 alnsn 0 <= fsaveds <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
531 1.3 alnsn fscratches + fsaveds <= SLJIT_NUMBER_OF_FLOAT_REGISTERS
532 1.1 alnsn
533 1.2 alnsn Note: every call of sljit_emit_enter and sljit_set_context
534 1.3 alnsn overwrites the previous context.
535 1.3 alnsn */
536 1.3 alnsn
537 1.3 alnsn /* The absolute address returned by sljit_get_local_base with
538 1.4 alnsn offset 0 is aligned to sljit_f64. Otherwise it is aligned to sljit_sw. */
539 1.4 alnsn #define SLJIT_F64_ALIGNMENT 0x00000001
540 1.1 alnsn
541 1.3 alnsn /* The local_size must be >= 0 and <= SLJIT_MAX_LOCAL_SIZE. */
542 1.1 alnsn #define SLJIT_MAX_LOCAL_SIZE 65536
543 1.1 alnsn
544 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
545 1.3 alnsn sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
546 1.3 alnsn sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size);
547 1.1 alnsn
548 1.1 alnsn /* The machine code has a context (which contains the local stack space size,
549 1.1 alnsn number of used registers, etc.) which initialized by sljit_emit_enter. Several
550 1.1 alnsn functions (like sljit_emit_return) requres this context to be able to generate
551 1.1 alnsn the appropriate code. However, some code fragments (like inline cache) may have
552 1.3 alnsn no normal entry point so their context is unknown for the compiler. Their context
553 1.3 alnsn can be provided to the compiler by the sljit_set_context function.
554 1.1 alnsn
555 1.1 alnsn Note: every call of sljit_emit_enter and sljit_set_context overwrites
556 1.1 alnsn the previous context. */
557 1.1 alnsn
558 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
559 1.3 alnsn sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
560 1.3 alnsn sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size);
561 1.1 alnsn
562 1.1 alnsn /* Return from machine code. The op argument can be SLJIT_UNUSED which means the
563 1.1 alnsn function does not return with anything or any opcode between SLJIT_MOV and
564 1.2 alnsn SLJIT_MOV_P (see sljit_emit_op1). As for src and srcw they must be 0 if op
565 1.1 alnsn is SLJIT_UNUSED, otherwise see below the description about source and
566 1.1 alnsn destination arguments. */
567 1.1 alnsn
568 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op,
569 1.3 alnsn sljit_s32 src, sljit_sw srcw);
570 1.2 alnsn
571 1.2 alnsn /* Fast calling mechanism for utility functions (see SLJIT_FAST_CALL). All registers and
572 1.2 alnsn even the stack frame is passed to the callee. The return address is preserved in
573 1.2 alnsn dst/dstw by sljit_emit_fast_enter (the type of the value stored by this function
574 1.2 alnsn is sljit_p), and sljit_emit_fast_return can use this as a return value later. */
575 1.2 alnsn
576 1.2 alnsn /* Note: only for sljit specific, non ABI compilant calls. Fast, since only a few machine
577 1.2 alnsn instructions are needed. Excellent for small uility functions, where saving registers
578 1.2 alnsn and setting up a new stack frame would cost too much performance. However, it is still
579 1.2 alnsn possible to return to the address of the caller (or anywhere else). */
580 1.1 alnsn
581 1.4 alnsn /* Note: may destroy flags. */
582 1.1 alnsn
583 1.1 alnsn /* Note: although sljit_emit_fast_return could be replaced by an ijump, it is not suggested,
584 1.1 alnsn since many architectures do clever branch prediction on call / return instruction pairs. */
585 1.1 alnsn
586 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw);
587 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw);
588 1.1 alnsn
589 1.1 alnsn /*
590 1.1 alnsn Source and destination values for arithmetical instructions
591 1.1 alnsn imm - a simple immediate value (cannot be used as a destination)
592 1.1 alnsn reg - any of the registers (immediate argument must be 0)
593 1.1 alnsn [imm] - absolute immediate memory address
594 1.1 alnsn [reg+imm] - indirect memory address
595 1.1 alnsn [reg+(reg<<imm)] - indirect indexed memory address (shift must be between 0 and 3)
596 1.2 alnsn useful for (byte, half, int, sljit_sw) array access
597 1.1 alnsn (fully supported by both x86 and ARM architectures, and cheap operation on others)
598 1.1 alnsn */
599 1.1 alnsn
600 1.1 alnsn /*
601 1.1 alnsn IMPORATNT NOTE: memory access MUST be naturally aligned except
602 1.1 alnsn SLJIT_UNALIGNED macro is defined and its value is 1.
603 1.1 alnsn
604 1.1 alnsn length | alignment
605 1.1 alnsn ---------+-----------
606 1.2 alnsn byte | 1 byte (any physical_address is accepted)
607 1.2 alnsn half | 2 byte (physical_address & 0x1 == 0)
608 1.2 alnsn int | 4 byte (physical_address & 0x3 == 0)
609 1.2 alnsn word | 4 byte if SLJIT_32BIT_ARCHITECTURE is defined and its value is 1
610 1.1 alnsn | 8 byte if SLJIT_64BIT_ARCHITECTURE is defined and its value is 1
611 1.2 alnsn pointer | size of sljit_p type (4 byte on 32 bit machines, 4 or 8 byte
612 1.2 alnsn | on 64 bit machines)
613 1.1 alnsn
614 1.2 alnsn Note: Different architectures have different addressing limitations.
615 1.2 alnsn A single instruction is enough for the following addressing
616 1.2 alnsn modes. Other adrressing modes are emulated by instruction
617 1.2 alnsn sequences. This information could help to improve those code
618 1.2 alnsn generators which focuses only a few architectures.
619 1.2 alnsn
620 1.2 alnsn x86: [reg+imm], -2^32+1 <= imm <= 2^32-1 (full address space on x86-32)
621 1.2 alnsn [reg+(reg<<imm)] is supported
622 1.2 alnsn [imm], -2^32+1 <= imm <= 2^32-1 is supported
623 1.2 alnsn Write-back is not supported
624 1.2 alnsn arm: [reg+imm], -4095 <= imm <= 4095 or -255 <= imm <= 255 for signed
625 1.2 alnsn bytes, any halfs or floating point values)
626 1.2 alnsn [reg+(reg<<imm)] is supported
627 1.2 alnsn Write-back is supported
628 1.2 alnsn arm-t2: [reg+imm], -255 <= imm <= 4095
629 1.2 alnsn [reg+(reg<<imm)] is supported
630 1.2 alnsn Write back is supported only for [reg+imm], where -255 <= imm <= 255
631 1.2 alnsn ppc: [reg+imm], -65536 <= imm <= 65535. 64 bit loads/stores and 32 bit
632 1.2 alnsn signed load on 64 bit requires immediates divisible by 4.
633 1.2 alnsn [reg+imm] is not supported for signed 8 bit values.
634 1.2 alnsn [reg+reg] is supported
635 1.2 alnsn Write-back is supported except for one instruction: 32 bit signed
636 1.2 alnsn load with [reg+imm] addressing mode on 64 bit.
637 1.2 alnsn mips: [reg+imm], -65536 <= imm <= 65535
638 1.2 alnsn sparc: [reg+imm], -4096 <= imm <= 4095
639 1.2 alnsn [reg+reg] is supported
640 1.1 alnsn */
641 1.1 alnsn
642 1.1 alnsn /* Register output: simply the name of the register.
643 1.1 alnsn For destination, you can use SLJIT_UNUSED as well. */
644 1.2 alnsn #define SLJIT_MEM 0x80
645 1.1 alnsn #define SLJIT_MEM0() (SLJIT_MEM)
646 1.1 alnsn #define SLJIT_MEM1(r1) (SLJIT_MEM | (r1))
647 1.2 alnsn #define SLJIT_MEM2(r1, r2) (SLJIT_MEM | (r1) | ((r2) << 8))
648 1.2 alnsn #define SLJIT_IMM 0x40
649 1.1 alnsn
650 1.4 alnsn /* Set 32 bit operation mode (I) on 64 bit CPUs. This option is ignored on
651 1.4 alnsn 32 bit CPUs. When this option is set for an arithmetic operation, only
652 1.4 alnsn the lower 32 bit of the input registers are used, and the CPU status
653 1.4 alnsn flags are set according to the 32 bit result. Although the higher 32 bit
654 1.4 alnsn of the input and the result registers are not defined by SLJIT, it might
655 1.4 alnsn be defined by the CPU architecture (e.g. MIPS). To satisfy these CPU
656 1.4 alnsn requirements all source registers must be the result of those operations
657 1.4 alnsn where this option was also set. Memory loads read 32 bit values rather
658 1.4 alnsn than 64 bit ones. In other words 32 bit and 64 bit operations cannot
659 1.4 alnsn be mixed. The only exception is SLJIT_MOV32 and SLJIT_MOVU32 whose source
660 1.4 alnsn register can hold any 32 or 64 bit value, and it is converted to a 32 bit
661 1.4 alnsn compatible format first. This conversion is free (no instructions are
662 1.4 alnsn emitted) on most CPUs. A 32 bit value can also be coverted to a 64 bit
663 1.4 alnsn value by SLJIT_MOV_S32 (sign extension) or SLJIT_MOV_U32 (zero extension).
664 1.4 alnsn
665 1.4 alnsn Note: memory addressing always uses 64 bit values on 64 bit systems so
666 1.4 alnsn the result of a 32 bit operation must not be used with SLJIT_MEMx
667 1.4 alnsn macros.
668 1.4 alnsn
669 1.4 alnsn This option is part of the instruction name, so there is no need to
670 1.4 alnsn manually set it. E.g:
671 1.4 alnsn
672 1.4 alnsn SLJIT_ADD32 == (SLJIT_ADD | SLJIT_I32_OP) */
673 1.3 alnsn #define SLJIT_I32_OP 0x100
674 1.1 alnsn
675 1.4 alnsn /* Set F32 (single) precision mode for floating-point computation. This
676 1.4 alnsn option is similar to SLJIT_I32_OP, it just applies to floating point
677 1.4 alnsn registers. When this option is passed, the CPU performs 32 bit floating
678 1.4 alnsn point operations, rather than 64 bit one. Similar to SLJIT_I32_OP, all
679 1.4 alnsn register arguments must be the result of those operations where this
680 1.4 alnsn option was also set.
681 1.4 alnsn
682 1.4 alnsn This option is part of the instruction name, so there is no need to
683 1.4 alnsn manually set it. E.g:
684 1.4 alnsn
685 1.4 alnsn SLJIT_MOV_F32 = (SLJIT_MOV_F64 | SLJIT_F32_OP)
686 1.4 alnsn */
687 1.4 alnsn #define SLJIT_F32_OP SLJIT_I32_OP
688 1.4 alnsn
689 1.4 alnsn /* Many CPUs (x86, ARM, PPC) has status flags which can be set according
690 1.4 alnsn to the result of an operation. Other CPUs (MIPS) does not have status
691 1.4 alnsn flags, and results must be stored in registers. To cover both architecture
692 1.4 alnsn types efficiently only two flags are defined by SLJIT:
693 1.4 alnsn
694 1.4 alnsn * Zero (equal) flag: it is set if the result is zero
695 1.4 alnsn * Variable flag: its value is defined by the last arithmetic operation
696 1.4 alnsn
697 1.4 alnsn SLJIT instructions can set any or both of these flags. The value of
698 1.4 alnsn these flags is undefined if the instruction does not specify their value.
699 1.4 alnsn The description of each instruction contains the list of allowed flag
700 1.4 alnsn types.
701 1.4 alnsn
702 1.4 alnsn Example: SLJIT_ADD can set the Z, OVERFLOW, CARRY flags hence
703 1.4 alnsn
704 1.4 alnsn sljit_op2(..., SLJIT_ADD, ...)
705 1.4 alnsn Both the zero and variable flags are undefined so their
706 1.4 alnsn they hold a random value after the operation is completed.
707 1.4 alnsn
708 1.4 alnsn sljit_op2(..., SLJIT_ADD | SLJIT_SET_Z, ...)
709 1.4 alnsn Sets the zero flag if the result is zero, clears it otherwise.
710 1.4 alnsn The variable flag is undefined.
711 1.4 alnsn
712 1.4 alnsn sljit_op2(..., SLJIT_ADD | SLJIT_SET_OVERFLOW, ...)
713 1.4 alnsn Sets the variable flag if an integer overflow occurs, clears
714 1.4 alnsn it otherwise. The zero flag is undefined.
715 1.4 alnsn
716 1.4 alnsn sljit_op2(..., SLJIT_ADD | SLJIT_SET_NOT_OVERFLOW, ...)
717 1.4 alnsn Sets the variable flag if an integer overflow does NOT occur,
718 1.4 alnsn clears it otherwise. The zero flag is undefined.
719 1.4 alnsn
720 1.4 alnsn sljit_op2(..., SLJIT_ADD | SLJIT_SET_Z | SLJIT_SET_CARRY, ...)
721 1.4 alnsn Sets the zero flag if the result is zero, clears it otherwise.
722 1.4 alnsn Sets the variable flag if unsigned overflow (carry) occurs,
723 1.4 alnsn clears it otherwise.
724 1.4 alnsn
725 1.4 alnsn If an instruction (e.g. SLJIT_MOV) does not modify flags the flags are
726 1.4 alnsn unchanged.
727 1.4 alnsn
728 1.4 alnsn Using these flags can reduce the number of emitted instructions. E.g. a
729 1.4 alnsn fast loop can be implemented by decreasing a counter register and set the
730 1.4 alnsn zero flag to jump back if the counter register is not reached zero.
731 1.4 alnsn
732 1.4 alnsn Motivation: although CPUs can set a large number of flags, usually their
733 1.4 alnsn values are ignored or only one of them is used. Emulating a large number
734 1.4 alnsn of flags on systems without flag register is complicated so SLJIT
735 1.4 alnsn instructions must specify the flag they want to use and only that flag
736 1.4 alnsn will be emulated. The last arithmetic instruction can be repeated if
737 1.4 alnsn multiple flags needs to be checked.
738 1.4 alnsn */
739 1.4 alnsn
740 1.4 alnsn /* Set Zero status flag. */
741 1.4 alnsn #define SLJIT_SET_Z 0x0200
742 1.4 alnsn /* Set the variable status flag if condition is true.
743 1.4 alnsn See comparison types. */
744 1.4 alnsn #define SLJIT_SET(condition) ((condition) << 10)
745 1.1 alnsn
746 1.1 alnsn /* Notes:
747 1.1 alnsn - you cannot postpone conditional jump instructions except if noted that
748 1.1 alnsn the instruction does not set flags (See: SLJIT_KEEP_FLAGS).
749 1.1 alnsn - flag combinations: '|' means 'logical or'. */
750 1.1 alnsn
751 1.3 alnsn /* Starting index of opcodes for sljit_emit_op0. */
752 1.3 alnsn #define SLJIT_OP0_BASE 0
753 1.3 alnsn
754 1.4 alnsn /* Flags: - (does not modify flags)
755 1.3 alnsn Note: breakpoint instruction is not supported by all architectures (e.g. ppc)
756 1.1 alnsn It falls back to SLJIT_NOP in those cases. */
757 1.3 alnsn #define SLJIT_BREAKPOINT (SLJIT_OP0_BASE + 0)
758 1.4 alnsn /* Flags: - (does not modify flags)
759 1.1 alnsn Note: may or may not cause an extra cycle wait
760 1.1 alnsn it can even decrease the runtime in a few cases. */
761 1.3 alnsn #define SLJIT_NOP (SLJIT_OP0_BASE + 1)
762 1.2 alnsn /* Flags: - (may destroy flags)
763 1.3 alnsn Unsigned multiplication of SLJIT_R0 and SLJIT_R1.
764 1.3 alnsn Result is placed into SLJIT_R1:SLJIT_R0 (high:low) word */
765 1.3 alnsn #define SLJIT_LMUL_UW (SLJIT_OP0_BASE + 2)
766 1.2 alnsn /* Flags: - (may destroy flags)
767 1.3 alnsn Signed multiplication of SLJIT_R0 and SLJIT_R1.
768 1.3 alnsn Result is placed into SLJIT_R1:SLJIT_R0 (high:low) word */
769 1.3 alnsn #define SLJIT_LMUL_SW (SLJIT_OP0_BASE + 3)
770 1.4 alnsn /* Flags: - (may destroy flags)
771 1.3 alnsn Unsigned divide of the value in SLJIT_R0 by the value in SLJIT_R1.
772 1.3 alnsn The result is placed into SLJIT_R0 and the remainder into SLJIT_R1.
773 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined. */
774 1.3 alnsn #define SLJIT_DIVMOD_UW (SLJIT_OP0_BASE + 4)
775 1.3 alnsn #define SLJIT_DIVMOD_U32 (SLJIT_DIVMOD_UW | SLJIT_I32_OP)
776 1.4 alnsn /* Flags: - (may destroy flags)
777 1.3 alnsn Signed divide of the value in SLJIT_R0 by the value in SLJIT_R1.
778 1.3 alnsn The result is placed into SLJIT_R0 and the remainder into SLJIT_R1.
779 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined.
780 1.3 alnsn Note: if SLJIT_R1 is -1 and SLJIT_R0 is integer min (0x800..00),
781 1.3 alnsn the behaviour is undefined. */
782 1.3 alnsn #define SLJIT_DIVMOD_SW (SLJIT_OP0_BASE + 5)
783 1.3 alnsn #define SLJIT_DIVMOD_S32 (SLJIT_DIVMOD_SW | SLJIT_I32_OP)
784 1.4 alnsn /* Flags: - (may destroy flags)
785 1.3 alnsn Unsigned divide of the value in SLJIT_R0 by the value in SLJIT_R1.
786 1.3 alnsn The result is placed into SLJIT_R0. SLJIT_R1 preserves its value.
787 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined. */
788 1.3 alnsn #define SLJIT_DIV_UW (SLJIT_OP0_BASE + 6)
789 1.3 alnsn #define SLJIT_DIV_U32 (SLJIT_DIV_UW | SLJIT_I32_OP)
790 1.4 alnsn /* Flags: - (may destroy flags)
791 1.3 alnsn Signed divide of the value in SLJIT_R0 by the value in SLJIT_R1.
792 1.3 alnsn The result is placed into SLJIT_R0. SLJIT_R1 preserves its value.
793 1.3 alnsn Note: if SLJIT_R1 is 0, the behaviour is undefined.
794 1.3 alnsn Note: if SLJIT_R1 is -1 and SLJIT_R0 is integer min (0x800..00),
795 1.3 alnsn the behaviour is undefined. */
796 1.3 alnsn #define SLJIT_DIV_SW (SLJIT_OP0_BASE + 7)
797 1.3 alnsn #define SLJIT_DIV_S32 (SLJIT_DIV_SW | SLJIT_I32_OP)
798 1.3 alnsn
799 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op);
800 1.1 alnsn
801 1.3 alnsn /* Starting index of opcodes for sljit_emit_op1. */
802 1.3 alnsn #define SLJIT_OP1_BASE 32
803 1.1 alnsn
804 1.4 alnsn /* The MOV instruction transfer data from source to destination.
805 1.4 alnsn
806 1.4 alnsn MOV instruction suffixes:
807 1.4 alnsn
808 1.4 alnsn U8 - unsigned 8 bit data transfer
809 1.4 alnsn S8 - signed 8 bit data transfer
810 1.4 alnsn U16 - unsigned 16 bit data transfer
811 1.4 alnsn S16 - signed 16 bit data transfer
812 1.4 alnsn U32 - unsigned int (32 bit) data transfer
813 1.4 alnsn S32 - signed int (32 bit) data transfer
814 1.4 alnsn P - pointer (sljit_p) data transfer
815 1.4 alnsn
816 1.4 alnsn U = move with update (pre form). If source or destination defined as
817 1.4 alnsn SLJIT_MEM1(r1) or SLJIT_MEM2(r1, r2), r1 is increased by the
818 1.4 alnsn offset part of the address.
819 1.4 alnsn
820 1.4 alnsn Register arguments and base registers can only be used once for move
821 1.4 alnsn with update instructions. The shift value of SLJIT_MEM2 addressing
822 1.4 alnsn mode must also be 0. Reason: SLJIT_MOVU instructions are expected to
823 1.4 alnsn be in high-performance loops where complex instruction emulation
824 1.4 alnsn would be too costly.
825 1.4 alnsn
826 1.4 alnsn Examples for invalid move with update instructions:
827 1.4 alnsn
828 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
829 1.4 alnsn SLJIT_R0, 0, SLJIT_MEM1(SLJIT_R0), 8);
830 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
831 1.4 alnsn SLJIT_MEM2(SLJIT_R1, SLJIT_R0), 0, SLJIT_R0, 0);
832 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
833 1.4 alnsn SLJIT_MEM2(SLJIT_R0, SLJIT_R1), 0, SLJIT_MEM1(SLJIT_R0), 8);
834 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
835 1.4 alnsn SLJIT_MEM2(SLJIT_R0, SLJIT_R1), 0, SLJIT_MEM2(SLJIT_R1, SLJIT_R0), 0);
836 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
837 1.4 alnsn SLJIT_R2, 0, SLJIT_MEM2(SLJIT_R0, SLJIT_R1), 1);
838 1.4 alnsn
839 1.4 alnsn The following example is valid, since only the offset register is
840 1.4 alnsn used multiple times:
841 1.1 alnsn
842 1.4 alnsn sljit_emit_op1(..., SLJIT_MOVU_U8,
843 1.4 alnsn SLJIT_MEM2(SLJIT_R0, SLJIT_R2), 0, SLJIT_MEM2(SLJIT_R1, SLJIT_R2), 0);
844 1.4 alnsn */
845 1.4 alnsn
846 1.4 alnsn /* Flags: - (does not modify flags) */
847 1.3 alnsn #define SLJIT_MOV (SLJIT_OP1_BASE + 0)
848 1.4 alnsn /* Flags: - (does not modify flags) */
849 1.3 alnsn #define SLJIT_MOV_U8 (SLJIT_OP1_BASE + 1)
850 1.3 alnsn #define SLJIT_MOV32_U8 (SLJIT_MOV_U8 | SLJIT_I32_OP)
851 1.4 alnsn /* Flags: - (does not modify flags) */
852 1.3 alnsn #define SLJIT_MOV_S8 (SLJIT_OP1_BASE + 2)
853 1.3 alnsn #define SLJIT_MOV32_S8 (SLJIT_MOV_S8 | SLJIT_I32_OP)
854 1.4 alnsn /* Flags: - (does not modify flags) */
855 1.3 alnsn #define SLJIT_MOV_U16 (SLJIT_OP1_BASE + 3)
856 1.3 alnsn #define SLJIT_MOV32_U16 (SLJIT_MOV_U16 | SLJIT_I32_OP)
857 1.4 alnsn /* Flags: - (does not modify flags) */
858 1.3 alnsn #define SLJIT_MOV_S16 (SLJIT_OP1_BASE + 4)
859 1.3 alnsn #define SLJIT_MOV32_S16 (SLJIT_MOV_S16 | SLJIT_I32_OP)
860 1.4 alnsn /* Flags: - (does not modify flags)
861 1.3 alnsn Note: no SLJIT_MOV32_U32 form, since it is the same as SLJIT_MOV32 */
862 1.3 alnsn #define SLJIT_MOV_U32 (SLJIT_OP1_BASE + 5)
863 1.4 alnsn /* Flags: - (does not modify flags)
864 1.3 alnsn Note: no SLJIT_MOV32_S32 form, since it is the same as SLJIT_MOV32 */
865 1.3 alnsn #define SLJIT_MOV_S32 (SLJIT_OP1_BASE + 6)
866 1.4 alnsn /* Flags: - (does not modify flags) */
867 1.3 alnsn #define SLJIT_MOV32 (SLJIT_MOV_S32 | SLJIT_I32_OP)
868 1.4 alnsn /* Flags: - (does not modify flags) */
869 1.3 alnsn #define SLJIT_MOV_P (SLJIT_OP1_BASE + 7)
870 1.4 alnsn /* Flags: - (may destroy flags) */
871 1.3 alnsn #define SLJIT_MOVU (SLJIT_OP1_BASE + 8)
872 1.4 alnsn /* Flags: - (may destroy flags) */
873 1.3 alnsn #define SLJIT_MOVU_U8 (SLJIT_OP1_BASE + 9)
874 1.3 alnsn #define SLJIT_MOVU32_U8 (SLJIT_MOVU_U8 | SLJIT_I32_OP)
875 1.4 alnsn /* Flags: - (may destroy flags) */
876 1.3 alnsn #define SLJIT_MOVU_S8 (SLJIT_OP1_BASE + 10)
877 1.3 alnsn #define SLJIT_MOVU32_S8 (SLJIT_MOVU_S8 | SLJIT_I32_OP)
878 1.4 alnsn /* Flags: - (may destroy flags) */
879 1.3 alnsn #define SLJIT_MOVU_U16 (SLJIT_OP1_BASE + 11)
880 1.3 alnsn #define SLJIT_MOVU32_U16 (SLJIT_MOVU_U16 | SLJIT_I32_OP)
881 1.4 alnsn /* Flags: - (may destroy flags) */
882 1.3 alnsn #define SLJIT_MOVU_S16 (SLJIT_OP1_BASE + 12)
883 1.3 alnsn #define SLJIT_MOVU32_S16 (SLJIT_MOVU_S16 | SLJIT_I32_OP)
884 1.4 alnsn /* Flags: - (may destroy flags)
885 1.3 alnsn Note: no SLJIT_MOVU32_U32 form, since it is the same as SLJIT_MOVU32 */
886 1.3 alnsn #define SLJIT_MOVU_U32 (SLJIT_OP1_BASE + 13)
887 1.4 alnsn /* Flags: - (may destroy flags)
888 1.3 alnsn Note: no SLJIT_MOVU32_S32 form, since it is the same as SLJIT_MOVU32 */
889 1.3 alnsn #define SLJIT_MOVU_S32 (SLJIT_OP1_BASE + 14)
890 1.4 alnsn /* Flags: - (may destroy flags) */
891 1.3 alnsn #define SLJIT_MOVU32 (SLJIT_MOVU_S32 | SLJIT_I32_OP)
892 1.4 alnsn /* Flags: - (may destroy flags) */
893 1.3 alnsn #define SLJIT_MOVU_P (SLJIT_OP1_BASE + 15)
894 1.4 alnsn /* Flags: Z */
895 1.3 alnsn #define SLJIT_NOT (SLJIT_OP1_BASE + 16)
896 1.3 alnsn #define SLJIT_NOT32 (SLJIT_NOT | SLJIT_I32_OP)
897 1.4 alnsn /* Flags: Z | OVERFLOW */
898 1.3 alnsn #define SLJIT_NEG (SLJIT_OP1_BASE + 17)
899 1.3 alnsn #define SLJIT_NEG32 (SLJIT_NEG | SLJIT_I32_OP)
900 1.1 alnsn /* Count leading zeroes
901 1.4 alnsn Flags: Z */
902 1.3 alnsn #define SLJIT_CLZ (SLJIT_OP1_BASE + 18)
903 1.3 alnsn #define SLJIT_CLZ32 (SLJIT_CLZ | SLJIT_I32_OP)
904 1.3 alnsn
905 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
906 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
907 1.3 alnsn sljit_s32 src, sljit_sw srcw);
908 1.2 alnsn
909 1.3 alnsn /* Starting index of opcodes for sljit_emit_op2. */
910 1.3 alnsn #define SLJIT_OP2_BASE 96
911 1.1 alnsn
912 1.4 alnsn /* Flags: Z | OVERFLOW | CARRY */
913 1.3 alnsn #define SLJIT_ADD (SLJIT_OP2_BASE + 0)
914 1.3 alnsn #define SLJIT_ADD32 (SLJIT_ADD | SLJIT_I32_OP)
915 1.4 alnsn /* Flags: CARRY */
916 1.3 alnsn #define SLJIT_ADDC (SLJIT_OP2_BASE + 1)
917 1.3 alnsn #define SLJIT_ADDC32 (SLJIT_ADDC | SLJIT_I32_OP)
918 1.4 alnsn /* Flags: Z | LESS | GREATER_EQUAL | GREATER | LESS_EQUAL
919 1.4 alnsn SIG_LESS | SIG_GREATER_EQUAL | SIG_GREATER
920 1.4 alnsn SIG_LESS_EQUAL | CARRY */
921 1.3 alnsn #define SLJIT_SUB (SLJIT_OP2_BASE + 2)
922 1.3 alnsn #define SLJIT_SUB32 (SLJIT_SUB | SLJIT_I32_OP)
923 1.4 alnsn /* Flags: CARRY */
924 1.3 alnsn #define SLJIT_SUBC (SLJIT_OP2_BASE + 3)
925 1.3 alnsn #define SLJIT_SUBC32 (SLJIT_SUBC | SLJIT_I32_OP)
926 1.1 alnsn /* Note: integer mul
927 1.4 alnsn Flags: MUL_OVERFLOW */
928 1.3 alnsn #define SLJIT_MUL (SLJIT_OP2_BASE + 4)
929 1.3 alnsn #define SLJIT_MUL32 (SLJIT_MUL | SLJIT_I32_OP)
930 1.4 alnsn /* Flags: Z */
931 1.3 alnsn #define SLJIT_AND (SLJIT_OP2_BASE + 5)
932 1.3 alnsn #define SLJIT_AND32 (SLJIT_AND | SLJIT_I32_OP)
933 1.4 alnsn /* Flags: Z */
934 1.3 alnsn #define SLJIT_OR (SLJIT_OP2_BASE + 6)
935 1.3 alnsn #define SLJIT_OR32 (SLJIT_OR | SLJIT_I32_OP)
936 1.4 alnsn /* Flags: Z */
937 1.3 alnsn #define SLJIT_XOR (SLJIT_OP2_BASE + 7)
938 1.3 alnsn #define SLJIT_XOR32 (SLJIT_XOR | SLJIT_I32_OP)
939 1.4 alnsn /* Flags: Z
940 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
941 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
942 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
943 1.3 alnsn to bit_length - 1, the result is undefined. */
944 1.3 alnsn #define SLJIT_SHL (SLJIT_OP2_BASE + 8)
945 1.3 alnsn #define SLJIT_SHL32 (SLJIT_SHL | SLJIT_I32_OP)
946 1.4 alnsn /* Flags: Z
947 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
948 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
949 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
950 1.3 alnsn to bit_length - 1, the result is undefined. */
951 1.3 alnsn #define SLJIT_LSHR (SLJIT_OP2_BASE + 9)
952 1.3 alnsn #define SLJIT_LSHR32 (SLJIT_LSHR | SLJIT_I32_OP)
953 1.4 alnsn /* Flags: Z
954 1.1 alnsn Let bit_length be the length of the shift operation: 32 or 64.
955 1.1 alnsn If src2 is immediate, src2w is masked by (bit_length - 1).
956 1.1 alnsn Otherwise, if the content of src2 is outside the range from 0
957 1.3 alnsn to bit_length - 1, the result is undefined. */
958 1.3 alnsn #define SLJIT_ASHR (SLJIT_OP2_BASE + 10)
959 1.3 alnsn #define SLJIT_ASHR32 (SLJIT_ASHR | SLJIT_I32_OP)
960 1.3 alnsn
961 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
962 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
963 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
964 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
965 1.1 alnsn
966 1.3 alnsn /* Returns with non-zero if fpu is available. */
967 1.1 alnsn
968 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void);
969 1.2 alnsn
970 1.3 alnsn /* Starting index of opcodes for sljit_emit_fop1. */
971 1.3 alnsn #define SLJIT_FOP1_BASE 128
972 1.2 alnsn
973 1.4 alnsn /* Flags: - (does not modify flags) */
974 1.3 alnsn #define SLJIT_MOV_F64 (SLJIT_FOP1_BASE + 0)
975 1.3 alnsn #define SLJIT_MOV_F32 (SLJIT_MOV_F64 | SLJIT_F32_OP)
976 1.3 alnsn /* Convert opcodes: CONV[DST_TYPE].FROM[SRC_TYPE]
977 1.3 alnsn SRC/DST TYPE can be: D - double, S - single, W - signed word, I - signed int
978 1.3 alnsn Rounding mode when the destination is W or I: round towards zero. */
979 1.4 alnsn /* Flags: - (does not modify flags) */
980 1.3 alnsn #define SLJIT_CONV_F64_FROM_F32 (SLJIT_FOP1_BASE + 1)
981 1.3 alnsn #define SLJIT_CONV_F32_FROM_F64 (SLJIT_CONV_F64_FROM_F32 | SLJIT_F32_OP)
982 1.4 alnsn /* Flags: - (does not modify flags) */
983 1.3 alnsn #define SLJIT_CONV_SW_FROM_F64 (SLJIT_FOP1_BASE + 2)
984 1.3 alnsn #define SLJIT_CONV_SW_FROM_F32 (SLJIT_CONV_SW_FROM_F64 | SLJIT_F32_OP)
985 1.4 alnsn /* Flags: - (does not modify flags) */
986 1.3 alnsn #define SLJIT_CONV_S32_FROM_F64 (SLJIT_FOP1_BASE + 3)
987 1.3 alnsn #define SLJIT_CONV_S32_FROM_F32 (SLJIT_CONV_S32_FROM_F64 | SLJIT_F32_OP)
988 1.4 alnsn /* Flags: - (does not modify flags) */
989 1.3 alnsn #define SLJIT_CONV_F64_FROM_SW (SLJIT_FOP1_BASE + 4)
990 1.3 alnsn #define SLJIT_CONV_F32_FROM_SW (SLJIT_CONV_F64_FROM_SW | SLJIT_F32_OP)
991 1.4 alnsn /* Flags: - (does not modify flags) */
992 1.3 alnsn #define SLJIT_CONV_F64_FROM_S32 (SLJIT_FOP1_BASE + 5)
993 1.3 alnsn #define SLJIT_CONV_F32_FROM_S32 (SLJIT_CONV_F64_FROM_S32 | SLJIT_F32_OP)
994 1.3 alnsn /* Note: dst is the left and src is the right operand for SLJIT_CMPD.
995 1.4 alnsn Flags: EQUAL_F | LESS_F | GREATER_EQUAL_F | GREATER_F | LESS_EQUAL_F */
996 1.3 alnsn #define SLJIT_CMP_F64 (SLJIT_FOP1_BASE + 6)
997 1.3 alnsn #define SLJIT_CMP_F32 (SLJIT_CMP_F64 | SLJIT_F32_OP)
998 1.4 alnsn /* Flags: - (does not modify flags) */
999 1.3 alnsn #define SLJIT_NEG_F64 (SLJIT_FOP1_BASE + 7)
1000 1.3 alnsn #define SLJIT_NEG_F32 (SLJIT_NEG_F64 | SLJIT_F32_OP)
1001 1.4 alnsn /* Flags: - (does not modify flags) */
1002 1.3 alnsn #define SLJIT_ABS_F64 (SLJIT_FOP1_BASE + 8)
1003 1.3 alnsn #define SLJIT_ABS_F32 (SLJIT_ABS_F64 | SLJIT_F32_OP)
1004 1.3 alnsn
1005 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
1006 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
1007 1.3 alnsn sljit_s32 src, sljit_sw srcw);
1008 1.2 alnsn
1009 1.3 alnsn /* Starting index of opcodes for sljit_emit_fop2. */
1010 1.3 alnsn #define SLJIT_FOP2_BASE 160
1011 1.2 alnsn
1012 1.4 alnsn /* Flags: - (does not modify flags) */
1013 1.3 alnsn #define SLJIT_ADD_F64 (SLJIT_FOP2_BASE + 0)
1014 1.3 alnsn #define SLJIT_ADD_F32 (SLJIT_ADD_F64 | SLJIT_F32_OP)
1015 1.4 alnsn /* Flags: - (does not modify flags) */
1016 1.3 alnsn #define SLJIT_SUB_F64 (SLJIT_FOP2_BASE + 1)
1017 1.3 alnsn #define SLJIT_SUB_F32 (SLJIT_SUB_F64 | SLJIT_F32_OP)
1018 1.4 alnsn /* Flags: - (does not modify flags) */
1019 1.3 alnsn #define SLJIT_MUL_F64 (SLJIT_FOP2_BASE + 2)
1020 1.3 alnsn #define SLJIT_MUL_F32 (SLJIT_MUL_F64 | SLJIT_F32_OP)
1021 1.4 alnsn /* Flags: - (does not modify flags) */
1022 1.3 alnsn #define SLJIT_DIV_F64 (SLJIT_FOP2_BASE + 3)
1023 1.3 alnsn #define SLJIT_DIV_F32 (SLJIT_DIV_F64 | SLJIT_F32_OP)
1024 1.2 alnsn
1025 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
1026 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
1027 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
1028 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
1029 1.1 alnsn
1030 1.1 alnsn /* Label and jump instructions. */
1031 1.1 alnsn
1032 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler);
1033 1.1 alnsn
1034 1.3 alnsn /* Invert (negate) conditional type: xor (^) with 0x1 */
1035 1.1 alnsn
1036 1.3 alnsn /* Integer comparison types. */
1037 1.3 alnsn #define SLJIT_EQUAL 0
1038 1.3 alnsn #define SLJIT_EQUAL32 (SLJIT_EQUAL | SLJIT_I32_OP)
1039 1.3 alnsn #define SLJIT_ZERO 0
1040 1.3 alnsn #define SLJIT_ZERO32 (SLJIT_ZERO | SLJIT_I32_OP)
1041 1.3 alnsn #define SLJIT_NOT_EQUAL 1
1042 1.3 alnsn #define SLJIT_NOT_EQUAL32 (SLJIT_NOT_EQUAL | SLJIT_I32_OP)
1043 1.3 alnsn #define SLJIT_NOT_ZERO 1
1044 1.3 alnsn #define SLJIT_NOT_ZERO32 (SLJIT_NOT_ZERO | SLJIT_I32_OP)
1045 1.3 alnsn
1046 1.3 alnsn #define SLJIT_LESS 2
1047 1.3 alnsn #define SLJIT_LESS32 (SLJIT_LESS | SLJIT_I32_OP)
1048 1.4 alnsn #define SLJIT_SET_LESS SLJIT_SET(SLJIT_LESS)
1049 1.3 alnsn #define SLJIT_GREATER_EQUAL 3
1050 1.3 alnsn #define SLJIT_GREATER_EQUAL32 (SLJIT_GREATER_EQUAL | SLJIT_I32_OP)
1051 1.4 alnsn #define SLJIT_SET_GREATER_EQUAL SLJIT_SET(SLJIT_GREATER_EQUAL)
1052 1.3 alnsn #define SLJIT_GREATER 4
1053 1.3 alnsn #define SLJIT_GREATER32 (SLJIT_GREATER | SLJIT_I32_OP)
1054 1.4 alnsn #define SLJIT_SET_GREATER SLJIT_SET(SLJIT_GREATER)
1055 1.3 alnsn #define SLJIT_LESS_EQUAL 5
1056 1.3 alnsn #define SLJIT_LESS_EQUAL32 (SLJIT_LESS_EQUAL | SLJIT_I32_OP)
1057 1.4 alnsn #define SLJIT_SET_LESS_EQUAL SLJIT_SET(SLJIT_LESS_EQUAL)
1058 1.3 alnsn #define SLJIT_SIG_LESS 6
1059 1.3 alnsn #define SLJIT_SIG_LESS32 (SLJIT_SIG_LESS | SLJIT_I32_OP)
1060 1.4 alnsn #define SLJIT_SET_SIG_LESS SLJIT_SET(SLJIT_SIG_LESS)
1061 1.3 alnsn #define SLJIT_SIG_GREATER_EQUAL 7
1062 1.3 alnsn #define SLJIT_SIG_GREATER_EQUAL32 (SLJIT_SIG_GREATER_EQUAL | SLJIT_I32_OP)
1063 1.4 alnsn #define SLJIT_SET_SIG_GREATER_EQUAL SLJIT_SET(SLJIT_SET_SIG_GREATER_EQUAL)
1064 1.3 alnsn #define SLJIT_SIG_GREATER 8
1065 1.3 alnsn #define SLJIT_SIG_GREATER32 (SLJIT_SIG_GREATER | SLJIT_I32_OP)
1066 1.4 alnsn #define SLJIT_SET_SIG_GREATER SLJIT_SET(SLJIT_SIG_GREATER)
1067 1.3 alnsn #define SLJIT_SIG_LESS_EQUAL 9
1068 1.3 alnsn #define SLJIT_SIG_LESS_EQUAL32 (SLJIT_SIG_LESS_EQUAL | SLJIT_I32_OP)
1069 1.4 alnsn #define SLJIT_SET_SIG_LESS_EQUAL SLJIT_SET(SLJIT_SIG_LESS_EQUAL)
1070 1.3 alnsn
1071 1.3 alnsn #define SLJIT_OVERFLOW 10
1072 1.3 alnsn #define SLJIT_OVERFLOW32 (SLJIT_OVERFLOW | SLJIT_I32_OP)
1073 1.4 alnsn #define SLJIT_SET_OVERFLOW SLJIT_SET(SLJIT_OVERFLOW)
1074 1.3 alnsn #define SLJIT_NOT_OVERFLOW 11
1075 1.3 alnsn #define SLJIT_NOT_OVERFLOW32 (SLJIT_NOT_OVERFLOW | SLJIT_I32_OP)
1076 1.4 alnsn #define SLJIT_SET_NOT_OVERFLOW SLJIT_SET(SLJIT_NOT_OVERFLOW)
1077 1.3 alnsn
1078 1.3 alnsn #define SLJIT_MUL_OVERFLOW 12
1079 1.3 alnsn #define SLJIT_MUL_OVERFLOW32 (SLJIT_MUL_OVERFLOW | SLJIT_I32_OP)
1080 1.4 alnsn #define SLJIT_SET_MUL_OVERFLOW SLJIT_SET(SLJIT_MUL_OVERFLOW)
1081 1.3 alnsn #define SLJIT_MUL_NOT_OVERFLOW 13
1082 1.3 alnsn #define SLJIT_MUL_NOT_OVERFLOW32 (SLJIT_MUL_NOT_OVERFLOW | SLJIT_I32_OP)
1083 1.4 alnsn #define SLJIT_SET_MUL_NOT_OVERFLOW SLJIT_SET(SLJIT_MUL_NOT_OVERFLOW)
1084 1.4 alnsn
1085 1.4 alnsn /* There is no SLJIT_CARRY or SLJIT_NOT_CARRY. */
1086 1.4 alnsn #define SLJIT_SET_CARRY SLJIT_SET(14)
1087 1.3 alnsn
1088 1.3 alnsn /* Floating point comparison types. */
1089 1.4 alnsn #define SLJIT_EQUAL_F64 16
1090 1.3 alnsn #define SLJIT_EQUAL_F32 (SLJIT_EQUAL_F64 | SLJIT_F32_OP)
1091 1.4 alnsn #define SLJIT_SET_EQUAL_F SLJIT_SET(SLJIT_EQUAL_F64)
1092 1.4 alnsn #define SLJIT_NOT_EQUAL_F64 17
1093 1.3 alnsn #define SLJIT_NOT_EQUAL_F32 (SLJIT_NOT_EQUAL_F64 | SLJIT_F32_OP)
1094 1.4 alnsn #define SLJIT_SET_NOT_EQUAL_F SLJIT_SET(SLJIT_NOT_EQUAL_F64)
1095 1.4 alnsn #define SLJIT_LESS_F64 18
1096 1.3 alnsn #define SLJIT_LESS_F32 (SLJIT_LESS_F64 | SLJIT_F32_OP)
1097 1.4 alnsn #define SLJIT_SET_LESS_F SLJIT_SET(SLJIT_LESS_F64)
1098 1.4 alnsn #define SLJIT_GREATER_EQUAL_F64 19
1099 1.3 alnsn #define SLJIT_GREATER_EQUAL_F32 (SLJIT_GREATER_EQUAL_F64 | SLJIT_F32_OP)
1100 1.4 alnsn #define SLJIT_SET_GREATER_EQUAL_F SLJIT_SET(SLJIT_GREATER_EQUAL_F64)
1101 1.4 alnsn #define SLJIT_GREATER_F64 20
1102 1.3 alnsn #define SLJIT_GREATER_F32 (SLJIT_GREATER_F64 | SLJIT_F32_OP)
1103 1.4 alnsn #define SLJIT_SET_GREATER_F SLJIT_SET(SLJIT_GREATER_F64)
1104 1.4 alnsn #define SLJIT_LESS_EQUAL_F64 21
1105 1.3 alnsn #define SLJIT_LESS_EQUAL_F32 (SLJIT_LESS_EQUAL_F64 | SLJIT_F32_OP)
1106 1.4 alnsn #define SLJIT_SET_LESS_EQUAL_F SLJIT_SET(SLJIT_LESS_EQUAL_F64)
1107 1.4 alnsn #define SLJIT_UNORDERED_F64 22
1108 1.3 alnsn #define SLJIT_UNORDERED_F32 (SLJIT_UNORDERED_F64 | SLJIT_F32_OP)
1109 1.4 alnsn #define SLJIT_SET_UNORDERED_F SLJIT_SET(SLJIT_UNORDERED_F64)
1110 1.4 alnsn #define SLJIT_ORDERED_F64 23
1111 1.3 alnsn #define SLJIT_ORDERED_F32 (SLJIT_ORDERED_F64 | SLJIT_F32_OP)
1112 1.4 alnsn #define SLJIT_SET_ORDERED_F SLJIT_SET(SLJIT_ORDERED_F64)
1113 1.3 alnsn
1114 1.3 alnsn /* Unconditional jump types. */
1115 1.4 alnsn #define SLJIT_JUMP 24
1116 1.4 alnsn #define SLJIT_FAST_CALL 25
1117 1.4 alnsn #define SLJIT_CALL0 26
1118 1.4 alnsn #define SLJIT_CALL1 27
1119 1.4 alnsn #define SLJIT_CALL2 28
1120 1.4 alnsn #define SLJIT_CALL3 29
1121 1.1 alnsn
1122 1.1 alnsn /* Fast calling method. See sljit_emit_fast_enter / sljit_emit_fast_return. */
1123 1.1 alnsn
1124 1.1 alnsn /* The target can be changed during runtime (see: sljit_set_jump_addr). */
1125 1.1 alnsn #define SLJIT_REWRITABLE_JUMP 0x1000
1126 1.1 alnsn
1127 1.1 alnsn /* Emit a jump instruction. The destination is not set, only the type of the jump.
1128 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_CALL3
1129 1.1 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1130 1.4 alnsn
1131 1.4 alnsn Flags: does not modify flags for conditional and unconditional
1132 1.4 alnsn jumps but destroy all flags for calls. */
1133 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type);
1134 1.1 alnsn
1135 1.1 alnsn /* Basic arithmetic comparison. In most architectures it is implemented as
1136 1.1 alnsn an SLJIT_SUB operation (with SLJIT_UNUSED destination and setting
1137 1.1 alnsn appropriate flags) followed by a sljit_emit_jump. However some
1138 1.3 alnsn architectures (i.e: ARM64 or MIPS) may employ special optimizations here.
1139 1.3 alnsn It is suggested to use this comparison form when appropriate.
1140 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_I_SIG_LESS_EQUAL
1141 1.3 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1142 1.4 alnsn Flags: may destroy flags. */
1143 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type,
1144 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
1145 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
1146 1.1 alnsn
1147 1.1 alnsn /* Basic floating point comparison. In most architectures it is implemented as
1148 1.1 alnsn an SLJIT_FCMP operation (setting appropriate flags) followed by a
1149 1.1 alnsn sljit_emit_jump. However some architectures (i.e: MIPS) may employ
1150 1.1 alnsn special optimizations here. It is suggested to use this comparison form
1151 1.1 alnsn when appropriate.
1152 1.3 alnsn type must be between SLJIT_EQUAL_F64 and SLJIT_ORDERED_F32
1153 1.3 alnsn type can be combined (or'ed) with SLJIT_REWRITABLE_JUMP
1154 1.1 alnsn Flags: destroy flags.
1155 1.1 alnsn Note: if either operand is NaN, the behaviour is undefined for
1156 1.3 alnsn types up to SLJIT_S_LESS_EQUAL. */
1157 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type,
1158 1.3 alnsn sljit_s32 src1, sljit_sw src1w,
1159 1.3 alnsn sljit_s32 src2, sljit_sw src2w);
1160 1.1 alnsn
1161 1.1 alnsn /* Set the destination of the jump to this label. */
1162 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_label(struct sljit_jump *jump, struct sljit_label* label);
1163 1.2 alnsn /* Set the destination address of the jump to this label. */
1164 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_target(struct sljit_jump *jump, sljit_uw target);
1165 1.1 alnsn
1166 1.1 alnsn /* Call function or jump anywhere. Both direct and indirect form
1167 1.1 alnsn type must be between SLJIT_JUMP and SLJIT_CALL3
1168 1.1 alnsn Direct form: set src to SLJIT_IMM() and srcw to the address
1169 1.1 alnsn Indirect form: any other valid addressing mode
1170 1.4 alnsn
1171 1.4 alnsn Flags: does not modify flags for unconditional jumps but
1172 1.4 alnsn destroy all flags for calls. */
1173 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw);
1174 1.1 alnsn
1175 1.2 alnsn /* Perform the operation using the conditional flags as the second argument.
1176 1.3 alnsn Type must always be between SLJIT_EQUAL and SLJIT_S_ORDERED. The value
1177 1.3 alnsn represented by the type is 1, if the condition represented by the type
1178 1.2 alnsn is fulfilled, and 0 otherwise.
1179 1.2 alnsn
1180 1.3 alnsn If op == SLJIT_MOV, SLJIT_MOV_S32, SLJIT_MOV_U32:
1181 1.2 alnsn Set dst to the value represented by the type (0 or 1).
1182 1.2 alnsn Src must be SLJIT_UNUSED, and srcw must be 0
1183 1.4 alnsn Flags: - (does not modify flags)
1184 1.2 alnsn If op == SLJIT_OR, op == SLJIT_AND, op == SLJIT_XOR
1185 1.2 alnsn Performs the binary operation using src as the first, and the value
1186 1.2 alnsn represented by type as the second argument.
1187 1.2 alnsn Important note: only dst=src and dstw=srcw is supported at the moment!
1188 1.4 alnsn Flags: Z (may destroy flags)
1189 1.2 alnsn Note: sljit_emit_op_flags does nothing, if dst is SLJIT_UNUSED (regardless of op). */
1190 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
1191 1.3 alnsn sljit_s32 dst, sljit_sw dstw,
1192 1.3 alnsn sljit_s32 src, sljit_sw srcw,
1193 1.3 alnsn sljit_s32 type);
1194 1.1 alnsn
1195 1.3 alnsn /* Copies the base address of SLJIT_SP + offset to dst.
1196 1.4 alnsn Flags: - (may destroy flags) */
1197 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset);
1198 1.1 alnsn
1199 1.1 alnsn /* The constant can be changed runtime (see: sljit_set_const)
1200 1.4 alnsn Flags: - (does not modify flags) */
1201 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value);
1202 1.1 alnsn
1203 1.1 alnsn /* After the code generation the address for label, jump and const instructions
1204 1.2 alnsn are computed. Since these structures are freed by sljit_free_compiler, the
1205 1.1 alnsn addresses must be preserved by the user program elsewere. */
1206 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_label_addr(struct sljit_label *label) { return label->addr; }
1207 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_jump_addr(struct sljit_jump *jump) { return jump->addr; }
1208 1.1 alnsn static SLJIT_INLINE sljit_uw sljit_get_const_addr(struct sljit_const *const_) { return const_->addr; }
1209 1.1 alnsn
1210 1.4 alnsn /* Only the address and executable offset are required to perform dynamic
1211 1.4 alnsn code modifications. See sljit_get_executable_offset function. */
1212 1.4 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_target, sljit_sw executable_offset);
1213 1.4 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant, sljit_sw executable_offset);
1214 1.1 alnsn
1215 1.1 alnsn /* --------------------------------------------------------------------- */
1216 1.1 alnsn /* Miscellaneous utility functions */
1217 1.1 alnsn /* --------------------------------------------------------------------- */
1218 1.1 alnsn
1219 1.1 alnsn #define SLJIT_MAJOR_VERSION 0
1220 1.3 alnsn #define SLJIT_MINOR_VERSION 93
1221 1.1 alnsn
1222 1.2 alnsn /* Get the human readable name of the platform. Can be useful on platforms
1223 1.2 alnsn like ARM, where ARM and Thumb2 functions can be mixed, and
1224 1.2 alnsn it is useful to know the type of the code generator. */
1225 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void);
1226 1.1 alnsn
1227 1.2 alnsn /* Portable helper function to get an offset of a member. */
1228 1.2 alnsn #define SLJIT_OFFSETOF(base, member) ((sljit_sw)(&((base*)0x10)->member) - 0x10)
1229 1.1 alnsn
1230 1.1 alnsn #if (defined SLJIT_UTIL_GLOBAL_LOCK && SLJIT_UTIL_GLOBAL_LOCK)
1231 1.1 alnsn /* This global lock is useful to compile common functions. */
1232 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_grab_lock(void);
1233 1.1 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_release_lock(void);
1234 1.1 alnsn #endif
1235 1.1 alnsn
1236 1.1 alnsn #if (defined SLJIT_UTIL_STACK && SLJIT_UTIL_STACK)
1237 1.1 alnsn
1238 1.4 alnsn /* The sljit_stack is a utility extension of sljit, which provides
1239 1.4 alnsn a top-down stack. The stack starts at base and goes down to
1240 1.4 alnsn max_limit, so the memory region for this stack is between
1241 1.4 alnsn max_limit (inclusive) and base (exclusive). However the
1242 1.4 alnsn application can only use the region between limit (inclusive)
1243 1.4 alnsn and base (exclusive). The sljit_stack_resize can be used to
1244 1.4 alnsn extend this region up to max_limit.
1245 1.4 alnsn
1246 1.4 alnsn This feature uses the "address space reserve" feature of modern
1247 1.4 alnsn operating systems, so instead of allocating a huge memory block
1248 1.4 alnsn applications can allocate a small region and extend it later
1249 1.4 alnsn without moving the memory area. Hence pointers can be stored
1250 1.4 alnsn in this area. */
1251 1.4 alnsn
1252 1.4 alnsn /* Note: base and max_limit fields are aligned to PAGE_SIZE bytes
1253 1.4 alnsn (usually 4 Kbyte or more).
1254 1.4 alnsn Note: stack should grow in larger steps, e.g. 4Kbyte, 16Kbyte or more.
1255 1.1 alnsn Note: this structure may not be supported by all operating systems.
1256 1.1 alnsn Some kind of fallback mechanism is suggested when SLJIT_UTIL_STACK
1257 1.1 alnsn is not defined. */
1258 1.1 alnsn
1259 1.1 alnsn struct sljit_stack {
1260 1.1 alnsn /* User data, anything can be stored here.
1261 1.1 alnsn Starting with the same value as base. */
1262 1.4 alnsn sljit_u8 *top;
1263 1.1 alnsn /* These members are read only. */
1264 1.4 alnsn sljit_u8 *base;
1265 1.4 alnsn sljit_u8 *limit;
1266 1.4 alnsn sljit_u8 *max_limit;
1267 1.1 alnsn };
1268 1.1 alnsn
1269 1.1 alnsn /* Returns NULL if unsuccessful.
1270 1.4 alnsn Note: max_limit contains the maximum stack size in bytes.
1271 1.4 alnsn Note: limit contains the starting stack size in bytes.
1272 1.3 alnsn Note: the top field is initialized to base.
1273 1.3 alnsn Note: see sljit_create_compiler for the explanation of allocator_data. */
1274 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE struct sljit_stack* SLJIT_CALL sljit_allocate_stack(sljit_uw limit, sljit_uw max_limit, void *allocator_data);
1275 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE void SLJIT_CALL sljit_free_stack(struct sljit_stack *stack, void *allocator_data);
1276 1.1 alnsn
1277 1.1 alnsn /* Can be used to increase (allocate) or decrease (free) the memory area.
1278 1.1 alnsn Returns with a non-zero value if unsuccessful. If new_limit is greater than
1279 1.1 alnsn max_limit, it will fail. It is very easy to implement a stack data structure,
1280 1.1 alnsn since the growth ratio can be added to the current limit, and sljit_stack_resize
1281 1.1 alnsn will do all the necessary checks. The fields of the stack are not changed if
1282 1.1 alnsn sljit_stack_resize fails. */
1283 1.4 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_sw SLJIT_CALL sljit_stack_resize(struct sljit_stack *stack, sljit_u8 *new_limit);
1284 1.1 alnsn
1285 1.1 alnsn #endif /* (defined SLJIT_UTIL_STACK && SLJIT_UTIL_STACK) */
1286 1.1 alnsn
1287 1.1 alnsn #if !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL)
1288 1.1 alnsn
1289 1.1 alnsn /* Get the entry address of a given function. */
1290 1.2 alnsn #define SLJIT_FUNC_OFFSET(func_name) ((sljit_sw)func_name)
1291 1.1 alnsn
1292 1.1 alnsn #else /* !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL) */
1293 1.1 alnsn
1294 1.1 alnsn /* All JIT related code should be placed in the same context (library, binary, etc.). */
1295 1.1 alnsn
1296 1.2 alnsn #define SLJIT_FUNC_OFFSET(func_name) (*(sljit_sw*)(void*)func_name)
1297 1.1 alnsn
1298 1.1 alnsn /* For powerpc64, the function pointers point to a context descriptor. */
1299 1.1 alnsn struct sljit_function_context {
1300 1.2 alnsn sljit_sw addr;
1301 1.2 alnsn sljit_sw r2;
1302 1.2 alnsn sljit_sw r11;
1303 1.1 alnsn };
1304 1.1 alnsn
1305 1.1 alnsn /* Fill the context arguments using the addr and the function.
1306 1.1 alnsn If func_ptr is NULL, it will not be set to the address of context
1307 1.1 alnsn If addr is NULL, the function address also comes from the func pointer. */
1308 1.2 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_function_context(void** func_ptr, struct sljit_function_context* context, sljit_sw addr, void* func);
1309 1.1 alnsn
1310 1.1 alnsn #endif /* !(defined SLJIT_INDIRECT_CALL && SLJIT_INDIRECT_CALL) */
1311 1.1 alnsn
1312 1.4 alnsn #if (defined SLJIT_EXECUTABLE_ALLOCATOR && SLJIT_EXECUTABLE_ALLOCATOR)
1313 1.4 alnsn /* Free unused executable memory. The allocator keeps some free memory
1314 1.4 alnsn around to reduce the number of OS executable memory allocations.
1315 1.4 alnsn This improves performance since these calls are costly. However
1316 1.4 alnsn it is sometimes desired to free all unused memory regions, e.g.
1317 1.4 alnsn before the application terminates. */
1318 1.4 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_free_unused_memory_exec(void);
1319 1.4 alnsn #endif
1320 1.4 alnsn
1321 1.3 alnsn /* --------------------------------------------------------------------- */
1322 1.3 alnsn /* CPU specific functions */
1323 1.3 alnsn /* --------------------------------------------------------------------- */
1324 1.3 alnsn
1325 1.3 alnsn /* The following function is a helper function for sljit_emit_op_custom.
1326 1.3 alnsn It returns with the real machine register index ( >=0 ) of any SLJIT_R,
1327 1.3 alnsn SLJIT_S and SLJIT_SP registers.
1328 1.3 alnsn
1329 1.3 alnsn Note: it returns with -1 for virtual registers (only on x86-32). */
1330 1.3 alnsn
1331 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg);
1332 1.3 alnsn
1333 1.3 alnsn /* The following function is a helper function for sljit_emit_op_custom.
1334 1.3 alnsn It returns with the real machine register index of any SLJIT_FLOAT register.
1335 1.3 alnsn
1336 1.3 alnsn Note: the index is always an even number on ARM (except ARM-64), MIPS, and SPARC. */
1337 1.3 alnsn
1338 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg);
1339 1.3 alnsn
1340 1.3 alnsn /* Any instruction can be inserted into the instruction stream by
1341 1.3 alnsn sljit_emit_op_custom. It has a similar purpose as inline assembly.
1342 1.3 alnsn The size parameter must match to the instruction size of the target
1343 1.3 alnsn architecture:
1344 1.3 alnsn
1345 1.3 alnsn x86: 0 < size <= 15. The instruction argument can be byte aligned.
1346 1.3 alnsn Thumb2: if size == 2, the instruction argument must be 2 byte aligned.
1347 1.3 alnsn if size == 4, the instruction argument must be 4 byte aligned.
1348 1.3 alnsn Otherwise: size must be 4 and instruction argument must be 4 byte aligned. */
1349 1.3 alnsn
1350 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1351 1.3 alnsn void *instruction, sljit_s32 size);
1352 1.3 alnsn
1353 1.4 alnsn /* Define the currently available CPU status flags. It is usually used after an
1354 1.4 alnsn sljit_emit_op_custom call to define which flags are set. */
1355 1.4 alnsn
1356 1.4 alnsn SLJIT_API_FUNC_ATTRIBUTE void sljit_set_current_flags(struct sljit_compiler *compiler,
1357 1.4 alnsn sljit_s32 current_flags);
1358 1.4 alnsn
1359 1.3 alnsn #if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86)
1360 1.3 alnsn
1361 1.3 alnsn /* Returns with non-zero if sse2 is available. */
1362 1.3 alnsn
1363 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_is_sse2_available(void);
1364 1.3 alnsn
1365 1.3 alnsn /* Returns with non-zero if cmov instruction is available. */
1366 1.3 alnsn
1367 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_is_cmov_available(void);
1368 1.3 alnsn
1369 1.3 alnsn /* Emit a conditional mov instruction on x86 CPUs. This instruction
1370 1.3 alnsn moves src to destination, if the condition is satisfied. Unlike
1371 1.3 alnsn other arithmetic instructions, destination must be a register.
1372 1.3 alnsn Before such instructions are emitted, cmov support should be
1373 1.3 alnsn checked by sljit_x86_is_cmov_available function.
1374 1.3 alnsn type must be between SLJIT_EQUAL and SLJIT_S_ORDERED
1375 1.3 alnsn dst_reg must be a valid register and it can be combined
1376 1.3 alnsn with SLJIT_I32_OP to perform 32 bit arithmetic
1377 1.4 alnsn Flags: - (does not modify flags)
1378 1.3 alnsn */
1379 1.3 alnsn
1380 1.3 alnsn SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_x86_emit_cmov(struct sljit_compiler *compiler,
1381 1.3 alnsn sljit_s32 type,
1382 1.3 alnsn sljit_s32 dst_reg,
1383 1.3 alnsn sljit_s32 src, sljit_sw srcw);
1384 1.3 alnsn
1385 1.3 alnsn #endif
1386 1.3 alnsn
1387 1.1 alnsn #endif /* _SLJIT_LIR_H_ */
1388