sljitNativeARM_32.c revision 1.2.6.2
1 /* $NetBSD: sljitNativeARM_32.c,v 1.2.6.2 2014/08/20 00:04:25 tls Exp $ */ 2 3 /* 4 * Stack-less Just-In-Time compiler 5 * 6 * Copyright 2009-2012 Zoltan Herczeg (hzmester (at) freemail.hu). All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without modification, are 9 * permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, this list of 12 * conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 15 * of conditions and the following disclaimer in the documentation and/or other materials 16 * provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY 19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 21 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name(void) 30 { 31 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 32 return "ARMv7" SLJIT_CPUINFO; 33 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 34 return "ARMv5" SLJIT_CPUINFO; 35 #else 36 #error "Internal error: Unknown ARM architecture" 37 #endif 38 } 39 40 /* Last register + 1. */ 41 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1) 42 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2) 43 #define TMP_REG3 (SLJIT_NO_REGISTERS + 3) 44 #define TMP_PC (SLJIT_NO_REGISTERS + 4) 45 46 #define TMP_FREG1 (0) 47 #define TMP_FREG2 (SLJIT_FLOAT_REG6 + 1) 48 49 /* In ARM instruction words. 50 Cache lines are usually 32 byte aligned. */ 51 #define CONST_POOL_ALIGNMENT 8 52 #define CONST_POOL_EMPTY 0xffffffff 53 54 #define ALIGN_INSTRUCTION(ptr) \ 55 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1)) 56 #define MAX_DIFFERENCE(max_diff) \ 57 (((max_diff) / (sljit_si)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1)) 58 59 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */ 60 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 5] = { 61 0, 0, 1, 2, 10, 11, 4, 5, 6, 7, 8, 13, 3, 12, 14, 15 62 }; 63 64 #define RM(rm) (reg_map[rm]) 65 #define RD(rd) (reg_map[rd] << 12) 66 #define RN(rn) (reg_map[rn] << 16) 67 68 /* --------------------------------------------------------------------- */ 69 /* Instrucion forms */ 70 /* --------------------------------------------------------------------- */ 71 72 /* The instruction includes the AL condition. 73 INST_NAME - CONDITIONAL remove this flag. */ 74 #define COND_MASK 0xf0000000 75 #define CONDITIONAL 0xe0000000 76 #define PUSH_POOL 0xff000000 77 78 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */ 79 #define ADC_DP 0x5 80 #define ADD_DP 0x4 81 #define AND_DP 0x0 82 #define B 0xea000000 83 #define BIC_DP 0xe 84 #define BL 0xeb000000 85 #define BLX 0xe12fff30 86 #define BX 0xe12fff10 87 #define CLZ 0xe16f0f10 88 #define CMP_DP 0xa 89 #define BKPT 0xe1200070 90 #define EOR_DP 0x1 91 #define MOV_DP 0xd 92 #define MUL 0xe0000090 93 #define MVN_DP 0xf 94 #define NOP 0xe1a00000 95 #define ORR_DP 0xc 96 #define PUSH 0xe92d0000 97 #define POP 0xe8bd0000 98 #define RSB_DP 0x3 99 #define RSC_DP 0x7 100 #define SBC_DP 0x6 101 #define SMULL 0xe0c00090 102 #define SUB_DP 0x2 103 #define UMULL 0xe0800090 104 #define VABS_F32 0xeeb00ac0 105 #define VADD_F32 0xee300a00 106 #define VCMP_F32 0xeeb40a40 107 #define VDIV_F32 0xee800a00 108 #define VMOV_F32 0xeeb00a40 109 #define VMRS 0xeef1fa10 110 #define VMUL_F32 0xee200a00 111 #define VNEG_F32 0xeeb10a40 112 #define VSTR_F32 0xed000a00 113 #define VSUB_F32 0xee300a40 114 115 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 116 /* Arm v7 specific instructions. */ 117 #define MOVW 0xe3000000 118 #define MOVT 0xe3400000 119 #define SXTB 0xe6af0070 120 #define SXTH 0xe6bf0070 121 #define UXTB 0xe6ef0070 122 #define UXTH 0xe6ff0070 123 #endif 124 125 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 126 127 static sljit_si push_cpool(struct sljit_compiler *compiler) 128 { 129 /* Pushing the constant pool into the instruction stream. */ 130 sljit_uw* inst; 131 sljit_uw* cpool_ptr; 132 sljit_uw* cpool_end; 133 sljit_si i; 134 135 /* The label could point the address after the constant pool. */ 136 if (compiler->last_label && compiler->last_label->size == compiler->size) 137 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1; 138 139 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE); 140 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 141 FAIL_IF(!inst); 142 compiler->size++; 143 *inst = 0xff000000 | compiler->cpool_fill; 144 145 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) { 146 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 147 FAIL_IF(!inst); 148 compiler->size++; 149 *inst = 0; 150 } 151 152 cpool_ptr = compiler->cpool; 153 cpool_end = cpool_ptr + compiler->cpool_fill; 154 while (cpool_ptr < cpool_end) { 155 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 156 FAIL_IF(!inst); 157 compiler->size++; 158 *inst = *cpool_ptr++; 159 } 160 compiler->cpool_diff = CONST_POOL_EMPTY; 161 compiler->cpool_fill = 0; 162 return SLJIT_SUCCESS; 163 } 164 165 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst) 166 { 167 sljit_uw* ptr; 168 169 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092))) 170 FAIL_IF(push_cpool(compiler)); 171 172 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 173 FAIL_IF(!ptr); 174 compiler->size++; 175 *ptr = inst; 176 return SLJIT_SUCCESS; 177 } 178 179 static sljit_si push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal) 180 { 181 sljit_uw* ptr; 182 sljit_uw cpool_index = CPOOL_SIZE; 183 sljit_uw* cpool_ptr; 184 sljit_uw* cpool_end; 185 sljit_ub* cpool_unique_ptr; 186 187 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092))) 188 FAIL_IF(push_cpool(compiler)); 189 else if (compiler->cpool_fill > 0) { 190 cpool_ptr = compiler->cpool; 191 cpool_end = cpool_ptr + compiler->cpool_fill; 192 cpool_unique_ptr = compiler->cpool_unique; 193 do { 194 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) { 195 cpool_index = cpool_ptr - compiler->cpool; 196 break; 197 } 198 cpool_ptr++; 199 cpool_unique_ptr++; 200 } while (cpool_ptr < cpool_end); 201 } 202 203 if (cpool_index == CPOOL_SIZE) { 204 /* Must allocate a new entry in the literal pool. */ 205 if (compiler->cpool_fill < CPOOL_SIZE) { 206 cpool_index = compiler->cpool_fill; 207 compiler->cpool_fill++; 208 } 209 else { 210 FAIL_IF(push_cpool(compiler)); 211 cpool_index = 0; 212 compiler->cpool_fill = 1; 213 } 214 } 215 216 SLJIT_ASSERT((inst & 0xfff) == 0); 217 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 218 FAIL_IF(!ptr); 219 compiler->size++; 220 *ptr = inst | cpool_index; 221 222 compiler->cpool[cpool_index] = literal; 223 compiler->cpool_unique[cpool_index] = 0; 224 if (compiler->cpool_diff == CONST_POOL_EMPTY) 225 compiler->cpool_diff = compiler->size; 226 return SLJIT_SUCCESS; 227 } 228 229 static sljit_si push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal) 230 { 231 sljit_uw* ptr; 232 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE)) 233 FAIL_IF(push_cpool(compiler)); 234 235 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0); 236 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 237 FAIL_IF(!ptr); 238 compiler->size++; 239 *ptr = inst | compiler->cpool_fill; 240 241 compiler->cpool[compiler->cpool_fill] = literal; 242 compiler->cpool_unique[compiler->cpool_fill] = 1; 243 compiler->cpool_fill++; 244 if (compiler->cpool_diff == CONST_POOL_EMPTY) 245 compiler->cpool_diff = compiler->size; 246 return SLJIT_SUCCESS; 247 } 248 249 static SLJIT_INLINE sljit_si prepare_blx(struct sljit_compiler *compiler) 250 { 251 /* Place for at least two instruction (doesn't matter whether the first has a literal). */ 252 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088))) 253 return push_cpool(compiler); 254 return SLJIT_SUCCESS; 255 } 256 257 static SLJIT_INLINE sljit_si emit_blx(struct sljit_compiler *compiler) 258 { 259 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */ 260 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092)); 261 return push_inst(compiler, BLX | RM(TMP_REG1)); 262 } 263 264 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size) 265 { 266 sljit_uw diff; 267 sljit_uw ind; 268 sljit_uw counter = 0; 269 sljit_uw* clear_const_pool = const_pool; 270 sljit_uw* clear_const_pool_end = const_pool + cpool_size; 271 272 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT); 273 /* Set unused flag for all literals in the constant pool. 274 I.e.: unused literals can belong to branches, which can be encoded as B or BL. 275 We can "compress" the constant pool by discarding these literals. */ 276 while (clear_const_pool < clear_const_pool_end) 277 *clear_const_pool++ = (sljit_uw)(-1); 278 279 while (last_pc_patch < code_ptr) { 280 /* Data transfer instruction with Rn == r15. */ 281 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) { 282 diff = const_pool - last_pc_patch; 283 ind = (*last_pc_patch) & 0xfff; 284 285 /* Must be a load instruction with immediate offset. */ 286 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20))); 287 if ((sljit_si)const_pool[ind] < 0) { 288 const_pool[ind] = counter; 289 ind = counter; 290 counter++; 291 } 292 else 293 ind = const_pool[ind]; 294 295 SLJIT_ASSERT(diff >= 1); 296 if (diff >= 2 || ind > 0) { 297 diff = (diff + ind - 2) << 2; 298 SLJIT_ASSERT(diff <= 0xfff); 299 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff; 300 } 301 else 302 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004; 303 } 304 last_pc_patch++; 305 } 306 return counter; 307 } 308 309 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */ 310 struct future_patch { 311 struct future_patch* next; 312 sljit_si index; 313 sljit_si value; 314 }; 315 316 static SLJIT_INLINE sljit_si resolve_const_pool_index(struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr) 317 { 318 sljit_si value; 319 struct future_patch *curr_patch, *prev_patch; 320 321 /* Using the values generated by patch_pc_relative_loads. */ 322 if (!*first_patch) 323 value = (sljit_si)cpool_start_address[cpool_current_index]; 324 else { 325 curr_patch = *first_patch; 326 prev_patch = 0; 327 while (1) { 328 if (!curr_patch) { 329 value = (sljit_si)cpool_start_address[cpool_current_index]; 330 break; 331 } 332 if ((sljit_uw)curr_patch->index == cpool_current_index) { 333 value = curr_patch->value; 334 if (prev_patch) 335 prev_patch->next = curr_patch->next; 336 else 337 *first_patch = curr_patch->next; 338 SLJIT_FREE(curr_patch); 339 break; 340 } 341 prev_patch = curr_patch; 342 curr_patch = curr_patch->next; 343 } 344 } 345 346 if (value >= 0) { 347 if ((sljit_uw)value > cpool_current_index) { 348 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch)); 349 if (!curr_patch) { 350 while (*first_patch) { 351 curr_patch = *first_patch; 352 *first_patch = (*first_patch)->next; 353 SLJIT_FREE(curr_patch); 354 } 355 return SLJIT_ERR_ALLOC_FAILED; 356 } 357 curr_patch->next = *first_patch; 358 curr_patch->index = value; 359 curr_patch->value = cpool_start_address[value]; 360 *first_patch = curr_patch; 361 } 362 cpool_start_address[value] = *buf_ptr; 363 } 364 return SLJIT_SUCCESS; 365 } 366 367 #else 368 369 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst) 370 { 371 sljit_uw* ptr; 372 373 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 374 FAIL_IF(!ptr); 375 compiler->size++; 376 *ptr = inst; 377 return SLJIT_SUCCESS; 378 } 379 380 static SLJIT_INLINE sljit_si emit_imm(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm) 381 { 382 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff))); 383 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff)); 384 } 385 386 #endif 387 388 static SLJIT_INLINE sljit_si detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code) 389 { 390 sljit_sw diff; 391 392 if (jump->flags & SLJIT_REWRITABLE_JUMP) 393 return 0; 394 395 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 396 if (jump->flags & IS_BL) 397 code_ptr--; 398 399 if (jump->flags & JUMP_ADDR) 400 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2)); 401 else { 402 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 403 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)); 404 } 405 406 /* Branch to Thumb code has not been optimized yet. */ 407 if (diff & 0x3) 408 return 0; 409 410 if (jump->flags & IS_BL) { 411 if (diff <= 0x01ffffff && diff >= -0x02000000) { 412 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK); 413 jump->flags |= PATCH_B; 414 return 1; 415 } 416 } 417 else { 418 if (diff <= 0x01ffffff && diff >= -0x02000000) { 419 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK); 420 jump->flags |= PATCH_B; 421 } 422 } 423 #else 424 if (jump->flags & JUMP_ADDR) 425 diff = ((sljit_sw)jump->u.target - (sljit_sw)code_ptr); 426 else { 427 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 428 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)code_ptr); 429 } 430 431 /* Branch to Thumb code has not been optimized yet. */ 432 if (diff & 0x3) 433 return 0; 434 435 if (diff <= 0x01ffffff && diff >= -0x02000000) { 436 code_ptr -= 2; 437 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK); 438 jump->flags |= PATCH_B; 439 return 1; 440 } 441 #endif 442 return 0; 443 } 444 445 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, sljit_si flush) 446 { 447 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 448 sljit_uw *ptr = (sljit_uw*)addr; 449 sljit_uw *inst = (sljit_uw*)ptr[0]; 450 sljit_uw mov_pc = ptr[1]; 451 sljit_si bl = (mov_pc & 0x0000f000) != RD(TMP_PC); 452 sljit_sw diff = (sljit_sw)(((sljit_sw)new_addr - (sljit_sw)(inst + 2)) >> 2); 453 454 if (diff <= 0x7fffff && diff >= -0x800000) { 455 /* Turn to branch. */ 456 if (!bl) { 457 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff); 458 if (flush) { 459 SLJIT_CACHE_FLUSH(inst, inst + 1); 460 } 461 } else { 462 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff); 463 inst[1] = NOP; 464 if (flush) { 465 SLJIT_CACHE_FLUSH(inst, inst + 2); 466 } 467 } 468 } else { 469 /* Get the position of the constant. */ 470 if (mov_pc & (1 << 23)) 471 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2; 472 else 473 ptr = inst + 1; 474 475 if (*inst != mov_pc) { 476 inst[0] = mov_pc; 477 if (!bl) { 478 if (flush) { 479 SLJIT_CACHE_FLUSH(inst, inst + 1); 480 } 481 } else { 482 inst[1] = BLX | RM(TMP_REG1); 483 if (flush) { 484 SLJIT_CACHE_FLUSH(inst, inst + 2); 485 } 486 } 487 } 488 *ptr = new_addr; 489 } 490 #else 491 sljit_uw *inst = (sljit_uw*)addr; 492 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); 493 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff); 494 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff); 495 if (flush) { 496 SLJIT_CACHE_FLUSH(inst, inst + 2); 497 } 498 #endif 499 } 500 501 static sljit_uw get_imm(sljit_uw imm); 502 503 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_sw new_constant, sljit_si flush) 504 { 505 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 506 sljit_uw *ptr = (sljit_uw*)addr; 507 sljit_uw *inst = (sljit_uw*)ptr[0]; 508 sljit_uw ldr_literal = ptr[1]; 509 sljit_uw src2; 510 511 src2 = get_imm(new_constant); 512 if (src2) { 513 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2; 514 if (flush) { 515 SLJIT_CACHE_FLUSH(inst, inst + 1); 516 } 517 return; 518 } 519 520 src2 = get_imm(~new_constant); 521 if (src2) { 522 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2; 523 if (flush) { 524 SLJIT_CACHE_FLUSH(inst, inst + 1); 525 } 526 return; 527 } 528 529 if (ldr_literal & (1 << 23)) 530 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2; 531 else 532 ptr = inst + 1; 533 534 if (*inst != ldr_literal) { 535 *inst = ldr_literal; 536 if (flush) { 537 SLJIT_CACHE_FLUSH(inst, inst + 1); 538 } 539 } 540 *ptr = new_constant; 541 #else 542 sljit_uw *inst = (sljit_uw*)addr; 543 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); 544 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff); 545 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff); 546 if (flush) { 547 SLJIT_CACHE_FLUSH(inst, inst + 2); 548 } 549 #endif 550 } 551 552 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler) 553 { 554 struct sljit_memory_fragment *buf; 555 sljit_uw *code; 556 sljit_uw *code_ptr; 557 sljit_uw *buf_ptr; 558 sljit_uw *buf_end; 559 sljit_uw size; 560 sljit_uw word_count; 561 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 562 sljit_uw cpool_size; 563 sljit_uw cpool_skip_alignment; 564 sljit_uw cpool_current_index; 565 sljit_uw *cpool_start_address; 566 sljit_uw *last_pc_patch; 567 struct future_patch *first_patch; 568 #endif 569 570 struct sljit_label *label; 571 struct sljit_jump *jump; 572 struct sljit_const *const_; 573 574 CHECK_ERROR_PTR(); 575 check_sljit_generate_code(compiler); 576 reverse_buf(compiler); 577 578 /* Second code generation pass. */ 579 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 580 size = compiler->size + (compiler->patches << 1); 581 if (compiler->cpool_fill > 0) 582 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1; 583 #else 584 size = compiler->size; 585 #endif 586 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw)); 587 PTR_FAIL_WITH_EXEC_IF(code); 588 buf = compiler->buf; 589 590 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 591 cpool_size = 0; 592 cpool_skip_alignment = 0; 593 cpool_current_index = 0; 594 cpool_start_address = NULL; 595 first_patch = NULL; 596 last_pc_patch = code; 597 #endif 598 599 code_ptr = code; 600 word_count = 0; 601 602 label = compiler->labels; 603 jump = compiler->jumps; 604 const_ = compiler->consts; 605 606 if (label && label->size == 0) { 607 label->addr = (sljit_uw)code; 608 label->size = 0; 609 label = label->next; 610 } 611 612 do { 613 buf_ptr = (sljit_uw*)buf->memory; 614 buf_end = buf_ptr + (buf->used_size >> 2); 615 do { 616 word_count++; 617 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 618 if (cpool_size > 0) { 619 if (cpool_skip_alignment > 0) { 620 buf_ptr++; 621 cpool_skip_alignment--; 622 } 623 else { 624 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) { 625 SLJIT_FREE_EXEC(code); 626 compiler->error = SLJIT_ERR_ALLOC_FAILED; 627 return NULL; 628 } 629 buf_ptr++; 630 if (++cpool_current_index >= cpool_size) { 631 SLJIT_ASSERT(!first_patch); 632 cpool_size = 0; 633 if (label && label->size == word_count) { 634 /* Points after the current instruction. */ 635 label->addr = (sljit_uw)code_ptr; 636 label->size = code_ptr - code; 637 label = label->next; 638 } 639 } 640 } 641 } 642 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) { 643 #endif 644 *code_ptr = *buf_ptr++; 645 /* These structures are ordered by their address. */ 646 SLJIT_ASSERT(!label || label->size >= word_count); 647 SLJIT_ASSERT(!jump || jump->addr >= word_count); 648 SLJIT_ASSERT(!const_ || const_->addr >= word_count); 649 if (jump && jump->addr == word_count) { 650 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 651 if (detect_jump_type(jump, code_ptr, code)) 652 code_ptr--; 653 jump->addr = (sljit_uw)code_ptr; 654 #else 655 jump->addr = (sljit_uw)(code_ptr - 2); 656 if (detect_jump_type(jump, code_ptr, code)) 657 code_ptr -= 2; 658 #endif 659 jump = jump->next; 660 } 661 if (label && label->size == word_count) { 662 /* code_ptr can be affected above. */ 663 label->addr = (sljit_uw)(code_ptr + 1); 664 label->size = (code_ptr + 1) - code; 665 label = label->next; 666 } 667 if (const_ && const_->addr == word_count) { 668 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 669 const_->addr = (sljit_uw)code_ptr; 670 #else 671 const_->addr = (sljit_uw)(code_ptr - 1); 672 #endif 673 const_ = const_->next; 674 } 675 code_ptr++; 676 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 677 } 678 else { 679 /* Fortunately, no need to shift. */ 680 cpool_size = *buf_ptr++ & ~PUSH_POOL; 681 SLJIT_ASSERT(cpool_size > 0); 682 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1); 683 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size); 684 if (cpool_current_index > 0) { 685 /* Unconditional branch. */ 686 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL); 687 code_ptr = cpool_start_address + cpool_current_index; 688 } 689 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1; 690 cpool_current_index = 0; 691 last_pc_patch = code_ptr; 692 } 693 #endif 694 } while (buf_ptr < buf_end); 695 buf = buf->next; 696 } while (buf); 697 698 SLJIT_ASSERT(!label); 699 SLJIT_ASSERT(!jump); 700 SLJIT_ASSERT(!const_); 701 702 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 703 SLJIT_ASSERT(cpool_size == 0); 704 if (compiler->cpool_fill > 0) { 705 cpool_start_address = ALIGN_INSTRUCTION(code_ptr); 706 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill); 707 if (cpool_current_index > 0) 708 code_ptr = cpool_start_address + cpool_current_index; 709 710 buf_ptr = compiler->cpool; 711 buf_end = buf_ptr + compiler->cpool_fill; 712 cpool_current_index = 0; 713 while (buf_ptr < buf_end) { 714 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) { 715 SLJIT_FREE_EXEC(code); 716 compiler->error = SLJIT_ERR_ALLOC_FAILED; 717 return NULL; 718 } 719 buf_ptr++; 720 cpool_current_index++; 721 } 722 SLJIT_ASSERT(!first_patch); 723 } 724 #endif 725 726 jump = compiler->jumps; 727 while (jump) { 728 buf_ptr = (sljit_uw*)jump->addr; 729 730 if (jump->flags & PATCH_B) { 731 if (!(jump->flags & JUMP_ADDR)) { 732 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 733 SLJIT_ASSERT(((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >= -0x02000000); 734 *buf_ptr |= (((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff; 735 } 736 else { 737 SLJIT_ASSERT(((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >= -0x02000000); 738 *buf_ptr |= (((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff; 739 } 740 } 741 else if (jump->flags & SLJIT_REWRITABLE_JUMP) { 742 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 743 jump->addr = (sljit_uw)code_ptr; 744 code_ptr[0] = (sljit_uw)buf_ptr; 745 code_ptr[1] = *buf_ptr; 746 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 747 code_ptr += 2; 748 #else 749 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 750 #endif 751 } 752 else { 753 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 754 if (jump->flags & IS_BL) 755 buf_ptr--; 756 if (*buf_ptr & (1 << 23)) 757 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2; 758 else 759 buf_ptr += 1; 760 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target; 761 #else 762 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 763 #endif 764 } 765 jump = jump->next; 766 } 767 768 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 769 const_ = compiler->consts; 770 while (const_) { 771 buf_ptr = (sljit_uw*)const_->addr; 772 const_->addr = (sljit_uw)code_ptr; 773 774 code_ptr[0] = (sljit_uw)buf_ptr; 775 code_ptr[1] = *buf_ptr; 776 if (*buf_ptr & (1 << 23)) 777 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2; 778 else 779 buf_ptr += 1; 780 /* Set the value again (can be a simple constant). */ 781 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0); 782 code_ptr += 2; 783 784 const_ = const_->next; 785 } 786 #endif 787 788 SLJIT_ASSERT(code_ptr - code <= (sljit_si)size); 789 790 compiler->error = SLJIT_ERR_COMPILED; 791 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uw); 792 SLJIT_CACHE_FLUSH(code, code_ptr); 793 return code; 794 } 795 796 /* --------------------------------------------------------------------- */ 797 /* Entry, exit */ 798 /* --------------------------------------------------------------------- */ 799 800 /* emit_op inp_flags. 801 WRITE_BACK must be the first, since it is a flag. */ 802 #define WRITE_BACK 0x01 803 #define ALLOW_IMM 0x02 804 #define ALLOW_INV_IMM 0x04 805 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM) 806 #define ARG_TEST 0x08 807 808 /* Creates an index in data_transfer_insts array. */ 809 #define WORD_DATA 0x00 810 #define BYTE_DATA 0x10 811 #define HALF_DATA 0x20 812 #define SIGNED_DATA 0x40 813 #define LOAD_DATA 0x80 814 815 #define EMIT_INSTRUCTION(inst) \ 816 FAIL_IF(push_inst(compiler, (inst))) 817 818 /* Condition: AL. */ 819 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \ 820 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2)) 821 822 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags, 823 sljit_si dst, sljit_sw dstw, 824 sljit_si src1, sljit_sw src1w, 825 sljit_si src2, sljit_sw src2w); 826 827 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_enter(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size) 828 { 829 sljit_si size; 830 sljit_uw push; 831 832 CHECK_ERROR(); 833 check_sljit_emit_enter(compiler, args, scratches, saveds, local_size); 834 835 compiler->scratches = scratches; 836 compiler->saveds = saveds; 837 #if (defined SLJIT_DEBUG && SLJIT_DEBUG) 838 compiler->logical_local_size = local_size; 839 #endif 840 841 /* Push saved registers, temporary registers 842 stmdb sp!, {..., lr} */ 843 push = PUSH | (1 << 14); 844 if (scratches >= 5) 845 push |= 1 << 11; 846 if (scratches >= 4) 847 push |= 1 << 10; 848 if (saveds >= 5) 849 push |= 1 << 8; 850 if (saveds >= 4) 851 push |= 1 << 7; 852 if (saveds >= 3) 853 push |= 1 << 6; 854 if (saveds >= 2) 855 push |= 1 << 5; 856 if (saveds >= 1) 857 push |= 1 << 4; 858 EMIT_INSTRUCTION(push); 859 860 /* Stack must be aligned to 8 bytes: */ 861 size = (1 + saveds) * sizeof(sljit_uw); 862 if (scratches >= 4) 863 size += (scratches - 3) * sizeof(sljit_uw); 864 local_size += size; 865 local_size = (local_size + 7) & ~7; 866 local_size -= size; 867 compiler->local_size = local_size; 868 if (local_size > 0) 869 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, local_size)); 870 871 if (args >= 1) 872 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG1))); 873 if (args >= 2) 874 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG2, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2))); 875 if (args >= 3) 876 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG3, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG3))); 877 878 return SLJIT_SUCCESS; 879 } 880 881 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_context(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size) 882 { 883 sljit_si size; 884 885 CHECK_ERROR_VOID(); 886 check_sljit_set_context(compiler, args, scratches, saveds, local_size); 887 888 compiler->scratches = scratches; 889 compiler->saveds = saveds; 890 #if (defined SLJIT_DEBUG && SLJIT_DEBUG) 891 compiler->logical_local_size = local_size; 892 #endif 893 894 size = (1 + saveds) * sizeof(sljit_uw); 895 if (scratches >= 4) 896 size += (scratches - 3) * sizeof(sljit_uw); 897 local_size += size; 898 local_size = (local_size + 7) & ~7; 899 local_size -= size; 900 compiler->local_size = local_size; 901 } 902 903 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_return(struct sljit_compiler *compiler, sljit_si op, sljit_si src, sljit_sw srcw) 904 { 905 sljit_uw pop; 906 907 CHECK_ERROR(); 908 check_sljit_emit_return(compiler, op, src, srcw); 909 910 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw)); 911 912 if (compiler->local_size > 0) 913 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, compiler->local_size)); 914 915 pop = POP | (1 << 15); 916 /* Push saved registers, temporary registers 917 ldmia sp!, {..., pc} */ 918 if (compiler->scratches >= 5) 919 pop |= 1 << 11; 920 if (compiler->scratches >= 4) 921 pop |= 1 << 10; 922 if (compiler->saveds >= 5) 923 pop |= 1 << 8; 924 if (compiler->saveds >= 4) 925 pop |= 1 << 7; 926 if (compiler->saveds >= 3) 927 pop |= 1 << 6; 928 if (compiler->saveds >= 2) 929 pop |= 1 << 5; 930 if (compiler->saveds >= 1) 931 pop |= 1 << 4; 932 933 return push_inst(compiler, pop); 934 } 935 936 /* --------------------------------------------------------------------- */ 937 /* Operators */ 938 /* --------------------------------------------------------------------- */ 939 940 /* s/l - store/load (1 bit) 941 u/s - signed/unsigned (1 bit) 942 w/b/h/N - word/byte/half/NOT allowed (2 bit) 943 It contans 16 items, but not all are different. */ 944 945 static sljit_sw data_transfer_insts[16] = { 946 /* s u w */ 0xe5000000 /* str */, 947 /* s u b */ 0xe5400000 /* strb */, 948 /* s u h */ 0xe10000b0 /* strh */, 949 /* s u N */ 0x00000000 /* not allowed */, 950 /* s s w */ 0xe5000000 /* str */, 951 /* s s b */ 0xe5400000 /* strb */, 952 /* s s h */ 0xe10000b0 /* strh */, 953 /* s s N */ 0x00000000 /* not allowed */, 954 955 /* l u w */ 0xe5100000 /* ldr */, 956 /* l u b */ 0xe5500000 /* ldrb */, 957 /* l u h */ 0xe11000b0 /* ldrh */, 958 /* l u N */ 0x00000000 /* not allowed */, 959 /* l s w */ 0xe5100000 /* ldr */, 960 /* l s b */ 0xe11000d0 /* ldrsb */, 961 /* l s h */ 0xe11000f0 /* ldrsh */, 962 /* l s N */ 0x00000000 /* not allowed */, 963 }; 964 965 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \ 966 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2)) 967 /* Normal ldr/str instruction. 968 Type2: ldrsb, ldrh, ldrsh */ 969 #define IS_TYPE1_TRANSFER(type) \ 970 (data_transfer_insts[(type) >> 4] & 0x04000000) 971 #define TYPE2_TRANSFER_IMM(imm) \ 972 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22)) 973 974 /* flags: */ 975 /* Arguments are swapped. */ 976 #define ARGS_SWAPPED 0x01 977 /* Inverted immediate. */ 978 #define INV_IMM 0x02 979 /* Source and destination is register. */ 980 #define REG_DEST 0x04 981 #define REG_SOURCE 0x08 982 /* One instruction is enough. */ 983 #define FAST_DEST 0x10 984 /* Multiple instructions are required. */ 985 #define SLOW_DEST 0x20 986 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */ 987 #define SET_FLAGS (1 << 20) 988 /* dst: reg 989 src1: reg 990 src2: reg or imm (if allowed) 991 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */ 992 #define SRC2_IMM (1 << 25) 993 994 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \ 995 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2))) 996 997 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \ 998 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2)) 999 1000 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \ 1001 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \ 1002 if (compiler->shift_imm != 0x20) { \ 1003 SLJIT_ASSERT(src1 == TMP_REG1); \ 1004 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \ 1005 if (compiler->shift_imm != 0) \ 1006 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \ 1007 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, reg_map[src2])); \ 1008 } \ 1009 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1]))); 1010 1011 static SLJIT_INLINE sljit_si emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, 1012 sljit_si dst, sljit_si src1, sljit_si src2) 1013 { 1014 sljit_sw mul_inst; 1015 1016 switch (GET_OPCODE(op)) { 1017 case SLJIT_MOV: 1018 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 1019 if (dst != src2) { 1020 if (src2 & SRC2_IMM) { 1021 if (flags & INV_IMM) 1022 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1023 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1024 } 1025 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]); 1026 } 1027 return SLJIT_SUCCESS; 1028 1029 case SLJIT_MOV_UB: 1030 case SLJIT_MOV_SB: 1031 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 1032 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) { 1033 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1034 if (op == SLJIT_MOV_UB) 1035 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff)); 1036 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2])); 1037 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_UB ? 0x20 : 0x40) | reg_map[dst])); 1038 #else 1039 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2)); 1040 #endif 1041 } 1042 else if (dst != src2) { 1043 SLJIT_ASSERT(src2 & SRC2_IMM); 1044 if (flags & INV_IMM) 1045 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1046 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1047 } 1048 return SLJIT_SUCCESS; 1049 1050 case SLJIT_MOV_UH: 1051 case SLJIT_MOV_SH: 1052 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 1053 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) { 1054 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1055 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2])); 1056 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_UH ? 0x20 : 0x40) | reg_map[dst])); 1057 #else 1058 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2)); 1059 #endif 1060 } 1061 else if (dst != src2) { 1062 SLJIT_ASSERT(src2 & SRC2_IMM); 1063 if (flags & INV_IMM) 1064 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1065 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1066 } 1067 return SLJIT_SUCCESS; 1068 1069 case SLJIT_NOT: 1070 if (src2 & SRC2_IMM) { 1071 if (flags & INV_IMM) 1072 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1073 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1074 } 1075 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2)); 1076 1077 case SLJIT_CLZ: 1078 SLJIT_ASSERT(!(flags & INV_IMM)); 1079 SLJIT_ASSERT(!(src2 & SRC2_IMM)); 1080 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2))); 1081 if (flags & SET_FLAGS) 1082 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM); 1083 return SLJIT_SUCCESS; 1084 1085 case SLJIT_ADD: 1086 SLJIT_ASSERT(!(flags & INV_IMM)); 1087 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP); 1088 1089 case SLJIT_ADDC: 1090 SLJIT_ASSERT(!(flags & INV_IMM)); 1091 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP); 1092 1093 case SLJIT_SUB: 1094 SLJIT_ASSERT(!(flags & INV_IMM)); 1095 if (!(flags & ARGS_SWAPPED)) 1096 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP); 1097 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP); 1098 1099 case SLJIT_SUBC: 1100 SLJIT_ASSERT(!(flags & INV_IMM)); 1101 if (!(flags & ARGS_SWAPPED)) 1102 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP); 1103 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP); 1104 1105 case SLJIT_MUL: 1106 SLJIT_ASSERT(!(flags & INV_IMM)); 1107 SLJIT_ASSERT(!(src2 & SRC2_IMM)); 1108 if (SLJIT_UNLIKELY(op & SLJIT_SET_O)) 1109 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12); 1110 else 1111 mul_inst = MUL | (reg_map[dst] << 16); 1112 1113 if (dst != src2) 1114 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2])); 1115 else if (dst != src1) 1116 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1])); 1117 else { 1118 /* Rm and Rd must not be the same register. */ 1119 SLJIT_ASSERT(dst != TMP_REG1); 1120 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2]))); 1121 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1])); 1122 } 1123 1124 if (!(op & SLJIT_SET_O)) 1125 return SLJIT_SUCCESS; 1126 1127 /* We need to use TMP_REG3. */ 1128 compiler->cache_arg = 0; 1129 compiler->cache_argw = 0; 1130 /* cmp TMP_REG2, dst asr #31. */ 1131 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0)); 1132 1133 case SLJIT_AND: 1134 if (!(flags & INV_IMM)) 1135 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP); 1136 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP); 1137 1138 case SLJIT_OR: 1139 SLJIT_ASSERT(!(flags & INV_IMM)); 1140 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP); 1141 1142 case SLJIT_XOR: 1143 SLJIT_ASSERT(!(flags & INV_IMM)); 1144 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP); 1145 1146 case SLJIT_SHL: 1147 EMIT_SHIFT_INS_AND_RETURN(0); 1148 1149 case SLJIT_LSHR: 1150 EMIT_SHIFT_INS_AND_RETURN(1); 1151 1152 case SLJIT_ASHR: 1153 EMIT_SHIFT_INS_AND_RETURN(2); 1154 } 1155 SLJIT_ASSERT_STOP(); 1156 return SLJIT_SUCCESS; 1157 } 1158 1159 #undef EMIT_DATA_PROCESS_INS_AND_RETURN 1160 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN 1161 #undef EMIT_SHIFT_INS_AND_RETURN 1162 1163 /* Tests whether the immediate can be stored in the 12 bit imm field. 1164 Returns with 0 if not possible. */ 1165 static sljit_uw get_imm(sljit_uw imm) 1166 { 1167 sljit_si rol; 1168 1169 if (imm <= 0xff) 1170 return SRC2_IMM | imm; 1171 1172 if (!(imm & 0xff000000)) { 1173 imm <<= 8; 1174 rol = 8; 1175 } 1176 else { 1177 imm = (imm << 24) | (imm >> 8); 1178 rol = 0; 1179 } 1180 1181 if (!(imm & 0xff000000)) { 1182 imm <<= 8; 1183 rol += 4; 1184 } 1185 1186 if (!(imm & 0xf0000000)) { 1187 imm <<= 4; 1188 rol += 2; 1189 } 1190 1191 if (!(imm & 0xc0000000)) { 1192 imm <<= 2; 1193 rol += 1; 1194 } 1195 1196 if (!(imm & 0x00ffffff)) 1197 return SRC2_IMM | (imm >> 24) | (rol << 8); 1198 else 1199 return 0; 1200 } 1201 1202 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1203 static sljit_si generate_int(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm, sljit_si positive) 1204 { 1205 sljit_uw mask; 1206 sljit_uw imm1; 1207 sljit_uw imm2; 1208 sljit_si rol; 1209 1210 /* Step1: Search a zero byte (8 continous zero bit). */ 1211 mask = 0xff000000; 1212 rol = 8; 1213 while(1) { 1214 if (!(imm & mask)) { 1215 /* Rol imm by rol. */ 1216 imm = (imm << rol) | (imm >> (32 - rol)); 1217 /* Calculate arm rol. */ 1218 rol = 4 + (rol >> 1); 1219 break; 1220 } 1221 rol += 2; 1222 mask >>= 2; 1223 if (mask & 0x3) { 1224 /* rol by 8. */ 1225 imm = (imm << 8) | (imm >> 24); 1226 mask = 0xff00; 1227 rol = 24; 1228 while (1) { 1229 if (!(imm & mask)) { 1230 /* Rol imm by rol. */ 1231 imm = (imm << rol) | (imm >> (32 - rol)); 1232 /* Calculate arm rol. */ 1233 rol = (rol >> 1) - 8; 1234 break; 1235 } 1236 rol += 2; 1237 mask >>= 2; 1238 if (mask & 0x3) 1239 return 0; 1240 } 1241 break; 1242 } 1243 } 1244 1245 /* The low 8 bit must be zero. */ 1246 SLJIT_ASSERT(!(imm & 0xff)); 1247 1248 if (!(imm & 0xff000000)) { 1249 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8); 1250 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8); 1251 } 1252 else if (imm & 0xc0000000) { 1253 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); 1254 imm <<= 8; 1255 rol += 4; 1256 1257 if (!(imm & 0xff000000)) { 1258 imm <<= 8; 1259 rol += 4; 1260 } 1261 1262 if (!(imm & 0xf0000000)) { 1263 imm <<= 4; 1264 rol += 2; 1265 } 1266 1267 if (!(imm & 0xc0000000)) { 1268 imm <<= 2; 1269 rol += 1; 1270 } 1271 1272 if (!(imm & 0x00ffffff)) 1273 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8); 1274 else 1275 return 0; 1276 } 1277 else { 1278 if (!(imm & 0xf0000000)) { 1279 imm <<= 4; 1280 rol += 2; 1281 } 1282 1283 if (!(imm & 0xc0000000)) { 1284 imm <<= 2; 1285 rol += 1; 1286 } 1287 1288 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); 1289 imm <<= 8; 1290 rol += 4; 1291 1292 if (!(imm & 0xf0000000)) { 1293 imm <<= 4; 1294 rol += 2; 1295 } 1296 1297 if (!(imm & 0xc0000000)) { 1298 imm <<= 2; 1299 rol += 1; 1300 } 1301 1302 if (!(imm & 0x00ffffff)) 1303 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8); 1304 else 1305 return 0; 1306 } 1307 1308 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1)); 1309 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2)); 1310 return 1; 1311 } 1312 #endif 1313 1314 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm) 1315 { 1316 sljit_uw tmp; 1317 1318 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 1319 if (!(imm & ~0xffff)) 1320 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)); 1321 #endif 1322 1323 /* Create imm by 1 inst. */ 1324 tmp = get_imm(imm); 1325 if (tmp) { 1326 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp)); 1327 return SLJIT_SUCCESS; 1328 } 1329 1330 tmp = get_imm(~imm); 1331 if (tmp) { 1332 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp)); 1333 return SLJIT_SUCCESS; 1334 } 1335 1336 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1337 /* Create imm by 2 inst. */ 1338 FAIL_IF(generate_int(compiler, reg, imm, 1)); 1339 FAIL_IF(generate_int(compiler, reg, ~imm, 0)); 1340 1341 /* Load integer. */ 1342 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm); 1343 #else 1344 return emit_imm(compiler, reg, imm); 1345 #endif 1346 } 1347 1348 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */ 1349 static sljit_si emit_set_delta(struct sljit_compiler *compiler, sljit_si dst, sljit_si reg, sljit_sw value) 1350 { 1351 if (value >= 0) { 1352 value = get_imm(value); 1353 if (value) 1354 return push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, dst, reg, value)); 1355 } 1356 else { 1357 value = get_imm(-value); 1358 if (value) 1359 return push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, dst, reg, value)); 1360 } 1361 return SLJIT_ERR_UNSUPPORTED; 1362 } 1363 1364 /* Can perform an operation using at most 1 instruction. */ 1365 static sljit_si getput_arg_fast(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw) 1366 { 1367 sljit_uw imm; 1368 1369 if (arg & SLJIT_IMM) { 1370 imm = get_imm(argw); 1371 if (imm) { 1372 if (inp_flags & ARG_TEST) 1373 return 1; 1374 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm)); 1375 return -1; 1376 } 1377 imm = get_imm(~argw); 1378 if (imm) { 1379 if (inp_flags & ARG_TEST) 1380 return 1; 1381 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm)); 1382 return -1; 1383 } 1384 return 0; 1385 } 1386 1387 SLJIT_ASSERT(arg & SLJIT_MEM); 1388 1389 /* Fast loads/stores. */ 1390 if (!(arg & REG_MASK)) 1391 return 0; 1392 1393 if (arg & OFFS_REG_MASK) { 1394 if ((argw & 0x3) != 0 && !IS_TYPE1_TRANSFER(inp_flags)) 1395 return 0; 1396 1397 if (inp_flags & ARG_TEST) 1398 return 1; 1399 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, 1400 RM(OFFS_REG(arg)) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7))); 1401 return -1; 1402 } 1403 1404 if (IS_TYPE1_TRANSFER(inp_flags)) { 1405 if (argw >= 0 && argw <= 0xfff) { 1406 if (inp_flags & ARG_TEST) 1407 return 1; 1408 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, argw)); 1409 return -1; 1410 } 1411 if (argw < 0 && argw >= -0xfff) { 1412 if (inp_flags & ARG_TEST) 1413 return 1; 1414 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, -argw)); 1415 return -1; 1416 } 1417 } 1418 else { 1419 if (argw >= 0 && argw <= 0xff) { 1420 if (inp_flags & ARG_TEST) 1421 return 1; 1422 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw))); 1423 return -1; 1424 } 1425 if (argw < 0 && argw >= -0xff) { 1426 if (inp_flags & ARG_TEST) 1427 return 1; 1428 argw = -argw; 1429 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw))); 1430 return -1; 1431 } 1432 } 1433 1434 return 0; 1435 } 1436 1437 /* See getput_arg below. 1438 Note: can_cache is called only for binary operators. Those 1439 operators always uses word arguments without write back. */ 1440 static sljit_si can_cache(sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw) 1441 { 1442 /* Immediate caching is not supported as it would be an operation on constant arguments. */ 1443 if (arg & SLJIT_IMM) 1444 return 0; 1445 1446 /* Always a simple operation. */ 1447 if (arg & OFFS_REG_MASK) 1448 return 0; 1449 1450 if (!(arg & REG_MASK)) { 1451 /* Immediate access. */ 1452 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff)) 1453 return 1; 1454 return 0; 1455 } 1456 1457 if (argw <= 0xfffff && argw >= -0xfffff) 1458 return 0; 1459 1460 if (argw == next_argw && (next_arg & SLJIT_MEM)) 1461 return 1; 1462 1463 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff)) 1464 return 1; 1465 1466 return 0; 1467 } 1468 1469 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \ 1470 if (max_delta & 0xf00) \ 1471 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \ 1472 else \ 1473 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm)))); 1474 1475 #define TEST_WRITE_BACK() \ 1476 if (inp_flags & WRITE_BACK) { \ 1477 tmp_r = arg & REG_MASK; \ 1478 if (reg == tmp_r) { \ 1479 /* This can only happen for stores */ \ 1480 /* since ldr reg, [reg, ...]! has no meaning */ \ 1481 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \ 1482 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg))); \ 1483 reg = TMP_REG3; \ 1484 } \ 1485 } 1486 1487 /* Emit the necessary instructions. See can_cache above. */ 1488 static sljit_si getput_arg(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw) 1489 { 1490 sljit_si tmp_r; 1491 sljit_sw max_delta; 1492 sljit_sw sign; 1493 sljit_uw imm; 1494 1495 if (arg & SLJIT_IMM) { 1496 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1497 return load_immediate(compiler, reg, argw); 1498 } 1499 1500 SLJIT_ASSERT(arg & SLJIT_MEM); 1501 1502 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3; 1503 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff; 1504 1505 if ((arg & REG_MASK) == SLJIT_UNUSED) { 1506 /* Write back is not used. */ 1507 imm = (sljit_uw)(argw - compiler->cache_argw); 1508 if ((compiler->cache_arg & SLJIT_IMM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1509 if (imm <= (sljit_uw)max_delta) { 1510 sign = 1; 1511 argw = argw - compiler->cache_argw; 1512 } 1513 else { 1514 sign = 0; 1515 argw = compiler->cache_argw - argw; 1516 } 1517 1518 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw); 1519 return SLJIT_SUCCESS; 1520 } 1521 1522 /* With write back, we can create some sophisticated loads, but 1523 it is hard to decide whether we should convert downward (0s) or upward (1s). */ 1524 imm = (sljit_uw)(argw - next_argw); 1525 if ((next_arg & SLJIT_MEM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1526 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1527 1528 compiler->cache_arg = SLJIT_IMM; 1529 compiler->cache_argw = argw; 1530 tmp_r = TMP_REG3; 1531 } 1532 1533 FAIL_IF(load_immediate(compiler, tmp_r, argw)); 1534 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0); 1535 return SLJIT_SUCCESS; 1536 } 1537 1538 if (arg & OFFS_REG_MASK) { 1539 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00)); 1540 if (inp_flags & WRITE_BACK) 1541 tmp_r = arg & REG_MASK; 1542 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7))); 1543 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0))); 1544 return SLJIT_SUCCESS; 1545 } 1546 1547 imm = (sljit_uw)(argw - compiler->cache_argw); 1548 if (compiler->cache_arg == arg && imm <= (sljit_uw)max_delta) { 1549 SLJIT_ASSERT(!(inp_flags & WRITE_BACK)); 1550 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, imm); 1551 return SLJIT_SUCCESS; 1552 } 1553 if (compiler->cache_arg == arg && imm >= (sljit_uw)-max_delta) { 1554 SLJIT_ASSERT(!(inp_flags & WRITE_BACK)); 1555 imm = (sljit_uw)-(sljit_sw)imm; 1556 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, imm); 1557 return SLJIT_SUCCESS; 1558 } 1559 1560 imm = get_imm(argw & ~max_delta); 1561 if (imm) { 1562 TEST_WRITE_BACK(); 1563 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, imm)); 1564 GETPUT_ARG_DATA_TRANSFER(1, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta); 1565 return SLJIT_SUCCESS; 1566 } 1567 1568 imm = get_imm(-argw & ~max_delta); 1569 if (imm) { 1570 argw = -argw; 1571 TEST_WRITE_BACK(); 1572 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, tmp_r, arg & REG_MASK, imm)); 1573 GETPUT_ARG_DATA_TRANSFER(0, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta); 1574 return SLJIT_SUCCESS; 1575 } 1576 1577 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) { 1578 TEST_WRITE_BACK(); 1579 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1580 return SLJIT_SUCCESS; 1581 } 1582 1583 if (argw == next_argw && (next_arg & SLJIT_MEM)) { 1584 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1585 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 1586 1587 compiler->cache_arg = SLJIT_IMM; 1588 compiler->cache_argw = argw; 1589 1590 TEST_WRITE_BACK(); 1591 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1592 return SLJIT_SUCCESS; 1593 } 1594 1595 imm = (sljit_uw)(argw - next_argw); 1596 if (arg == next_arg && !(inp_flags & WRITE_BACK) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1597 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1598 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 1599 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & REG_MASK])); 1600 1601 compiler->cache_arg = arg; 1602 compiler->cache_argw = argw; 1603 1604 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0); 1605 return SLJIT_SUCCESS; 1606 } 1607 1608 if ((arg & REG_MASK) == tmp_r) { 1609 compiler->cache_arg = SLJIT_IMM; 1610 compiler->cache_argw = argw; 1611 tmp_r = TMP_REG3; 1612 } 1613 1614 FAIL_IF(load_immediate(compiler, tmp_r, argw)); 1615 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1616 return SLJIT_SUCCESS; 1617 } 1618 1619 static SLJIT_INLINE sljit_si emit_op_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw) 1620 { 1621 if (getput_arg_fast(compiler, flags, reg, arg, argw)) 1622 return compiler->error; 1623 compiler->cache_arg = 0; 1624 compiler->cache_argw = 0; 1625 return getput_arg(compiler, flags, reg, arg, argw, 0, 0); 1626 } 1627 1628 static SLJIT_INLINE sljit_si emit_op_mem2(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg1, sljit_sw arg1w, sljit_si arg2, sljit_sw arg2w) 1629 { 1630 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w)) 1631 return compiler->error; 1632 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w); 1633 } 1634 1635 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags, 1636 sljit_si dst, sljit_sw dstw, 1637 sljit_si src1, sljit_sw src1w, 1638 sljit_si src2, sljit_sw src2w) 1639 { 1640 /* arg1 goes to TMP_REG1 or src reg 1641 arg2 goes to TMP_REG2, imm or src reg 1642 TMP_REG3 can be used for caching 1643 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */ 1644 1645 /* We prefers register and simple consts. */ 1646 sljit_si dst_r; 1647 sljit_si src1_r; 1648 sljit_si src2_r = 0; 1649 sljit_si sugg_src2_r = TMP_REG2; 1650 sljit_si flags = GET_FLAGS(op) ? SET_FLAGS : 0; 1651 1652 compiler->cache_arg = 0; 1653 compiler->cache_argw = 0; 1654 1655 /* Destination check. */ 1656 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) { 1657 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM)) 1658 return SLJIT_SUCCESS; 1659 dst_r = TMP_REG2; 1660 } 1661 else if (FAST_IS_REG(dst)) { 1662 dst_r = dst; 1663 flags |= REG_DEST; 1664 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI) 1665 sugg_src2_r = dst_r; 1666 } 1667 else { 1668 SLJIT_ASSERT(dst & SLJIT_MEM); 1669 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) { 1670 flags |= FAST_DEST; 1671 dst_r = TMP_REG2; 1672 } 1673 else { 1674 flags |= SLOW_DEST; 1675 dst_r = 0; 1676 } 1677 } 1678 1679 /* Source 1. */ 1680 if (FAST_IS_REG(src1)) 1681 src1_r = src1; 1682 else if (FAST_IS_REG(src2)) { 1683 flags |= ARGS_SWAPPED; 1684 src1_r = src2; 1685 src2 = src1; 1686 src2w = src1w; 1687 } 1688 else do { /* do { } while(0) is used because of breaks. */ 1689 src1_r = 0; 1690 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) { 1691 /* The second check will generate a hit. */ 1692 src2_r = get_imm(src1w); 1693 if (src2_r) { 1694 flags |= ARGS_SWAPPED; 1695 src1 = src2; 1696 src1w = src2w; 1697 break; 1698 } 1699 if (inp_flags & ALLOW_INV_IMM) { 1700 src2_r = get_imm(~src1w); 1701 if (src2_r) { 1702 flags |= ARGS_SWAPPED | INV_IMM; 1703 src1 = src2; 1704 src1w = src2w; 1705 break; 1706 } 1707 } 1708 if (GET_OPCODE(op) == SLJIT_ADD) { 1709 src2_r = get_imm(-src1w); 1710 if (src2_r) { 1711 /* Note: ARGS_SWAPPED is intentionally not applied! */ 1712 src1 = src2; 1713 src1w = src2w; 1714 op = SLJIT_SUB | GET_ALL_FLAGS(op); 1715 break; 1716 } 1717 } 1718 } 1719 1720 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) { 1721 FAIL_IF(compiler->error); 1722 src1_r = TMP_REG1; 1723 } 1724 } while (0); 1725 1726 /* Source 2. */ 1727 if (src2_r == 0) { 1728 if (FAST_IS_REG(src2)) { 1729 src2_r = src2; 1730 flags |= REG_SOURCE; 1731 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_SI) 1732 dst_r = src2_r; 1733 } 1734 else do { /* do { } while(0) is used because of breaks. */ 1735 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) { 1736 src2_r = get_imm(src2w); 1737 if (src2_r) 1738 break; 1739 if (inp_flags & ALLOW_INV_IMM) { 1740 src2_r = get_imm(~src2w); 1741 if (src2_r) { 1742 flags |= INV_IMM; 1743 break; 1744 } 1745 } 1746 if (GET_OPCODE(op) == SLJIT_ADD) { 1747 src2_r = get_imm(-src2w); 1748 if (src2_r) { 1749 op = SLJIT_SUB | GET_ALL_FLAGS(op); 1750 flags &= ~ARGS_SWAPPED; 1751 break; 1752 } 1753 } 1754 if (GET_OPCODE(op) == SLJIT_SUB && !(flags & ARGS_SWAPPED)) { 1755 src2_r = get_imm(-src2w); 1756 if (src2_r) { 1757 op = SLJIT_ADD | GET_ALL_FLAGS(op); 1758 flags &= ~ARGS_SWAPPED; 1759 break; 1760 } 1761 } 1762 } 1763 1764 /* src2_r is 0. */ 1765 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) { 1766 FAIL_IF(compiler->error); 1767 src2_r = sugg_src2_r; 1768 } 1769 } while (0); 1770 } 1771 1772 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero. 1773 If they are zero, they must not be registers. */ 1774 if (src1_r == 0 && src2_r == 0 && dst_r == 0) { 1775 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1776 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); 1777 flags |= ARGS_SWAPPED; 1778 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w)); 1779 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw)); 1780 } 1781 else { 1782 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w)); 1783 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw)); 1784 } 1785 src1_r = TMP_REG1; 1786 src2_r = TMP_REG2; 1787 } 1788 else if (src1_r == 0 && src2_r == 0) { 1789 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w)); 1790 src1_r = TMP_REG1; 1791 } 1792 else if (src1_r == 0 && dst_r == 0) { 1793 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw)); 1794 src1_r = TMP_REG1; 1795 } 1796 else if (src2_r == 0 && dst_r == 0) { 1797 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw)); 1798 src2_r = sugg_src2_r; 1799 } 1800 1801 if (dst_r == 0) 1802 dst_r = TMP_REG2; 1803 1804 if (src1_r == 0) { 1805 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0)); 1806 src1_r = TMP_REG1; 1807 } 1808 1809 if (src2_r == 0) { 1810 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0)); 1811 src2_r = sugg_src2_r; 1812 } 1813 1814 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r)); 1815 1816 if (flags & (FAST_DEST | SLOW_DEST)) { 1817 if (flags & FAST_DEST) 1818 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw)); 1819 else 1820 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0)); 1821 } 1822 return SLJIT_SUCCESS; 1823 } 1824 1825 #ifdef __cplusplus 1826 extern "C" { 1827 #endif 1828 1829 #if defined(__GNUC__) 1830 extern unsigned int __aeabi_uidivmod(unsigned int numerator, unsigned int denominator); 1831 extern int __aeabi_idivmod(int numerator, int denominator); 1832 #else 1833 #error "Software divmod functions are needed" 1834 #endif 1835 1836 #ifdef __cplusplus 1837 } 1838 #endif 1839 1840 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op0(struct sljit_compiler *compiler, sljit_si op) 1841 { 1842 CHECK_ERROR(); 1843 check_sljit_emit_op0(compiler, op); 1844 1845 op = GET_OPCODE(op); 1846 switch (op) { 1847 case SLJIT_BREAKPOINT: 1848 EMIT_INSTRUCTION(BKPT); 1849 break; 1850 case SLJIT_NOP: 1851 EMIT_INSTRUCTION(NOP); 1852 break; 1853 case SLJIT_UMUL: 1854 case SLJIT_SMUL: 1855 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 1856 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL) 1857 | (reg_map[SLJIT_SCRATCH_REG2] << 16) 1858 | (reg_map[SLJIT_SCRATCH_REG1] << 12) 1859 | (reg_map[SLJIT_SCRATCH_REG1] << 8) 1860 | reg_map[SLJIT_SCRATCH_REG2]); 1861 #else 1862 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2))); 1863 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL) 1864 | (reg_map[SLJIT_SCRATCH_REG2] << 16) 1865 | (reg_map[SLJIT_SCRATCH_REG1] << 12) 1866 | (reg_map[SLJIT_SCRATCH_REG1] << 8) 1867 | reg_map[TMP_REG1]); 1868 #endif 1869 case SLJIT_UDIV: 1870 case SLJIT_SDIV: 1871 if (compiler->scratches >= 3) 1872 EMIT_INSTRUCTION(0xe52d2008 /* str r2, [sp, #-8]! */); 1873 #if defined(__GNUC__) 1874 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM, 1875 (op == SLJIT_UDIV ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod)))); 1876 #else 1877 #error "Software divmod functions are needed" 1878 #endif 1879 if (compiler->scratches >= 3) 1880 return push_inst(compiler, 0xe49d2008 /* ldr r2, [sp], #8 */); 1881 return SLJIT_SUCCESS; 1882 } 1883 1884 return SLJIT_SUCCESS; 1885 } 1886 1887 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op1(struct sljit_compiler *compiler, sljit_si op, 1888 sljit_si dst, sljit_sw dstw, 1889 sljit_si src, sljit_sw srcw) 1890 { 1891 CHECK_ERROR(); 1892 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw); 1893 ADJUST_LOCAL_OFFSET(dst, dstw); 1894 ADJUST_LOCAL_OFFSET(src, srcw); 1895 1896 switch (GET_OPCODE(op)) { 1897 case SLJIT_MOV: 1898 case SLJIT_MOV_UI: 1899 case SLJIT_MOV_SI: 1900 case SLJIT_MOV_P: 1901 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw); 1902 1903 case SLJIT_MOV_UB: 1904 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw); 1905 1906 case SLJIT_MOV_SB: 1907 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw); 1908 1909 case SLJIT_MOV_UH: 1910 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw); 1911 1912 case SLJIT_MOV_SH: 1913 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw); 1914 1915 case SLJIT_MOVU: 1916 case SLJIT_MOVU_UI: 1917 case SLJIT_MOVU_SI: 1918 case SLJIT_MOVU_P: 1919 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw); 1920 1921 case SLJIT_MOVU_UB: 1922 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw); 1923 1924 case SLJIT_MOVU_SB: 1925 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw); 1926 1927 case SLJIT_MOVU_UH: 1928 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw); 1929 1930 case SLJIT_MOVU_SH: 1931 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw); 1932 1933 case SLJIT_NOT: 1934 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw); 1935 1936 case SLJIT_NEG: 1937 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG) 1938 compiler->skip_checks = 1; 1939 #endif 1940 return sljit_emit_op2(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw); 1941 1942 case SLJIT_CLZ: 1943 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw); 1944 } 1945 1946 return SLJIT_SUCCESS; 1947 } 1948 1949 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op2(struct sljit_compiler *compiler, sljit_si op, 1950 sljit_si dst, sljit_sw dstw, 1951 sljit_si src1, sljit_sw src1w, 1952 sljit_si src2, sljit_sw src2w) 1953 { 1954 CHECK_ERROR(); 1955 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w); 1956 ADJUST_LOCAL_OFFSET(dst, dstw); 1957 ADJUST_LOCAL_OFFSET(src1, src1w); 1958 ADJUST_LOCAL_OFFSET(src2, src2w); 1959 1960 switch (GET_OPCODE(op)) { 1961 case SLJIT_ADD: 1962 case SLJIT_ADDC: 1963 case SLJIT_SUB: 1964 case SLJIT_SUBC: 1965 case SLJIT_OR: 1966 case SLJIT_XOR: 1967 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w); 1968 1969 case SLJIT_MUL: 1970 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w); 1971 1972 case SLJIT_AND: 1973 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w); 1974 1975 case SLJIT_SHL: 1976 case SLJIT_LSHR: 1977 case SLJIT_ASHR: 1978 if (src2 & SLJIT_IMM) { 1979 compiler->shift_imm = src2w & 0x1f; 1980 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w); 1981 } 1982 else { 1983 compiler->shift_imm = 0x20; 1984 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w); 1985 } 1986 } 1987 1988 return SLJIT_SUCCESS; 1989 } 1990 1991 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_register_index(sljit_si reg) 1992 { 1993 check_sljit_get_register_index(reg); 1994 return reg_map[reg]; 1995 } 1996 1997 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_float_register_index(sljit_si reg) 1998 { 1999 check_sljit_get_float_register_index(reg); 2000 return reg; 2001 } 2002 2003 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_custom(struct sljit_compiler *compiler, 2004 void *instruction, sljit_si size) 2005 { 2006 CHECK_ERROR(); 2007 check_sljit_emit_op_custom(compiler, instruction, size); 2008 SLJIT_ASSERT(size == 4); 2009 2010 return push_inst(compiler, *(sljit_uw*)instruction); 2011 } 2012 2013 /* --------------------------------------------------------------------- */ 2014 /* Floating point operators */ 2015 /* --------------------------------------------------------------------- */ 2016 2017 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2018 2019 /* 0 - no fpu 2020 1 - vfp */ 2021 static sljit_si arm_fpu_type = -1; 2022 2023 static void init_compiler(void) 2024 { 2025 if (arm_fpu_type != -1) 2026 return; 2027 2028 /* TODO: Only the OS can help to determine the correct fpu type. */ 2029 arm_fpu_type = 1; 2030 } 2031 2032 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void) 2033 { 2034 #ifdef SLJIT_IS_FPU_AVAILABLE 2035 return SLJIT_IS_FPU_AVAILABLE; 2036 #else 2037 if (arm_fpu_type == -1) 2038 init_compiler(); 2039 return arm_fpu_type; 2040 #endif 2041 } 2042 2043 #else 2044 2045 #define arm_fpu_type 1 2046 2047 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void) 2048 { 2049 /* Always available. */ 2050 return 1; 2051 } 2052 2053 #endif 2054 2055 #define FPU_LOAD (1 << 20) 2056 #define EMIT_FPU_DATA_TRANSFER(inst, add, base, freg, offs) \ 2057 ((inst) | ((add) << 23) | (reg_map[base] << 16) | (freg << 12) | (offs)) 2058 #define EMIT_FPU_OPERATION(opcode, mode, dst, src1, src2) \ 2059 ((opcode) | (mode) | ((dst) << 12) | (src1) | ((src2) << 16)) 2060 2061 static sljit_si emit_fop_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw) 2062 { 2063 sljit_sw tmp; 2064 sljit_uw imm; 2065 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_SINGLE_OP | FPU_LOAD)); 2066 SLJIT_ASSERT(arg & SLJIT_MEM); 2067 2068 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) { 2069 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7))); 2070 arg = SLJIT_MEM | TMP_REG1; 2071 argw = 0; 2072 } 2073 2074 /* Fast loads and stores. */ 2075 if ((arg & REG_MASK)) { 2076 if (!(argw & ~0x3fc)) 2077 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2)); 2078 if (!(-argw & ~0x3fc)) 2079 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2)); 2080 } 2081 2082 if (compiler->cache_arg == arg) { 2083 tmp = argw - compiler->cache_argw; 2084 if (!(tmp & ~0x3fc)) 2085 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, tmp >> 2)); 2086 if (!(-tmp & ~0x3fc)) 2087 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG3, reg, -tmp >> 2)); 2088 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) { 2089 FAIL_IF(compiler->error); 2090 compiler->cache_argw = argw; 2091 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0)); 2092 } 2093 } 2094 2095 if (arg & REG_MASK) { 2096 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) { 2097 FAIL_IF(compiler->error); 2098 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, 0)); 2099 } 2100 imm = get_imm(argw & ~0x3fc); 2101 if (imm) { 2102 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, imm)); 2103 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, (argw & 0x3fc) >> 2)); 2104 } 2105 imm = get_imm(-argw & ~0x3fc); 2106 if (imm) { 2107 argw = -argw; 2108 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & REG_MASK, imm)); 2109 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG1, reg, (argw & 0x3fc) >> 2)); 2110 } 2111 } 2112 2113 compiler->cache_arg = arg; 2114 compiler->cache_argw = argw; 2115 if (arg & REG_MASK) { 2116 FAIL_IF(load_immediate(compiler, TMP_REG1, argw)); 2117 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & REG_MASK, reg_map[TMP_REG1])); 2118 } 2119 else 2120 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 2121 2122 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0)); 2123 } 2124 2125 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop1(struct sljit_compiler *compiler, sljit_si op, 2126 sljit_si dst, sljit_sw dstw, 2127 sljit_si src, sljit_sw srcw) 2128 { 2129 sljit_si dst_fr; 2130 2131 CHECK_ERROR(); 2132 check_sljit_emit_fop1(compiler, op, dst, dstw, src, srcw); 2133 SLJIT_COMPILE_ASSERT((SLJIT_SINGLE_OP == 0x100), float_transfer_bit_error); 2134 2135 compiler->cache_arg = 0; 2136 compiler->cache_argw = 0; 2137 op ^= SLJIT_SINGLE_OP; 2138 2139 if (GET_OPCODE(op) == SLJIT_CMPD) { 2140 if (dst & SLJIT_MEM) { 2141 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, dst, dstw)); 2142 dst = TMP_FREG1; 2143 } 2144 if (src & SLJIT_MEM) { 2145 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src, srcw)); 2146 src = TMP_FREG2; 2147 } 2148 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VCMP_F32, op & SLJIT_SINGLE_OP, dst, src, 0)); 2149 EMIT_INSTRUCTION(VMRS); 2150 return SLJIT_SUCCESS; 2151 } 2152 2153 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1; 2154 2155 if (src & SLJIT_MEM) { 2156 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, dst_fr, src, srcw)); 2157 src = dst_fr; 2158 } 2159 2160 switch (GET_OPCODE(op)) { 2161 case SLJIT_MOVD: 2162 if (src != dst_fr && dst_fr != TMP_FREG1) 2163 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMOV_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0)); 2164 break; 2165 case SLJIT_NEGD: 2166 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VNEG_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0)); 2167 break; 2168 case SLJIT_ABSD: 2169 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VABS_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0)); 2170 break; 2171 } 2172 2173 if (dst_fr == TMP_FREG1) { 2174 if (GET_OPCODE(op) == SLJIT_MOVD) 2175 dst_fr = src; 2176 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), dst_fr, dst, dstw)); 2177 } 2178 2179 return SLJIT_SUCCESS; 2180 } 2181 2182 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop2(struct sljit_compiler *compiler, sljit_si op, 2183 sljit_si dst, sljit_sw dstw, 2184 sljit_si src1, sljit_sw src1w, 2185 sljit_si src2, sljit_sw src2w) 2186 { 2187 sljit_si dst_fr; 2188 2189 CHECK_ERROR(); 2190 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w); 2191 2192 compiler->cache_arg = 0; 2193 compiler->cache_argw = 0; 2194 op ^= SLJIT_SINGLE_OP; 2195 2196 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1; 2197 2198 if (src2 & SLJIT_MEM) { 2199 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w)); 2200 src2 = TMP_FREG2; 2201 } 2202 2203 if (src1 & SLJIT_MEM) { 2204 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w)); 2205 src1 = TMP_FREG1; 2206 } 2207 2208 switch (GET_OPCODE(op)) { 2209 case SLJIT_ADDD: 2210 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VADD_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1)); 2211 break; 2212 2213 case SLJIT_SUBD: 2214 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VSUB_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1)); 2215 break; 2216 2217 case SLJIT_MULD: 2218 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMUL_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1)); 2219 break; 2220 2221 case SLJIT_DIVD: 2222 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VDIV_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1)); 2223 break; 2224 } 2225 2226 if (dst_fr == TMP_FREG1) 2227 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw)); 2228 2229 return SLJIT_SUCCESS; 2230 } 2231 2232 #undef FPU_LOAD 2233 #undef EMIT_FPU_DATA_TRANSFER 2234 #undef EMIT_FPU_OPERATION 2235 2236 /* --------------------------------------------------------------------- */ 2237 /* Other instructions */ 2238 /* --------------------------------------------------------------------- */ 2239 2240 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw) 2241 { 2242 CHECK_ERROR(); 2243 check_sljit_emit_fast_enter(compiler, dst, dstw); 2244 ADJUST_LOCAL_OFFSET(dst, dstw); 2245 2246 /* For UNUSED dst. Uncommon, but possible. */ 2247 if (dst == SLJIT_UNUSED) 2248 return SLJIT_SUCCESS; 2249 2250 if (FAST_IS_REG(dst)) 2251 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3))); 2252 2253 /* Memory. */ 2254 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw)) 2255 return compiler->error; 2256 /* TMP_REG3 is used for caching. */ 2257 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3))); 2258 compiler->cache_arg = 0; 2259 compiler->cache_argw = 0; 2260 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0); 2261 } 2262 2263 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_si src, sljit_sw srcw) 2264 { 2265 CHECK_ERROR(); 2266 check_sljit_emit_fast_return(compiler, src, srcw); 2267 ADJUST_LOCAL_OFFSET(src, srcw); 2268 2269 if (FAST_IS_REG(src)) 2270 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src))); 2271 else if (src & SLJIT_MEM) { 2272 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw)) 2273 FAIL_IF(compiler->error); 2274 else { 2275 compiler->cache_arg = 0; 2276 compiler->cache_argw = 0; 2277 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0)); 2278 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2))); 2279 } 2280 } 2281 else if (src & SLJIT_IMM) 2282 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw)); 2283 return push_inst(compiler, BLX | RM(TMP_REG3)); 2284 } 2285 2286 /* --------------------------------------------------------------------- */ 2287 /* Conditional instructions */ 2288 /* --------------------------------------------------------------------- */ 2289 2290 static sljit_uw get_cc(sljit_si type) 2291 { 2292 switch (type) { 2293 case SLJIT_C_EQUAL: 2294 case SLJIT_C_MUL_NOT_OVERFLOW: 2295 case SLJIT_C_FLOAT_EQUAL: 2296 return 0x00000000; 2297 2298 case SLJIT_C_NOT_EQUAL: 2299 case SLJIT_C_MUL_OVERFLOW: 2300 case SLJIT_C_FLOAT_NOT_EQUAL: 2301 return 0x10000000; 2302 2303 case SLJIT_C_LESS: 2304 case SLJIT_C_FLOAT_LESS: 2305 return 0x30000000; 2306 2307 case SLJIT_C_GREATER_EQUAL: 2308 case SLJIT_C_FLOAT_GREATER_EQUAL: 2309 return 0x20000000; 2310 2311 case SLJIT_C_GREATER: 2312 case SLJIT_C_FLOAT_GREATER: 2313 return 0x80000000; 2314 2315 case SLJIT_C_LESS_EQUAL: 2316 case SLJIT_C_FLOAT_LESS_EQUAL: 2317 return 0x90000000; 2318 2319 case SLJIT_C_SIG_LESS: 2320 return 0xb0000000; 2321 2322 case SLJIT_C_SIG_GREATER_EQUAL: 2323 return 0xa0000000; 2324 2325 case SLJIT_C_SIG_GREATER: 2326 return 0xc0000000; 2327 2328 case SLJIT_C_SIG_LESS_EQUAL: 2329 return 0xd0000000; 2330 2331 case SLJIT_C_OVERFLOW: 2332 case SLJIT_C_FLOAT_UNORDERED: 2333 return 0x60000000; 2334 2335 case SLJIT_C_NOT_OVERFLOW: 2336 case SLJIT_C_FLOAT_ORDERED: 2337 return 0x70000000; 2338 2339 default: /* SLJIT_JUMP */ 2340 return 0xe0000000; 2341 } 2342 } 2343 2344 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler) 2345 { 2346 struct sljit_label *label; 2347 2348 CHECK_ERROR_PTR(); 2349 check_sljit_emit_label(compiler); 2350 2351 if (compiler->last_label && compiler->last_label->size == compiler->size) 2352 return compiler->last_label; 2353 2354 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label)); 2355 PTR_FAIL_IF(!label); 2356 set_label(label, compiler); 2357 return label; 2358 } 2359 2360 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_si type) 2361 { 2362 struct sljit_jump *jump; 2363 2364 CHECK_ERROR_PTR(); 2365 check_sljit_emit_jump(compiler, type); 2366 2367 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump)); 2368 PTR_FAIL_IF(!jump); 2369 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP); 2370 type &= 0xff; 2371 2372 /* In ARM, we don't need to touch the arguments. */ 2373 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2374 if (type >= SLJIT_FAST_CALL) 2375 PTR_FAIL_IF(prepare_blx(compiler)); 2376 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, 2377 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0)); 2378 2379 if (jump->flags & SLJIT_REWRITABLE_JUMP) { 2380 jump->addr = compiler->size; 2381 compiler->patches++; 2382 } 2383 2384 if (type >= SLJIT_FAST_CALL) { 2385 jump->flags |= IS_BL; 2386 PTR_FAIL_IF(emit_blx(compiler)); 2387 } 2388 2389 if (!(jump->flags & SLJIT_REWRITABLE_JUMP)) 2390 jump->addr = compiler->size; 2391 #else 2392 if (type >= SLJIT_FAST_CALL) 2393 jump->flags |= IS_BL; 2394 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0)); 2395 PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type))); 2396 jump->addr = compiler->size; 2397 #endif 2398 return jump; 2399 } 2400 2401 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_ijump(struct sljit_compiler *compiler, sljit_si type, sljit_si src, sljit_sw srcw) 2402 { 2403 struct sljit_jump *jump; 2404 2405 CHECK_ERROR(); 2406 check_sljit_emit_ijump(compiler, type, src, srcw); 2407 ADJUST_LOCAL_OFFSET(src, srcw); 2408 2409 /* In ARM, we don't need to touch the arguments. */ 2410 if (!(src & SLJIT_IMM)) { 2411 if (FAST_IS_REG(src)) 2412 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src)); 2413 2414 SLJIT_ASSERT(src & SLJIT_MEM); 2415 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw)); 2416 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2)); 2417 } 2418 2419 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump)); 2420 FAIL_IF(!jump); 2421 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0)); 2422 jump->u.target = srcw; 2423 2424 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2425 if (type >= SLJIT_FAST_CALL) 2426 FAIL_IF(prepare_blx(compiler)); 2427 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0)); 2428 if (type >= SLJIT_FAST_CALL) 2429 FAIL_IF(emit_blx(compiler)); 2430 #else 2431 FAIL_IF(emit_imm(compiler, TMP_REG1, 0)); 2432 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1))); 2433 #endif 2434 jump->addr = compiler->size; 2435 return SLJIT_SUCCESS; 2436 } 2437 2438 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_si op, 2439 sljit_si dst, sljit_sw dstw, 2440 sljit_si src, sljit_sw srcw, 2441 sljit_si type) 2442 { 2443 sljit_si dst_r, flags = GET_ALL_FLAGS(op); 2444 sljit_uw cc, ins; 2445 2446 CHECK_ERROR(); 2447 check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type); 2448 ADJUST_LOCAL_OFFSET(dst, dstw); 2449 ADJUST_LOCAL_OFFSET(src, srcw); 2450 2451 if (dst == SLJIT_UNUSED) 2452 return SLJIT_SUCCESS; 2453 2454 op = GET_OPCODE(op); 2455 cc = get_cc(type); 2456 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2; 2457 2458 if (op < SLJIT_ADD) { 2459 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 0)); 2460 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc); 2461 return (dst_r == TMP_REG2) ? emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw) : SLJIT_SUCCESS; 2462 } 2463 2464 ins = (op == SLJIT_AND ? AND_DP : (op == SLJIT_OR ? ORR_DP : EOR_DP)); 2465 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) { 2466 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc); 2467 /* The condition must always be set, even if the ORR/EOR is not executed above. */ 2468 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst))) : SLJIT_SUCCESS; 2469 } 2470 2471 compiler->cache_arg = 0; 2472 compiler->cache_argw = 0; 2473 if (src & SLJIT_MEM) { 2474 FAIL_IF(emit_op_mem2(compiler, WORD_DATA | LOAD_DATA, TMP_REG1, src, srcw, dst, dstw)); 2475 src = TMP_REG1; 2476 srcw = 0; 2477 } else if (src & SLJIT_IMM) { 2478 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw)); 2479 src = TMP_REG1; 2480 srcw = 0; 2481 } 2482 2483 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 1) & ~COND_MASK) | cc); 2484 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 0) & ~COND_MASK) | (cc ^ 0x10000000)); 2485 if (dst_r == TMP_REG2) 2486 FAIL_IF(emit_op_mem2(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0)); 2487 2488 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst_r))) : SLJIT_SUCCESS; 2489 } 2490 2491 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw, sljit_sw init_value) 2492 { 2493 struct sljit_const *const_; 2494 sljit_si reg; 2495 2496 CHECK_ERROR_PTR(); 2497 check_sljit_emit_const(compiler, dst, dstw, init_value); 2498 ADJUST_LOCAL_OFFSET(dst, dstw); 2499 2500 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const)); 2501 PTR_FAIL_IF(!const_); 2502 2503 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2; 2504 2505 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2506 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value)); 2507 compiler->patches++; 2508 #else 2509 PTR_FAIL_IF(emit_imm(compiler, reg, init_value)); 2510 #endif 2511 set_const(const_, compiler); 2512 2513 if (dst & SLJIT_MEM) 2514 PTR_FAIL_IF(emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw)); 2515 return const_; 2516 } 2517 2518 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr) 2519 { 2520 inline_set_jump_addr(addr, new_addr, 1); 2521 } 2522 2523 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant) 2524 { 2525 inline_set_const(addr, new_constant, 1); 2526 } 2527
Indexes created Sun Oct 19 02:09:48 GMT 2025