sljitNativeARM_32.c revision 1.3
1 /* $NetBSD: sljitNativeARM_32.c,v 1.3 2016/05/29 17:09:33 alnsn Exp $ */ 2 3 /* 4 * Stack-less Just-In-Time compiler 5 * 6 * Copyright 2009-2012 Zoltan Herczeg (hzmester (at) freemail.hu). All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without modification, are 9 * permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, this list of 12 * conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 15 * of conditions and the following disclaimer in the documentation and/or other materials 16 * provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY 19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 21 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void) 30 { 31 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 32 return "ARMv7" SLJIT_CPUINFO; 33 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 34 return "ARMv5" SLJIT_CPUINFO; 35 #else 36 #error "Internal error: Unknown ARM architecture" 37 #endif 38 } 39 40 /* Last register + 1. */ 41 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2) 42 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) 43 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4) 44 #define TMP_PC (SLJIT_NUMBER_OF_REGISTERS + 5) 45 46 #define TMP_FREG1 (0) 47 #define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1) 48 49 /* In ARM instruction words. 50 Cache lines are usually 32 byte aligned. */ 51 #define CONST_POOL_ALIGNMENT 8 52 #define CONST_POOL_EMPTY 0xffffffff 53 54 #define ALIGN_INSTRUCTION(ptr) \ 55 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1)) 56 #define MAX_DIFFERENCE(max_diff) \ 57 (((max_diff) / (sljit_s32)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1)) 58 59 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */ 60 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { 61 0, 0, 1, 2, 11, 10, 9, 8, 7, 6, 5, 4, 13, 3, 12, 14, 15 62 }; 63 64 #define RM(rm) (reg_map[rm]) 65 #define RD(rd) (reg_map[rd] << 12) 66 #define RN(rn) (reg_map[rn] << 16) 67 68 /* --------------------------------------------------------------------- */ 69 /* Instrucion forms */ 70 /* --------------------------------------------------------------------- */ 71 72 /* The instruction includes the AL condition. 73 INST_NAME - CONDITIONAL remove this flag. */ 74 #define COND_MASK 0xf0000000 75 #define CONDITIONAL 0xe0000000 76 #define PUSH_POOL 0xff000000 77 78 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */ 79 #define ADC_DP 0x5 80 #define ADD_DP 0x4 81 #define AND_DP 0x0 82 #define B 0xea000000 83 #define BIC_DP 0xe 84 #define BL 0xeb000000 85 #define BLX 0xe12fff30 86 #define BX 0xe12fff10 87 #define CLZ 0xe16f0f10 88 #define CMP_DP 0xa 89 #define BKPT 0xe1200070 90 #define EOR_DP 0x1 91 #define MOV_DP 0xd 92 #define MUL 0xe0000090 93 #define MVN_DP 0xf 94 #define NOP 0xe1a00000 95 #define ORR_DP 0xc 96 #define PUSH 0xe92d0000 97 #define POP 0xe8bd0000 98 #define RSB_DP 0x3 99 #define RSC_DP 0x7 100 #define SBC_DP 0x6 101 #define SMULL 0xe0c00090 102 #define SUB_DP 0x2 103 #define UMULL 0xe0800090 104 #define VABS_F32 0xeeb00ac0 105 #define VADD_F32 0xee300a00 106 #define VCMP_F32 0xeeb40a40 107 #define VCVT_F32_S32 0xeeb80ac0 108 #define VCVT_F64_F32 0xeeb70ac0 109 #define VCVT_S32_F32 0xeebd0ac0 110 #define VDIV_F32 0xee800a00 111 #define VMOV_F32 0xeeb00a40 112 #define VMOV 0xee000a10 113 #define VMRS 0xeef1fa10 114 #define VMUL_F32 0xee200a00 115 #define VNEG_F32 0xeeb10a40 116 #define VSTR_F32 0xed000a00 117 #define VSUB_F32 0xee300a40 118 119 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 120 /* Arm v7 specific instructions. */ 121 #define MOVW 0xe3000000 122 #define MOVT 0xe3400000 123 #define SXTB 0xe6af0070 124 #define SXTH 0xe6bf0070 125 #define UXTB 0xe6ef0070 126 #define UXTH 0xe6ff0070 127 #endif 128 129 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 130 131 static sljit_s32 push_cpool(struct sljit_compiler *compiler) 132 { 133 /* Pushing the constant pool into the instruction stream. */ 134 sljit_uw* inst; 135 sljit_uw* cpool_ptr; 136 sljit_uw* cpool_end; 137 sljit_s32 i; 138 139 /* The label could point the address after the constant pool. */ 140 if (compiler->last_label && compiler->last_label->size == compiler->size) 141 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1; 142 143 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE); 144 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 145 FAIL_IF(!inst); 146 compiler->size++; 147 *inst = 0xff000000 | compiler->cpool_fill; 148 149 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) { 150 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 151 FAIL_IF(!inst); 152 compiler->size++; 153 *inst = 0; 154 } 155 156 cpool_ptr = compiler->cpool; 157 cpool_end = cpool_ptr + compiler->cpool_fill; 158 while (cpool_ptr < cpool_end) { 159 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 160 FAIL_IF(!inst); 161 compiler->size++; 162 *inst = *cpool_ptr++; 163 } 164 compiler->cpool_diff = CONST_POOL_EMPTY; 165 compiler->cpool_fill = 0; 166 return SLJIT_SUCCESS; 167 } 168 169 static sljit_s32 push_inst(struct sljit_compiler *compiler, sljit_uw inst) 170 { 171 sljit_uw* ptr; 172 173 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092))) 174 FAIL_IF(push_cpool(compiler)); 175 176 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 177 FAIL_IF(!ptr); 178 compiler->size++; 179 *ptr = inst; 180 return SLJIT_SUCCESS; 181 } 182 183 static sljit_s32 push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal) 184 { 185 sljit_uw* ptr; 186 sljit_uw cpool_index = CPOOL_SIZE; 187 sljit_uw* cpool_ptr; 188 sljit_uw* cpool_end; 189 sljit_u8* cpool_unique_ptr; 190 191 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092))) 192 FAIL_IF(push_cpool(compiler)); 193 else if (compiler->cpool_fill > 0) { 194 cpool_ptr = compiler->cpool; 195 cpool_end = cpool_ptr + compiler->cpool_fill; 196 cpool_unique_ptr = compiler->cpool_unique; 197 do { 198 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) { 199 cpool_index = cpool_ptr - compiler->cpool; 200 break; 201 } 202 cpool_ptr++; 203 cpool_unique_ptr++; 204 } while (cpool_ptr < cpool_end); 205 } 206 207 if (cpool_index == CPOOL_SIZE) { 208 /* Must allocate a new entry in the literal pool. */ 209 if (compiler->cpool_fill < CPOOL_SIZE) { 210 cpool_index = compiler->cpool_fill; 211 compiler->cpool_fill++; 212 } 213 else { 214 FAIL_IF(push_cpool(compiler)); 215 cpool_index = 0; 216 compiler->cpool_fill = 1; 217 } 218 } 219 220 SLJIT_ASSERT((inst & 0xfff) == 0); 221 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 222 FAIL_IF(!ptr); 223 compiler->size++; 224 *ptr = inst | cpool_index; 225 226 compiler->cpool[cpool_index] = literal; 227 compiler->cpool_unique[cpool_index] = 0; 228 if (compiler->cpool_diff == CONST_POOL_EMPTY) 229 compiler->cpool_diff = compiler->size; 230 return SLJIT_SUCCESS; 231 } 232 233 static sljit_s32 push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal) 234 { 235 sljit_uw* ptr; 236 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE)) 237 FAIL_IF(push_cpool(compiler)); 238 239 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0); 240 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 241 FAIL_IF(!ptr); 242 compiler->size++; 243 *ptr = inst | compiler->cpool_fill; 244 245 compiler->cpool[compiler->cpool_fill] = literal; 246 compiler->cpool_unique[compiler->cpool_fill] = 1; 247 compiler->cpool_fill++; 248 if (compiler->cpool_diff == CONST_POOL_EMPTY) 249 compiler->cpool_diff = compiler->size; 250 return SLJIT_SUCCESS; 251 } 252 253 static SLJIT_INLINE sljit_s32 prepare_blx(struct sljit_compiler *compiler) 254 { 255 /* Place for at least two instruction (doesn't matter whether the first has a literal). */ 256 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088))) 257 return push_cpool(compiler); 258 return SLJIT_SUCCESS; 259 } 260 261 static SLJIT_INLINE sljit_s32 emit_blx(struct sljit_compiler *compiler) 262 { 263 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */ 264 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092)); 265 return push_inst(compiler, BLX | RM(TMP_REG1)); 266 } 267 268 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size) 269 { 270 sljit_uw diff; 271 sljit_uw ind; 272 sljit_uw counter = 0; 273 sljit_uw* clear_const_pool = const_pool; 274 sljit_uw* clear_const_pool_end = const_pool + cpool_size; 275 276 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT); 277 /* Set unused flag for all literals in the constant pool. 278 I.e.: unused literals can belong to branches, which can be encoded as B or BL. 279 We can "compress" the constant pool by discarding these literals. */ 280 while (clear_const_pool < clear_const_pool_end) 281 *clear_const_pool++ = (sljit_uw)(-1); 282 283 while (last_pc_patch < code_ptr) { 284 /* Data transfer instruction with Rn == r15. */ 285 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) { 286 diff = const_pool - last_pc_patch; 287 ind = (*last_pc_patch) & 0xfff; 288 289 /* Must be a load instruction with immediate offset. */ 290 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20))); 291 if ((sljit_s32)const_pool[ind] < 0) { 292 const_pool[ind] = counter; 293 ind = counter; 294 counter++; 295 } 296 else 297 ind = const_pool[ind]; 298 299 SLJIT_ASSERT(diff >= 1); 300 if (diff >= 2 || ind > 0) { 301 diff = (diff + ind - 2) << 2; 302 SLJIT_ASSERT(diff <= 0xfff); 303 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff; 304 } 305 else 306 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004; 307 } 308 last_pc_patch++; 309 } 310 return counter; 311 } 312 313 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */ 314 struct future_patch { 315 struct future_patch* next; 316 sljit_s32 index; 317 sljit_s32 value; 318 }; 319 320 static sljit_s32 resolve_const_pool_index(struct sljit_compiler *compiler, struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr) 321 { 322 sljit_s32 value; 323 struct future_patch *curr_patch, *prev_patch; 324 325 SLJIT_UNUSED_ARG(compiler); 326 327 /* Using the values generated by patch_pc_relative_loads. */ 328 if (!*first_patch) 329 value = (sljit_s32)cpool_start_address[cpool_current_index]; 330 else { 331 curr_patch = *first_patch; 332 prev_patch = NULL; 333 while (1) { 334 if (!curr_patch) { 335 value = (sljit_s32)cpool_start_address[cpool_current_index]; 336 break; 337 } 338 if ((sljit_uw)curr_patch->index == cpool_current_index) { 339 value = curr_patch->value; 340 if (prev_patch) 341 prev_patch->next = curr_patch->next; 342 else 343 *first_patch = curr_patch->next; 344 SLJIT_FREE(curr_patch, compiler->allocator_data); 345 break; 346 } 347 prev_patch = curr_patch; 348 curr_patch = curr_patch->next; 349 } 350 } 351 352 if (value >= 0) { 353 if ((sljit_uw)value > cpool_current_index) { 354 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch), compiler->allocator_data); 355 if (!curr_patch) { 356 while (*first_patch) { 357 curr_patch = *first_patch; 358 *first_patch = (*first_patch)->next; 359 SLJIT_FREE(curr_patch, compiler->allocator_data); 360 } 361 return SLJIT_ERR_ALLOC_FAILED; 362 } 363 curr_patch->next = *first_patch; 364 curr_patch->index = value; 365 curr_patch->value = cpool_start_address[value]; 366 *first_patch = curr_patch; 367 } 368 cpool_start_address[value] = *buf_ptr; 369 } 370 return SLJIT_SUCCESS; 371 } 372 373 #else 374 375 static sljit_s32 push_inst(struct sljit_compiler *compiler, sljit_uw inst) 376 { 377 sljit_uw* ptr; 378 379 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw)); 380 FAIL_IF(!ptr); 381 compiler->size++; 382 *ptr = inst; 383 return SLJIT_SUCCESS; 384 } 385 386 static SLJIT_INLINE sljit_s32 emit_imm(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) 387 { 388 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff))); 389 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff)); 390 } 391 392 #endif 393 394 static SLJIT_INLINE sljit_s32 detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code) 395 { 396 sljit_sw diff; 397 398 if (jump->flags & SLJIT_REWRITABLE_JUMP) 399 return 0; 400 401 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 402 if (jump->flags & IS_BL) 403 code_ptr--; 404 405 if (jump->flags & JUMP_ADDR) 406 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2)); 407 else { 408 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 409 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)); 410 } 411 412 /* Branch to Thumb code has not been optimized yet. */ 413 if (diff & 0x3) 414 return 0; 415 416 if (jump->flags & IS_BL) { 417 if (diff <= 0x01ffffff && diff >= -0x02000000) { 418 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK); 419 jump->flags |= PATCH_B; 420 return 1; 421 } 422 } 423 else { 424 if (diff <= 0x01ffffff && diff >= -0x02000000) { 425 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK); 426 jump->flags |= PATCH_B; 427 } 428 } 429 #else 430 if (jump->flags & JUMP_ADDR) 431 diff = ((sljit_sw)jump->u.target - (sljit_sw)code_ptr); 432 else { 433 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 434 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)code_ptr); 435 } 436 437 /* Branch to Thumb code has not been optimized yet. */ 438 if (diff & 0x3) 439 return 0; 440 441 if (diff <= 0x01ffffff && diff >= -0x02000000) { 442 code_ptr -= 2; 443 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK); 444 jump->flags |= PATCH_B; 445 return 1; 446 } 447 #endif 448 return 0; 449 } 450 451 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, sljit_s32 flush) 452 { 453 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 454 sljit_uw *ptr = (sljit_uw*)addr; 455 sljit_uw *inst = (sljit_uw*)ptr[0]; 456 sljit_uw mov_pc = ptr[1]; 457 sljit_s32 bl = (mov_pc & 0x0000f000) != RD(TMP_PC); 458 sljit_sw diff = (sljit_sw)(((sljit_sw)new_addr - (sljit_sw)(inst + 2)) >> 2); 459 460 if (diff <= 0x7fffff && diff >= -0x800000) { 461 /* Turn to branch. */ 462 if (!bl) { 463 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff); 464 if (flush) { 465 SLJIT_CACHE_FLUSH(inst, inst + 1); 466 } 467 } else { 468 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff); 469 inst[1] = NOP; 470 if (flush) { 471 SLJIT_CACHE_FLUSH(inst, inst + 2); 472 } 473 } 474 } else { 475 /* Get the position of the constant. */ 476 if (mov_pc & (1 << 23)) 477 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2; 478 else 479 ptr = inst + 1; 480 481 if (*inst != mov_pc) { 482 inst[0] = mov_pc; 483 if (!bl) { 484 if (flush) { 485 SLJIT_CACHE_FLUSH(inst, inst + 1); 486 } 487 } else { 488 inst[1] = BLX | RM(TMP_REG1); 489 if (flush) { 490 SLJIT_CACHE_FLUSH(inst, inst + 2); 491 } 492 } 493 } 494 *ptr = new_addr; 495 } 496 #else 497 sljit_uw *inst = (sljit_uw*)addr; 498 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); 499 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff); 500 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff); 501 if (flush) { 502 SLJIT_CACHE_FLUSH(inst, inst + 2); 503 } 504 #endif 505 } 506 507 static sljit_uw get_imm(sljit_uw imm); 508 509 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_sw new_constant, sljit_s32 flush) 510 { 511 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 512 sljit_uw *ptr = (sljit_uw*)addr; 513 sljit_uw *inst = (sljit_uw*)ptr[0]; 514 sljit_uw ldr_literal = ptr[1]; 515 sljit_uw src2; 516 517 src2 = get_imm(new_constant); 518 if (src2) { 519 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2; 520 if (flush) { 521 SLJIT_CACHE_FLUSH(inst, inst + 1); 522 } 523 return; 524 } 525 526 src2 = get_imm(~new_constant); 527 if (src2) { 528 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2; 529 if (flush) { 530 SLJIT_CACHE_FLUSH(inst, inst + 1); 531 } 532 return; 533 } 534 535 if (ldr_literal & (1 << 23)) 536 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2; 537 else 538 ptr = inst + 1; 539 540 if (*inst != ldr_literal) { 541 *inst = ldr_literal; 542 if (flush) { 543 SLJIT_CACHE_FLUSH(inst, inst + 1); 544 } 545 } 546 *ptr = new_constant; 547 #else 548 sljit_uw *inst = (sljit_uw*)addr; 549 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); 550 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff); 551 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff); 552 if (flush) { 553 SLJIT_CACHE_FLUSH(inst, inst + 2); 554 } 555 #endif 556 } 557 558 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler) 559 { 560 struct sljit_memory_fragment *buf; 561 sljit_uw *code; 562 sljit_uw *code_ptr; 563 sljit_uw *buf_ptr; 564 sljit_uw *buf_end; 565 sljit_uw size; 566 sljit_uw word_count; 567 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 568 sljit_uw cpool_size; 569 sljit_uw cpool_skip_alignment; 570 sljit_uw cpool_current_index; 571 sljit_uw *cpool_start_address; 572 sljit_uw *last_pc_patch; 573 struct future_patch *first_patch; 574 #endif 575 576 struct sljit_label *label; 577 struct sljit_jump *jump; 578 struct sljit_const *const_; 579 580 CHECK_ERROR_PTR(); 581 CHECK_PTR(check_sljit_generate_code(compiler)); 582 reverse_buf(compiler); 583 584 /* Second code generation pass. */ 585 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 586 size = compiler->size + (compiler->patches << 1); 587 if (compiler->cpool_fill > 0) 588 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1; 589 #else 590 size = compiler->size; 591 #endif 592 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw)); 593 PTR_FAIL_WITH_EXEC_IF(code); 594 buf = compiler->buf; 595 596 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 597 cpool_size = 0; 598 cpool_skip_alignment = 0; 599 cpool_current_index = 0; 600 cpool_start_address = NULL; 601 first_patch = NULL; 602 last_pc_patch = code; 603 #endif 604 605 code_ptr = code; 606 word_count = 0; 607 608 label = compiler->labels; 609 jump = compiler->jumps; 610 const_ = compiler->consts; 611 612 if (label && label->size == 0) { 613 label->addr = (sljit_uw)code; 614 label->size = 0; 615 label = label->next; 616 } 617 618 do { 619 buf_ptr = (sljit_uw*)buf->memory; 620 buf_end = buf_ptr + (buf->used_size >> 2); 621 do { 622 word_count++; 623 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 624 if (cpool_size > 0) { 625 if (cpool_skip_alignment > 0) { 626 buf_ptr++; 627 cpool_skip_alignment--; 628 } 629 else { 630 if (SLJIT_UNLIKELY(resolve_const_pool_index(compiler, &first_patch, cpool_current_index, cpool_start_address, buf_ptr))) { 631 SLJIT_FREE_EXEC(code); 632 compiler->error = SLJIT_ERR_ALLOC_FAILED; 633 return NULL; 634 } 635 buf_ptr++; 636 if (++cpool_current_index >= cpool_size) { 637 SLJIT_ASSERT(!first_patch); 638 cpool_size = 0; 639 if (label && label->size == word_count) { 640 /* Points after the current instruction. */ 641 label->addr = (sljit_uw)code_ptr; 642 label->size = code_ptr - code; 643 label = label->next; 644 } 645 } 646 } 647 } 648 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) { 649 #endif 650 *code_ptr = *buf_ptr++; 651 /* These structures are ordered by their address. */ 652 SLJIT_ASSERT(!label || label->size >= word_count); 653 SLJIT_ASSERT(!jump || jump->addr >= word_count); 654 SLJIT_ASSERT(!const_ || const_->addr >= word_count); 655 if (jump && jump->addr == word_count) { 656 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 657 if (detect_jump_type(jump, code_ptr, code)) 658 code_ptr--; 659 jump->addr = (sljit_uw)code_ptr; 660 #else 661 jump->addr = (sljit_uw)(code_ptr - 2); 662 if (detect_jump_type(jump, code_ptr, code)) 663 code_ptr -= 2; 664 #endif 665 jump = jump->next; 666 } 667 if (label && label->size == word_count) { 668 /* code_ptr can be affected above. */ 669 label->addr = (sljit_uw)(code_ptr + 1); 670 label->size = (code_ptr + 1) - code; 671 label = label->next; 672 } 673 if (const_ && const_->addr == word_count) { 674 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 675 const_->addr = (sljit_uw)code_ptr; 676 #else 677 const_->addr = (sljit_uw)(code_ptr - 1); 678 #endif 679 const_ = const_->next; 680 } 681 code_ptr++; 682 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 683 } 684 else { 685 /* Fortunately, no need to shift. */ 686 cpool_size = *buf_ptr++ & ~PUSH_POOL; 687 SLJIT_ASSERT(cpool_size > 0); 688 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1); 689 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size); 690 if (cpool_current_index > 0) { 691 /* Unconditional branch. */ 692 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL); 693 code_ptr = cpool_start_address + cpool_current_index; 694 } 695 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1; 696 cpool_current_index = 0; 697 last_pc_patch = code_ptr; 698 } 699 #endif 700 } while (buf_ptr < buf_end); 701 buf = buf->next; 702 } while (buf); 703 704 SLJIT_ASSERT(!label); 705 SLJIT_ASSERT(!jump); 706 SLJIT_ASSERT(!const_); 707 708 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 709 SLJIT_ASSERT(cpool_size == 0); 710 if (compiler->cpool_fill > 0) { 711 cpool_start_address = ALIGN_INSTRUCTION(code_ptr); 712 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill); 713 if (cpool_current_index > 0) 714 code_ptr = cpool_start_address + cpool_current_index; 715 716 buf_ptr = compiler->cpool; 717 buf_end = buf_ptr + compiler->cpool_fill; 718 cpool_current_index = 0; 719 while (buf_ptr < buf_end) { 720 if (SLJIT_UNLIKELY(resolve_const_pool_index(compiler, &first_patch, cpool_current_index, cpool_start_address, buf_ptr))) { 721 SLJIT_FREE_EXEC(code); 722 compiler->error = SLJIT_ERR_ALLOC_FAILED; 723 return NULL; 724 } 725 buf_ptr++; 726 cpool_current_index++; 727 } 728 SLJIT_ASSERT(!first_patch); 729 } 730 #endif 731 732 jump = compiler->jumps; 733 while (jump) { 734 buf_ptr = (sljit_uw*)jump->addr; 735 736 if (jump->flags & PATCH_B) { 737 if (!(jump->flags & JUMP_ADDR)) { 738 SLJIT_ASSERT(jump->flags & JUMP_LABEL); 739 SLJIT_ASSERT(((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >= -0x02000000); 740 *buf_ptr |= (((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff; 741 } 742 else { 743 SLJIT_ASSERT(((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >= -0x02000000); 744 *buf_ptr |= (((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff; 745 } 746 } 747 else if (jump->flags & SLJIT_REWRITABLE_JUMP) { 748 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 749 jump->addr = (sljit_uw)code_ptr; 750 code_ptr[0] = (sljit_uw)buf_ptr; 751 code_ptr[1] = *buf_ptr; 752 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 753 code_ptr += 2; 754 #else 755 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 756 #endif 757 } 758 else { 759 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 760 if (jump->flags & IS_BL) 761 buf_ptr--; 762 if (*buf_ptr & (1 << 23)) 763 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2; 764 else 765 buf_ptr += 1; 766 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target; 767 #else 768 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0); 769 #endif 770 } 771 jump = jump->next; 772 } 773 774 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 775 const_ = compiler->consts; 776 while (const_) { 777 buf_ptr = (sljit_uw*)const_->addr; 778 const_->addr = (sljit_uw)code_ptr; 779 780 code_ptr[0] = (sljit_uw)buf_ptr; 781 code_ptr[1] = *buf_ptr; 782 if (*buf_ptr & (1 << 23)) 783 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2; 784 else 785 buf_ptr += 1; 786 /* Set the value again (can be a simple constant). */ 787 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0); 788 code_ptr += 2; 789 790 const_ = const_->next; 791 } 792 #endif 793 794 SLJIT_ASSERT(code_ptr - code <= (sljit_s32)size); 795 796 compiler->error = SLJIT_ERR_COMPILED; 797 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uw); 798 SLJIT_CACHE_FLUSH(code, code_ptr); 799 return code; 800 } 801 802 /* --------------------------------------------------------------------- */ 803 /* Entry, exit */ 804 /* --------------------------------------------------------------------- */ 805 806 /* emit_op inp_flags. 807 WRITE_BACK must be the first, since it is a flag. */ 808 #define WRITE_BACK 0x01 809 #define ALLOW_IMM 0x02 810 #define ALLOW_INV_IMM 0x04 811 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM) 812 #define ARG_TEST 0x08 813 814 /* Creates an index in data_transfer_insts array. */ 815 #define WORD_DATA 0x00 816 #define BYTE_DATA 0x10 817 #define HALF_DATA 0x20 818 #define SIGNED_DATA 0x40 819 #define LOAD_DATA 0x80 820 821 /* Condition: AL. */ 822 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \ 823 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2)) 824 825 static sljit_s32 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 inp_flags, 826 sljit_s32 dst, sljit_sw dstw, 827 sljit_s32 src1, sljit_sw src1w, 828 sljit_s32 src2, sljit_sw src2w); 829 830 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler, 831 sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds, 832 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size) 833 { 834 sljit_s32 size, i, tmp; 835 sljit_uw push; 836 837 CHECK_ERROR(); 838 CHECK(check_sljit_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size)); 839 set_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size); 840 841 /* Push saved registers, temporary registers 842 stmdb sp!, {..., lr} */ 843 push = PUSH | (1 << 14); 844 845 tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG; 846 for (i = SLJIT_S0; i >= tmp; i--) 847 push |= 1 << reg_map[i]; 848 849 for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--) 850 push |= 1 << reg_map[i]; 851 852 FAIL_IF(push_inst(compiler, push)); 853 854 /* Stack must be aligned to 8 bytes: */ 855 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1); 856 local_size = ((size + local_size + 7) & ~7) - size; 857 compiler->local_size = local_size; 858 if (local_size > 0) 859 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_SP, 0, SLJIT_SP, 0, SLJIT_IMM, local_size)); 860 861 if (args >= 1) 862 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S0, SLJIT_UNUSED, RM(SLJIT_R0)))); 863 if (args >= 2) 864 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S1, SLJIT_UNUSED, RM(SLJIT_R1)))); 865 if (args >= 3) 866 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S2, SLJIT_UNUSED, RM(SLJIT_R2)))); 867 868 return SLJIT_SUCCESS; 869 } 870 871 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler, 872 sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds, 873 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size) 874 { 875 sljit_s32 size; 876 877 CHECK_ERROR(); 878 CHECK(check_sljit_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size)); 879 set_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size); 880 881 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1); 882 compiler->local_size = ((size + local_size + 7) & ~7) - size; 883 return SLJIT_SUCCESS; 884 } 885 886 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src, sljit_sw srcw) 887 { 888 sljit_s32 i, tmp; 889 sljit_uw pop; 890 891 CHECK_ERROR(); 892 CHECK(check_sljit_emit_return(compiler, op, src, srcw)); 893 894 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw)); 895 896 if (compiler->local_size > 0) 897 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_SP, 0, SLJIT_SP, 0, SLJIT_IMM, compiler->local_size)); 898 899 /* Push saved registers, temporary registers 900 ldmia sp!, {..., pc} */ 901 pop = POP | (1 << 15); 902 903 tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG; 904 for (i = SLJIT_S0; i >= tmp; i--) 905 pop |= 1 << reg_map[i]; 906 907 for (i = compiler->scratches; i >= SLJIT_FIRST_SAVED_REG; i--) 908 pop |= 1 << reg_map[i]; 909 910 return push_inst(compiler, pop); 911 } 912 913 /* --------------------------------------------------------------------- */ 914 /* Operators */ 915 /* --------------------------------------------------------------------- */ 916 917 /* s/l - store/load (1 bit) 918 u/s - signed/unsigned (1 bit) 919 w/b/h/N - word/byte/half/NOT allowed (2 bit) 920 It contans 16 items, but not all are different. */ 921 922 static sljit_sw data_transfer_insts[16] = { 923 /* s u w */ 0xe5000000 /* str */, 924 /* s u b */ 0xe5400000 /* strb */, 925 /* s u h */ 0xe10000b0 /* strh */, 926 /* s u N */ 0x00000000 /* not allowed */, 927 /* s s w */ 0xe5000000 /* str */, 928 /* s s b */ 0xe5400000 /* strb */, 929 /* s s h */ 0xe10000b0 /* strh */, 930 /* s s N */ 0x00000000 /* not allowed */, 931 932 /* l u w */ 0xe5100000 /* ldr */, 933 /* l u b */ 0xe5500000 /* ldrb */, 934 /* l u h */ 0xe11000b0 /* ldrh */, 935 /* l u N */ 0x00000000 /* not allowed */, 936 /* l s w */ 0xe5100000 /* ldr */, 937 /* l s b */ 0xe11000d0 /* ldrsb */, 938 /* l s h */ 0xe11000f0 /* ldrsh */, 939 /* l s N */ 0x00000000 /* not allowed */, 940 }; 941 942 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \ 943 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2)) 944 /* Normal ldr/str instruction. 945 Type2: ldrsb, ldrh, ldrsh */ 946 #define IS_TYPE1_TRANSFER(type) \ 947 (data_transfer_insts[(type) >> 4] & 0x04000000) 948 #define TYPE2_TRANSFER_IMM(imm) \ 949 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22)) 950 951 /* flags: */ 952 /* Arguments are swapped. */ 953 #define ARGS_SWAPPED 0x01 954 /* Inverted immediate. */ 955 #define INV_IMM 0x02 956 /* Source and destination is register. */ 957 #define REG_DEST 0x04 958 #define REG_SOURCE 0x08 959 /* One instruction is enough. */ 960 #define FAST_DEST 0x10 961 /* Multiple instructions are required. */ 962 #define SLOW_DEST 0x20 963 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */ 964 #define SET_FLAGS (1 << 20) 965 /* dst: reg 966 src1: reg 967 src2: reg or imm (if allowed) 968 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */ 969 #define SRC2_IMM (1 << 25) 970 971 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \ 972 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2))) 973 974 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \ 975 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2)) 976 977 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \ 978 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \ 979 if (compiler->shift_imm != 0x20) { \ 980 SLJIT_ASSERT(src1 == TMP_REG1); \ 981 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \ 982 if (compiler->shift_imm != 0) \ 983 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \ 984 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, reg_map[src2])); \ 985 } \ 986 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1]))); 987 988 static SLJIT_INLINE sljit_s32 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, 989 sljit_s32 dst, sljit_s32 src1, sljit_s32 src2) 990 { 991 sljit_sw mul_inst; 992 993 switch (GET_OPCODE(op)) { 994 case SLJIT_MOV: 995 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 996 if (dst != src2) { 997 if (src2 & SRC2_IMM) { 998 if (flags & INV_IMM) 999 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1000 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1001 } 1002 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]); 1003 } 1004 return SLJIT_SUCCESS; 1005 1006 case SLJIT_MOV_U8: 1007 case SLJIT_MOV_S8: 1008 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 1009 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) { 1010 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1011 if (op == SLJIT_MOV_U8) 1012 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff)); 1013 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2]))); 1014 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_U8 ? 0x20 : 0x40) | reg_map[dst])); 1015 #else 1016 return push_inst(compiler, (op == SLJIT_MOV_U8 ? UXTB : SXTB) | RD(dst) | RM(src2)); 1017 #endif 1018 } 1019 else if (dst != src2) { 1020 SLJIT_ASSERT(src2 & SRC2_IMM); 1021 if (flags & INV_IMM) 1022 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1023 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1024 } 1025 return SLJIT_SUCCESS; 1026 1027 case SLJIT_MOV_U16: 1028 case SLJIT_MOV_S16: 1029 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED)); 1030 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) { 1031 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1032 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2]))); 1033 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_U16 ? 0x20 : 0x40) | reg_map[dst])); 1034 #else 1035 return push_inst(compiler, (op == SLJIT_MOV_U16 ? UXTH : SXTH) | RD(dst) | RM(src2)); 1036 #endif 1037 } 1038 else if (dst != src2) { 1039 SLJIT_ASSERT(src2 & SRC2_IMM); 1040 if (flags & INV_IMM) 1041 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1042 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1043 } 1044 return SLJIT_SUCCESS; 1045 1046 case SLJIT_NOT: 1047 if (src2 & SRC2_IMM) { 1048 if (flags & INV_IMM) 1049 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2); 1050 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2); 1051 } 1052 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2)); 1053 1054 case SLJIT_CLZ: 1055 SLJIT_ASSERT(!(flags & INV_IMM)); 1056 SLJIT_ASSERT(!(src2 & SRC2_IMM)); 1057 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2))); 1058 if (flags & SET_FLAGS) 1059 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM); 1060 return SLJIT_SUCCESS; 1061 1062 case SLJIT_ADD: 1063 SLJIT_ASSERT(!(flags & INV_IMM)); 1064 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP); 1065 1066 case SLJIT_ADDC: 1067 SLJIT_ASSERT(!(flags & INV_IMM)); 1068 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP); 1069 1070 case SLJIT_SUB: 1071 SLJIT_ASSERT(!(flags & INV_IMM)); 1072 if (!(flags & ARGS_SWAPPED)) 1073 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP); 1074 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP); 1075 1076 case SLJIT_SUBC: 1077 SLJIT_ASSERT(!(flags & INV_IMM)); 1078 if (!(flags & ARGS_SWAPPED)) 1079 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP); 1080 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP); 1081 1082 case SLJIT_MUL: 1083 SLJIT_ASSERT(!(flags & INV_IMM)); 1084 SLJIT_ASSERT(!(src2 & SRC2_IMM)); 1085 if (SLJIT_UNLIKELY(op & SLJIT_SET_O)) 1086 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12); 1087 else 1088 mul_inst = MUL | (reg_map[dst] << 16); 1089 1090 if (dst != src2) 1091 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2])); 1092 else if (dst != src1) 1093 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1])); 1094 else { 1095 /* Rm and Rd must not be the same register. */ 1096 SLJIT_ASSERT(dst != TMP_REG1); 1097 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2]))); 1098 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1])); 1099 } 1100 1101 if (!(op & SLJIT_SET_O)) 1102 return SLJIT_SUCCESS; 1103 1104 /* We need to use TMP_REG3. */ 1105 compiler->cache_arg = 0; 1106 compiler->cache_argw = 0; 1107 /* cmp TMP_REG2, dst asr #31. */ 1108 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0)); 1109 1110 case SLJIT_AND: 1111 if (!(flags & INV_IMM)) 1112 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP); 1113 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP); 1114 1115 case SLJIT_OR: 1116 SLJIT_ASSERT(!(flags & INV_IMM)); 1117 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP); 1118 1119 case SLJIT_XOR: 1120 SLJIT_ASSERT(!(flags & INV_IMM)); 1121 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP); 1122 1123 case SLJIT_SHL: 1124 EMIT_SHIFT_INS_AND_RETURN(0); 1125 1126 case SLJIT_LSHR: 1127 EMIT_SHIFT_INS_AND_RETURN(1); 1128 1129 case SLJIT_ASHR: 1130 EMIT_SHIFT_INS_AND_RETURN(2); 1131 } 1132 SLJIT_ASSERT_STOP(); 1133 return SLJIT_SUCCESS; 1134 } 1135 1136 #undef EMIT_DATA_PROCESS_INS_AND_RETURN 1137 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN 1138 #undef EMIT_SHIFT_INS_AND_RETURN 1139 1140 /* Tests whether the immediate can be stored in the 12 bit imm field. 1141 Returns with 0 if not possible. */ 1142 static sljit_uw get_imm(sljit_uw imm) 1143 { 1144 sljit_s32 rol; 1145 1146 if (imm <= 0xff) 1147 return SRC2_IMM | imm; 1148 1149 if (!(imm & 0xff000000)) { 1150 imm <<= 8; 1151 rol = 8; 1152 } 1153 else { 1154 imm = (imm << 24) | (imm >> 8); 1155 rol = 0; 1156 } 1157 1158 if (!(imm & 0xff000000)) { 1159 imm <<= 8; 1160 rol += 4; 1161 } 1162 1163 if (!(imm & 0xf0000000)) { 1164 imm <<= 4; 1165 rol += 2; 1166 } 1167 1168 if (!(imm & 0xc0000000)) { 1169 imm <<= 2; 1170 rol += 1; 1171 } 1172 1173 if (!(imm & 0x00ffffff)) 1174 return SRC2_IMM | (imm >> 24) | (rol << 8); 1175 else 1176 return 0; 1177 } 1178 1179 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1180 static sljit_s32 generate_int(struct sljit_compiler *compiler, sljit_s32 reg, sljit_uw imm, sljit_s32 positive) 1181 { 1182 sljit_uw mask; 1183 sljit_uw imm1; 1184 sljit_uw imm2; 1185 sljit_s32 rol; 1186 1187 /* Step1: Search a zero byte (8 continous zero bit). */ 1188 mask = 0xff000000; 1189 rol = 8; 1190 while(1) { 1191 if (!(imm & mask)) { 1192 /* Rol imm by rol. */ 1193 imm = (imm << rol) | (imm >> (32 - rol)); 1194 /* Calculate arm rol. */ 1195 rol = 4 + (rol >> 1); 1196 break; 1197 } 1198 rol += 2; 1199 mask >>= 2; 1200 if (mask & 0x3) { 1201 /* rol by 8. */ 1202 imm = (imm << 8) | (imm >> 24); 1203 mask = 0xff00; 1204 rol = 24; 1205 while (1) { 1206 if (!(imm & mask)) { 1207 /* Rol imm by rol. */ 1208 imm = (imm << rol) | (imm >> (32 - rol)); 1209 /* Calculate arm rol. */ 1210 rol = (rol >> 1) - 8; 1211 break; 1212 } 1213 rol += 2; 1214 mask >>= 2; 1215 if (mask & 0x3) 1216 return 0; 1217 } 1218 break; 1219 } 1220 } 1221 1222 /* The low 8 bit must be zero. */ 1223 SLJIT_ASSERT(!(imm & 0xff)); 1224 1225 if (!(imm & 0xff000000)) { 1226 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8); 1227 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8); 1228 } 1229 else if (imm & 0xc0000000) { 1230 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); 1231 imm <<= 8; 1232 rol += 4; 1233 1234 if (!(imm & 0xff000000)) { 1235 imm <<= 8; 1236 rol += 4; 1237 } 1238 1239 if (!(imm & 0xf0000000)) { 1240 imm <<= 4; 1241 rol += 2; 1242 } 1243 1244 if (!(imm & 0xc0000000)) { 1245 imm <<= 2; 1246 rol += 1; 1247 } 1248 1249 if (!(imm & 0x00ffffff)) 1250 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8); 1251 else 1252 return 0; 1253 } 1254 else { 1255 if (!(imm & 0xf0000000)) { 1256 imm <<= 4; 1257 rol += 2; 1258 } 1259 1260 if (!(imm & 0xc0000000)) { 1261 imm <<= 2; 1262 rol += 1; 1263 } 1264 1265 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); 1266 imm <<= 8; 1267 rol += 4; 1268 1269 if (!(imm & 0xf0000000)) { 1270 imm <<= 4; 1271 rol += 2; 1272 } 1273 1274 if (!(imm & 0xc0000000)) { 1275 imm <<= 2; 1276 rol += 1; 1277 } 1278 1279 if (!(imm & 0x00ffffff)) 1280 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8); 1281 else 1282 return 0; 1283 } 1284 1285 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1))); 1286 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2))); 1287 return 1; 1288 } 1289 #endif 1290 1291 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_uw imm) 1292 { 1293 sljit_uw tmp; 1294 1295 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 1296 if (!(imm & ~0xffff)) 1297 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)); 1298 #endif 1299 1300 /* Create imm by 1 inst. */ 1301 tmp = get_imm(imm); 1302 if (tmp) 1303 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp)); 1304 1305 tmp = get_imm(~imm); 1306 if (tmp) 1307 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp)); 1308 1309 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 1310 /* Create imm by 2 inst. */ 1311 FAIL_IF(generate_int(compiler, reg, imm, 1)); 1312 FAIL_IF(generate_int(compiler, reg, ~imm, 0)); 1313 1314 /* Load integer. */ 1315 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm); 1316 #else 1317 return emit_imm(compiler, reg, imm); 1318 #endif 1319 } 1320 1321 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */ 1322 static sljit_s32 emit_set_delta(struct sljit_compiler *compiler, sljit_s32 dst, sljit_s32 reg, sljit_sw value) 1323 { 1324 if (value >= 0) { 1325 value = get_imm(value); 1326 if (value) 1327 return push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, dst, reg, value)); 1328 } 1329 else { 1330 value = get_imm(-value); 1331 if (value) 1332 return push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, dst, reg, value)); 1333 } 1334 return SLJIT_ERR_UNSUPPORTED; 1335 } 1336 1337 /* Can perform an operation using at most 1 instruction. */ 1338 static sljit_s32 getput_arg_fast(struct sljit_compiler *compiler, sljit_s32 inp_flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw) 1339 { 1340 sljit_uw imm; 1341 1342 if (arg & SLJIT_IMM) { 1343 imm = get_imm(argw); 1344 if (imm) { 1345 if (inp_flags & ARG_TEST) 1346 return 1; 1347 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm))); 1348 return -1; 1349 } 1350 imm = get_imm(~argw); 1351 if (imm) { 1352 if (inp_flags & ARG_TEST) 1353 return 1; 1354 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm))); 1355 return -1; 1356 } 1357 return 0; 1358 } 1359 1360 SLJIT_ASSERT(arg & SLJIT_MEM); 1361 1362 /* Fast loads/stores. */ 1363 if (!(arg & REG_MASK)) 1364 return 0; 1365 1366 if (arg & OFFS_REG_MASK) { 1367 if ((argw & 0x3) != 0 && !IS_TYPE1_TRANSFER(inp_flags)) 1368 return 0; 1369 1370 if (inp_flags & ARG_TEST) 1371 return 1; 1372 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, 1373 RM(OFFS_REG(arg)) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7)))); 1374 return -1; 1375 } 1376 1377 if (IS_TYPE1_TRANSFER(inp_flags)) { 1378 if (argw >= 0 && argw <= 0xfff) { 1379 if (inp_flags & ARG_TEST) 1380 return 1; 1381 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, argw))); 1382 return -1; 1383 } 1384 if (argw < 0 && argw >= -0xfff) { 1385 if (inp_flags & ARG_TEST) 1386 return 1; 1387 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, -argw))); 1388 return -1; 1389 } 1390 } 1391 else { 1392 if (argw >= 0 && argw <= 0xff) { 1393 if (inp_flags & ARG_TEST) 1394 return 1; 1395 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)))); 1396 return -1; 1397 } 1398 if (argw < 0 && argw >= -0xff) { 1399 if (inp_flags & ARG_TEST) 1400 return 1; 1401 argw = -argw; 1402 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)))); 1403 return -1; 1404 } 1405 } 1406 1407 return 0; 1408 } 1409 1410 /* See getput_arg below. 1411 Note: can_cache is called only for binary operators. Those 1412 operators always uses word arguments without write back. */ 1413 static sljit_s32 can_cache(sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw) 1414 { 1415 /* Immediate caching is not supported as it would be an operation on constant arguments. */ 1416 if (arg & SLJIT_IMM) 1417 return 0; 1418 1419 /* Always a simple operation. */ 1420 if (arg & OFFS_REG_MASK) 1421 return 0; 1422 1423 if (!(arg & REG_MASK)) { 1424 /* Immediate access. */ 1425 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff)) 1426 return 1; 1427 return 0; 1428 } 1429 1430 if (argw <= 0xfffff && argw >= -0xfffff) 1431 return 0; 1432 1433 if (argw == next_argw && (next_arg & SLJIT_MEM)) 1434 return 1; 1435 1436 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff)) 1437 return 1; 1438 1439 return 0; 1440 } 1441 1442 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \ 1443 if (max_delta & 0xf00) \ 1444 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \ 1445 else \ 1446 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm)))); 1447 1448 #define TEST_WRITE_BACK() \ 1449 if (inp_flags & WRITE_BACK) { \ 1450 tmp_r = arg & REG_MASK; \ 1451 if (reg == tmp_r) { \ 1452 /* This can only happen for stores */ \ 1453 /* since ldr reg, [reg, ...]! has no meaning */ \ 1454 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \ 1455 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg)))); \ 1456 reg = TMP_REG3; \ 1457 } \ 1458 } 1459 1460 /* Emit the necessary instructions. See can_cache above. */ 1461 static sljit_s32 getput_arg(struct sljit_compiler *compiler, sljit_s32 inp_flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw) 1462 { 1463 sljit_s32 tmp_r; 1464 sljit_sw max_delta; 1465 sljit_sw sign; 1466 sljit_uw imm; 1467 1468 if (arg & SLJIT_IMM) { 1469 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1470 return load_immediate(compiler, reg, argw); 1471 } 1472 1473 SLJIT_ASSERT(arg & SLJIT_MEM); 1474 1475 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3; 1476 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff; 1477 1478 if ((arg & REG_MASK) == SLJIT_UNUSED) { 1479 /* Write back is not used. */ 1480 imm = (sljit_uw)(argw - compiler->cache_argw); 1481 if ((compiler->cache_arg & SLJIT_IMM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1482 if (imm <= (sljit_uw)max_delta) { 1483 sign = 1; 1484 argw = argw - compiler->cache_argw; 1485 } 1486 else { 1487 sign = 0; 1488 argw = compiler->cache_argw - argw; 1489 } 1490 1491 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw); 1492 return SLJIT_SUCCESS; 1493 } 1494 1495 /* With write back, we can create some sophisticated loads, but 1496 it is hard to decide whether we should convert downward (0s) or upward (1s). */ 1497 imm = (sljit_uw)(argw - next_argw); 1498 if ((next_arg & SLJIT_MEM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1499 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1500 1501 compiler->cache_arg = SLJIT_IMM; 1502 compiler->cache_argw = argw; 1503 tmp_r = TMP_REG3; 1504 } 1505 1506 FAIL_IF(load_immediate(compiler, tmp_r, argw)); 1507 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0); 1508 return SLJIT_SUCCESS; 1509 } 1510 1511 if (arg & OFFS_REG_MASK) { 1512 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00)); 1513 if (inp_flags & WRITE_BACK) 1514 tmp_r = arg & REG_MASK; 1515 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)))); 1516 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0))); 1517 } 1518 1519 imm = (sljit_uw)(argw - compiler->cache_argw); 1520 if (compiler->cache_arg == arg && imm <= (sljit_uw)max_delta) { 1521 SLJIT_ASSERT(!(inp_flags & WRITE_BACK)); 1522 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, imm); 1523 return SLJIT_SUCCESS; 1524 } 1525 if (compiler->cache_arg == arg && imm >= (sljit_uw)-max_delta) { 1526 SLJIT_ASSERT(!(inp_flags & WRITE_BACK)); 1527 imm = (sljit_uw)-(sljit_sw)imm; 1528 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, imm); 1529 return SLJIT_SUCCESS; 1530 } 1531 1532 imm = get_imm(argw & ~max_delta); 1533 if (imm) { 1534 TEST_WRITE_BACK(); 1535 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, imm))); 1536 GETPUT_ARG_DATA_TRANSFER(1, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta); 1537 return SLJIT_SUCCESS; 1538 } 1539 1540 imm = get_imm(-argw & ~max_delta); 1541 if (imm) { 1542 argw = -argw; 1543 TEST_WRITE_BACK(); 1544 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, tmp_r, arg & REG_MASK, imm))); 1545 GETPUT_ARG_DATA_TRANSFER(0, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta); 1546 return SLJIT_SUCCESS; 1547 } 1548 1549 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) { 1550 TEST_WRITE_BACK(); 1551 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1552 } 1553 1554 if (argw == next_argw && (next_arg & SLJIT_MEM)) { 1555 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1556 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 1557 1558 compiler->cache_arg = SLJIT_IMM; 1559 compiler->cache_argw = argw; 1560 1561 TEST_WRITE_BACK(); 1562 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1563 } 1564 1565 imm = (sljit_uw)(argw - next_argw); 1566 if (arg == next_arg && !(inp_flags & WRITE_BACK) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) { 1567 SLJIT_ASSERT(inp_flags & LOAD_DATA); 1568 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 1569 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & REG_MASK]))); 1570 1571 compiler->cache_arg = arg; 1572 compiler->cache_argw = argw; 1573 1574 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0); 1575 return SLJIT_SUCCESS; 1576 } 1577 1578 if ((arg & REG_MASK) == tmp_r) { 1579 compiler->cache_arg = SLJIT_IMM; 1580 compiler->cache_argw = argw; 1581 tmp_r = TMP_REG3; 1582 } 1583 1584 FAIL_IF(load_immediate(compiler, tmp_r, argw)); 1585 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0))); 1586 } 1587 1588 static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw) 1589 { 1590 if (getput_arg_fast(compiler, flags, reg, arg, argw)) 1591 return compiler->error; 1592 compiler->cache_arg = 0; 1593 compiler->cache_argw = 0; 1594 return getput_arg(compiler, flags, reg, arg, argw, 0, 0); 1595 } 1596 1597 static SLJIT_INLINE sljit_s32 emit_op_mem2(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg1, sljit_sw arg1w, sljit_s32 arg2, sljit_sw arg2w) 1598 { 1599 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w)) 1600 return compiler->error; 1601 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w); 1602 } 1603 1604 static sljit_s32 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 inp_flags, 1605 sljit_s32 dst, sljit_sw dstw, 1606 sljit_s32 src1, sljit_sw src1w, 1607 sljit_s32 src2, sljit_sw src2w) 1608 { 1609 /* arg1 goes to TMP_REG1 or src reg 1610 arg2 goes to TMP_REG2, imm or src reg 1611 TMP_REG3 can be used for caching 1612 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */ 1613 1614 /* We prefers register and simple consts. */ 1615 sljit_s32 dst_r; 1616 sljit_s32 src1_r; 1617 sljit_s32 src2_r = 0; 1618 sljit_s32 sugg_src2_r = TMP_REG2; 1619 sljit_s32 flags = GET_FLAGS(op) ? SET_FLAGS : 0; 1620 1621 compiler->cache_arg = 0; 1622 compiler->cache_argw = 0; 1623 1624 /* Destination check. */ 1625 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) { 1626 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_S32 && !(src2 & SLJIT_MEM)) 1627 return SLJIT_SUCCESS; 1628 dst_r = TMP_REG2; 1629 } 1630 else if (FAST_IS_REG(dst)) { 1631 dst_r = dst; 1632 flags |= REG_DEST; 1633 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_S32) 1634 sugg_src2_r = dst_r; 1635 } 1636 else { 1637 SLJIT_ASSERT(dst & SLJIT_MEM); 1638 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) { 1639 flags |= FAST_DEST; 1640 dst_r = TMP_REG2; 1641 } 1642 else { 1643 flags |= SLOW_DEST; 1644 dst_r = 0; 1645 } 1646 } 1647 1648 /* Source 1. */ 1649 if (FAST_IS_REG(src1)) 1650 src1_r = src1; 1651 else if (FAST_IS_REG(src2)) { 1652 flags |= ARGS_SWAPPED; 1653 src1_r = src2; 1654 src2 = src1; 1655 src2w = src1w; 1656 } 1657 else do { /* do { } while(0) is used because of breaks. */ 1658 src1_r = 0; 1659 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) { 1660 /* The second check will generate a hit. */ 1661 src2_r = get_imm(src1w); 1662 if (src2_r) { 1663 flags |= ARGS_SWAPPED; 1664 src1 = src2; 1665 src1w = src2w; 1666 break; 1667 } 1668 if (inp_flags & ALLOW_INV_IMM) { 1669 src2_r = get_imm(~src1w); 1670 if (src2_r) { 1671 flags |= ARGS_SWAPPED | INV_IMM; 1672 src1 = src2; 1673 src1w = src2w; 1674 break; 1675 } 1676 } 1677 if (GET_OPCODE(op) == SLJIT_ADD) { 1678 src2_r = get_imm(-src1w); 1679 if (src2_r) { 1680 /* Note: ARGS_SWAPPED is intentionally not applied! */ 1681 src1 = src2; 1682 src1w = src2w; 1683 op = SLJIT_SUB | GET_ALL_FLAGS(op); 1684 break; 1685 } 1686 } 1687 } 1688 1689 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) { 1690 FAIL_IF(compiler->error); 1691 src1_r = TMP_REG1; 1692 } 1693 } while (0); 1694 1695 /* Source 2. */ 1696 if (src2_r == 0) { 1697 if (FAST_IS_REG(src2)) { 1698 src2_r = src2; 1699 flags |= REG_SOURCE; 1700 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_S32) 1701 dst_r = src2_r; 1702 } 1703 else do { /* do { } while(0) is used because of breaks. */ 1704 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) { 1705 src2_r = get_imm(src2w); 1706 if (src2_r) 1707 break; 1708 if (inp_flags & ALLOW_INV_IMM) { 1709 src2_r = get_imm(~src2w); 1710 if (src2_r) { 1711 flags |= INV_IMM; 1712 break; 1713 } 1714 } 1715 if (GET_OPCODE(op) == SLJIT_ADD) { 1716 src2_r = get_imm(-src2w); 1717 if (src2_r) { 1718 op = SLJIT_SUB | GET_ALL_FLAGS(op); 1719 flags &= ~ARGS_SWAPPED; 1720 break; 1721 } 1722 } 1723 if (GET_OPCODE(op) == SLJIT_SUB && !(flags & ARGS_SWAPPED)) { 1724 src2_r = get_imm(-src2w); 1725 if (src2_r) { 1726 op = SLJIT_ADD | GET_ALL_FLAGS(op); 1727 flags &= ~ARGS_SWAPPED; 1728 break; 1729 } 1730 } 1731 } 1732 1733 /* src2_r is 0. */ 1734 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) { 1735 FAIL_IF(compiler->error); 1736 src2_r = sugg_src2_r; 1737 } 1738 } while (0); 1739 } 1740 1741 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero. 1742 If they are zero, they must not be registers. */ 1743 if (src1_r == 0 && src2_r == 0 && dst_r == 0) { 1744 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) { 1745 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); 1746 flags |= ARGS_SWAPPED; 1747 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w)); 1748 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw)); 1749 } 1750 else { 1751 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w)); 1752 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw)); 1753 } 1754 src1_r = TMP_REG1; 1755 src2_r = TMP_REG2; 1756 } 1757 else if (src1_r == 0 && src2_r == 0) { 1758 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w)); 1759 src1_r = TMP_REG1; 1760 } 1761 else if (src1_r == 0 && dst_r == 0) { 1762 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw)); 1763 src1_r = TMP_REG1; 1764 } 1765 else if (src2_r == 0 && dst_r == 0) { 1766 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw)); 1767 src2_r = sugg_src2_r; 1768 } 1769 1770 if (dst_r == 0) 1771 dst_r = TMP_REG2; 1772 1773 if (src1_r == 0) { 1774 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0)); 1775 src1_r = TMP_REG1; 1776 } 1777 1778 if (src2_r == 0) { 1779 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0)); 1780 src2_r = sugg_src2_r; 1781 } 1782 1783 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r)); 1784 1785 if (flags & (FAST_DEST | SLOW_DEST)) { 1786 if (flags & FAST_DEST) 1787 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw)); 1788 else 1789 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0)); 1790 } 1791 return SLJIT_SUCCESS; 1792 } 1793 1794 #ifdef __cplusplus 1795 extern "C" { 1796 #endif 1797 1798 #if defined(__GNUC__) 1799 extern unsigned int __aeabi_uidivmod(unsigned int numerator, unsigned int denominator); 1800 extern int __aeabi_idivmod(int numerator, int denominator); 1801 #else 1802 #error "Software divmod functions are needed" 1803 #endif 1804 1805 #ifdef __cplusplus 1806 } 1807 #endif 1808 1809 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op) 1810 { 1811 CHECK_ERROR(); 1812 CHECK(check_sljit_emit_op0(compiler, op)); 1813 1814 op = GET_OPCODE(op); 1815 switch (op) { 1816 case SLJIT_BREAKPOINT: 1817 FAIL_IF(push_inst(compiler, BKPT)); 1818 break; 1819 case SLJIT_NOP: 1820 FAIL_IF(push_inst(compiler, NOP)); 1821 break; 1822 case SLJIT_LMUL_UW: 1823 case SLJIT_LMUL_SW: 1824 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) 1825 return push_inst(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL) 1826 | (reg_map[SLJIT_R1] << 16) 1827 | (reg_map[SLJIT_R0] << 12) 1828 | (reg_map[SLJIT_R0] << 8) 1829 | reg_map[SLJIT_R1]); 1830 #else 1831 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, RM(SLJIT_R1)))); 1832 return push_inst(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL) 1833 | (reg_map[SLJIT_R1] << 16) 1834 | (reg_map[SLJIT_R0] << 12) 1835 | (reg_map[SLJIT_R0] << 8) 1836 | reg_map[TMP_REG1]); 1837 #endif 1838 case SLJIT_DIVMOD_UW: 1839 case SLJIT_DIVMOD_SW: 1840 case SLJIT_DIV_UW: 1841 case SLJIT_DIV_SW: 1842 SLJIT_COMPILE_ASSERT((SLJIT_DIVMOD_UW & 0x2) == 0 && SLJIT_DIV_UW - 0x2 == SLJIT_DIVMOD_UW, bad_div_opcode_assignments); 1843 SLJIT_COMPILE_ASSERT(reg_map[2] == 1 && reg_map[3] == 2, bad_register_mapping); 1844 1845 if ((op >= SLJIT_DIV_UW) && (compiler->scratches >= 3)) { 1846 FAIL_IF(push_inst(compiler, 0xe52d2008 /* str r2, [sp, #-8]! */)); 1847 FAIL_IF(push_inst(compiler, 0xe58d1004 /* str r1, [sp, #4] */)); 1848 } 1849 else if ((op >= SLJIT_DIV_UW) || (compiler->scratches >= 3)) 1850 FAIL_IF(push_inst(compiler, 0xe52d0008 | (op >= SLJIT_DIV_UW ? 0x1000 : 0x2000) /* str r1/r2, [sp, #-8]! */)); 1851 1852 #if defined(__GNUC__) 1853 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM, 1854 ((op | 0x2) == SLJIT_DIV_UW ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod)))); 1855 #else 1856 #error "Software divmod functions are needed" 1857 #endif 1858 1859 if ((op >= SLJIT_DIV_UW) && (compiler->scratches >= 3)) { 1860 FAIL_IF(push_inst(compiler, 0xe59d1004 /* ldr r1, [sp, #4] */)); 1861 FAIL_IF(push_inst(compiler, 0xe49d2008 /* ldr r2, [sp], #8 */)); 1862 } 1863 else if ((op >= SLJIT_DIV_UW) || (compiler->scratches >= 3)) 1864 return push_inst(compiler, 0xe49d0008 | (op >= SLJIT_DIV_UW ? 0x1000 : 0x2000) /* ldr r1/r2, [sp], #8 */); 1865 return SLJIT_SUCCESS; 1866 } 1867 1868 return SLJIT_SUCCESS; 1869 } 1870 1871 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op, 1872 sljit_s32 dst, sljit_sw dstw, 1873 sljit_s32 src, sljit_sw srcw) 1874 { 1875 CHECK_ERROR(); 1876 CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw)); 1877 ADJUST_LOCAL_OFFSET(dst, dstw); 1878 ADJUST_LOCAL_OFFSET(src, srcw); 1879 1880 switch (GET_OPCODE(op)) { 1881 case SLJIT_MOV: 1882 case SLJIT_MOV_U32: 1883 case SLJIT_MOV_S32: 1884 case SLJIT_MOV_P: 1885 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw); 1886 1887 case SLJIT_MOV_U8: 1888 return emit_op(compiler, SLJIT_MOV_U8, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u8)srcw : srcw); 1889 1890 case SLJIT_MOV_S8: 1891 return emit_op(compiler, SLJIT_MOV_S8, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s8)srcw : srcw); 1892 1893 case SLJIT_MOV_U16: 1894 return emit_op(compiler, SLJIT_MOV_U16, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u16)srcw : srcw); 1895 1896 case SLJIT_MOV_S16: 1897 return emit_op(compiler, SLJIT_MOV_S16, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s16)srcw : srcw); 1898 1899 case SLJIT_MOVU: 1900 case SLJIT_MOVU_U32: 1901 case SLJIT_MOVU_S32: 1902 case SLJIT_MOVU_P: 1903 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw); 1904 1905 case SLJIT_MOVU_U8: 1906 return emit_op(compiler, SLJIT_MOV_U8, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u8)srcw : srcw); 1907 1908 case SLJIT_MOVU_S8: 1909 return emit_op(compiler, SLJIT_MOV_S8, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s8)srcw : srcw); 1910 1911 case SLJIT_MOVU_U16: 1912 return emit_op(compiler, SLJIT_MOV_U16, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u16)srcw : srcw); 1913 1914 case SLJIT_MOVU_S16: 1915 return emit_op(compiler, SLJIT_MOV_S16, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s16)srcw : srcw); 1916 1917 case SLJIT_NOT: 1918 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw); 1919 1920 case SLJIT_NEG: 1921 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \ 1922 || (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) 1923 compiler->skip_checks = 1; 1924 #endif 1925 return sljit_emit_op2(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw); 1926 1927 case SLJIT_CLZ: 1928 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw); 1929 } 1930 1931 return SLJIT_SUCCESS; 1932 } 1933 1934 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, 1935 sljit_s32 dst, sljit_sw dstw, 1936 sljit_s32 src1, sljit_sw src1w, 1937 sljit_s32 src2, sljit_sw src2w) 1938 { 1939 CHECK_ERROR(); 1940 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w)); 1941 ADJUST_LOCAL_OFFSET(dst, dstw); 1942 ADJUST_LOCAL_OFFSET(src1, src1w); 1943 ADJUST_LOCAL_OFFSET(src2, src2w); 1944 1945 switch (GET_OPCODE(op)) { 1946 case SLJIT_ADD: 1947 case SLJIT_ADDC: 1948 case SLJIT_SUB: 1949 case SLJIT_SUBC: 1950 case SLJIT_OR: 1951 case SLJIT_XOR: 1952 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w); 1953 1954 case SLJIT_MUL: 1955 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w); 1956 1957 case SLJIT_AND: 1958 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w); 1959 1960 case SLJIT_SHL: 1961 case SLJIT_LSHR: 1962 case SLJIT_ASHR: 1963 if (src2 & SLJIT_IMM) { 1964 compiler->shift_imm = src2w & 0x1f; 1965 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w); 1966 } 1967 else { 1968 compiler->shift_imm = 0x20; 1969 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w); 1970 } 1971 } 1972 1973 return SLJIT_SUCCESS; 1974 } 1975 1976 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg) 1977 { 1978 CHECK_REG_INDEX(check_sljit_get_register_index(reg)); 1979 return reg_map[reg]; 1980 } 1981 1982 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg) 1983 { 1984 CHECK_REG_INDEX(check_sljit_get_float_register_index(reg)); 1985 return reg << 1; 1986 } 1987 1988 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler, 1989 void *instruction, sljit_s32 size) 1990 { 1991 CHECK_ERROR(); 1992 CHECK(check_sljit_emit_op_custom(compiler, instruction, size)); 1993 1994 return push_inst(compiler, *(sljit_uw*)instruction); 1995 } 1996 1997 /* --------------------------------------------------------------------- */ 1998 /* Floating point operators */ 1999 /* --------------------------------------------------------------------- */ 2000 2001 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2002 2003 /* 0 - no fpu 2004 1 - vfp */ 2005 static sljit_s32 arm_fpu_type = -1; 2006 2007 static void init_compiler(void) 2008 { 2009 if (arm_fpu_type != -1) 2010 return; 2011 2012 /* TODO: Only the OS can help to determine the correct fpu type. */ 2013 arm_fpu_type = 1; 2014 } 2015 2016 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void) 2017 { 2018 #ifdef SLJIT_IS_FPU_AVAILABLE 2019 return SLJIT_IS_FPU_AVAILABLE; 2020 #else 2021 if (arm_fpu_type == -1) 2022 init_compiler(); 2023 return arm_fpu_type; 2024 #endif 2025 } 2026 2027 #else 2028 2029 #define arm_fpu_type 1 2030 2031 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void) 2032 { 2033 /* Always available. */ 2034 return 1; 2035 } 2036 2037 #endif 2038 2039 #define FPU_LOAD (1 << 20) 2040 #define EMIT_FPU_DATA_TRANSFER(inst, add, base, freg, offs) \ 2041 ((inst) | ((add) << 23) | (reg_map[base] << 16) | (freg << 12) | (offs)) 2042 #define EMIT_FPU_OPERATION(opcode, mode, dst, src1, src2) \ 2043 ((opcode) | (mode) | ((dst) << 12) | (src1) | ((src2) << 16)) 2044 2045 static sljit_s32 emit_fop_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw) 2046 { 2047 sljit_sw tmp; 2048 sljit_uw imm; 2049 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_F32_OP | FPU_LOAD)); 2050 SLJIT_ASSERT(arg & SLJIT_MEM); 2051 2052 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) { 2053 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)))); 2054 arg = SLJIT_MEM | TMP_REG1; 2055 argw = 0; 2056 } 2057 2058 /* Fast loads and stores. */ 2059 if ((arg & REG_MASK)) { 2060 if (!(argw & ~0x3fc)) 2061 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2)); 2062 if (!(-argw & ~0x3fc)) 2063 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2)); 2064 } 2065 2066 if (compiler->cache_arg == arg) { 2067 tmp = argw - compiler->cache_argw; 2068 if (!(tmp & ~0x3fc)) 2069 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, tmp >> 2)); 2070 if (!(-tmp & ~0x3fc)) 2071 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG3, reg, -tmp >> 2)); 2072 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) { 2073 FAIL_IF(compiler->error); 2074 compiler->cache_argw = argw; 2075 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0)); 2076 } 2077 } 2078 2079 if (arg & REG_MASK) { 2080 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) { 2081 FAIL_IF(compiler->error); 2082 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, 0)); 2083 } 2084 imm = get_imm(argw & ~0x3fc); 2085 if (imm) { 2086 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, imm))); 2087 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, (argw & 0x3fc) >> 2)); 2088 } 2089 imm = get_imm(-argw & ~0x3fc); 2090 if (imm) { 2091 argw = -argw; 2092 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & REG_MASK, imm))); 2093 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG1, reg, (argw & 0x3fc) >> 2)); 2094 } 2095 } 2096 2097 compiler->cache_arg = arg; 2098 compiler->cache_argw = argw; 2099 if (arg & REG_MASK) { 2100 FAIL_IF(load_immediate(compiler, TMP_REG1, argw)); 2101 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & REG_MASK, reg_map[TMP_REG1]))); 2102 } 2103 else 2104 FAIL_IF(load_immediate(compiler, TMP_REG3, argw)); 2105 2106 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0)); 2107 } 2108 2109 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler *compiler, sljit_s32 op, 2110 sljit_s32 dst, sljit_sw dstw, 2111 sljit_s32 src, sljit_sw srcw) 2112 { 2113 if (src & SLJIT_MEM) { 2114 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src, srcw)); 2115 src = TMP_FREG1; 2116 } 2117 2118 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_S32_F32, op & SLJIT_F32_OP, TMP_FREG1, src, 0))); 2119 2120 if (dst == SLJIT_UNUSED) 2121 return SLJIT_SUCCESS; 2122 2123 if (FAST_IS_REG(dst)) 2124 return push_inst(compiler, VMOV | (1 << 20) | RD(dst) | (TMP_FREG1 << 16)); 2125 2126 /* Store the integer value from a VFP register. */ 2127 return emit_fop_mem(compiler, 0, TMP_FREG1, dst, dstw); 2128 } 2129 2130 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler *compiler, sljit_s32 op, 2131 sljit_s32 dst, sljit_sw dstw, 2132 sljit_s32 src, sljit_sw srcw) 2133 { 2134 sljit_s32 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1; 2135 2136 if (FAST_IS_REG(src)) 2137 FAIL_IF(push_inst(compiler, VMOV | RD(src) | (TMP_FREG1 << 16))); 2138 else if (src & SLJIT_MEM) { 2139 /* Load the integer value into a VFP register. */ 2140 FAIL_IF(emit_fop_mem(compiler, FPU_LOAD, TMP_FREG1, src, srcw)); 2141 } 2142 else { 2143 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw)); 2144 FAIL_IF(push_inst(compiler, VMOV | RD(TMP_REG1) | (TMP_FREG1 << 16))); 2145 } 2146 2147 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_F32_S32, op & SLJIT_F32_OP, dst_r, TMP_FREG1, 0))); 2148 2149 if (dst & SLJIT_MEM) 2150 return emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw); 2151 return SLJIT_SUCCESS; 2152 } 2153 2154 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, 2155 sljit_s32 src1, sljit_sw src1w, 2156 sljit_s32 src2, sljit_sw src2w) 2157 { 2158 if (src1 & SLJIT_MEM) { 2159 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w)); 2160 src1 = TMP_FREG1; 2161 } 2162 2163 if (src2 & SLJIT_MEM) { 2164 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w)); 2165 src2 = TMP_FREG2; 2166 } 2167 2168 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCMP_F32, op & SLJIT_F32_OP, src1, src2, 0))); 2169 return push_inst(compiler, VMRS); 2170 } 2171 2172 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op, 2173 sljit_s32 dst, sljit_sw dstw, 2174 sljit_s32 src, sljit_sw srcw) 2175 { 2176 sljit_s32 dst_r; 2177 2178 CHECK_ERROR(); 2179 compiler->cache_arg = 0; 2180 compiler->cache_argw = 0; 2181 if (GET_OPCODE(op) != SLJIT_CONV_F64_FROM_F32) 2182 op ^= SLJIT_F32_OP; 2183 2184 SLJIT_COMPILE_ASSERT((SLJIT_F32_OP == 0x100), float_transfer_bit_error); 2185 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw); 2186 2187 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1; 2188 2189 if (src & SLJIT_MEM) { 2190 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, dst_r, src, srcw)); 2191 src = dst_r; 2192 } 2193 2194 switch (GET_OPCODE(op)) { 2195 case SLJIT_MOV_F64: 2196 if (src != dst_r) { 2197 if (dst_r != TMP_FREG1) 2198 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VMOV_F32, op & SLJIT_F32_OP, dst_r, src, 0))); 2199 else 2200 dst_r = src; 2201 } 2202 break; 2203 case SLJIT_NEG_F64: 2204 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VNEG_F32, op & SLJIT_F32_OP, dst_r, src, 0))); 2205 break; 2206 case SLJIT_ABS_F64: 2207 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VABS_F32, op & SLJIT_F32_OP, dst_r, src, 0))); 2208 break; 2209 case SLJIT_CONV_F64_FROM_F32: 2210 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_F64_F32, op & SLJIT_F32_OP, dst_r, src, 0))); 2211 op ^= SLJIT_F32_OP; 2212 break; 2213 } 2214 2215 if (dst & SLJIT_MEM) 2216 return emit_fop_mem(compiler, (op & SLJIT_F32_OP), dst_r, dst, dstw); 2217 return SLJIT_SUCCESS; 2218 } 2219 2220 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, 2221 sljit_s32 dst, sljit_sw dstw, 2222 sljit_s32 src1, sljit_sw src1w, 2223 sljit_s32 src2, sljit_sw src2w) 2224 { 2225 sljit_s32 dst_r; 2226 2227 CHECK_ERROR(); 2228 CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w)); 2229 ADJUST_LOCAL_OFFSET(dst, dstw); 2230 ADJUST_LOCAL_OFFSET(src1, src1w); 2231 ADJUST_LOCAL_OFFSET(src2, src2w); 2232 2233 compiler->cache_arg = 0; 2234 compiler->cache_argw = 0; 2235 op ^= SLJIT_F32_OP; 2236 2237 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1; 2238 2239 if (src2 & SLJIT_MEM) { 2240 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w)); 2241 src2 = TMP_FREG2; 2242 } 2243 2244 if (src1 & SLJIT_MEM) { 2245 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w)); 2246 src1 = TMP_FREG1; 2247 } 2248 2249 switch (GET_OPCODE(op)) { 2250 case SLJIT_ADD_F64: 2251 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VADD_F32, op & SLJIT_F32_OP, dst_r, src2, src1))); 2252 break; 2253 2254 case SLJIT_SUB_F64: 2255 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VSUB_F32, op & SLJIT_F32_OP, dst_r, src2, src1))); 2256 break; 2257 2258 case SLJIT_MUL_F64: 2259 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VMUL_F32, op & SLJIT_F32_OP, dst_r, src2, src1))); 2260 break; 2261 2262 case SLJIT_DIV_F64: 2263 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VDIV_F32, op & SLJIT_F32_OP, dst_r, src2, src1))); 2264 break; 2265 } 2266 2267 if (dst_r == TMP_FREG1) 2268 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw)); 2269 2270 return SLJIT_SUCCESS; 2271 } 2272 2273 #undef FPU_LOAD 2274 #undef EMIT_FPU_DATA_TRANSFER 2275 #undef EMIT_FPU_OPERATION 2276 2277 /* --------------------------------------------------------------------- */ 2278 /* Other instructions */ 2279 /* --------------------------------------------------------------------- */ 2280 2281 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw) 2282 { 2283 CHECK_ERROR(); 2284 CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw)); 2285 ADJUST_LOCAL_OFFSET(dst, dstw); 2286 2287 /* For UNUSED dst. Uncommon, but possible. */ 2288 if (dst == SLJIT_UNUSED) 2289 return SLJIT_SUCCESS; 2290 2291 if (FAST_IS_REG(dst)) 2292 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3))); 2293 2294 /* Memory. */ 2295 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw)) 2296 return compiler->error; 2297 /* TMP_REG3 is used for caching. */ 2298 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3)))); 2299 compiler->cache_arg = 0; 2300 compiler->cache_argw = 0; 2301 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0); 2302 } 2303 2304 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw) 2305 { 2306 CHECK_ERROR(); 2307 CHECK(check_sljit_emit_fast_return(compiler, src, srcw)); 2308 ADJUST_LOCAL_OFFSET(src, srcw); 2309 2310 if (FAST_IS_REG(src)) 2311 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src)))); 2312 else if (src & SLJIT_MEM) { 2313 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw)) 2314 FAIL_IF(compiler->error); 2315 else { 2316 compiler->cache_arg = 0; 2317 compiler->cache_argw = 0; 2318 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0)); 2319 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2)))); 2320 } 2321 } 2322 else if (src & SLJIT_IMM) 2323 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw)); 2324 return push_inst(compiler, BLX | RM(TMP_REG3)); 2325 } 2326 2327 /* --------------------------------------------------------------------- */ 2328 /* Conditional instructions */ 2329 /* --------------------------------------------------------------------- */ 2330 2331 static sljit_uw get_cc(sljit_s32 type) 2332 { 2333 switch (type) { 2334 case SLJIT_EQUAL: 2335 case SLJIT_MUL_NOT_OVERFLOW: 2336 case SLJIT_EQUAL_F64: 2337 return 0x00000000; 2338 2339 case SLJIT_NOT_EQUAL: 2340 case SLJIT_MUL_OVERFLOW: 2341 case SLJIT_NOT_EQUAL_F64: 2342 return 0x10000000; 2343 2344 case SLJIT_LESS: 2345 case SLJIT_LESS_F64: 2346 return 0x30000000; 2347 2348 case SLJIT_GREATER_EQUAL: 2349 case SLJIT_GREATER_EQUAL_F64: 2350 return 0x20000000; 2351 2352 case SLJIT_GREATER: 2353 case SLJIT_GREATER_F64: 2354 return 0x80000000; 2355 2356 case SLJIT_LESS_EQUAL: 2357 case SLJIT_LESS_EQUAL_F64: 2358 return 0x90000000; 2359 2360 case SLJIT_SIG_LESS: 2361 return 0xb0000000; 2362 2363 case SLJIT_SIG_GREATER_EQUAL: 2364 return 0xa0000000; 2365 2366 case SLJIT_SIG_GREATER: 2367 return 0xc0000000; 2368 2369 case SLJIT_SIG_LESS_EQUAL: 2370 return 0xd0000000; 2371 2372 case SLJIT_OVERFLOW: 2373 case SLJIT_UNORDERED_F64: 2374 return 0x60000000; 2375 2376 case SLJIT_NOT_OVERFLOW: 2377 case SLJIT_ORDERED_F64: 2378 return 0x70000000; 2379 2380 default: 2381 SLJIT_ASSERT(type >= SLJIT_JUMP && type <= SLJIT_CALL3); 2382 return 0xe0000000; 2383 } 2384 } 2385 2386 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler) 2387 { 2388 struct sljit_label *label; 2389 2390 CHECK_ERROR_PTR(); 2391 CHECK_PTR(check_sljit_emit_label(compiler)); 2392 2393 if (compiler->last_label && compiler->last_label->size == compiler->size) 2394 return compiler->last_label; 2395 2396 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label)); 2397 PTR_FAIL_IF(!label); 2398 set_label(label, compiler); 2399 return label; 2400 } 2401 2402 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type) 2403 { 2404 struct sljit_jump *jump; 2405 2406 CHECK_ERROR_PTR(); 2407 CHECK_PTR(check_sljit_emit_jump(compiler, type)); 2408 2409 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump)); 2410 PTR_FAIL_IF(!jump); 2411 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP); 2412 type &= 0xff; 2413 2414 /* In ARM, we don't need to touch the arguments. */ 2415 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2416 if (type >= SLJIT_FAST_CALL) 2417 PTR_FAIL_IF(prepare_blx(compiler)); 2418 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, 2419 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0)); 2420 2421 if (jump->flags & SLJIT_REWRITABLE_JUMP) { 2422 jump->addr = compiler->size; 2423 compiler->patches++; 2424 } 2425 2426 if (type >= SLJIT_FAST_CALL) { 2427 jump->flags |= IS_BL; 2428 PTR_FAIL_IF(emit_blx(compiler)); 2429 } 2430 2431 if (!(jump->flags & SLJIT_REWRITABLE_JUMP)) 2432 jump->addr = compiler->size; 2433 #else 2434 if (type >= SLJIT_FAST_CALL) 2435 jump->flags |= IS_BL; 2436 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0)); 2437 PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type))); 2438 jump->addr = compiler->size; 2439 #endif 2440 return jump; 2441 } 2442 2443 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw) 2444 { 2445 struct sljit_jump *jump; 2446 2447 CHECK_ERROR(); 2448 CHECK(check_sljit_emit_ijump(compiler, type, src, srcw)); 2449 ADJUST_LOCAL_OFFSET(src, srcw); 2450 2451 /* In ARM, we don't need to touch the arguments. */ 2452 if (!(src & SLJIT_IMM)) { 2453 if (FAST_IS_REG(src)) 2454 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src)); 2455 2456 SLJIT_ASSERT(src & SLJIT_MEM); 2457 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw)); 2458 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2)); 2459 } 2460 2461 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump)); 2462 FAIL_IF(!jump); 2463 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0)); 2464 jump->u.target = srcw; 2465 2466 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2467 if (type >= SLJIT_FAST_CALL) 2468 FAIL_IF(prepare_blx(compiler)); 2469 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0)); 2470 if (type >= SLJIT_FAST_CALL) 2471 FAIL_IF(emit_blx(compiler)); 2472 #else 2473 FAIL_IF(emit_imm(compiler, TMP_REG1, 0)); 2474 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1))); 2475 #endif 2476 jump->addr = compiler->size; 2477 return SLJIT_SUCCESS; 2478 } 2479 2480 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op, 2481 sljit_s32 dst, sljit_sw dstw, 2482 sljit_s32 src, sljit_sw srcw, 2483 sljit_s32 type) 2484 { 2485 sljit_s32 dst_r, flags = GET_ALL_FLAGS(op); 2486 sljit_uw cc, ins; 2487 2488 CHECK_ERROR(); 2489 CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type)); 2490 ADJUST_LOCAL_OFFSET(dst, dstw); 2491 ADJUST_LOCAL_OFFSET(src, srcw); 2492 2493 if (dst == SLJIT_UNUSED) 2494 return SLJIT_SUCCESS; 2495 2496 op = GET_OPCODE(op); 2497 cc = get_cc(type & 0xff); 2498 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2; 2499 2500 if (op < SLJIT_ADD) { 2501 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 0))); 2502 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc)); 2503 return (dst_r == TMP_REG2) ? emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw) : SLJIT_SUCCESS; 2504 } 2505 2506 ins = (op == SLJIT_AND ? AND_DP : (op == SLJIT_OR ? ORR_DP : EOR_DP)); 2507 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) { 2508 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc)); 2509 /* The condition must always be set, even if the ORR/EOR is not executed above. */ 2510 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst))) : SLJIT_SUCCESS; 2511 } 2512 2513 compiler->cache_arg = 0; 2514 compiler->cache_argw = 0; 2515 if (src & SLJIT_MEM) { 2516 FAIL_IF(emit_op_mem2(compiler, WORD_DATA | LOAD_DATA, TMP_REG1, src, srcw, dst, dstw)); 2517 src = TMP_REG1; 2518 srcw = 0; 2519 } else if (src & SLJIT_IMM) { 2520 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw)); 2521 src = TMP_REG1; 2522 srcw = 0; 2523 } 2524 2525 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 1) & ~COND_MASK) | cc)); 2526 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 0) & ~COND_MASK) | (cc ^ 0x10000000))); 2527 if (dst_r == TMP_REG2) 2528 FAIL_IF(emit_op_mem2(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0)); 2529 2530 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst_r))) : SLJIT_SUCCESS; 2531 } 2532 2533 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value) 2534 { 2535 struct sljit_const *const_; 2536 sljit_s32 reg; 2537 2538 CHECK_ERROR_PTR(); 2539 CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value)); 2540 ADJUST_LOCAL_OFFSET(dst, dstw); 2541 2542 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const)); 2543 PTR_FAIL_IF(!const_); 2544 2545 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2; 2546 2547 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) 2548 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value)); 2549 compiler->patches++; 2550 #else 2551 PTR_FAIL_IF(emit_imm(compiler, reg, init_value)); 2552 #endif 2553 set_const(const_, compiler); 2554 2555 if (dst & SLJIT_MEM) 2556 PTR_FAIL_IF(emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw)); 2557 return const_; 2558 } 2559 2560 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr) 2561 { 2562 inline_set_jump_addr(addr, new_addr, 1); 2563 } 2564 2565 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant) 2566 { 2567 inline_set_const(addr, new_constant, 1); 2568 } 2569
Indexes created Sun Oct 19 02:09:48 GMT 2025