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      1  1.1.1.4     skrll // SPDX-License-Identifier: GPL-2.0-only
      2      1.1  jmcneill /*
      3      1.1  jmcneill  * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
      4      1.1  jmcneill  *
      5      1.1  jmcneill  * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill /dts-v1/;
      9      1.1  jmcneill 
     10      1.1  jmcneill #include "am33xx.dtsi"
     11      1.1  jmcneill #include <dt-bindings/interrupt-controller/irq.h>
     12      1.1  jmcneill 
     13      1.1  jmcneill / {
     14      1.1  jmcneill 	model = "CompuLab CM-T335";
     15      1.1  jmcneill 	compatible = "compulab,cm-t335", "ti,am33xx";
     16      1.1  jmcneill 
     17      1.1  jmcneill 	memory@80000000 {
     18      1.1  jmcneill 		device_type = "memory";
     19      1.1  jmcneill 		reg = <0x80000000 0x8000000>;	/* 128 MB */
     20      1.1  jmcneill 	};
     21      1.1  jmcneill 
     22      1.1  jmcneill 	leds {
     23      1.1  jmcneill 		compatible = "gpio-leds";
     24      1.1  jmcneill 		pinctrl-names = "default";
     25      1.1  jmcneill 		pinctrl-0 = <&gpio_led_pins>;
     26      1.1  jmcneill 		led0 {
     27      1.1  jmcneill 			label = "cm_t335:green";
     28      1.1  jmcneill 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;	/* gpio2_0 */
     29      1.1  jmcneill 			linux,default-trigger = "heartbeat";
     30      1.1  jmcneill 		};
     31      1.1  jmcneill 	};
     32      1.1  jmcneill 
     33      1.1  jmcneill 	/* regulator for mmc */
     34      1.1  jmcneill 	vmmc_fixed: fixedregulator0 {
     35      1.1  jmcneill 		compatible = "regulator-fixed";
     36      1.1  jmcneill 		regulator-name = "vmmc_fixed";
     37      1.1  jmcneill 		regulator-min-microvolt = <3300000>;
     38      1.1  jmcneill 		regulator-max-microvolt = <3300000>;
     39      1.1  jmcneill 	};
     40      1.1  jmcneill 
     41      1.1  jmcneill 	/* Regulator for WiFi */
     42      1.1  jmcneill 	vwlan_fixed: fixedregulator2 {
     43      1.1  jmcneill 		compatible = "regulator-fixed";
     44      1.1  jmcneill 		regulator-name = "vwlan_fixed";
     45      1.1  jmcneill 		gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
     46      1.1  jmcneill 		enable-active-high;
     47      1.1  jmcneill 	};
     48      1.1  jmcneill 
     49      1.1  jmcneill 	backlight {
     50      1.1  jmcneill 		compatible = "pwm-backlight";
     51      1.1  jmcneill 		pwms = <&ecap0 0 50000 0>;
     52      1.1  jmcneill 		brightness-levels = <0 51 53 56 62 75 101 152 255>;
     53      1.1  jmcneill 		default-brightness-level = <8>;
     54      1.1  jmcneill 	};
     55      1.1  jmcneill 
     56      1.1  jmcneill 	sound {
     57      1.1  jmcneill 		compatible = "simple-audio-card";
     58      1.1  jmcneill 		simple-audio-card,name = "cm-t335";
     59      1.1  jmcneill 
     60      1.1  jmcneill 		simple-audio-card,widgets =
     61      1.1  jmcneill 			"Microphone", "Mic Jack",
     62      1.1  jmcneill 			"Line", "Line In",
     63      1.1  jmcneill 			"Headphone", "Headphone Jack";
     64      1.1  jmcneill 
     65      1.1  jmcneill 		simple-audio-card,routing =
     66      1.1  jmcneill 			"Headphone Jack", "LHPOUT",
     67      1.1  jmcneill 			"Headphone Jack", "RHPOUT",
     68      1.1  jmcneill 			"LLINEIN", "Line In",
     69      1.1  jmcneill 			"RLINEIN", "Line In",
     70      1.1  jmcneill 			"MICIN", "Mic Jack";
     71      1.1  jmcneill 
     72      1.1  jmcneill 		simple-audio-card,format = "i2s";
     73      1.1  jmcneill 		simple-audio-card,bitclock-master = <&sound_master>;
     74      1.1  jmcneill 		simple-audio-card,frame-master = <&sound_master>;
     75      1.1  jmcneill 
     76      1.1  jmcneill 		simple-audio-card,cpu {
     77      1.1  jmcneill 			sound-dai = <&mcasp1>;
     78      1.1  jmcneill 		};
     79      1.1  jmcneill 
     80      1.1  jmcneill 		sound_master: simple-audio-card,codec {
     81      1.1  jmcneill 			sound-dai = <&tlv320aic23>;
     82      1.1  jmcneill 			system-clock-frequency = <12000000>;
     83      1.1  jmcneill 		};
     84      1.1  jmcneill 	};
     85      1.1  jmcneill };
     86      1.1  jmcneill 
     87      1.1  jmcneill &am33xx_pinmux {
     88      1.1  jmcneill 	pinctrl-names = "default";
     89      1.1  jmcneill 	pinctrl-0 = <&bluetooth_pins>;
     90      1.1  jmcneill 
     91      1.1  jmcneill 	i2c0_pins: pinmux_i2c0_pins {
     92      1.1  jmcneill 		pinctrl-single,pins = <
     93  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
     94  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
     95      1.1  jmcneill 		>;
     96      1.1  jmcneill 	};
     97      1.1  jmcneill 
     98      1.1  jmcneill 	i2c1_pins: pinmux_i2c1_pins {
     99      1.1  jmcneill 		pinctrl-single,pins = <
    100      1.1  jmcneill 			/* uart0_ctsn.i2c1_sda */
    101  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
    102      1.1  jmcneill 			/* uart0_rtsn.i2c1_scl */
    103  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
    104      1.1  jmcneill 		>;
    105      1.1  jmcneill 	};
    106      1.1  jmcneill 
    107      1.1  jmcneill 	gpio_led_pins: pinmux_gpio_led_pins {
    108      1.1  jmcneill 		pinctrl-single,pins = <
    109      1.1  jmcneill 			/* gpmc_csn3.gpio2_0 */
    110  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
    111      1.1  jmcneill 		>;
    112      1.1  jmcneill 	};
    113      1.1  jmcneill 
    114      1.1  jmcneill 	nandflash_pins: pinmux_nandflash_pins {
    115      1.1  jmcneill 		pinctrl-single,pins = <
    116  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
    117  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
    118  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
    119  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
    120  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
    121  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
    122  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
    123  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
    124  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
    125  1.1.1.5  jmcneill 			/* gpmc_wpn.gpio0_31 */
    126  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
    127  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
    128  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
    129  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
    130  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
    131  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
    132      1.1  jmcneill 		>;
    133      1.1  jmcneill 	};
    134      1.1  jmcneill 
    135      1.1  jmcneill 	uart0_pins: pinmux_uart0_pins {
    136      1.1  jmcneill 		pinctrl-single,pins = <
    137  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
    138  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
    139      1.1  jmcneill 		>;
    140      1.1  jmcneill 	};
    141      1.1  jmcneill 
    142      1.1  jmcneill 	uart1_pins: pinmux_uart1_pins {
    143      1.1  jmcneill 		pinctrl-single,pins = <
    144  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
    145  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
    146  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
    147  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
    148      1.1  jmcneill 		>;
    149      1.1  jmcneill 	};
    150      1.1  jmcneill 
    151      1.1  jmcneill 	dcan0_pins: pinmux_dcan0_pins {
    152      1.1  jmcneill 		pinctrl-single,pins = <
    153      1.1  jmcneill 			/* uart1_ctsn.dcan0_tx */
    154  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
    155      1.1  jmcneill 			/* uart1_rtsn.dcan0_rx */
    156  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
    157      1.1  jmcneill 		>;
    158      1.1  jmcneill 	};
    159      1.1  jmcneill 
    160      1.1  jmcneill 	dcan1_pins: pinmux_dcan1_pins {
    161      1.1  jmcneill 		pinctrl-single,pins = <
    162      1.1  jmcneill 			/* uart1_rxd.dcan1_tx */
    163  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
    164      1.1  jmcneill 			/* uart1_txd.dcan1_rx */
    165  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
    166      1.1  jmcneill 		>;
    167      1.1  jmcneill 	};
    168      1.1  jmcneill 
    169      1.1  jmcneill 	ecap0_pins: pinmux_ecap0_pins {
    170      1.1  jmcneill 		pinctrl-single,pins = <
    171  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
    172      1.1  jmcneill 		>;
    173      1.1  jmcneill 	};
    174      1.1  jmcneill 
    175      1.1  jmcneill 	cpsw_default: cpsw_default {
    176      1.1  jmcneill 		pinctrl-single,pins = <
    177      1.1  jmcneill 			/* Slave 1 */
    178      1.1  jmcneill 			/* mii1_tx_en.rgmii1_tctl */
    179  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    180      1.1  jmcneill 			/* mii1_rxdv.rgmii1_rctl */
    181  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
    182      1.1  jmcneill 			/* mii1_txd3.rgmii1_td3 */
    183  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    184      1.1  jmcneill 			/* mii1_txd2.rgmii1_td2 */
    185  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    186      1.1  jmcneill 			/* mii1_txd1.rgmii1_td1 */
    187  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    188      1.1  jmcneill 			/* mii1_txd0.rgmii1_td0 */
    189  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    190      1.1  jmcneill 			/* mii1_txclk.rgmii1_tclk */
    191  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
    192      1.1  jmcneill 			/* mii1_rxclk.rgmii1_rclk */
    193  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
    194      1.1  jmcneill 			/* mii1_rxd3.rgmii1_rd3 */
    195  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
    196      1.1  jmcneill 			/* mii1_rxd2.rgmii1_rd2 */
    197  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
    198      1.1  jmcneill 			/* mii1_rxd1.rgmii1_rd1 */
    199  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
    200      1.1  jmcneill 			/* mii1_rxd0.rgmii1_rd0 */
    201  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
    202      1.1  jmcneill 		>;
    203      1.1  jmcneill 	};
    204      1.1  jmcneill 
    205      1.1  jmcneill 	cpsw_sleep: cpsw_sleep {
    206      1.1  jmcneill 		pinctrl-single,pins = <
    207      1.1  jmcneill 			/* Slave 1 reset value */
    208  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
    209  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
    210  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
    211  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
    212  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
    213  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
    214  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
    215  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
    216  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
    217  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
    218  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
    219  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
    220      1.1  jmcneill 		>;
    221      1.1  jmcneill 	};
    222      1.1  jmcneill 
    223      1.1  jmcneill 	davinci_mdio_default: davinci_mdio_default {
    224      1.1  jmcneill 		pinctrl-single,pins = <
    225  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
    226  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
    227      1.1  jmcneill 		>;
    228      1.1  jmcneill 	};
    229      1.1  jmcneill 
    230      1.1  jmcneill 	davinci_mdio_sleep: davinci_mdio_sleep {
    231      1.1  jmcneill 		pinctrl-single,pins = <
    232      1.1  jmcneill 			/* MDIO reset value */
    233  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
    234  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
    235      1.1  jmcneill 		>;
    236      1.1  jmcneill 	};
    237      1.1  jmcneill 
    238      1.1  jmcneill 	mmc1_pins: pinmux_mmc1_pins {
    239      1.1  jmcneill 		pinctrl-single,pins = <
    240  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
    241  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
    242  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
    243  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
    244  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
    245  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
    246      1.1  jmcneill 		>;
    247      1.1  jmcneill 	};
    248      1.1  jmcneill 
    249      1.1  jmcneill 	spi0_pins: pinmux_spi0_pins {
    250      1.1  jmcneill 		pinctrl-single,pins = <
    251  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
    252  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
    253  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
    254  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
    255  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
    256      1.1  jmcneill 		>;
    257      1.1  jmcneill 	};
    258      1.1  jmcneill 
    259      1.1  jmcneill 	/* wl1271 bluetooth */
    260      1.1  jmcneill 	bluetooth_pins: pinmux_bluetooth_pins {
    261      1.1  jmcneill 		pinctrl-single,pins = <
    262      1.1  jmcneill 			/* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
    263  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
    264      1.1  jmcneill 		>;
    265      1.1  jmcneill 	};
    266      1.1  jmcneill 
    267      1.1  jmcneill 	/* TLV320AIC23B codec */
    268      1.1  jmcneill 	mcasp1_pins: pinmux_mcasp1_pins {
    269      1.1  jmcneill 		pinctrl-single,pins = <
    270      1.1  jmcneill 			/* MII1_CRS.mcasp1_aclkx */
    271  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
    272      1.1  jmcneill 			/* MII1_RX_ER.mcasp1_fsx */
    273  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
    274      1.1  jmcneill 			/* MII1_COL.mcasp1_axr2 */
    275  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
    276      1.1  jmcneill 			/* RMII1_REF_CLK.mcasp1_axr3 */
    277  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
    278      1.1  jmcneill 		>;
    279      1.1  jmcneill 	};
    280      1.1  jmcneill 
    281      1.1  jmcneill 	/* wl1271 WiFi */
    282      1.1  jmcneill 	wifi_pins: pinmux_wifi_pins {
    283      1.1  jmcneill 		pinctrl-single,pins = <
    284      1.1  jmcneill 			/* EMU1.gpio3_8 - WiFi IRQ */
    285  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
    286      1.1  jmcneill 			/* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
    287  1.1.1.4     skrll 			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
    288      1.1  jmcneill 		>;
    289      1.1  jmcneill 	};
    290      1.1  jmcneill };
    291      1.1  jmcneill 
    292      1.1  jmcneill &uart0 {
    293      1.1  jmcneill 	pinctrl-names = "default";
    294      1.1  jmcneill 	pinctrl-0 = <&uart0_pins>;
    295      1.1  jmcneill 
    296      1.1  jmcneill 	status = "okay";
    297      1.1  jmcneill };
    298      1.1  jmcneill 
    299      1.1  jmcneill /* WLS1271 bluetooth */
    300      1.1  jmcneill &uart1 {
    301      1.1  jmcneill 	pinctrl-names = "default";
    302      1.1  jmcneill 	pinctrl-0 = <&uart1_pins>;
    303      1.1  jmcneill 
    304      1.1  jmcneill status = "okay";
    305      1.1  jmcneill };
    306      1.1  jmcneill 
    307      1.1  jmcneill &i2c0 {
    308      1.1  jmcneill 	pinctrl-names = "default";
    309      1.1  jmcneill 	pinctrl-0 = <&i2c0_pins>;
    310      1.1  jmcneill 
    311      1.1  jmcneill 	status = "okay";
    312      1.1  jmcneill 	clock-frequency = <400000>;
    313      1.1  jmcneill 	/* CM-T335 board EEPROM */
    314      1.1  jmcneill 	eeprom: 24c02@50 {
    315      1.1  jmcneill 		compatible = "atmel,24c02";
    316      1.1  jmcneill 		reg = <0x50>;
    317      1.1  jmcneill 		pagesize = <16>;
    318      1.1  jmcneill 	};
    319      1.1  jmcneill 	/* Real Time Clock */
    320      1.1  jmcneill 	ext_rtc: em3027@56 {
    321      1.1  jmcneill 		compatible = "emmicro,em3027";
    322      1.1  jmcneill 		reg = <0x56>;
    323      1.1  jmcneill 	};
    324      1.1  jmcneill 	/* Audio codec */
    325      1.1  jmcneill 	tlv320aic23: codec@1a {
    326      1.1  jmcneill 		compatible = "ti,tlv320aic23";
    327      1.1  jmcneill 		reg = <0x1a>;
    328      1.1  jmcneill 		#sound-dai-cells= <0>;
    329      1.1  jmcneill 		status = "okay";
    330      1.1  jmcneill 	};
    331      1.1  jmcneill };
    332      1.1  jmcneill 
    333      1.1  jmcneill &epwmss0 {
    334      1.1  jmcneill 	status = "okay";
    335      1.1  jmcneill 
    336  1.1.1.5  jmcneill 	ecap0: pwm@100 {
    337      1.1  jmcneill 		status = "okay";
    338      1.1  jmcneill 		pinctrl-names = "default";
    339      1.1  jmcneill 		pinctrl-0 = <&ecap0_pins>;
    340      1.1  jmcneill 	};
    341      1.1  jmcneill };
    342      1.1  jmcneill 
    343      1.1  jmcneill &gpmc {
    344      1.1  jmcneill 	status = "okay";
    345      1.1  jmcneill 	pinctrl-names = "default";
    346      1.1  jmcneill 	pinctrl-0 = <&nandflash_pins>;
    347      1.1  jmcneill 	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
    348      1.1  jmcneill 	nand@0,0 {
    349      1.1  jmcneill 		compatible = "ti,omap2-nand";
    350      1.1  jmcneill 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
    351      1.1  jmcneill 		interrupt-parent = <&gpmc>;
    352      1.1  jmcneill 		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
    353      1.1  jmcneill 			     <1 IRQ_TYPE_NONE>;	/* termcount */
    354      1.1  jmcneill 		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
    355      1.1  jmcneill 		ti,nand-ecc-opt = "bch8";
    356      1.1  jmcneill 		ti,elm-id = <&elm>;
    357      1.1  jmcneill 		nand-bus-width = <8>;
    358      1.1  jmcneill 		gpmc,device-width = <1>;
    359      1.1  jmcneill 		gpmc,sync-clk-ps = <0>;
    360      1.1  jmcneill 		gpmc,cs-on-ns = <0>;
    361      1.1  jmcneill 		gpmc,cs-rd-off-ns = <44>;
    362      1.1  jmcneill 		gpmc,cs-wr-off-ns = <44>;
    363      1.1  jmcneill 		gpmc,adv-on-ns = <6>;
    364      1.1  jmcneill 		gpmc,adv-rd-off-ns = <34>;
    365      1.1  jmcneill 		gpmc,adv-wr-off-ns = <44>;
    366      1.1  jmcneill 		gpmc,we-on-ns = <0>;
    367      1.1  jmcneill 		gpmc,we-off-ns = <40>;
    368      1.1  jmcneill 		gpmc,oe-on-ns = <0>;
    369      1.1  jmcneill 		gpmc,oe-off-ns = <54>;
    370      1.1  jmcneill 		gpmc,access-ns = <64>;
    371      1.1  jmcneill 		gpmc,rd-cycle-ns = <82>;
    372      1.1  jmcneill 		gpmc,wr-cycle-ns = <82>;
    373      1.1  jmcneill 		gpmc,bus-turnaround-ns = <0>;
    374      1.1  jmcneill 		gpmc,cycle2cycle-delay-ns = <0>;
    375      1.1  jmcneill 		gpmc,clk-activation-ns = <0>;
    376      1.1  jmcneill 		gpmc,wr-access-ns = <40>;
    377      1.1  jmcneill 		gpmc,wr-data-mux-bus-ns = <0>;
    378      1.1  jmcneill 		/* MTD partition table */
    379      1.1  jmcneill 		#address-cells = <1>;
    380      1.1  jmcneill 		#size-cells = <1>;
    381      1.1  jmcneill 		partition@0 {
    382      1.1  jmcneill 			label = "spl";
    383      1.1  jmcneill 			reg = <0x00000000 0x00200000>;
    384      1.1  jmcneill 		};
    385      1.1  jmcneill 		partition@1 {
    386      1.1  jmcneill 			label = "uboot";
    387      1.1  jmcneill 			reg = <0x00200000 0x00100000>;
    388      1.1  jmcneill 		};
    389      1.1  jmcneill 		partition@2 {
    390      1.1  jmcneill 			label = "uboot environment";
    391      1.1  jmcneill 			reg = <0x00300000 0x00100000>;
    392      1.1  jmcneill 		};
    393      1.1  jmcneill 		partition@3 {
    394      1.1  jmcneill 			label = "dtb";
    395      1.1  jmcneill 			reg = <0x00400000 0x00100000>;
    396      1.1  jmcneill 		};
    397      1.1  jmcneill 		partition@4 {
    398      1.1  jmcneill 			label = "splash";
    399      1.1  jmcneill 			reg = <0x00500000 0x00400000>;
    400      1.1  jmcneill 		};
    401      1.1  jmcneill 		partition@5 {
    402      1.1  jmcneill 			label = "linux";
    403      1.1  jmcneill 			reg = <0x00900000 0x00600000>;
    404      1.1  jmcneill 		};
    405      1.1  jmcneill 		partition@6 {
    406      1.1  jmcneill 			label = "rootfs";
    407      1.1  jmcneill 			reg = <0x00F00000 0>;
    408      1.1  jmcneill 		};
    409      1.1  jmcneill 	};
    410      1.1  jmcneill };
    411      1.1  jmcneill 
    412      1.1  jmcneill &elm {
    413      1.1  jmcneill 	status = "okay";
    414      1.1  jmcneill };
    415      1.1  jmcneill 
    416  1.1.1.5  jmcneill &mac_sw {
    417      1.1  jmcneill 	pinctrl-names = "default", "sleep";
    418      1.1  jmcneill 	pinctrl-0 = <&cpsw_default>;
    419      1.1  jmcneill 	pinctrl-1 = <&cpsw_sleep>;
    420      1.1  jmcneill 	status = "okay";
    421      1.1  jmcneill };
    422      1.1  jmcneill 
    423  1.1.1.5  jmcneill &davinci_mdio_sw {
    424      1.1  jmcneill 	pinctrl-names = "default", "sleep";
    425      1.1  jmcneill 	pinctrl-0 = <&davinci_mdio_default>;
    426      1.1  jmcneill 	pinctrl-1 = <&davinci_mdio_sleep>;
    427  1.1.1.2  jmcneill 
    428  1.1.1.2  jmcneill 	ethphy0: ethernet-phy@0 {
    429  1.1.1.2  jmcneill 		reg = <0>;
    430  1.1.1.2  jmcneill 	};
    431      1.1  jmcneill };
    432      1.1  jmcneill 
    433  1.1.1.5  jmcneill &cpsw_port1 {
    434  1.1.1.2  jmcneill 	phy-handle = <&ethphy0>;
    435      1.1  jmcneill 	phy-mode = "rgmii-txid";
    436  1.1.1.5  jmcneill 	ti,dual-emac-pvid = <1>;
    437  1.1.1.5  jmcneill };
    438  1.1.1.5  jmcneill 
    439  1.1.1.5  jmcneill &cpsw_port2 {
    440  1.1.1.5  jmcneill 	status = "disabled";
    441      1.1  jmcneill };
    442      1.1  jmcneill 
    443      1.1  jmcneill &mmc1 {
    444      1.1  jmcneill 	status = "okay";
    445      1.1  jmcneill 	vmmc-supply = <&vmmc_fixed>;
    446      1.1  jmcneill 	bus-width = <4>;
    447      1.1  jmcneill 	pinctrl-names = "default";
    448      1.1  jmcneill 	pinctrl-0 = <&mmc1_pins>;
    449      1.1  jmcneill };
    450      1.1  jmcneill 
    451      1.1  jmcneill &dcan0 {
    452      1.1  jmcneill 	status = "okay";
    453      1.1  jmcneill 	pinctrl-names = "default";
    454      1.1  jmcneill 	pinctrl-0 = <&dcan0_pins>;
    455      1.1  jmcneill };
    456      1.1  jmcneill 
    457      1.1  jmcneill &dcan1 {
    458      1.1  jmcneill 	status = "okay";
    459      1.1  jmcneill 	pinctrl-names = "default";
    460      1.1  jmcneill 	pinctrl-0 = <&dcan1_pins>;
    461      1.1  jmcneill };
    462      1.1  jmcneill 
    463      1.1  jmcneill /* Touschscreen and analog digital converter */
    464      1.1  jmcneill &tscadc {
    465      1.1  jmcneill 	status = "okay";
    466      1.1  jmcneill 	tsc {
    467      1.1  jmcneill 		ti,wires = <4>;
    468      1.1  jmcneill 		ti,x-plate-resistance = <200>;
    469      1.1  jmcneill 		ti,coordinate-readouts = <5>;
    470      1.1  jmcneill 		ti,wire-config = <0x01 0x10 0x23 0x32>;
    471      1.1  jmcneill 		ti,charge-delay = <0x400>;
    472      1.1  jmcneill 	};
    473      1.1  jmcneill 
    474      1.1  jmcneill 	adc {
    475      1.1  jmcneill 		ti,adc-channels = <4 5 6 7>;
    476      1.1  jmcneill 	};
    477      1.1  jmcneill };
    478      1.1  jmcneill 
    479      1.1  jmcneill /* CPU audio */
    480      1.1  jmcneill &mcasp1 {
    481      1.1  jmcneill 		pinctrl-names = "default";
    482      1.1  jmcneill 		pinctrl-0 = <&mcasp1_pins>;
    483      1.1  jmcneill 
    484      1.1  jmcneill 		op-mode = <0>;          /* MCASP_IIS_MODE */
    485      1.1  jmcneill 		tdm-slots = <2>;
    486      1.1  jmcneill 		/* 16 serializers */
    487      1.1  jmcneill 		num-serializer = <16>;
    488      1.1  jmcneill 		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
    489      1.1  jmcneill 			0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0
    490      1.1  jmcneill 		>;
    491      1.1  jmcneill 		tx-num-evt = <1>;
    492      1.1  jmcneill 		rx-num-evt = <1>;
    493      1.1  jmcneill 
    494      1.1  jmcneill 		#sound-dai-cells= <0>;
    495      1.1  jmcneill 		status = "okay";
    496      1.1  jmcneill };
    497      1.1  jmcneill 
    498      1.1  jmcneill &spi0 {
    499      1.1  jmcneill 	status = "okay";
    500      1.1  jmcneill 	pinctrl-names = "default";
    501      1.1  jmcneill 	pinctrl-0 = <&spi0_pins>;
    502  1.1.1.5  jmcneill 	ti,pindir-d0-out-d1-in;
    503      1.1  jmcneill 	/* WLS1271 WiFi */
    504      1.1  jmcneill 	wlcore: wlcore@1 {
    505      1.1  jmcneill 		compatible = "ti,wl1271";
    506      1.1  jmcneill 		pinctrl-names = "default";
    507      1.1  jmcneill 		pinctrl-0 = <&wifi_pins>;
    508      1.1  jmcneill 		reg = <1>;
    509      1.1  jmcneill 		spi-max-frequency = <48000000>;
    510      1.1  jmcneill 		clock-xtal;
    511      1.1  jmcneill 		ref-clock-frequency = <38400000>;
    512      1.1  jmcneill 		interrupt-parent = <&gpio3>;
    513      1.1  jmcneill 		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
    514      1.1  jmcneill 		vwlan-supply = <&vwlan_fixed>;
    515      1.1  jmcneill 	};
    516      1.1  jmcneill };
    517