1 1.1 jmcneill // SPDX-License-Identifier: GPL-2.0-or-later 2 1.1 jmcneill /* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work (a] mail.ru> */ 3 1.1 jmcneill /* Based on code by myd_c335x.dts, MYiRtech.com */ 4 1.1 jmcneill /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */ 5 1.1 jmcneill 6 1.1 jmcneill /dts-v1/; 7 1.1 jmcneill 8 1.1 jmcneill #include "am335x-myirtech-myc.dtsi" 9 1.1 jmcneill 10 1.1 jmcneill #include <dt-bindings/display/tda998x.h> 11 1.1 jmcneill #include <dt-bindings/input/input.h> 12 1.1 jmcneill 13 1.1 jmcneill / { 14 1.1 jmcneill model = "MYIR MYD-AM335X"; 15 1.1 jmcneill compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx"; 16 1.1 jmcneill 17 1.1 jmcneill chosen { 18 1.1 jmcneill stdout-path = &uart0; 19 1.1 jmcneill }; 20 1.1 jmcneill 21 1.1 jmcneill clk12m: clk12m { 22 1.1 jmcneill compatible = "fixed-clock"; 23 1.1 jmcneill clock-frequency = <12000000>; 24 1.1 jmcneill 25 1.1 jmcneill #clock-cells = <0>; 26 1.1 jmcneill }; 27 1.1 jmcneill 28 1.1 jmcneill gpio_buttons: gpio_buttons { 29 1.1 jmcneill compatible = "gpio-keys"; 30 1.1 jmcneill pinctrl-names = "default"; 31 1.1 jmcneill pinctrl-0 = <&gpio_buttons_pins>; 32 1.1 jmcneill #address-cells = <1>; 33 1.1 jmcneill #size-cells = <0>; 34 1.1 jmcneill 35 1.1 jmcneill button1: button@0 { 36 1.1 jmcneill reg = <0>; 37 1.1 jmcneill label = "button1"; 38 1.1 jmcneill linux,code = <BTN_1>; 39 1.1 jmcneill gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; 40 1.1 jmcneill }; 41 1.1 jmcneill 42 1.1 jmcneill button2: button@1 { 43 1.1 jmcneill reg = <1>; 44 1.1 jmcneill label = "button2"; 45 1.1 jmcneill linux,code = <BTN_2>; 46 1.1 jmcneill gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 47 1.1 jmcneill }; 48 1.1 jmcneill }; 49 1.1 jmcneill 50 1.1 jmcneill sound: sound { 51 1.1 jmcneill compatible = "simple-audio-card"; 52 1.1 jmcneill simple-audio-card,format = "i2s"; 53 1.1 jmcneill simple-audio-card,bitclock-master = <&master_codec>; 54 1.1 jmcneill simple-audio-card,frame-master = <&master_codec>; 55 1.1 jmcneill 56 1.1 jmcneill simple-audio-card,cpu { 57 1.1 jmcneill sound-dai = <&mcasp0>; 58 1.1 jmcneill }; 59 1.1 jmcneill 60 1.1 jmcneill master_codec: simple-audio-card,codec@1 { 61 1.1 jmcneill sound-dai = <&sgtl5000>; 62 1.1 jmcneill }; 63 1.1 jmcneill 64 1.1 jmcneill simple-audio-card,codec@2 { 65 1.1 jmcneill sound-dai = <&tda9988>; 66 1.1 jmcneill }; 67 1.1 jmcneill }; 68 1.1 jmcneill 69 1.1 jmcneill vdd_5v0: vdd_5v0_reg { 70 1.1 jmcneill compatible = "regulator-fixed"; 71 1.1 jmcneill regulator-name = "vdd_5v0"; 72 1.1 jmcneill regulator-min-microvolt = <5000000>; 73 1.1 jmcneill regulator-max-microvolt = <5000000>; 74 1.1 jmcneill regulator-always-on; 75 1.1 jmcneill regulator-boot-on; 76 1.1 jmcneill }; 77 1.1 jmcneill 78 1.1 jmcneill vdd_3v3: vdd_3v3_reg { 79 1.1 jmcneill compatible = "regulator-fixed"; 80 1.1 jmcneill regulator-name = "vdd-3v3"; 81 1.1 jmcneill regulator-min-microvolt = <3300000>; 82 1.1 jmcneill regulator-max-microvolt = <3300000>; 83 1.1 jmcneill regulator-always-on; 84 1.1 jmcneill regulator-boot-on; 85 1.1 jmcneill vin-supply = <&vdd_5v0>; 86 1.1 jmcneill }; 87 1.1 jmcneill }; 88 1.1 jmcneill 89 1.1 jmcneill &cpsw_port2 { 90 1.1 jmcneill status = "okay"; 91 1.1 jmcneill phy-handle = <&phy1>; 92 1.1 jmcneill phy-mode = "rgmii-id"; 93 1.1 jmcneill ti,dual-emac-pvid = <2>; 94 1.1 jmcneill }; 95 1.1 jmcneill 96 1.1 jmcneill &davinci_mdio_sw { 97 1.1 jmcneill phy1: ethernet-phy@6 { 98 1.1 jmcneill reg = <6>; 99 1.1 jmcneill eee-broken-1000t; 100 1.1 jmcneill }; 101 1.1 jmcneill }; 102 1.1 jmcneill 103 1.1 jmcneill &mac_sw { 104 1.1 jmcneill pinctrl-0 = <ð_slave1_pins_default>, <ð_slave2_pins_default>; 105 1.1 jmcneill pinctrl-1 = <ð_slave1_pins_sleep>, <ð_slave2_pins_sleep>; 106 1.1 jmcneill slaves = <2>; 107 1.1 jmcneill }; 108 1.1 jmcneill 109 1.1 jmcneill &dcan0 { 110 1.1 jmcneill pinctrl-names = "default", "sleep"; 111 1.1 jmcneill pinctrl-0 = <&dcan0_pins_default>; 112 1.1 jmcneill pinctrl-1 = <&dcan0_pins_sleep>; 113 1.1 jmcneill status = "okay"; 114 1.1 jmcneill }; 115 1.1 jmcneill 116 1.1 jmcneill &dcan1 { 117 1.1 jmcneill pinctrl-names = "default", "sleep"; 118 1.1 jmcneill pinctrl-0 = <&dcan1_pins_default>; 119 1.1 jmcneill pinctrl-1 = <&dcan1_pins_sleep>; 120 1.1 jmcneill status = "okay"; 121 1.1 jmcneill }; 122 1.1 jmcneill 123 1.1 jmcneill &ehrpwm0 { 124 1.1 jmcneill pinctrl-names = "default", "sleep"; 125 1.1 jmcneill pinctrl-0 = <&ehrpwm0_pins_default>; 126 1.1 jmcneill pinctrl-1 = <&ehrpwm0_pins_sleep>; 127 1.1 jmcneill status = "okay"; 128 1.1 jmcneill }; 129 1.1 jmcneill 130 1.1 jmcneill &epwmss0 { 131 1.1 jmcneill status = "okay"; 132 1.1 jmcneill }; 133 1.1 jmcneill 134 1.1 jmcneill &i2c1 { 135 1.1 jmcneill pinctrl-names = "default", "gpio", "sleep"; 136 1.1 jmcneill pinctrl-0 = <&i2c1_pins_default>; 137 1.1 jmcneill pinctrl-1 = <&i2c1_pins_gpio>; 138 1.1 jmcneill pinctrl-2 = <&i2c1_pins_sleep>; 139 1.1 jmcneill clock-frequency = <400000>; 140 1.1 jmcneill scl-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 141 1.1 jmcneill sda-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 142 1.1 jmcneill status = "okay"; 143 1.1 jmcneill 144 1.1 jmcneill sgtl5000: sgtl5000@a { 145 1.1 jmcneill compatible = "fsl,sgtl5000"; 146 1.1 jmcneill reg =<0xa>; 147 1.1 jmcneill clocks = <&clk12m>; 148 1.1 jmcneill micbias-resistor-k-ohms = <4>; 149 1.1 jmcneill micbias-voltage-m-volts = <2250>; 150 1.1 jmcneill VDDA-supply = <&vdd_3v3>; 151 1.1 jmcneill VDDIO-supply = <&vdd_3v3>; 152 1.1 jmcneill 153 1.1 jmcneill #sound-dai-cells = <0>; 154 1.1 jmcneill }; 155 1.1 jmcneill 156 1.1 jmcneill tda9988: tda9988@70 { 157 1.1 jmcneill compatible = "nxp,tda998x"; 158 1.1 jmcneill reg =<0x70>; 159 1.1 jmcneill audio-ports = <TDA998x_I2S 1>; 160 1.1 jmcneill 161 1.1 jmcneill #sound-dai-cells = <0>; 162 1.1 jmcneill 163 1.1 jmcneill ports { 164 1.1 jmcneill port@0 { 165 1.1 jmcneill hdmi_0: endpoint@0 { 166 1.1 jmcneill remote-endpoint = <&lcdc_0>; 167 1.1 jmcneill }; 168 1.1 jmcneill }; 169 1.1 jmcneill }; 170 1.1 jmcneill }; 171 1.1 jmcneill }; 172 1.1 jmcneill 173 1.1 jmcneill &lcdc { 174 1.1 jmcneill pinctrl-names = "default", "sleep"; 175 1.1 jmcneill pinctrl-0 = <&lcdc_pins_default>; 176 1.1 jmcneill pinctrl-1 = <&lcdc_pins_sleep>; 177 1.1 jmcneill blue-and-red-wiring = "straight"; 178 1.1 jmcneill status = "okay"; 179 1.1 jmcneill 180 1.1 jmcneill port { 181 1.1 jmcneill lcdc_0: endpoint@0 { 182 1.1 jmcneill remote-endpoint = <&hdmi_0>; 183 1.1 jmcneill }; 184 1.1 jmcneill }; 185 1.1 jmcneill }; 186 1.1 jmcneill 187 1.1 jmcneill &leds { 188 1.1 jmcneill pinctrl-0 = <&led_mod_pins &leds_pins>; 189 1.1 jmcneill 190 1.1 jmcneill led1: led1 { 191 1.1 jmcneill label = "base:user1"; 192 1.1 jmcneill gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; 193 1.1 jmcneill color = <LED_COLOR_ID_GREEN>; 194 1.1 jmcneill default-state = "off"; 195 1.1 jmcneill }; 196 1.1 jmcneill 197 1.1 jmcneill led2: led2 { 198 1.1 jmcneill label = "base:user2"; 199 1.1 jmcneill gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; 200 1.1 jmcneill color = <LED_COLOR_ID_GREEN>; 201 1.1 jmcneill default-state = "off"; 202 1.1 jmcneill }; 203 1.1 jmcneill }; 204 1.1 jmcneill 205 1.1 jmcneill &mcasp0 { 206 1.1 jmcneill pinctrl-names = "default", "sleep"; 207 1.1 jmcneill pinctrl-0 = <&mcasp0_pins_default>; 208 1.1 jmcneill pinctrl-1 = <&mcasp0_pins_sleep>; 209 1.1 jmcneill op-mode = <0>; 210 1.1 jmcneill tdm-slots = <2>; 211 1.1 jmcneill serial-dir = <0 1 2 0>; 212 1.1 jmcneill tx-num-evt = <32>; 213 1.1 jmcneill rx-num-evt = <32>; 214 1.1 jmcneill status = "okay"; 215 1.1 jmcneill 216 1.1 jmcneill #sound-dai-cells = <0>; 217 1.1 jmcneill }; 218 1.1 jmcneill 219 1.1 jmcneill &mmc1 { 220 1.1 jmcneill pinctrl-names = "default", "sleep"; 221 1.1 jmcneill pinctrl-0 = <&mmc1_pins_default>; 222 1.1 jmcneill pinctrl-1 = <&mmc1_pins_sleep>; 223 1.1 jmcneill cd-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 224 1.1 jmcneill bus-width = <4>; 225 1.1 jmcneill vmmc-supply = <&vdd_3v3>; 226 1.1 jmcneill status = "okay"; 227 1.1 jmcneill }; 228 1.1 jmcneill 229 1.1 jmcneill &nand0 { 230 1.1 jmcneill partition@0 { 231 1.1 jmcneill label = "MLO"; 232 1.1 jmcneill reg = <0x00000 0x20000>; 233 1.1 jmcneill }; 234 1.1 jmcneill 235 1.1 jmcneill partition@20000 { 236 1.1 jmcneill label = "boot"; 237 1.1 jmcneill reg = <0x20000 0x80000>; 238 1.1 jmcneill }; 239 1.1 jmcneill }; 240 1.1 jmcneill 241 1.1 jmcneill &tscadc { 242 1.1 jmcneill status = "okay"; 243 1.1 jmcneill 244 1.1 jmcneill adc: adc { 245 1.1 jmcneill ti,adc-channels = <0 1 2 3 4 5 6>; 246 1.1 jmcneill }; 247 1.1 jmcneill }; 248 1.1 jmcneill 249 1.1 jmcneill &uart0 { 250 1.1 jmcneill pinctrl-names = "default"; 251 1.1 jmcneill pinctrl-0 = <&uart0_pins>; 252 1.1 jmcneill status = "okay"; 253 1.1 jmcneill }; 254 1.1 jmcneill 255 1.1 jmcneill &uart1 { 256 1.1 jmcneill pinctrl-names = "default", "sleep"; 257 1.1 jmcneill pinctrl-0 = <&uart1_pins_default>; 258 1.1 jmcneill pinctrl-1 = <&uart1_pins_sleep>; 259 1.1 jmcneill linux,rs485-enabled-at-boot-time; 260 1.1 jmcneill status = "okay"; 261 1.1 jmcneill }; 262 1.1 jmcneill 263 1.1 jmcneill &uart2 { 264 1.1 jmcneill pinctrl-names = "default", "sleep"; 265 1.1 jmcneill pinctrl-0 = <&uart2_pins_default>; 266 1.1 jmcneill pinctrl-1 = <&uart2_pins_sleep>; 267 1.1 jmcneill status = "okay"; 268 1.1 jmcneill }; 269 1.1 jmcneill 270 1.1 jmcneill &usb { 271 1.1 jmcneill pinctrl-names = "default"; 272 1.1 jmcneill pinctrl-0 = <&usb_pins>; 273 1.1 jmcneill }; 274 1.1 jmcneill 275 1.1 jmcneill &usb0 { 276 1.1 jmcneill dr_mode = "otg"; 277 1.1 jmcneill }; 278 1.1 jmcneill 279 1.1 jmcneill &usb0_phy { 280 1.1 jmcneill vcc-supply = <&vdd_5v0>; 281 1.1 jmcneill }; 282 1.1 jmcneill 283 1.1 jmcneill &usb1 { 284 1.1 jmcneill dr_mode = "host"; 285 1.1 jmcneill }; 286 1.1 jmcneill 287 1.1 jmcneill &usb1_phy { 288 1.1 jmcneill vcc-supply = <&vdd_5v0>; 289 1.1 jmcneill }; 290 1.1 jmcneill 291 1.1 jmcneill &vdd_mod { 292 1.1 jmcneill vin-supply = <&vdd_3v3>; 293 1.1 jmcneill }; 294 1.1 jmcneill 295 1.1 jmcneill &am33xx_pinmux { 296 1.1 jmcneill dcan0_pins_default: pinmux_dcan0_pins_default { 297 1.1 jmcneill pinctrl-single,pins = < 298 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan0_tx_mux2 */ 299 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) /* dcan0_rx_mux2 */ 300 1.1 jmcneill >; 301 1.1 jmcneill }; 302 1.1 jmcneill 303 1.1 jmcneill dcan0_pins_sleep: pinmux_dcan0_pins_sleep { 304 1.1 jmcneill pinctrl-single,pins = < 305 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 306 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 307 1.1 jmcneill >; 308 1.1 jmcneill }; 309 1.1 jmcneill 310 1.1 jmcneill dcan1_pins_default: pinmux_dcan1_pins_default { 311 1.1 jmcneill pinctrl-single,pins = < 312 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan1_tx_mux0 */ 313 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* dcan1_rx_mux0 */ 314 1.1 jmcneill >; 315 1.1 jmcneill }; 316 1.1 jmcneill 317 1.1 jmcneill dcan1_pins_sleep: pinmux_dcan1_pins_sleep { 318 1.1 jmcneill pinctrl-single,pins = < 319 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 320 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 321 1.1 jmcneill >; 322 1.1 jmcneill }; 323 1.1 jmcneill 324 1.1 jmcneill ehrpwm0_pins_default: pinmux_ehrpwm0_pins_default { 325 1.1 jmcneill pinctrl-single,pins = < 326 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT, MUX_MODE3) /* ehrpwm0A_mux1 */ 327 1.1 jmcneill >; 328 1.1 jmcneill }; 329 1.1 jmcneill 330 1.1 jmcneill ehrpwm0_pins_sleep: pinmux_ehrpwm0_pins_sleep { 331 1.1 jmcneill pinctrl-single,pins = < 332 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 333 1.1 jmcneill >; 334 1.1 jmcneill }; 335 1.1 jmcneill 336 1.1 jmcneill eth_slave2_pins_default: pinmux_eth_slave2_pins_default { 337 1.1 jmcneill pinctrl-single,pins = < 338 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tctl */ 339 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rctl */ 340 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td3 */ 341 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td2 */ 342 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td1 */ 343 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td0 */ 344 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tclk */ 345 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rclk */ 346 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd3 */ 347 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd2 */ 348 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd1 */) 349 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd0 */) 350 1.1 jmcneill >; 351 1.1 jmcneill }; 352 1.1 jmcneill 353 1.1 jmcneill eth_slave2_pins_sleep: pinmux_eth_slave2_pins_sleep { 354 1.1 jmcneill pinctrl-single,pins = < 355 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7) 356 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) 357 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7) 358 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7) 359 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7) 360 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7) 361 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7) 362 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7) 363 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7) 364 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) 365 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) 366 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) 367 1.1 jmcneill >; 368 1.1 jmcneill }; 369 1.1 jmcneill 370 1.1 jmcneill gpio_buttons_pins: pinmux_gpio_buttons_pins { 371 1.1 jmcneill pinctrl-single,pins = < 372 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpio3[0] */ 373 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT, MUX_MODE7) /* gpio0[29] */ 374 1.1 jmcneill >; 375 1.1 jmcneill }; 376 1.1 jmcneill 377 1.1 jmcneill i2c1_pins_default: pinmux_i2c1_pins_default { 378 1.1 jmcneill pinctrl-single,pins = < 379 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SDA_mux3 */ 380 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SCL_mux3 */ 381 1.1 jmcneill >; 382 1.1 jmcneill }; 383 1.1 jmcneill 384 1.1 jmcneill i2c1_pins_gpio: pinmux_i2c1_pins_gpio { 385 1.1 jmcneill pinctrl-single,pins = < 386 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE7) /* gpio0[4] */ 387 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE7) /* gpio0[5] */ 388 1.1 jmcneill >; 389 1.1 jmcneill }; 390 1.1 jmcneill 391 1.1 jmcneill i2c1_pins_sleep: pinmux_i2c1_pins_sleep { 392 1.1 jmcneill pinctrl-single,pins = < 393 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLDOWN, MUX_MODE7) 394 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLDOWN, MUX_MODE7) 395 1.1 jmcneill >; 396 1.1 jmcneill }; 397 1.1 jmcneill 398 1.1 jmcneill lcdc_pins_default: pinmux_lcdc_pins_default { 399 1.1 jmcneill pinctrl-single,pins = < 400 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) /* lcd_data0 */ 401 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) /* lcd_data1 */ 402 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) /* lcd_data2 */ 403 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) /* lcd_data3 */ 404 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) /* lcd_data4 */ 405 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) /* lcd_data5 */ 406 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) /* lcd_data6 */ 407 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) /* lcd_data7 */ 408 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) /* lcd_data8 */ 409 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) /* lcd_data9 */ 410 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) /* lcd_data10 */ 411 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) /* lcd_data11 */ 412 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) /* lcd_data12 */ 413 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) /* lcd_data13 */ 414 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) /* lcd_data14 */ 415 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) /* lcd_data15 */ 416 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_vsync */ 417 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_hsync */ 418 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) /* lcd_pclk */ 419 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) /* lcd_ac_bias_en */ 420 1.1 jmcneill >; 421 1.1 jmcneill }; 422 1.1 jmcneill 423 1.1 jmcneill lcdc_pins_sleep: pinmux_lcdc_pins_sleep { 424 1.1 jmcneill pinctrl-single,pins = < 425 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 426 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) 427 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7) 428 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7) 429 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7) 430 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7) 431 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7) 432 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7) 433 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7) 434 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7) 435 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7) 436 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7) 437 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7) 438 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7) 439 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7) 440 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7) 441 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) 442 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) 443 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 444 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 445 1.1 jmcneill >; 446 1.1 jmcneill }; 447 1.1 jmcneill 448 1.1 jmcneill leds_pins: pinmux_leds_pins { 449 1.1 jmcneill pinctrl-single,pins = < 450 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* gpio0[27] */ 451 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE7) /* gpio0[3] */ 452 1.1 jmcneill >; 453 1.1 jmcneill }; 454 1.1 jmcneill 455 1.1 jmcneill mcasp0_pins_default: pinmux_mcasp0_pins_default { 456 1.1 jmcneill pinctrl-single,pins = < 457 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_aclkx_mux0 */ 458 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_fsx_mux0 */ 459 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mcasp0_axr2_mux0 */ 460 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_axr1_mux0 */ 461 1.1 jmcneill >; 462 1.1 jmcneill }; 463 1.1 jmcneill 464 1.1 jmcneill mcasp0_pins_sleep: pinmux_mcasp0_pins_sleep { 465 1.1 jmcneill pinctrl-single,pins = < 466 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) 467 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7) 468 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) 469 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7) 470 1.1 jmcneill >; 471 1.1 jmcneill }; 472 1.1 jmcneill 473 1.1 jmcneill mmc1_pins_default: pinmux_mmc1_pins_default { 474 1.1 jmcneill pinctrl-single,pins = < 475 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat3 */ 476 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat2 */ 477 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat1 */ 478 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat0 */ 479 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_clk */ 480 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_cmd */ 481 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio3[21] */ 482 1.1 jmcneill >; 483 1.1 jmcneill }; 484 1.1 jmcneill 485 1.1 jmcneill mmc1_pins_sleep: pinmux_mmc1_pins_sleep { 486 1.1 jmcneill pinctrl-single,pins = < 487 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLDOWN, MUX_MODE0) 488 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLDOWN, MUX_MODE0) 489 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLDOWN, MUX_MODE0) 490 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLDOWN, MUX_MODE0) 491 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) 492 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLDOWN, MUX_MODE0) 493 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) 494 1.1 jmcneill >; 495 1.1 jmcneill }; 496 1.1 jmcneill 497 1.1 jmcneill uart0_pins: pinmux_uart0_pins { 498 1.1 jmcneill pinctrl-single,pins = < 499 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart0_rxd */ 500 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart0_txd */ 501 1.1 jmcneill >; 502 1.1 jmcneill }; 503 1.1 jmcneill 504 1.1 jmcneill uart1_pins_default: pinmux_uart1_pins_default { 505 1.1 jmcneill pinctrl-single,pins = < 506 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart1_rxd */ 507 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_txd */ 508 1.1 jmcneill >; 509 1.1 jmcneill }; 510 1.1 jmcneill 511 1.1 jmcneill uart1_pins_sleep: pinmux_uart1_pins_sleep { 512 1.1 jmcneill pinctrl-single,pins = < 513 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLDOWN, MUX_MODE7) 514 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7) 515 1.1 jmcneill >; 516 1.1 jmcneill }; 517 1.1 jmcneill 518 1.1 jmcneill uart2_pins_default: pinmux_uart2_pins_default { 519 1.1 jmcneill pinctrl-single,pins = < 520 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE6) /* uart2_rxd_mux1 */ 521 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_OUTPUT, MUX_MODE6) /* uart2_txd_mux1 */ 522 1.1 jmcneill >; 523 1.1 jmcneill }; 524 1.1 jmcneill 525 1.1 jmcneill uart2_pins_sleep: pinmux_uart2_pins_sleep { 526 1.1 jmcneill pinctrl-single,pins = < 527 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 528 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 529 1.1 jmcneill >; 530 1.1 jmcneill }; 531 1.1 jmcneill 532 1.1 jmcneill usb_pins: pinmux_usb_pins { 533 1.1 jmcneill pinctrl-single,pins = < 534 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB0_DRVVBUS */ 535 1.1 jmcneill AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB1_DRVVBUS */ 536 1.1 jmcneill >; 537 1.1 jmcneill }; 538 1.1 jmcneill }; 539