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      1  1.1.1.3     skrll // SPDX-License-Identifier: GPL-2.0-only
      2      1.1  jmcneill /*
      3      1.1  jmcneill  * Copyright (C) 2016 Derald D. Woods <woods.technical (a] gmail.com>
      4      1.1  jmcneill  *
      5      1.1  jmcneill  * Based on am3517-evm.dts
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill / {
      9      1.1  jmcneill 	cpus {
     10      1.1  jmcneill 		cpu@0 {
     11      1.1  jmcneill 			cpu0-supply = <&vdd_core_reg>;
     12      1.1  jmcneill 		};
     13      1.1  jmcneill 	};
     14  1.1.1.2  jmcneill 
     15  1.1.1.2  jmcneill 	wl12xx_buffer: wl12xx_buf {
     16  1.1.1.2  jmcneill 		compatible = "regulator-fixed";
     17  1.1.1.2  jmcneill 		regulator-name = "wl1271_buf";
     18  1.1.1.2  jmcneill 		regulator-min-microvolt = <1800000>;
     19  1.1.1.2  jmcneill 		regulator-max-microvolt = <1800000>;
     20  1.1.1.2  jmcneill 		pinctrl-names = "default";
     21  1.1.1.2  jmcneill 		pinctrl-0 = <&wl12xx_buffer_pins>;
     22  1.1.1.2  jmcneill 		gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
     23  1.1.1.2  jmcneill 		regulator-always-on;
     24  1.1.1.2  jmcneill 		vin-supply = <&vdd_1v8_reg>;
     25  1.1.1.2  jmcneill 	};
     26  1.1.1.2  jmcneill 
     27  1.1.1.2  jmcneill 	wl12xx_vmmc2: wl12xx_vmmc2 {
     28  1.1.1.2  jmcneill 		compatible = "regulator-fixed";
     29  1.1.1.2  jmcneill 		regulator-name = "vwl1271";
     30  1.1.1.2  jmcneill 		regulator-min-microvolt = <1800000>;
     31  1.1.1.2  jmcneill 		regulator-max-microvolt = <1800000>;
     32  1.1.1.2  jmcneill 		pinctrl-names = "default";
     33  1.1.1.2  jmcneill 		pinctrl-0 = <&wl12xx_wkup_pins>;
     34  1.1.1.2  jmcneill 		gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
     35  1.1.1.2  jmcneill 		startup-delay-us = <70000>;
     36  1.1.1.2  jmcneill 		enable-active-high;
     37  1.1.1.2  jmcneill 		regulator-always-on;
     38  1.1.1.2  jmcneill 		vin-supply = <&wl12xx_buffer>;
     39  1.1.1.2  jmcneill 	};
     40      1.1  jmcneill };
     41      1.1  jmcneill 
     42      1.1  jmcneill &gpmc {
     43      1.1  jmcneill 	ranges = <0 0 0x30000000 0x1000000>;	/* CS0: 16MB for NAND */
     44      1.1  jmcneill 
     45      1.1  jmcneill 	nand@0,0 {
     46      1.1  jmcneill 		compatible = "ti,omap2-nand";
     47      1.1  jmcneill 		linux,mtd-name = "micron,mt29f4g16abchch";
     48      1.1  jmcneill 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
     49      1.1  jmcneill 		nand-bus-width = <16>;
     50      1.1  jmcneill 		ti,nand-ecc-opt = "bch8";
     51      1.1  jmcneill 		gpmc,sync-clk-ps = <0>;
     52      1.1  jmcneill 		gpmc,cs-on-ns = <0>;
     53      1.1  jmcneill 		gpmc,cs-rd-off-ns = <44>;
     54      1.1  jmcneill 		gpmc,cs-wr-off-ns = <44>;
     55      1.1  jmcneill 		gpmc,adv-on-ns = <6>;
     56      1.1  jmcneill 		gpmc,adv-rd-off-ns = <34>;
     57      1.1  jmcneill 		gpmc,adv-wr-off-ns = <44>;
     58      1.1  jmcneill 		gpmc,we-off-ns = <40>;
     59      1.1  jmcneill 		gpmc,oe-off-ns = <54>;
     60      1.1  jmcneill 		gpmc,access-ns = <64>;
     61      1.1  jmcneill 		gpmc,rd-cycle-ns = <82>;
     62      1.1  jmcneill 		gpmc,wr-cycle-ns = <82>;
     63      1.1  jmcneill 		gpmc,wr-access-ns = <40>;
     64      1.1  jmcneill 		gpmc,wr-data-mux-bus-ns = <0>;
     65      1.1  jmcneill 		gpmc,device-width = <2>;
     66      1.1  jmcneill 		#address-cells = <1>;
     67      1.1  jmcneill 		#size-cells = <1>;
     68      1.1  jmcneill 	};
     69      1.1  jmcneill };
     70      1.1  jmcneill 
     71      1.1  jmcneill &i2c1 {
     72      1.1  jmcneill 	clock-frequency = <400000>;
     73      1.1  jmcneill 
     74      1.1  jmcneill 	s35390a: s35390a@30 {
     75      1.1  jmcneill 		compatible = "sii,s35390a";
     76      1.1  jmcneill 		reg = <0x30>;
     77      1.1  jmcneill 
     78      1.1  jmcneill 		pinctrl-names = "default";
     79      1.1  jmcneill 		pinctrl-0 = <&rtc_pins>;
     80      1.1  jmcneill 		interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
     81      1.1  jmcneill 	};
     82      1.1  jmcneill 
     83      1.1  jmcneill 	tps: tps65023@48 {
     84      1.1  jmcneill 		compatible = "ti,tps65023";
     85      1.1  jmcneill 		reg = <0x48>;
     86      1.1  jmcneill 
     87      1.1  jmcneill 		regulators {
     88      1.1  jmcneill 			vdd_core_reg: VDCDC1 {
     89      1.1  jmcneill 				regulator-name = "vdd_core";
     90      1.1  jmcneill 				regulator-always-on;
     91      1.1  jmcneill 				regulator-min-microvolt = <1200000>;
     92      1.1  jmcneill 				regulator-max-microvolt = <1200000>;
     93      1.1  jmcneill 			};
     94      1.1  jmcneill 
     95      1.1  jmcneill 			vdd_io_reg: VDCDC2 {
     96      1.1  jmcneill 				regulator-name = "vdd_io";
     97      1.1  jmcneill 				regulator-always-on;
     98      1.1  jmcneill 				regulator-min-microvolt = <3300000>;
     99      1.1  jmcneill 				regulator-max-microvolt = <3300000>;
    100      1.1  jmcneill 			};
    101      1.1  jmcneill 
    102      1.1  jmcneill 			vdd_1v8_reg: VDCDC3 {
    103      1.1  jmcneill 				regulator-name = "vdd_1v8";
    104      1.1  jmcneill 				regulator-always-on;
    105      1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    106      1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    107      1.1  jmcneill 			};
    108      1.1  jmcneill 
    109      1.1  jmcneill 			vdd_usb18_reg: LDO1 {
    110      1.1  jmcneill 				regulator-name = "vdd_usb18";
    111      1.1  jmcneill 				regulator-always-on;
    112      1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    113      1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    114      1.1  jmcneill 			};
    115      1.1  jmcneill 
    116      1.1  jmcneill 			vdd_usb33_reg: LDO2 {
    117      1.1  jmcneill 				regulator-name = "vdd_usb33";
    118      1.1  jmcneill 				regulator-always-on;
    119      1.1  jmcneill 				regulator-min-microvolt = <3300000>;
    120      1.1  jmcneill 				regulator-max-microvolt = <3300000>;
    121      1.1  jmcneill 			};
    122      1.1  jmcneill 		};
    123      1.1  jmcneill 	};
    124      1.1  jmcneill 
    125      1.1  jmcneill 	touchscreen: tsc2004@4b {
    126      1.1  jmcneill 		compatible = "ti,tsc2004";
    127      1.1  jmcneill 		reg = <0x4b>;
    128      1.1  jmcneill 
    129      1.1  jmcneill 		vio-supply = <&vdd_io_reg>;
    130      1.1  jmcneill 
    131      1.1  jmcneill 		pinctrl-names = "default";
    132      1.1  jmcneill 		pinctrl-0 = <&tsc2004_pins>;
    133      1.1  jmcneill 		interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
    134      1.1  jmcneill 
    135      1.1  jmcneill 		touchscreen-fuzz-x = <4>;
    136      1.1  jmcneill 		touchscreen-fuzz-y = <7>;
    137      1.1  jmcneill 		touchscreen-fuzz-pressure = <2>;
    138      1.1  jmcneill 		touchscreen-size-x = <480>;
    139      1.1  jmcneill 		touchscreen-size-y = <272>;
    140      1.1  jmcneill 		touchscreen-max-pressure = <2048>;
    141      1.1  jmcneill 
    142      1.1  jmcneill 		ti,x-plate-ohms = <280>;
    143      1.1  jmcneill 		ti,esd-recovery-timeout-ms = <8000>;
    144      1.1  jmcneill 	};
    145      1.1  jmcneill };
    146      1.1  jmcneill 
    147  1.1.1.2  jmcneill &mmc2 {
    148  1.1.1.2  jmcneill 	interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
    149  1.1.1.2  jmcneill 
    150  1.1.1.2  jmcneill 	status = "okay";
    151  1.1.1.2  jmcneill 	pinctrl-names = "default";
    152  1.1.1.2  jmcneill 	pinctrl-0 = <&mmc2_pins>;
    153  1.1.1.2  jmcneill 	vmmc-supply = <&wl12xx_vmmc2>;
    154  1.1.1.2  jmcneill 	non-removable;
    155  1.1.1.2  jmcneill 	bus-width = <4>;
    156  1.1.1.2  jmcneill 	cap-power-off-card;
    157  1.1.1.2  jmcneill 	#address-cells = <1>;
    158  1.1.1.2  jmcneill 	#size-cells = <0>;
    159  1.1.1.2  jmcneill 	wlcore: wlcore@2 {
    160  1.1.1.2  jmcneill 		compatible = "ti,wl1271";
    161  1.1.1.2  jmcneill 		reg = <2>;
    162  1.1.1.2  jmcneill 		interrupt-parent = <&gpio6>;
    163  1.1.1.2  jmcneill 		interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
    164  1.1.1.2  jmcneill 		ref-clock-frequency = <26000000>;
    165  1.1.1.2  jmcneill 		tcxo-clock-frequency = <26000000>;
    166  1.1.1.2  jmcneill 	};
    167  1.1.1.2  jmcneill };
    168  1.1.1.2  jmcneill 
    169  1.1.1.2  jmcneill &uart2 {
    170  1.1.1.2  jmcneill 	pinctrl-names = "default";
    171  1.1.1.2  jmcneill 	pinctrl-0 = <&uart2_pins>;
    172  1.1.1.2  jmcneill 
    173  1.1.1.2  jmcneill 	bluetooth {
    174  1.1.1.2  jmcneill 		compatible = "ti,wl1271-st";
    175  1.1.1.2  jmcneill 		enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
    176  1.1.1.2  jmcneill 		max-speed = <3000000>;
    177  1.1.1.2  jmcneill 	};
    178  1.1.1.2  jmcneill };
    179  1.1.1.2  jmcneill 
    180      1.1  jmcneill &omap3_pmx_core {
    181      1.1  jmcneill 
    182  1.1.1.2  jmcneill 	wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
    183  1.1.1.2  jmcneill 		pinctrl-single,pins = <
    184  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4)  /* mmc1_dat7.gpio_129 */
    185  1.1.1.2  jmcneill 		>;
    186  1.1.1.2  jmcneill 	};
    187  1.1.1.2  jmcneill 
    188  1.1.1.2  jmcneill 	mmc2_pins: pinmux_mmc2_pins {
    189  1.1.1.2  jmcneill 		pinctrl-single,pins = <
    190  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_clk.mmc2_clk */
    191  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_cmd.mmc2_cmd */
    192  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat0.mmc2_dat0 */
    193  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat1.mmc2_dat1 */
    194  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat2.mmc2_dat2 */
    195  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat3.mmc2_dat3 */
    196  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
    197  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
    198  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
    199  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
    200  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4)	/* hdq_sio.gpio_170 */
    201  1.1.1.2  jmcneill 		>;
    202  1.1.1.2  jmcneill 	};
    203  1.1.1.2  jmcneill 
    204      1.1  jmcneill 	rtc_pins: pinmux_rtc_pins {
    205      1.1  jmcneill 		pinctrl-single,pins = <
    206      1.1  jmcneill 			OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
    207      1.1  jmcneill 		>;
    208      1.1  jmcneill 	};
    209      1.1  jmcneill 
    210      1.1  jmcneill 	tsc2004_pins: pinmux_tsc2004_pins {
    211      1.1  jmcneill 		pinctrl-single,pins = <
    212      1.1  jmcneill 			OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
    213      1.1  jmcneill 		>;
    214      1.1  jmcneill 	};
    215  1.1.1.2  jmcneill 
    216  1.1.1.2  jmcneill 	uart2_pins: pinmux_uart2_pins {
    217  1.1.1.2  jmcneill 		pinctrl-single,pins = <
    218  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)		/* uart2_cts */
    219  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart2_rts */
    220  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx */
    221  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx */
    222  1.1.1.2  jmcneill 			OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0)		/* gpio_56 */
    223  1.1.1.2  jmcneill 		>;
    224  1.1.1.2  jmcneill 	};
    225  1.1.1.2  jmcneill };
    226  1.1.1.2  jmcneill 
    227  1.1.1.2  jmcneill &omap3_pmx_wkup {
    228  1.1.1.2  jmcneill 
    229  1.1.1.2  jmcneill 	wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
    230  1.1.1.2  jmcneill 		pinctrl-single,pins = <
    231  1.1.1.2  jmcneill 			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)	/* sys_boot1.gpio_3 */
    232  1.1.1.2  jmcneill 		>;
    233  1.1.1.2  jmcneill 	};
    234      1.1  jmcneill };
    235