1 1.1.1.6 skrll // SPDX-License-Identifier: GPL-2.0-only 2 1.1 jmcneill /* 3 1.1.1.7 jmcneill * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 4 1.1 jmcneill */ 5 1.1 jmcneill 6 1.1 jmcneill /* AM437x SK EVM */ 7 1.1 jmcneill 8 1.1 jmcneill /dts-v1/; 9 1.1 jmcneill 10 1.1 jmcneill #include "am4372.dtsi" 11 1.1 jmcneill #include <dt-bindings/pinctrl/am43xx.h> 12 1.1 jmcneill #include <dt-bindings/pwm/pwm.h> 13 1.1 jmcneill #include <dt-bindings/gpio/gpio.h> 14 1.1 jmcneill #include <dt-bindings/input/input.h> 15 1.1.1.4 jmcneill #include <dt-bindings/interrupt-controller/irq.h> 16 1.1 jmcneill 17 1.1 jmcneill / { 18 1.1 jmcneill model = "TI AM437x SK EVM"; 19 1.1 jmcneill compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 20 1.1 jmcneill 21 1.1 jmcneill aliases { 22 1.1 jmcneill display0 = &lcd0; 23 1.1 jmcneill }; 24 1.1 jmcneill 25 1.1 jmcneill chosen { 26 1.1 jmcneill stdout-path = &uart0; 27 1.1 jmcneill }; 28 1.1 jmcneill 29 1.1 jmcneill /* fixed 32k external oscillator clock */ 30 1.1 jmcneill clk_32k_rtc: clk_32k_rtc { 31 1.1 jmcneill #clock-cells = <0>; 32 1.1 jmcneill compatible = "fixed-clock"; 33 1.1 jmcneill clock-frequency = <32768>; 34 1.1 jmcneill }; 35 1.1 jmcneill 36 1.1.1.3 jmcneill lcd_bl: backlight { 37 1.1 jmcneill compatible = "pwm-backlight"; 38 1.1 jmcneill pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 39 1.1 jmcneill brightness-levels = <0 51 53 56 62 75 101 152 255>; 40 1.1 jmcneill default-brightness-level = <8>; 41 1.1 jmcneill }; 42 1.1 jmcneill 43 1.1 jmcneill sound { 44 1.1 jmcneill compatible = "simple-audio-card"; 45 1.1 jmcneill simple-audio-card,name = "AM437x-SK-EVM"; 46 1.1 jmcneill simple-audio-card,widgets = 47 1.1 jmcneill "Headphone", "Headphone Jack", 48 1.1 jmcneill "Line", "Line In"; 49 1.1 jmcneill simple-audio-card,routing = 50 1.1 jmcneill "Headphone Jack", "HPLOUT", 51 1.1 jmcneill "Headphone Jack", "HPROUT", 52 1.1 jmcneill "LINE1L", "Line In", 53 1.1 jmcneill "LINE1R", "Line In"; 54 1.1 jmcneill simple-audio-card,format = "dsp_b"; 55 1.1 jmcneill simple-audio-card,bitclock-master = <&sound_master>; 56 1.1 jmcneill simple-audio-card,frame-master = <&sound_master>; 57 1.1 jmcneill simple-audio-card,bitclock-inversion; 58 1.1 jmcneill 59 1.1 jmcneill simple-audio-card,cpu { 60 1.1 jmcneill sound-dai = <&mcasp1>; 61 1.1 jmcneill }; 62 1.1 jmcneill 63 1.1 jmcneill sound_master: simple-audio-card,codec { 64 1.1 jmcneill sound-dai = <&tlv320aic3106>; 65 1.1 jmcneill system-clock-frequency = <24000000>; 66 1.1 jmcneill }; 67 1.1 jmcneill }; 68 1.1 jmcneill 69 1.1 jmcneill matrix_keypad: matrix_keypad0 { 70 1.1 jmcneill compatible = "gpio-matrix-keypad"; 71 1.1 jmcneill 72 1.1 jmcneill pinctrl-names = "default"; 73 1.1 jmcneill pinctrl-0 = <&matrix_keypad_pins>; 74 1.1 jmcneill 75 1.1 jmcneill debounce-delay-ms = <5>; 76 1.1 jmcneill col-scan-delay-us = <5>; 77 1.1 jmcneill 78 1.1 jmcneill row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 79 1.1 jmcneill &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 80 1.1 jmcneill 81 1.1 jmcneill col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 82 1.1 jmcneill &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 83 1.1 jmcneill 84 1.1 jmcneill linux,keymap = < 85 1.1 jmcneill MATRIX_KEY(0, 0, KEY_DOWN) 86 1.1 jmcneill MATRIX_KEY(0, 1, KEY_RIGHT) 87 1.1 jmcneill MATRIX_KEY(1, 0, KEY_LEFT) 88 1.1 jmcneill MATRIX_KEY(1, 1, KEY_UP) 89 1.1 jmcneill >; 90 1.1 jmcneill }; 91 1.1 jmcneill 92 1.1 jmcneill leds { 93 1.1 jmcneill compatible = "gpio-leds"; 94 1.1 jmcneill 95 1.1 jmcneill pinctrl-names = "default"; 96 1.1 jmcneill pinctrl-0 = <&leds_pins>; 97 1.1 jmcneill 98 1.1 jmcneill led0 { 99 1.1 jmcneill label = "am437x-sk:red:heartbeat"; 100 1.1 jmcneill gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 101 1.1 jmcneill linux,default-trigger = "heartbeat"; 102 1.1 jmcneill default-state = "off"; 103 1.1 jmcneill }; 104 1.1 jmcneill 105 1.1 jmcneill led1 { 106 1.1 jmcneill label = "am437x-sk:green:mmc1"; 107 1.1 jmcneill gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 108 1.1 jmcneill linux,default-trigger = "mmc0"; 109 1.1 jmcneill default-state = "off"; 110 1.1 jmcneill }; 111 1.1 jmcneill 112 1.1 jmcneill led2 { 113 1.1 jmcneill label = "am437x-sk:blue:cpu0"; 114 1.1 jmcneill gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 115 1.1 jmcneill linux,default-trigger = "cpu0"; 116 1.1 jmcneill default-state = "off"; 117 1.1 jmcneill }; 118 1.1 jmcneill 119 1.1 jmcneill led3 { 120 1.1 jmcneill label = "am437x-sk:blue:usr3"; 121 1.1 jmcneill gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 122 1.1 jmcneill default-state = "off"; 123 1.1 jmcneill }; 124 1.1 jmcneill }; 125 1.1 jmcneill 126 1.1 jmcneill lcd0: display { 127 1.1 jmcneill compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; 128 1.1 jmcneill label = "lcd"; 129 1.1 jmcneill 130 1.1 jmcneill pinctrl-names = "default"; 131 1.1 jmcneill pinctrl-0 = <&lcd_pins>; 132 1.1 jmcneill 133 1.1.1.3 jmcneill backlight = <&lcd_bl>; 134 1.1.1.3 jmcneill 135 1.1 jmcneill enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 136 1.1 jmcneill 137 1.1 jmcneill port { 138 1.1 jmcneill lcd_in: endpoint { 139 1.1 jmcneill remote-endpoint = <&dpi_out>; 140 1.1 jmcneill }; 141 1.1 jmcneill }; 142 1.1 jmcneill }; 143 1.1.1.4 jmcneill 144 1.1.1.4 jmcneill vmmcwl_fixed: fixedregulator-mmcwl { 145 1.1.1.4 jmcneill /* 146 1.1.1.4 jmcneill * WL_EN is not SDIO standard compliant. It is an out of band 147 1.1.1.4 jmcneill * signal and hard to be dealt with in a standard way by the 148 1.1.1.4 jmcneill * SDIO core driver. 149 1.1.1.4 jmcneill * So modelling the WL_EN line as a regulator was a natural 150 1.1.1.4 jmcneill * choice as the MMC core already deals with MMC supplies. 151 1.1.1.4 jmcneill */ 152 1.1.1.4 jmcneill compatible = "regulator-fixed"; 153 1.1.1.4 jmcneill regulator-name = "vmmcwl_fixed"; 154 1.1.1.4 jmcneill regulator-min-microvolt = <1800000>; 155 1.1.1.4 jmcneill regulator-max-microvolt = <1800000>; 156 1.1.1.4 jmcneill gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>; 157 1.1.1.4 jmcneill enable-active-high; 158 1.1.1.4 jmcneill }; 159 1.1 jmcneill }; 160 1.1 jmcneill 161 1.1 jmcneill &am43xx_pinmux { 162 1.1 jmcneill matrix_keypad_pins: matrix_keypad_pins { 163 1.1 jmcneill pinctrl-single,pins = < 164 1.1 jmcneill AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 165 1.1 jmcneill AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 166 1.1 jmcneill AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 167 1.1 jmcneill AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 168 1.1 jmcneill >; 169 1.1 jmcneill }; 170 1.1 jmcneill 171 1.1 jmcneill leds_pins: leds_pins { 172 1.1 jmcneill pinctrl-single,pins = < 173 1.1 jmcneill AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 174 1.1 jmcneill AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 175 1.1 jmcneill AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 176 1.1 jmcneill AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 177 1.1 jmcneill >; 178 1.1 jmcneill }; 179 1.1 jmcneill 180 1.1 jmcneill i2c0_pins: i2c0_pins { 181 1.1 jmcneill pinctrl-single,pins = < 182 1.1 jmcneill AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 183 1.1 jmcneill AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 184 1.1 jmcneill >; 185 1.1 jmcneill }; 186 1.1 jmcneill 187 1.1 jmcneill i2c1_pins: i2c1_pins { 188 1.1 jmcneill pinctrl-single,pins = < 189 1.1 jmcneill AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 190 1.1 jmcneill AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 191 1.1 jmcneill >; 192 1.1 jmcneill }; 193 1.1 jmcneill 194 1.1 jmcneill mmc1_pins: pinmux_mmc1_pins { 195 1.1 jmcneill pinctrl-single,pins = < 196 1.1 jmcneill AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 197 1.1 jmcneill AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 198 1.1 jmcneill AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 199 1.1 jmcneill AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 200 1.1 jmcneill AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 201 1.1 jmcneill AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 202 1.1 jmcneill AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 203 1.1 jmcneill >; 204 1.1 jmcneill }; 205 1.1 jmcneill 206 1.1 jmcneill ecap0_pins: backlight_pins { 207 1.1 jmcneill pinctrl-single,pins = < 208 1.1 jmcneill AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 209 1.1 jmcneill >; 210 1.1 jmcneill }; 211 1.1 jmcneill 212 1.1 jmcneill edt_ft5306_ts_pins: edt_ft5306_ts_pins { 213 1.1 jmcneill pinctrl-single,pins = < 214 1.1 jmcneill AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 215 1.1 jmcneill AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 216 1.1 jmcneill >; 217 1.1 jmcneill }; 218 1.1 jmcneill 219 1.1 jmcneill vpfe0_pins_default: vpfe0_pins_default { 220 1.1 jmcneill pinctrl-single,pins = < 221 1.1 jmcneill AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 222 1.1 jmcneill AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ 223 1.1 jmcneill AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ 224 1.1 jmcneill AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ 225 1.1 jmcneill AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ 226 1.1 jmcneill AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ 227 1.1 jmcneill AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ 228 1.1 jmcneill AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ 229 1.1 jmcneill AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ 230 1.1 jmcneill AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ 231 1.1 jmcneill AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ 232 1.1 jmcneill AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ 233 1.1 jmcneill AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ 234 1.1 jmcneill AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ 235 1.1 jmcneill AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ 236 1.1 jmcneill >; 237 1.1 jmcneill }; 238 1.1 jmcneill 239 1.1 jmcneill vpfe0_pins_sleep: vpfe0_pins_sleep { 240 1.1 jmcneill pinctrl-single,pins = < 241 1.1 jmcneill AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 242 1.1 jmcneill AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 243 1.1 jmcneill AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 244 1.1 jmcneill AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 245 1.1 jmcneill AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 246 1.1 jmcneill AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 247 1.1 jmcneill AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 248 1.1 jmcneill AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 249 1.1 jmcneill AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 250 1.1 jmcneill AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 251 1.1 jmcneill AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 252 1.1 jmcneill AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 253 1.1 jmcneill AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 254 1.1 jmcneill AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 255 1.1 jmcneill AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 256 1.1 jmcneill >; 257 1.1 jmcneill }; 258 1.1 jmcneill 259 1.1.1.7 jmcneill clkout1_pin: pinmux_clkout1_pin { 260 1.1.1.7 jmcneill pinctrl-single,pins = < 261 1.1.1.7 jmcneill 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ 262 1.1.1.7 jmcneill >; 263 1.1.1.7 jmcneill }; 264 1.1.1.7 jmcneill 265 1.1 jmcneill cpsw_default: cpsw_default { 266 1.1 jmcneill pinctrl-single,pins = < 267 1.1 jmcneill /* Slave 1 */ 268 1.1 jmcneill AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 269 1.1 jmcneill AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 270 1.1 jmcneill AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 271 1.1 jmcneill AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 272 1.1 jmcneill AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 273 1.1 jmcneill AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 274 1.1 jmcneill AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 275 1.1 jmcneill AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 276 1.1 jmcneill AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 277 1.1 jmcneill AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 278 1.1 jmcneill AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 279 1.1 jmcneill AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 280 1.1 jmcneill 281 1.1 jmcneill /* Slave 2 */ 282 1.1 jmcneill AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 283 1.1 jmcneill AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 284 1.1 jmcneill AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 285 1.1 jmcneill AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 286 1.1 jmcneill AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 287 1.1 jmcneill AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 288 1.1 jmcneill AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 289 1.1 jmcneill AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 290 1.1 jmcneill AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 291 1.1 jmcneill AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 292 1.1 jmcneill AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 293 1.1 jmcneill AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 294 1.1 jmcneill >; 295 1.1 jmcneill }; 296 1.1 jmcneill 297 1.1 jmcneill cpsw_sleep: cpsw_sleep { 298 1.1 jmcneill pinctrl-single,pins = < 299 1.1 jmcneill /* Slave 1 reset value */ 300 1.1 jmcneill AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 301 1.1 jmcneill AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 302 1.1 jmcneill AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 303 1.1 jmcneill AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 304 1.1 jmcneill AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 305 1.1 jmcneill AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 306 1.1 jmcneill AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 307 1.1 jmcneill AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 308 1.1 jmcneill AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 309 1.1 jmcneill AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 310 1.1 jmcneill AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 311 1.1 jmcneill AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 312 1.1 jmcneill 313 1.1 jmcneill /* Slave 2 reset value */ 314 1.1 jmcneill AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) 315 1.1 jmcneill AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 316 1.1 jmcneill AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 317 1.1 jmcneill AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 318 1.1 jmcneill AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) 319 1.1 jmcneill AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 320 1.1 jmcneill AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) 321 1.1 jmcneill AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 322 1.1 jmcneill AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 323 1.1 jmcneill AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 324 1.1 jmcneill AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) 325 1.1 jmcneill AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) 326 1.1 jmcneill >; 327 1.1 jmcneill }; 328 1.1 jmcneill 329 1.1 jmcneill davinci_mdio_default: davinci_mdio_default { 330 1.1 jmcneill pinctrl-single,pins = < 331 1.1 jmcneill /* MDIO */ 332 1.1 jmcneill AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 333 1.1 jmcneill AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 334 1.1 jmcneill >; 335 1.1 jmcneill }; 336 1.1 jmcneill 337 1.1 jmcneill davinci_mdio_sleep: davinci_mdio_sleep { 338 1.1 jmcneill pinctrl-single,pins = < 339 1.1 jmcneill /* MDIO reset value */ 340 1.1 jmcneill AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 341 1.1 jmcneill AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 342 1.1 jmcneill >; 343 1.1 jmcneill }; 344 1.1 jmcneill 345 1.1 jmcneill dss_pins: dss_pins { 346 1.1 jmcneill pinctrl-single,pins = < 347 1.1 jmcneill AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 348 1.1 jmcneill AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) 349 1.1 jmcneill AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) 350 1.1 jmcneill AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) 351 1.1 jmcneill AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) 352 1.1 jmcneill AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) 353 1.1 jmcneill AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) 354 1.1 jmcneill AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 355 1.1 jmcneill AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 356 1.1 jmcneill AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) 357 1.1 jmcneill AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) 358 1.1 jmcneill AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) 359 1.1 jmcneill AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) 360 1.1 jmcneill AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) 361 1.1 jmcneill AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) 362 1.1 jmcneill AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) 363 1.1 jmcneill AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) 364 1.1 jmcneill AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) 365 1.1 jmcneill AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) 366 1.1 jmcneill AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) 367 1.1 jmcneill AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) 368 1.1 jmcneill AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) 369 1.1 jmcneill AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) 370 1.1 jmcneill AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 371 1.1 jmcneill AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 372 1.1 jmcneill AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 373 1.1 jmcneill AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 374 1.1 jmcneill AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 375 1.1 jmcneill 376 1.1 jmcneill >; 377 1.1 jmcneill }; 378 1.1 jmcneill 379 1.1 jmcneill qspi_pins: qspi_pins { 380 1.1 jmcneill pinctrl-single,pins = < 381 1.1 jmcneill AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 382 1.1 jmcneill AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 383 1.1 jmcneill AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 384 1.1 jmcneill AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 385 1.1 jmcneill AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 386 1.1 jmcneill AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 387 1.1 jmcneill >; 388 1.1 jmcneill }; 389 1.1 jmcneill 390 1.1 jmcneill mcasp1_pins: mcasp1_pins { 391 1.1 jmcneill pinctrl-single,pins = < 392 1.1 jmcneill AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 393 1.1 jmcneill AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 394 1.1 jmcneill AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 395 1.1 jmcneill AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 396 1.1 jmcneill >; 397 1.1 jmcneill }; 398 1.1 jmcneill 399 1.1 jmcneill mcasp1_pins_sleep: mcasp1_pins_sleep { 400 1.1 jmcneill pinctrl-single,pins = < 401 1.1 jmcneill AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 402 1.1 jmcneill AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 403 1.1 jmcneill AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 404 1.1 jmcneill AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 405 1.1 jmcneill >; 406 1.1 jmcneill }; 407 1.1 jmcneill 408 1.1 jmcneill lcd_pins: lcd_pins { 409 1.1 jmcneill pinctrl-single,pins = < 410 1.1 jmcneill AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 411 1.1 jmcneill >; 412 1.1 jmcneill }; 413 1.1 jmcneill 414 1.1 jmcneill usb1_pins: usb1_pins { 415 1.1 jmcneill pinctrl-single,pins = < 416 1.1 jmcneill AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 417 1.1 jmcneill >; 418 1.1 jmcneill }; 419 1.1 jmcneill 420 1.1 jmcneill usb2_pins: usb2_pins { 421 1.1 jmcneill pinctrl-single,pins = < 422 1.1 jmcneill AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 423 1.1 jmcneill >; 424 1.1 jmcneill }; 425 1.1.1.4 jmcneill 426 1.1.1.4 jmcneill mmc3_pins_default: pinmux_mmc3_pins_default { 427 1.1.1.4 jmcneill pinctrl-single,pins = < 428 1.1.1.4 jmcneill AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */ 429 1.1.1.4 jmcneill AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */ 430 1.1.1.4 jmcneill AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */ 431 1.1.1.4 jmcneill AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */ 432 1.1.1.4 jmcneill AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */ 433 1.1.1.4 jmcneill AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */ 434 1.1.1.4 jmcneill >; 435 1.1.1.4 jmcneill }; 436 1.1.1.4 jmcneill 437 1.1.1.4 jmcneill mmc3_pins_sleep: pinmux_mmc3_pins_sleep { 438 1.1.1.4 jmcneill pinctrl-single,pins = < 439 1.1.1.4 jmcneill AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */ 440 1.1.1.4 jmcneill AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */ 441 1.1.1.4 jmcneill AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */ 442 1.1.1.4 jmcneill AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */ 443 1.1.1.4 jmcneill AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */ 444 1.1.1.4 jmcneill AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */ 445 1.1.1.4 jmcneill >; 446 1.1.1.4 jmcneill }; 447 1.1.1.4 jmcneill 448 1.1.1.4 jmcneill wlan_pins_default: pinmux_wlan_pins_default { 449 1.1.1.4 jmcneill pinctrl-single,pins = < 450 1.1.1.4 jmcneill AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ 451 1.1.1.4 jmcneill AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ 452 1.1.1.4 jmcneill >; 453 1.1.1.4 jmcneill }; 454 1.1.1.4 jmcneill 455 1.1.1.4 jmcneill wlan_pins_sleep: pinmux_wlan_pins_sleep { 456 1.1.1.4 jmcneill pinctrl-single,pins = < 457 1.1.1.4 jmcneill AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ 458 1.1.1.4 jmcneill AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ 459 1.1.1.4 jmcneill >; 460 1.1.1.4 jmcneill }; 461 1.1.1.4 jmcneill 462 1.1.1.4 jmcneill uart1_bt_pins_default: pinmux_uart1_bt_pins_default { 463 1.1.1.4 jmcneill pinctrl-single,pins = < 464 1.1.1.4 jmcneill AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */ 465 1.1.1.4 jmcneill AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ 466 1.1.1.4 jmcneill AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ 467 1.1.1.4 jmcneill AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ 468 1.1.1.4 jmcneill AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ 469 1.1.1.4 jmcneill >; 470 1.1.1.4 jmcneill }; 471 1.1.1.4 jmcneill 472 1.1.1.4 jmcneill uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep { 473 1.1.1.4 jmcneill pinctrl-single,pins = < 474 1.1.1.4 jmcneill AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */ 475 1.1.1.4 jmcneill AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */ 476 1.1.1.4 jmcneill AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */ 477 1.1.1.4 jmcneill AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */ 478 1.1.1.4 jmcneill AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ 479 1.1.1.4 jmcneill >; 480 1.1.1.4 jmcneill }; 481 1.1 jmcneill }; 482 1.1 jmcneill 483 1.1 jmcneill &i2c0 { 484 1.1 jmcneill status = "okay"; 485 1.1 jmcneill pinctrl-names = "default"; 486 1.1 jmcneill pinctrl-0 = <&i2c0_pins>; 487 1.1 jmcneill clock-frequency = <100000>; 488 1.1 jmcneill 489 1.1 jmcneill tps@24 { 490 1.1 jmcneill compatible = "ti,tps65218"; 491 1.1 jmcneill reg = <0x24>; 492 1.1 jmcneill interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 493 1.1 jmcneill interrupt-controller; 494 1.1 jmcneill #interrupt-cells = <2>; 495 1.1 jmcneill 496 1.1 jmcneill dcdc1: regulator-dcdc1 { 497 1.1 jmcneill /* VDD_CORE limits min of OPP50 and max of OPP100 */ 498 1.1 jmcneill regulator-name = "vdd_core"; 499 1.1 jmcneill regulator-min-microvolt = <912000>; 500 1.1 jmcneill regulator-max-microvolt = <1144000>; 501 1.1 jmcneill regulator-boot-on; 502 1.1 jmcneill regulator-always-on; 503 1.1 jmcneill }; 504 1.1 jmcneill 505 1.1 jmcneill dcdc2: regulator-dcdc2 { 506 1.1 jmcneill /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 507 1.1 jmcneill regulator-name = "vdd_mpu"; 508 1.1 jmcneill regulator-min-microvolt = <912000>; 509 1.1 jmcneill regulator-max-microvolt = <1378000>; 510 1.1 jmcneill regulator-boot-on; 511 1.1 jmcneill regulator-always-on; 512 1.1 jmcneill }; 513 1.1 jmcneill 514 1.1 jmcneill dcdc3: regulator-dcdc3 { 515 1.1 jmcneill regulator-name = "vdds_ddr"; 516 1.1 jmcneill regulator-boot-on; 517 1.1 jmcneill regulator-always-on; 518 1.1 jmcneill regulator-state-mem { 519 1.1 jmcneill regulator-on-in-suspend; 520 1.1 jmcneill }; 521 1.1 jmcneill regulator-state-disk { 522 1.1 jmcneill regulator-off-in-suspend; 523 1.1 jmcneill }; 524 1.1 jmcneill }; 525 1.1 jmcneill 526 1.1 jmcneill dcdc4: regulator-dcdc4 { 527 1.1 jmcneill regulator-name = "v3_3d"; 528 1.1 jmcneill regulator-min-microvolt = <3300000>; 529 1.1 jmcneill regulator-max-microvolt = <3300000>; 530 1.1 jmcneill regulator-boot-on; 531 1.1 jmcneill regulator-always-on; 532 1.1 jmcneill }; 533 1.1 jmcneill 534 1.1 jmcneill dcdc5: regulator-dcdc5 { 535 1.1 jmcneill compatible = "ti,tps65218-dcdc5"; 536 1.1 jmcneill regulator-name = "v1_0bat"; 537 1.1 jmcneill regulator-min-microvolt = <1000000>; 538 1.1 jmcneill regulator-max-microvolt = <1000000>; 539 1.1 jmcneill regulator-boot-on; 540 1.1 jmcneill regulator-always-on; 541 1.1 jmcneill regulator-state-mem { 542 1.1 jmcneill regulator-on-in-suspend; 543 1.1 jmcneill }; 544 1.1 jmcneill }; 545 1.1 jmcneill 546 1.1 jmcneill dcdc6: regulator-dcdc6 { 547 1.1 jmcneill compatible = "ti,tps65218-dcdc6"; 548 1.1 jmcneill regulator-name = "v1_8bat"; 549 1.1 jmcneill regulator-min-microvolt = <1800000>; 550 1.1 jmcneill regulator-max-microvolt = <1800000>; 551 1.1 jmcneill regulator-boot-on; 552 1.1 jmcneill regulator-always-on; 553 1.1 jmcneill regulator-state-mem { 554 1.1 jmcneill regulator-on-in-suspend; 555 1.1 jmcneill }; 556 1.1 jmcneill }; 557 1.1 jmcneill 558 1.1 jmcneill ldo1: regulator-ldo1 { 559 1.1 jmcneill regulator-name = "v1_8d"; 560 1.1 jmcneill regulator-min-microvolt = <1800000>; 561 1.1 jmcneill regulator-max-microvolt = <1800000>; 562 1.1 jmcneill regulator-boot-on; 563 1.1 jmcneill regulator-always-on; 564 1.1 jmcneill }; 565 1.1 jmcneill 566 1.1 jmcneill power-button { 567 1.1 jmcneill compatible = "ti,tps65218-pwrbutton"; 568 1.1 jmcneill status = "okay"; 569 1.1 jmcneill interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 570 1.1 jmcneill }; 571 1.1 jmcneill }; 572 1.1 jmcneill 573 1.1 jmcneill at24@50 { 574 1.1.1.2 jmcneill compatible = "atmel,24c256"; 575 1.1 jmcneill pagesize = <64>; 576 1.1 jmcneill reg = <0x50>; 577 1.1 jmcneill }; 578 1.1 jmcneill }; 579 1.1 jmcneill 580 1.1 jmcneill &i2c1 { 581 1.1 jmcneill status = "okay"; 582 1.1 jmcneill pinctrl-names = "default"; 583 1.1 jmcneill pinctrl-0 = <&i2c1_pins>; 584 1.1 jmcneill clock-frequency = <400000>; 585 1.1 jmcneill 586 1.1.1.7 jmcneill ov2659@30 { 587 1.1.1.7 jmcneill compatible = "ovti,ov2659"; 588 1.1.1.7 jmcneill reg = <0x30>; 589 1.1.1.7 jmcneill pinctrl-names = "default"; 590 1.1.1.7 jmcneill pinctrl-0 = <&clkout1_pin>; 591 1.1.1.7 jmcneill 592 1.1.1.7 jmcneill clocks = <&clkout1_mux_ck>; 593 1.1.1.7 jmcneill clock-names = "xvclk"; 594 1.1.1.7 jmcneill assigned-clocks = <&clkout1_mux_ck>; 595 1.1.1.7 jmcneill assigned-clock-parents = <&clkout1_osc_div_ck>; 596 1.1.1.7 jmcneill 597 1.1.1.7 jmcneill port { 598 1.1.1.7 jmcneill ov2659_1: endpoint { 599 1.1.1.7 jmcneill remote-endpoint = <&vpfe0_ep>; 600 1.1.1.7 jmcneill link-frequencies = /bits/ 64 <70000000>; 601 1.1.1.7 jmcneill }; 602 1.1.1.7 jmcneill }; 603 1.1.1.7 jmcneill }; 604 1.1.1.7 jmcneill 605 1.1 jmcneill edt-ft5306@38 { 606 1.1 jmcneill status = "okay"; 607 1.1 jmcneill compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 608 1.1 jmcneill pinctrl-names = "default"; 609 1.1 jmcneill pinctrl-0 = <&edt_ft5306_ts_pins>; 610 1.1 jmcneill 611 1.1 jmcneill reg = <0x38>; 612 1.1 jmcneill interrupt-parent = <&gpio0>; 613 1.1 jmcneill interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 614 1.1 jmcneill 615 1.1 jmcneill reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 616 1.1 jmcneill 617 1.1 jmcneill touchscreen-size-x = <480>; 618 1.1 jmcneill touchscreen-size-y = <272>; 619 1.1.1.5 jmcneill 620 1.1.1.5 jmcneill wakeup-source; 621 1.1 jmcneill }; 622 1.1 jmcneill 623 1.1 jmcneill tlv320aic3106: tlv320aic3106@1b { 624 1.1 jmcneill #sound-dai-cells = <0>; 625 1.1 jmcneill compatible = "ti,tlv320aic3106"; 626 1.1 jmcneill reg = <0x1b>; 627 1.1 jmcneill status = "okay"; 628 1.1 jmcneill 629 1.1 jmcneill /* Regulators */ 630 1.1 jmcneill AVDD-supply = <&dcdc4>; 631 1.1 jmcneill IOVDD-supply = <&dcdc4>; 632 1.1 jmcneill DRVDD-supply = <&dcdc4>; 633 1.1 jmcneill DVDD-supply = <&ldo1>; 634 1.1 jmcneill }; 635 1.1 jmcneill 636 1.1 jmcneill lis331dlh@18 { 637 1.1 jmcneill compatible = "st,lis331dlh"; 638 1.1 jmcneill reg = <0x18>; 639 1.1 jmcneill status = "okay"; 640 1.1 jmcneill 641 1.1 jmcneill Vdd-supply = <&dcdc4>; 642 1.1 jmcneill Vdd_IO-supply = <&dcdc4>; 643 1.1 jmcneill interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 644 1.1 jmcneill }; 645 1.1 jmcneill }; 646 1.1 jmcneill 647 1.1 jmcneill &epwmss0 { 648 1.1 jmcneill status = "okay"; 649 1.1 jmcneill }; 650 1.1 jmcneill 651 1.1 jmcneill &ecap0 { 652 1.1 jmcneill status = "okay"; 653 1.1 jmcneill pinctrl-names = "default"; 654 1.1 jmcneill pinctrl-0 = <&ecap0_pins>; 655 1.1 jmcneill }; 656 1.1 jmcneill 657 1.1 jmcneill &gpio0 { 658 1.1 jmcneill status = "okay"; 659 1.1 jmcneill }; 660 1.1 jmcneill 661 1.1 jmcneill &gpio1 { 662 1.1 jmcneill status = "okay"; 663 1.1 jmcneill }; 664 1.1 jmcneill 665 1.1.1.4 jmcneill &gpio4 { 666 1.1.1.4 jmcneill status = "okay"; 667 1.1.1.4 jmcneill }; 668 1.1.1.4 jmcneill 669 1.1 jmcneill &gpio5 { 670 1.1 jmcneill status = "okay"; 671 1.1 jmcneill }; 672 1.1 jmcneill 673 1.1 jmcneill &mmc1 { 674 1.1 jmcneill status = "okay"; 675 1.1 jmcneill pinctrl-names = "default"; 676 1.1 jmcneill pinctrl-0 = <&mmc1_pins>; 677 1.1 jmcneill 678 1.1 jmcneill vmmc-supply = <&dcdc4>; 679 1.1 jmcneill bus-width = <4>; 680 1.1 jmcneill cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 681 1.1 jmcneill }; 682 1.1 jmcneill 683 1.1.1.4 jmcneill &uart1 { 684 1.1.1.4 jmcneill status = "okay"; 685 1.1.1.4 jmcneill pinctrl-names = "default", "sleep"; 686 1.1.1.4 jmcneill pinctrl-0 = <&uart1_bt_pins_default>; 687 1.1.1.4 jmcneill pinctrl-1 = <&uart1_bt_pins_sleep>; 688 1.1.1.4 jmcneill }; 689 1.1.1.4 jmcneill 690 1.1.1.4 jmcneill &mmc3 { 691 1.1.1.4 jmcneill status = "okay"; 692 1.1.1.4 jmcneill /* 693 1.1.1.4 jmcneill * these are on the crossbar and are outlined in the 694 1.1.1.4 jmcneill * xbar-event-map element 695 1.1.1.4 jmcneill */ 696 1.1.1.4 jmcneill dmas = <&edma_xbar 30 0 1>, 697 1.1.1.4 jmcneill <&edma_xbar 31 0 2>; 698 1.1.1.4 jmcneill dma-names = "tx", "rx"; 699 1.1.1.4 jmcneill vmmc-supply = <&vmmcwl_fixed>; 700 1.1.1.4 jmcneill bus-width = <4>; 701 1.1.1.4 jmcneill pinctrl-names = "default", "sleep"; 702 1.1.1.4 jmcneill pinctrl-0 = <&mmc3_pins_default>; 703 1.1.1.4 jmcneill pinctrl-1 = <&mmc3_pins_sleep>; 704 1.1.1.4 jmcneill cap-power-off-card; 705 1.1.1.4 jmcneill keep-power-in-suspend; 706 1.1.1.7 jmcneill non-removable; 707 1.1.1.4 jmcneill 708 1.1.1.4 jmcneill #address-cells = <1>; 709 1.1.1.4 jmcneill #size-cells = <0>; 710 1.1.1.4 jmcneill wlcore: wlcore@2 { 711 1.1.1.4 jmcneill compatible = "ti,wl1835"; 712 1.1.1.4 jmcneill pinctrl-names = "default", "sleep"; 713 1.1.1.4 jmcneill pinctrl-0 = <&wlan_pins_default>; 714 1.1.1.4 jmcneill pinctrl-1 = <&wlan_pins_sleep>; 715 1.1.1.4 jmcneill reg = <2>; 716 1.1.1.4 jmcneill interrupt-parent = <&gpio4>; 717 1.1.1.4 jmcneill interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; 718 1.1.1.4 jmcneill }; 719 1.1.1.4 jmcneill }; 720 1.1.1.4 jmcneill 721 1.1 jmcneill &usb2_phy1 { 722 1.1 jmcneill status = "okay"; 723 1.1 jmcneill }; 724 1.1 jmcneill 725 1.1 jmcneill &usb1 { 726 1.1.1.3 jmcneill dr_mode = "otg"; 727 1.1 jmcneill status = "okay"; 728 1.1 jmcneill pinctrl-names = "default"; 729 1.1 jmcneill pinctrl-0 = <&usb1_pins>; 730 1.1 jmcneill }; 731 1.1 jmcneill 732 1.1 jmcneill &usb2_phy2 { 733 1.1 jmcneill status = "okay"; 734 1.1 jmcneill }; 735 1.1 jmcneill 736 1.1 jmcneill &usb2 { 737 1.1 jmcneill dr_mode = "host"; 738 1.1 jmcneill status = "okay"; 739 1.1 jmcneill pinctrl-names = "default"; 740 1.1 jmcneill pinctrl-0 = <&usb2_pins>; 741 1.1 jmcneill }; 742 1.1 jmcneill 743 1.1 jmcneill &qspi { 744 1.1 jmcneill status = "okay"; 745 1.1 jmcneill pinctrl-names = "default"; 746 1.1 jmcneill pinctrl-0 = <&qspi_pins>; 747 1.1 jmcneill 748 1.1 jmcneill spi-max-frequency = <48000000>; 749 1.1 jmcneill m25p80@0 { 750 1.1 jmcneill compatible = "mx66l51235l"; 751 1.1 jmcneill spi-max-frequency = <48000000>; 752 1.1 jmcneill reg = <0>; 753 1.1 jmcneill spi-cpol; 754 1.1 jmcneill spi-cpha; 755 1.1 jmcneill spi-tx-bus-width = <1>; 756 1.1 jmcneill spi-rx-bus-width = <4>; 757 1.1 jmcneill #address-cells = <1>; 758 1.1 jmcneill #size-cells = <1>; 759 1.1 jmcneill 760 1.1 jmcneill /* MTD partition table. 761 1.1 jmcneill * The ROM checks the first 512KiB 762 1.1 jmcneill * for a valid file to boot(XIP). 763 1.1 jmcneill */ 764 1.1 jmcneill partition@0 { 765 1.1 jmcneill label = "QSPI.U_BOOT"; 766 1.1 jmcneill reg = <0x00000000 0x000080000>; 767 1.1 jmcneill }; 768 1.1 jmcneill partition@1 { 769 1.1 jmcneill label = "QSPI.U_BOOT.backup"; 770 1.1 jmcneill reg = <0x00080000 0x00080000>; 771 1.1 jmcneill }; 772 1.1 jmcneill partition@2 { 773 1.1 jmcneill label = "QSPI.U-BOOT-SPL_OS"; 774 1.1 jmcneill reg = <0x00100000 0x00010000>; 775 1.1 jmcneill }; 776 1.1 jmcneill partition@3 { 777 1.1 jmcneill label = "QSPI.U_BOOT_ENV"; 778 1.1 jmcneill reg = <0x00110000 0x00010000>; 779 1.1 jmcneill }; 780 1.1 jmcneill partition@4 { 781 1.1 jmcneill label = "QSPI.U-BOOT-ENV.backup"; 782 1.1 jmcneill reg = <0x00120000 0x00010000>; 783 1.1 jmcneill }; 784 1.1 jmcneill partition@5 { 785 1.1 jmcneill label = "QSPI.KERNEL"; 786 1.1 jmcneill reg = <0x00130000 0x0800000>; 787 1.1 jmcneill }; 788 1.1 jmcneill partition@6 { 789 1.1 jmcneill label = "QSPI.FILESYSTEM"; 790 1.1 jmcneill reg = <0x00930000 0x36D0000>; 791 1.1 jmcneill }; 792 1.1 jmcneill }; 793 1.1 jmcneill }; 794 1.1 jmcneill 795 1.1.1.7 jmcneill &mac_sw { 796 1.1 jmcneill pinctrl-names = "default", "sleep"; 797 1.1 jmcneill pinctrl-0 = <&cpsw_default>; 798 1.1 jmcneill pinctrl-1 = <&cpsw_sleep>; 799 1.1 jmcneill status = "okay"; 800 1.1 jmcneill }; 801 1.1 jmcneill 802 1.1.1.7 jmcneill &davinci_mdio_sw { 803 1.1 jmcneill pinctrl-names = "default", "sleep"; 804 1.1 jmcneill pinctrl-0 = <&davinci_mdio_default>; 805 1.1 jmcneill pinctrl-1 = <&davinci_mdio_sleep>; 806 1.1.1.5 jmcneill 807 1.1.1.5 jmcneill ethphy0: ethernet-phy@4 { 808 1.1.1.5 jmcneill reg = <4>; 809 1.1.1.5 jmcneill }; 810 1.1.1.5 jmcneill 811 1.1.1.5 jmcneill ethphy1: ethernet-phy@5 { 812 1.1.1.5 jmcneill reg = <5>; 813 1.1.1.5 jmcneill }; 814 1.1 jmcneill }; 815 1.1 jmcneill 816 1.1.1.7 jmcneill &cpsw_port1 { 817 1.1.1.5 jmcneill phy-handle = <ðphy0>; 818 1.1.1.7 jmcneill phy-mode = "rgmii-rxid"; 819 1.1.1.7 jmcneill ti,dual-emac-pvid = <1>; 820 1.1 jmcneill }; 821 1.1 jmcneill 822 1.1.1.7 jmcneill &cpsw_port2 { 823 1.1.1.5 jmcneill phy-handle = <ðphy1>; 824 1.1.1.7 jmcneill phy-mode = "rgmii-rxid"; 825 1.1.1.7 jmcneill ti,dual-emac-pvid = <2>; 826 1.1 jmcneill }; 827 1.1 jmcneill 828 1.1 jmcneill &elm { 829 1.1 jmcneill status = "okay"; 830 1.1 jmcneill }; 831 1.1 jmcneill 832 1.1 jmcneill &mcasp1 { 833 1.1 jmcneill #sound-dai-cells = <0>; 834 1.1 jmcneill pinctrl-names = "default", "sleep"; 835 1.1 jmcneill pinctrl-0 = <&mcasp1_pins>; 836 1.1 jmcneill pinctrl-1 = <&mcasp1_pins_sleep>; 837 1.1 jmcneill 838 1.1 jmcneill status = "okay"; 839 1.1 jmcneill 840 1.1 jmcneill op-mode = <0>; 841 1.1 jmcneill tdm-slots = <2>; 842 1.1 jmcneill serial-dir = < 843 1.1 jmcneill 0 0 1 2 844 1.1 jmcneill >; 845 1.1 jmcneill 846 1.1 jmcneill tx-num-evt = <1>; 847 1.1 jmcneill rx-num-evt = <1>; 848 1.1 jmcneill }; 849 1.1 jmcneill 850 1.1 jmcneill &dss { 851 1.1 jmcneill status = "okay"; 852 1.1 jmcneill 853 1.1 jmcneill pinctrl-names = "default"; 854 1.1 jmcneill pinctrl-0 = <&dss_pins>; 855 1.1 jmcneill 856 1.1 jmcneill port { 857 1.1 jmcneill dpi_out: endpoint@0 { 858 1.1 jmcneill remote-endpoint = <&lcd_in>; 859 1.1 jmcneill data-lines = <24>; 860 1.1 jmcneill }; 861 1.1 jmcneill }; 862 1.1 jmcneill }; 863 1.1 jmcneill 864 1.1 jmcneill &rtc { 865 1.1 jmcneill clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 866 1.1 jmcneill clock-names = "ext-clk", "int-clk"; 867 1.1 jmcneill status = "okay"; 868 1.1 jmcneill }; 869 1.1 jmcneill 870 1.1 jmcneill &wdt { 871 1.1 jmcneill status = "okay"; 872 1.1 jmcneill }; 873 1.1 jmcneill 874 1.1 jmcneill &cpu { 875 1.1 jmcneill cpu0-supply = <&dcdc2>; 876 1.1 jmcneill }; 877 1.1 jmcneill 878 1.1 jmcneill &vpfe0 { 879 1.1 jmcneill status = "okay"; 880 1.1 jmcneill pinctrl-names = "default", "sleep"; 881 1.1 jmcneill pinctrl-0 = <&vpfe0_pins_default>; 882 1.1 jmcneill pinctrl-1 = <&vpfe0_pins_sleep>; 883 1.1 jmcneill 884 1.1 jmcneill /* Camera port */ 885 1.1 jmcneill port { 886 1.1 jmcneill vpfe0_ep: endpoint { 887 1.1.1.7 jmcneill remote-endpoint = <&ov2659_1>; 888 1.1 jmcneill ti,am437x-vpfe-interface = <0>; 889 1.1 jmcneill bus-width = <8>; 890 1.1 jmcneill hsync-active = <0>; 891 1.1 jmcneill vsync-active = <0>; 892 1.1 jmcneill }; 893 1.1 jmcneill }; 894 1.1 jmcneill }; 895 1.1.1.7 jmcneill 896 1.1.1.7 jmcneill &pruss1_mdio { 897 1.1.1.7 jmcneill status = "disabled"; 898 1.1.1.7 jmcneill }; 899