1 1.1 jmcneill /* 2 1.1 jmcneill * Copyright 2016 Linaro Ltd 3 1.1 jmcneill * 4 1.1 jmcneill * Permission is hereby granted, free of charge, to any person obtaining a copy 5 1.1 jmcneill * of this software and associated documentation files (the "Software"), to deal 6 1.1 jmcneill * in the Software without restriction, including without limitation the rights 7 1.1 jmcneill * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 1.1 jmcneill * copies of the Software, and to permit persons to whom the Software is 9 1.1 jmcneill * furnished to do so, subject to the following conditions: 10 1.1 jmcneill * 11 1.1 jmcneill * The above copyright notice and this permission notice shall be included in 12 1.1 jmcneill * all copies or substantial portions of the Software. 13 1.1 jmcneill * 14 1.1 jmcneill * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 1.1 jmcneill * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 1.1 jmcneill * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 1.1 jmcneill * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 1.1 jmcneill * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 1.1 jmcneill * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 1.1 jmcneill * THE SOFTWARE. 21 1.1 jmcneill */ 22 1.1 jmcneill 23 1.1 jmcneill /dts-v1/; 24 1.1 jmcneill #include "arm-realview-pbx.dtsi" 25 1.1 jmcneill 26 1.1 jmcneill / { 27 1.1 jmcneill model = "ARM RealView Platform Baseboard for Cortex-A8"; 28 1.1 jmcneill compatible = "arm,realview-pba8"; 29 1.1 jmcneill arm,hbi = <0x178>; 30 1.1 jmcneill 31 1.1 jmcneill cpus { 32 1.1 jmcneill #address-cells = <1>; 33 1.1 jmcneill #size-cells = <0>; 34 1.1 jmcneill enable-method = "arm,realview-smp"; 35 1.1 jmcneill 36 1.1 jmcneill cpu0: cpu@0 { 37 1.1 jmcneill device_type = "cpu"; 38 1.1 jmcneill compatible = "arm,cortex-a8"; 39 1.1 jmcneill reg = <0>; 40 1.1 jmcneill }; 41 1.1 jmcneill }; 42 1.1 jmcneill 43 1.1 jmcneill pmu: pmu@0 { 44 1.1 jmcneill compatible = "arm,cortex-a8-pmu"; 45 1.1 jmcneill interrupt-parent = <&intc>; 46 1.1 jmcneill interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; 47 1.1 jmcneill interrupt-affinity = <&cpu0>; 48 1.1 jmcneill }; 49 1.1 jmcneill 50 1.1 jmcneill /* Primary GIC PL390 interrupt controller in the test chip */ 51 1.1 jmcneill intc: interrupt-controller@1e000000 { 52 1.1 jmcneill compatible = "arm,pl390"; 53 1.1 jmcneill #interrupt-cells = <3>; 54 1.1 jmcneill #address-cells = <1>; 55 1.1 jmcneill interrupt-controller; 56 1.1 jmcneill reg = <0x1e001000 0x1000>, 57 1.1 jmcneill <0x1e000000 0x100>; 58 1.1 jmcneill }; 59 1.1 jmcneill }; 60 1.1 jmcneill 61 1.1 jmcneill ðernet { 62 1.1 jmcneill interrupt-parent = <&intc>; 63 1.1 jmcneill interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 64 1.1 jmcneill }; 65 1.1 jmcneill 66 1.1 jmcneill &usb { 67 1.1 jmcneill interrupt-parent = <&intc>; 68 1.1 jmcneill interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 69 1.1 jmcneill }; 70 1.1 jmcneill 71 1.1 jmcneill &soc { 72 1.1 jmcneill compatible = "arm,realview-pba8-soc", "simple-bus"; 73 1.1 jmcneill }; 74 1.1 jmcneill 75 1.1 jmcneill &syscon { 76 1.1 jmcneill compatible = "arm,realview-pba8-syscon", "syscon", "simple-mfd"; 77 1.1 jmcneill }; 78 1.1 jmcneill 79 1.1 jmcneill &serial0 { 80 1.1 jmcneill interrupt-parent = <&intc>; 81 1.1 jmcneill interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>; 82 1.1 jmcneill }; 83 1.1 jmcneill 84 1.1 jmcneill &serial1 { 85 1.1 jmcneill interrupt-parent = <&intc>; 86 1.1 jmcneill interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>; 87 1.1 jmcneill }; 88 1.1 jmcneill 89 1.1 jmcneill &serial2 { 90 1.1 jmcneill interrupt-parent = <&intc>; 91 1.1 jmcneill interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; 92 1.1 jmcneill }; 93 1.1 jmcneill 94 1.1 jmcneill &serial3 { 95 1.1 jmcneill interrupt-parent = <&intc>; 96 1.1 jmcneill interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; 97 1.1 jmcneill }; 98 1.1 jmcneill 99 1.1 jmcneill &ssp { 100 1.1 jmcneill interrupt-parent = <&intc>; 101 1.1 jmcneill interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 102 1.1 jmcneill }; 103 1.1 jmcneill 104 1.1 jmcneill &wdog0 { 105 1.1 jmcneill interrupt-parent = <&intc>; 106 1.1 jmcneill interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>; 107 1.1 jmcneill }; 108 1.1 jmcneill 109 1.1 jmcneill &wdog1 { 110 1.1 jmcneill interrupt-parent = <&intc>; 111 1.1 jmcneill interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 112 1.1 jmcneill }; 113 1.1 jmcneill 114 1.1 jmcneill &timer01 { 115 1.1 jmcneill interrupt-parent = <&intc>; 116 1.1 jmcneill interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; 117 1.1 jmcneill }; 118 1.1 jmcneill 119 1.1 jmcneill &timer23 { 120 1.1 jmcneill interrupt-parent = <&intc>; 121 1.1 jmcneill interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 122 1.1 jmcneill }; 123 1.1 jmcneill 124 1.1 jmcneill &gpio0 { 125 1.1 jmcneill interrupt-parent = <&intc>; 126 1.1 jmcneill interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 127 1.1 jmcneill }; 128 1.1 jmcneill 129 1.1 jmcneill &gpio1 { 130 1.1 jmcneill interrupt-parent = <&intc>; 131 1.1 jmcneill interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 132 1.1 jmcneill }; 133 1.1 jmcneill 134 1.1 jmcneill &gpio2 { 135 1.1 jmcneill interrupt-parent = <&intc>; 136 1.1 jmcneill interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; 137 1.1 jmcneill }; 138 1.1 jmcneill 139 1.1 jmcneill &rtc { 140 1.1 jmcneill interrupt-parent = <&intc>; 141 1.1 jmcneill interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 142 1.1 jmcneill }; 143 1.1 jmcneill 144 1.1 jmcneill &timer45 { 145 1.1 jmcneill interrupt-parent = <&intc>; 146 1.1 jmcneill interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 147 1.1 jmcneill }; 148 1.1 jmcneill 149 1.1 jmcneill &timer67 { 150 1.1 jmcneill interrupt-parent = <&intc>; 151 1.1 jmcneill interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 152 1.1 jmcneill }; 153 1.1 jmcneill 154 1.1 jmcneill &aaci { 155 1.1 jmcneill interrupt-parent = <&intc>; 156 1.1 jmcneill interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; 157 1.1 jmcneill }; 158 1.1 jmcneill 159 1.1 jmcneill &mmc { 160 1.1 jmcneill interrupt-parent = <&intc>; 161 1.1 jmcneill interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>, 162 1.1 jmcneill <0 18 IRQ_TYPE_LEVEL_HIGH>; 163 1.1 jmcneill }; 164 1.1 jmcneill 165 1.1 jmcneill &kmi0 { 166 1.1 jmcneill interrupt-parent = <&intc>; 167 1.1 jmcneill interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; 168 1.1 jmcneill }; 169 1.1 jmcneill 170 1.1 jmcneill &kmi1 { 171 1.1 jmcneill interrupt-parent = <&intc>; 172 1.1 jmcneill interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; 173 1.1 jmcneill }; 174 1.1 jmcneill 175 1.1 jmcneill &clcd { 176 1.1 jmcneill interrupt-parent = <&intc>; 177 1.1 jmcneill interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 178 1.1 jmcneill }; 179