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      1  1.1.1.3  jmcneill // SPDX-License-Identifier: (GPL-2.0 OR MIT)
      2      1.1  jmcneill /*
      3      1.1  jmcneill  * Device Tree file for Synology DS116 NAS
      4      1.1  jmcneill  *
      5      1.1  jmcneill  * Copyright (C) 2017 Willy Tarreau <w (a] 1wt.eu>
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill /dts-v1/;
      9      1.1  jmcneill #include "armada-385.dtsi"
     10      1.1  jmcneill #include <dt-bindings/gpio/gpio.h>
     11      1.1  jmcneill 
     12      1.1  jmcneill / {
     13      1.1  jmcneill 	model = "Synology DS116";
     14      1.1  jmcneill 	compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
     15      1.1  jmcneill 
     16      1.1  jmcneill 	chosen {
     17      1.1  jmcneill 		stdout-path = "serial0:115200n8";
     18      1.1  jmcneill 	};
     19      1.1  jmcneill 
     20      1.1  jmcneill 	memory {
     21      1.1  jmcneill 		device_type = "memory";
     22      1.1  jmcneill 		reg = <0x00000000 0x40000000>; /* 1 GB */
     23      1.1  jmcneill 	};
     24      1.1  jmcneill 
     25      1.1  jmcneill 	soc {
     26      1.1  jmcneill 		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
     27      1.1  jmcneill 			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
     28      1.1  jmcneill 			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
     29      1.1  jmcneill 			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
     30      1.1  jmcneill 			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
     31      1.1  jmcneill 
     32      1.1  jmcneill 		internal-regs {
     33      1.1  jmcneill 			i2c@11000 {
     34      1.1  jmcneill 				pinctrl-names = "default";
     35      1.1  jmcneill 				pinctrl-0 = <&i2c0_pins>;
     36      1.1  jmcneill 				status = "okay";
     37      1.1  jmcneill 				clock-frequency = <100000>;
     38      1.1  jmcneill 
     39      1.1  jmcneill 				eeprom@57 {
     40      1.1  jmcneill 					compatible = "atmel,24c64";
     41      1.1  jmcneill 					reg = <0x57>;
     42      1.1  jmcneill 				};
     43      1.1  jmcneill 			};
     44      1.1  jmcneill 
     45      1.1  jmcneill 			serial@12000 {
     46      1.1  jmcneill 				pinctrl-names = "default";
     47      1.1  jmcneill 				pinctrl-0 = <&uart0_pins>;
     48      1.1  jmcneill 				status = "okay";
     49      1.1  jmcneill 			};
     50      1.1  jmcneill 
     51      1.1  jmcneill 			serial@12100 {
     52      1.1  jmcneill 				/* A PIC16F1829 is connected to uart1 at 9600 bps,
     53      1.1  jmcneill 				 * and takes single-character orders :
     54      1.1  jmcneill 				 *   "1" : power off // already handled by the poweroff node
     55      1.1  jmcneill 				 *   "2" : short beep
     56      1.1  jmcneill 				 *   "3" : long beep
     57      1.1  jmcneill 				 *   "4" : turn the power LED ON
     58      1.1  jmcneill 				 *   "5" : flash the power LED
     59      1.1  jmcneill 				 *   "6" : turn the power LED OFF
     60      1.1  jmcneill 				 *   "7" : turn the status LED OFF
     61      1.1  jmcneill 				 *   "8" : turn the status LED ON
     62      1.1  jmcneill 				 *   "9" : flash the status LED
     63      1.1  jmcneill 				 *   "A" : flash the motherboard LED (D8)
     64      1.1  jmcneill 				 *   "B" : turn the motherboard LED OFF
     65      1.1  jmcneill 				 *   "C" : hard reset
     66      1.1  jmcneill 				 */
     67      1.1  jmcneill 				pinctrl-names = "default";
     68      1.1  jmcneill 				pinctrl-0 = <&uart1_pins>;
     69      1.1  jmcneill 				status = "okay";
     70      1.1  jmcneill 			};
     71      1.1  jmcneill 
     72      1.1  jmcneill 			poweroff@12100 {
     73      1.1  jmcneill 				compatible = "synology,power-off";
     74      1.1  jmcneill 				reg = <0x12100 0x100>;
     75      1.1  jmcneill 				clocks = <&coreclk 0>;
     76      1.1  jmcneill 			};
     77      1.1  jmcneill 
     78      1.1  jmcneill 			ethernet@70000 {
     79      1.1  jmcneill 				pinctrl-names = "default";
     80      1.1  jmcneill 				phy = <&phy0>;
     81      1.1  jmcneill 				phy-mode = "sgmii";
     82      1.1  jmcneill 				buffer-manager = <&bm>;
     83      1.1  jmcneill 				bm,pool-long = <0>;
     84      1.1  jmcneill 				status = "okay";
     85      1.1  jmcneill 			};
     86      1.1  jmcneill 
     87      1.1  jmcneill 
     88      1.1  jmcneill 			mdio@72004 {
     89      1.1  jmcneill 				pinctrl-names = "default";
     90      1.1  jmcneill 				pinctrl-0 = <&mdio_pins>;
     91      1.1  jmcneill 
     92      1.1  jmcneill 				phy0: ethernet-phy@1 {
     93      1.1  jmcneill 					reg = <1>;
     94      1.1  jmcneill 				};
     95      1.1  jmcneill 			};
     96      1.1  jmcneill 
     97      1.1  jmcneill 			sata@a8000 {
     98      1.1  jmcneill 				pinctrl-names = "default";
     99      1.1  jmcneill 				pinctrl-0 = <&sata0_pins>;
    100      1.1  jmcneill 				status = "okay";
    101      1.1  jmcneill 				#address-cells = <1>;
    102      1.1  jmcneill 				#size-cells = <0>;
    103      1.1  jmcneill 
    104      1.1  jmcneill 				sata0: sata-port@0 {
    105      1.1  jmcneill 					reg = <0>;
    106      1.1  jmcneill 					target-supply = <&reg_5v_sata0>;
    107      1.1  jmcneill 				};
    108      1.1  jmcneill 			};
    109      1.1  jmcneill 
    110      1.1  jmcneill 			bm@c8000 {
    111      1.1  jmcneill 				status = "okay";
    112      1.1  jmcneill 			};
    113      1.1  jmcneill 
    114      1.1  jmcneill 			usb3@f0000 {
    115      1.1  jmcneill 				usb-phy = <&usb3_0_phy>;
    116      1.1  jmcneill 				status = "okay";
    117      1.1  jmcneill 			};
    118      1.1  jmcneill 
    119      1.1  jmcneill 			usb3@f8000 {
    120      1.1  jmcneill 				usb-phy = <&usb3_1_phy>;
    121      1.1  jmcneill 				status = "okay";
    122      1.1  jmcneill 			};
    123      1.1  jmcneill 		};
    124      1.1  jmcneill 
    125      1.1  jmcneill 		bm-bppi {
    126      1.1  jmcneill 			status = "okay";
    127      1.1  jmcneill 		};
    128      1.1  jmcneill 
    129      1.1  jmcneill 		gpio-fan {
    130      1.1  jmcneill 			compatible = "gpio-fan";
    131      1.1  jmcneill 			gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
    132      1.1  jmcneill 				<&gpio1 17 GPIO_ACTIVE_HIGH>,
    133      1.1  jmcneill 				<&gpio1 16 GPIO_ACTIVE_HIGH>;
    134      1.1  jmcneill 			gpio-fan,speed-map = <   0 0
    135      1.1  jmcneill 					      1500 1
    136      1.1  jmcneill 					      2500 2
    137      1.1  jmcneill 					      3000 3
    138      1.1  jmcneill 					      3400 4
    139      1.1  jmcneill 					      3700 5
    140      1.1  jmcneill 					      3900 6
    141      1.1  jmcneill 					      4000 7>;
    142  1.1.1.4  jmcneill 			#cooling-cells = <2>;
    143      1.1  jmcneill 		};
    144      1.1  jmcneill 
    145      1.1  jmcneill 		gpio-leds {
    146      1.1  jmcneill 			compatible = "gpio-leds";
    147      1.1  jmcneill 
    148      1.1  jmcneill 			/* The green part is on gpio0.20 which is also used by
    149      1.1  jmcneill 			 * sata0, and accesses to SATA disk 0 make it blink so it
    150      1.1  jmcneill 			 * doesn't need to be declared here.
    151      1.1  jmcneill 			 */
    152      1.1  jmcneill 			orange {
    153      1.1  jmcneill 				gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
    154      1.1  jmcneill 				label = "ds116:orange:disk";
    155      1.1  jmcneill 				default-state = "off";
    156      1.1  jmcneill 			};
    157      1.1  jmcneill 		};
    158      1.1  jmcneill 	};
    159      1.1  jmcneill 
    160      1.1  jmcneill 	usb3_0_phy: usb3_0_phy {
    161      1.1  jmcneill 		compatible = "usb-nop-xceiv";
    162      1.1  jmcneill 		vcc-supply = <&reg_usb3_0_vbus>;
    163  1.1.1.3  jmcneill 		#phy-cells = <0>;
    164      1.1  jmcneill 	};
    165      1.1  jmcneill 
    166      1.1  jmcneill 	usb3_1_phy: usb3_1_phy {
    167      1.1  jmcneill 		compatible = "usb-nop-xceiv";
    168      1.1  jmcneill 		vcc-supply = <&reg_usb3_1_vbus>;
    169  1.1.1.3  jmcneill 		#phy-cells = <0>;
    170      1.1  jmcneill 	};
    171      1.1  jmcneill 
    172      1.1  jmcneill 	reg_usb3_0_vbus: usb3-vbus0 {
    173      1.1  jmcneill 		compatible = "regulator-fixed";
    174      1.1  jmcneill 		regulator-name = "usb3-vbus0";
    175      1.1  jmcneill 		pinctrl-names = "default";
    176      1.1  jmcneill 		pinctrl-0 = <&xhci0_vbus_pins>;
    177      1.1  jmcneill 		regulator-min-microvolt = <5000000>;
    178      1.1  jmcneill 		regulator-max-microvolt = <5000000>;
    179      1.1  jmcneill 		enable-active-high;
    180      1.1  jmcneill 		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
    181      1.1  jmcneill 	};
    182      1.1  jmcneill 
    183      1.1  jmcneill 	reg_usb3_1_vbus: usb3-vbus1 {
    184      1.1  jmcneill 		compatible = "regulator-fixed";
    185      1.1  jmcneill 		regulator-name = "usb3-vbus1";
    186      1.1  jmcneill 		pinctrl-names = "default";
    187      1.1  jmcneill 		pinctrl-0 = <&xhci1_vbus_pins>;
    188      1.1  jmcneill 		regulator-min-microvolt = <5000000>;
    189      1.1  jmcneill 		regulator-max-microvolt = <5000000>;
    190      1.1  jmcneill 		enable-active-high;
    191      1.1  jmcneill 		gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
    192      1.1  jmcneill 	};
    193      1.1  jmcneill 
    194      1.1  jmcneill 	reg_sata0: pwr-sata0 {
    195      1.1  jmcneill 		compatible = "regulator-fixed";
    196      1.1  jmcneill 		regulator-name = "pwr_en_sata0";
    197      1.1  jmcneill 		regulator-min-microvolt = <12000000>;
    198      1.1  jmcneill 		regulator-max-microvolt = <12000000>;
    199      1.1  jmcneill 		enable-active-high;
    200      1.1  jmcneill 		regulator-boot-on;
    201      1.1  jmcneill 		gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
    202      1.1  jmcneill 	};
    203      1.1  jmcneill 
    204      1.1  jmcneill 	reg_5v_sata0: v5-sata0 {
    205      1.1  jmcneill 		compatible = "regulator-fixed";
    206      1.1  jmcneill 		regulator-name = "v5.0-sata0";
    207      1.1  jmcneill 		regulator-min-microvolt = <5000000>;
    208      1.1  jmcneill 		regulator-max-microvolt = <5000000>;
    209      1.1  jmcneill 		vin-supply = <&reg_sata0>;
    210      1.1  jmcneill 	};
    211      1.1  jmcneill 
    212      1.1  jmcneill 	reg_12v_sata0: v12-sata0 {
    213      1.1  jmcneill 		compatible = "regulator-fixed";
    214      1.1  jmcneill 		regulator-name = "v12.0-sata0";
    215      1.1  jmcneill 		regulator-min-microvolt = <12000000>;
    216      1.1  jmcneill 		regulator-max-microvolt = <12000000>;
    217      1.1  jmcneill 		vin-supply = <&reg_sata0>;
    218      1.1  jmcneill 	};
    219      1.1  jmcneill };
    220      1.1  jmcneill 
    221      1.1  jmcneill &spi0 {
    222      1.1  jmcneill 	pinctrl-names = "default";
    223      1.1  jmcneill 	pinctrl-0 = <&spi0_pins>;
    224      1.1  jmcneill 	status = "okay";
    225      1.1  jmcneill 
    226      1.1  jmcneill 	spi-flash@0 {
    227      1.1  jmcneill 		#address-cells = <1>;
    228      1.1  jmcneill 		#size-cells = <1>;
    229      1.1  jmcneill 		compatible = "macronix,mx25l6405d", "jedec,spi-nor";
    230      1.1  jmcneill 		reg = <0>; /* Chip select 0 */
    231      1.1  jmcneill 		spi-max-frequency = <50000000>;
    232      1.1  jmcneill 		m25p,fast-read;
    233      1.1  jmcneill 
    234      1.1  jmcneill 		/* Note: there is a redboot partition table despite u-boot
    235      1.1  jmcneill 		 * being used. The names presented here are the same as those
    236      1.1  jmcneill 		 * found in the FIS directory. There is also a small device
    237      1.1  jmcneill 		 * tree in the last 64kB of the RedBoot partition which is not
    238      1.1  jmcneill 		 * enumerated. The MAC address and the serial number are listed
    239      1.1  jmcneill 		 * in the "vendor" partition.
    240      1.1  jmcneill 		 */
    241  1.1.1.2  jmcneill 		partition@0 {
    242      1.1  jmcneill 			label = "RedBoot";
    243      1.1  jmcneill 			reg = <0x00000000 0x000f0000>;
    244      1.1  jmcneill 			read-only;
    245      1.1  jmcneill 		};
    246      1.1  jmcneill 
    247  1.1.1.2  jmcneill 		partition@c0000 {
    248      1.1  jmcneill 			label = "zImage";
    249      1.1  jmcneill 			reg = <0x000f0000 0x002d0000>;
    250      1.1  jmcneill 		};
    251      1.1  jmcneill 
    252  1.1.1.2  jmcneill 		partition@390000 {
    253      1.1  jmcneill 			label = "rd.gz";
    254      1.1  jmcneill 			reg = <0x003c0000 0x00410000>;
    255      1.1  jmcneill 		};
    256      1.1  jmcneill 
    257  1.1.1.2  jmcneill 		partition@7d0000 {
    258      1.1  jmcneill 			label = "vendor";
    259      1.1  jmcneill 			reg = <0x007d0000 0x00010000>;
    260      1.1  jmcneill 			read-only;
    261      1.1  jmcneill 		};
    262      1.1  jmcneill 
    263  1.1.1.2  jmcneill 		partition@7e0000 {
    264      1.1  jmcneill 			label = "RedBoot config";
    265      1.1  jmcneill 			reg = <0x007e0000 0x00010000>;
    266      1.1  jmcneill 			read-only;
    267      1.1  jmcneill 		};
    268      1.1  jmcneill 
    269  1.1.1.2  jmcneill 		partition@7f0000 {
    270      1.1  jmcneill 			label = "FIS directory";
    271      1.1  jmcneill 			reg = <0x007f0000 0x00010000>;
    272      1.1  jmcneill 			read-only;
    273      1.1  jmcneill 		};
    274      1.1  jmcneill 	};
    275      1.1  jmcneill };
    276      1.1  jmcneill 
    277      1.1  jmcneill &pinctrl {
    278      1.1  jmcneill 	/* use only one pin for UART1, as mpp20 is used by sata0 */
    279      1.1  jmcneill 	uart1_pins: uart-pins-1 {
    280      1.1  jmcneill 		marvell,pins = "mpp19";
    281      1.1  jmcneill 		marvell,function = "ua1";
    282      1.1  jmcneill 	};
    283      1.1  jmcneill 
    284      1.1  jmcneill 	xhci0_vbus_pins: xhci0_vbus_pins {
    285      1.1  jmcneill 		marvell,pins = "mpp58";
    286      1.1  jmcneill 		marvell,function = "gpio";
    287      1.1  jmcneill 	};
    288      1.1  jmcneill 	xhci1_vbus_pins: xhci1_vbus_pins {
    289      1.1  jmcneill 		marvell,pins = "mpp59";
    290      1.1  jmcneill 		marvell,function = "gpio";
    291      1.1  jmcneill 	};
    292      1.1  jmcneill };
    293