1 1.1.1.7 skrll // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 1.1 jmcneill /* 3 1.1 jmcneill * at91-sama5d4ek.dts - Device Tree file for SAMA5D4 Evaluation Kit 4 1.1 jmcneill * 5 1.1 jmcneill * Copyright (C) 2014 Atmel, 6 1.1 jmcneill * 2014 Nicolas Ferre <nicolas.ferre (a] atmel.com> 7 1.1 jmcneill */ 8 1.1 jmcneill /dts-v1/; 9 1.1 jmcneill #include "sama5d4.dtsi" 10 1.1 jmcneill 11 1.1 jmcneill / { 12 1.1 jmcneill model = "Atmel SAMA5D4-EK"; 13 1.1 jmcneill compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5"; 14 1.1 jmcneill 15 1.1 jmcneill chosen { 16 1.1 jmcneill stdout-path = "serial0:115200n8"; 17 1.1 jmcneill }; 18 1.1 jmcneill 19 1.1.1.8 jmcneill memory@20000000 { 20 1.1 jmcneill reg = <0x20000000 0x20000000>; 21 1.1 jmcneill }; 22 1.1 jmcneill 23 1.1 jmcneill clocks { 24 1.1 jmcneill slow_xtal { 25 1.1 jmcneill clock-frequency = <32768>; 26 1.1 jmcneill }; 27 1.1 jmcneill 28 1.1 jmcneill main_xtal { 29 1.1 jmcneill clock-frequency = <12000000>; 30 1.1 jmcneill }; 31 1.1 jmcneill }; 32 1.1 jmcneill 33 1.1 jmcneill ahb { 34 1.1 jmcneill apb { 35 1.1 jmcneill adc0: adc@fc034000 { 36 1.1 jmcneill pinctrl-names = "default"; 37 1.1 jmcneill pinctrl-0 = < 38 1.1 jmcneill /* external trigger conflicts with USBA_VBUS */ 39 1.1 jmcneill &pinctrl_adc0_ad0 40 1.1 jmcneill &pinctrl_adc0_ad1 41 1.1 jmcneill &pinctrl_adc0_ad2 42 1.1 jmcneill &pinctrl_adc0_ad3 43 1.1 jmcneill &pinctrl_adc0_ad4 44 1.1 jmcneill >; 45 1.1 jmcneill /* The vref depends on JP22 of EK. If connect 1-2 then use 3.3V. connect 2-3 use 3.0V */ 46 1.1 jmcneill atmel,adc-vref = <3300>; 47 1.1 jmcneill /*atmel,adc-ts-wires = <4>;*/ /* Set up ADC touch screen */ 48 1.1 jmcneill status = "okay"; /* Enable ADC IIO support */ 49 1.1 jmcneill }; 50 1.1 jmcneill 51 1.1 jmcneill mmc0: mmc@f8000000 { 52 1.1 jmcneill pinctrl-names = "default"; 53 1.1 jmcneill pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 54 1.1 jmcneill slot@0 { 55 1.1 jmcneill reg = <0>; 56 1.1 jmcneill bus-width = <4>; 57 1.1 jmcneill cd-gpios = <&pioE 5 0>; 58 1.1 jmcneill }; 59 1.1 jmcneill }; 60 1.1 jmcneill 61 1.1 jmcneill ssc0: ssc@f8008000 { 62 1.1 jmcneill status = "okay"; 63 1.1 jmcneill }; 64 1.1 jmcneill 65 1.1 jmcneill spi0: spi@f8010000 { 66 1.1 jmcneill cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; 67 1.1 jmcneill status = "okay"; 68 1.1 jmcneill m25p80@0 { 69 1.1 jmcneill compatible = "atmel,at25df321a"; 70 1.1 jmcneill spi-max-frequency = <50000000>; 71 1.1 jmcneill reg = <0>; 72 1.1 jmcneill }; 73 1.1 jmcneill }; 74 1.1 jmcneill 75 1.1 jmcneill i2c0: i2c@f8014000 { 76 1.1 jmcneill status = "okay"; 77 1.1 jmcneill 78 1.1 jmcneill wm8904: codec@1a { 79 1.1 jmcneill compatible = "wlf,wm8904"; 80 1.1 jmcneill reg = <0x1a>; 81 1.1.1.6 jmcneill clocks = <&pmc PMC_TYPE_SYSTEM 10>; 82 1.1 jmcneill clock-names = "mclk"; 83 1.1 jmcneill }; 84 1.1 jmcneill 85 1.1 jmcneill qt1070:keyboard@1b { 86 1.1 jmcneill compatible = "qt1070"; 87 1.1 jmcneill reg = <0x1b>; 88 1.1 jmcneill interrupt-parent = <&pioE>; 89 1.1 jmcneill interrupts = <25 0x0>; 90 1.1 jmcneill pinctrl-names = "default"; 91 1.1 jmcneill pinctrl-0 = <&pinctrl_qt1070_irq>; 92 1.1 jmcneill wakeup-source; 93 1.1 jmcneill }; 94 1.1 jmcneill 95 1.1.1.5 jmcneill touchscreen@4c { 96 1.1.1.5 jmcneill compatible = "atmel,maxtouch"; 97 1.1 jmcneill reg = <0x4c>; 98 1.1 jmcneill interrupt-parent = <&pioE>; 99 1.1 jmcneill interrupts = <24 0x0>; 100 1.1 jmcneill pinctrl-names = "default"; 101 1.1 jmcneill pinctrl-0 = <&pinctrl_mxt_ts>; 102 1.1 jmcneill }; 103 1.1 jmcneill }; 104 1.1 jmcneill 105 1.1 jmcneill macb0: ethernet@f8020000 { 106 1.1 jmcneill pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; 107 1.1 jmcneill phy-mode = "rmii"; 108 1.1 jmcneill status = "okay"; 109 1.1 jmcneill 110 1.1 jmcneill ethernet-phy@1 { 111 1.1 jmcneill reg = <0x1>; 112 1.1 jmcneill interrupt-parent = <&pioE>; 113 1.1 jmcneill interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 114 1.1 jmcneill }; 115 1.1 jmcneill }; 116 1.1 jmcneill 117 1.1 jmcneill mmc1: mmc@fc000000 { 118 1.1 jmcneill pinctrl-names = "default"; 119 1.1 jmcneill pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 120 1.1 jmcneill status = "okay"; 121 1.1 jmcneill slot@0 { 122 1.1 jmcneill reg = <0>; 123 1.1 jmcneill bus-width = <4>; 124 1.1 jmcneill cd-gpios = <&pioE 6 0>; 125 1.1 jmcneill }; 126 1.1 jmcneill }; 127 1.1 jmcneill 128 1.1 jmcneill usart2: serial@fc008000 { 129 1.1 jmcneill status = "okay"; 130 1.1 jmcneill }; 131 1.1 jmcneill 132 1.1 jmcneill usart3: serial@fc00c000 { 133 1.1 jmcneill status = "okay"; 134 1.1 jmcneill }; 135 1.1 jmcneill 136 1.1 jmcneill usart4: serial@fc010000 { 137 1.1 jmcneill status = "okay"; 138 1.1 jmcneill }; 139 1.1 jmcneill 140 1.1.1.4 jmcneill tcb2: timer@fc024000 { 141 1.1.1.4 jmcneill timer@0 { 142 1.1.1.4 jmcneill compatible = "atmel,tcb-timer"; 143 1.1.1.4 jmcneill reg = <0>; 144 1.1.1.4 jmcneill }; 145 1.1.1.4 jmcneill 146 1.1.1.4 jmcneill timer@1 { 147 1.1.1.4 jmcneill compatible = "atmel,tcb-timer"; 148 1.1.1.4 jmcneill reg = <1>; 149 1.1.1.4 jmcneill }; 150 1.1.1.4 jmcneill }; 151 1.1.1.4 jmcneill 152 1.1 jmcneill watchdog@fc068640 { 153 1.1 jmcneill status = "okay"; 154 1.1 jmcneill }; 155 1.1 jmcneill 156 1.1 jmcneill pinctrl@fc06a000 { 157 1.1 jmcneill board { 158 1.1 jmcneill pinctrl_macb0_phy_irq: macb0_phy_irq { 159 1.1 jmcneill atmel,pins = 160 1.1 jmcneill <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 161 1.1 jmcneill }; 162 1.1 jmcneill pinctrl_mmc0_cd: mmc0_cd { 163 1.1 jmcneill atmel,pins = 164 1.1 jmcneill <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 165 1.1 jmcneill }; 166 1.1 jmcneill pinctrl_mmc1_cd: mmc1_cd { 167 1.1 jmcneill atmel,pins = 168 1.1 jmcneill <AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 169 1.1 jmcneill }; 170 1.1 jmcneill pinctrl_pck2_as_audio_mck: pck2_as_audio_mck { 171 1.1 jmcneill atmel,pins = 172 1.1 jmcneill <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 173 1.1 jmcneill }; 174 1.1 jmcneill pinctrl_usba_vbus: usba_vbus { 175 1.1 jmcneill atmel,pins = 176 1.1 jmcneill <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; 177 1.1 jmcneill }; 178 1.1 jmcneill pinctrl_key_gpio: key_gpio_0 { 179 1.1 jmcneill atmel,pins = 180 1.1 jmcneill <AT91_PIOE 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE13 gpio */ 181 1.1 jmcneill }; 182 1.1 jmcneill pinctrl_qt1070_irq: qt1070_irq { 183 1.1 jmcneill atmel,pins = 184 1.1 jmcneill <AT91_PIOE 25 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 185 1.1 jmcneill }; 186 1.1 jmcneill pinctrl_mxt_ts: mxt_irq { 187 1.1 jmcneill atmel,pins = 188 1.1 jmcneill <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 189 1.1 jmcneill }; 190 1.1 jmcneill }; 191 1.1 jmcneill }; 192 1.1 jmcneill }; 193 1.1 jmcneill 194 1.1.1.3 jmcneill usb0: gadget@400000 { 195 1.1 jmcneill atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; 196 1.1 jmcneill pinctrl-names = "default"; 197 1.1 jmcneill pinctrl-0 = <&pinctrl_usba_vbus>; 198 1.1 jmcneill status = "okay"; 199 1.1 jmcneill }; 200 1.1 jmcneill 201 1.1.1.3 jmcneill usb1: ohci@500000 { 202 1.1 jmcneill num-ports = <3>; 203 1.1 jmcneill atmel,vbus-gpio = <0 /* &pioE 10 GPIO_ACTIVE_LOW */ 204 1.1 jmcneill &pioE 11 GPIO_ACTIVE_LOW 205 1.1 jmcneill &pioE 12 GPIO_ACTIVE_LOW 206 1.1 jmcneill >; 207 1.1 jmcneill status = "okay"; 208 1.1 jmcneill }; 209 1.1 jmcneill 210 1.1.1.3 jmcneill usb2: ehci@600000 { 211 1.1 jmcneill status = "okay"; 212 1.1 jmcneill }; 213 1.1 jmcneill 214 1.1.1.2 jmcneill ebi: ebi@10000000 { 215 1.1.1.2 jmcneill pinctrl-0 = <&pinctrl_ebi_cs3 &pinctrl_ebi_nrd_nandoe 216 1.1.1.2 jmcneill &pinctrl_ebi_nwe_nandwe &pinctrl_ebi_nandrdy 217 1.1.1.2 jmcneill &pinctrl_ebi_data_0_7 &pinctrl_ebi_nand_addr>; 218 1.1.1.2 jmcneill pinctrl-names = "default"; 219 1.1 jmcneill status = "okay"; 220 1.1 jmcneill 221 1.1.1.2 jmcneill nand_controller: nand-controller { 222 1.1.1.2 jmcneill status = "okay"; 223 1.1 jmcneill 224 1.1.1.2 jmcneill nand@3 { 225 1.1.1.2 jmcneill reg = <0x3 0x0 0x2>; 226 1.1.1.2 jmcneill atmel,rb = <0>; 227 1.1.1.2 jmcneill nand-bus-width = <8>; 228 1.1.1.2 jmcneill nand-ecc-mode = "hw"; 229 1.1.1.2 jmcneill nand-on-flash-bbt; 230 1.1.1.2 jmcneill label = "atmel_nand"; 231 1.1.1.2 jmcneill 232 1.1.1.2 jmcneill partitions { 233 1.1.1.2 jmcneill compatible = "fixed-partitions"; 234 1.1.1.2 jmcneill #address-cells = <1>; 235 1.1.1.2 jmcneill #size-cells = <1>; 236 1.1.1.2 jmcneill 237 1.1.1.2 jmcneill at91bootstrap@0 { 238 1.1.1.2 jmcneill label = "at91bootstrap"; 239 1.1.1.2 jmcneill reg = <0x0 0x40000>; 240 1.1.1.2 jmcneill }; 241 1.1.1.2 jmcneill 242 1.1.1.2 jmcneill bootloader@40000 { 243 1.1.1.2 jmcneill label = "bootloader"; 244 1.1.1.2 jmcneill reg = <0x40000 0x80000>; 245 1.1.1.2 jmcneill }; 246 1.1.1.2 jmcneill 247 1.1.1.2 jmcneill bootloaderenv@c0000 { 248 1.1.1.2 jmcneill label = "bootloader env"; 249 1.1.1.2 jmcneill reg = <0xc0000 0xc0000>; 250 1.1.1.2 jmcneill }; 251 1.1.1.2 jmcneill 252 1.1.1.2 jmcneill dtb@180000 { 253 1.1.1.2 jmcneill label = "device tree"; 254 1.1.1.2 jmcneill reg = <0x180000 0x80000>; 255 1.1.1.2 jmcneill }; 256 1.1.1.2 jmcneill 257 1.1.1.2 jmcneill kernel@200000 { 258 1.1.1.2 jmcneill label = "kernel"; 259 1.1.1.2 jmcneill reg = <0x200000 0x600000>; 260 1.1.1.2 jmcneill }; 261 1.1.1.2 jmcneill 262 1.1.1.2 jmcneill rootfs@800000 { 263 1.1.1.2 jmcneill label = "rootfs"; 264 1.1.1.2 jmcneill reg = <0x800000 0x0f800000>; 265 1.1.1.2 jmcneill }; 266 1.1.1.2 jmcneill }; 267 1.1.1.2 jmcneill }; 268 1.1 jmcneill }; 269 1.1 jmcneill }; 270 1.1 jmcneill }; 271 1.1 jmcneill 272 1.1 jmcneill gpio_keys { 273 1.1 jmcneill compatible = "gpio-keys"; 274 1.1 jmcneill 275 1.1 jmcneill pinctrl-names = "default"; 276 1.1 jmcneill pinctrl-0 = <&pinctrl_key_gpio>; 277 1.1 jmcneill 278 1.1 jmcneill pb_user1 { 279 1.1 jmcneill label = "pb_user1"; 280 1.1 jmcneill gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; 281 1.1 jmcneill linux,code = <0x100>; 282 1.1 jmcneill wakeup-source; 283 1.1 jmcneill }; 284 1.1 jmcneill }; 285 1.1 jmcneill 286 1.1 jmcneill leds { 287 1.1 jmcneill compatible = "gpio-leds"; 288 1.1 jmcneill status = "okay"; 289 1.1 jmcneill 290 1.1 jmcneill d8 { 291 1.1 jmcneill label = "d8"; 292 1.1 jmcneill /* PE28, conflicts with usart4 rts pin */ 293 1.1 jmcneill gpios = <&pioE 28 GPIO_ACTIVE_LOW>; 294 1.1 jmcneill }; 295 1.1 jmcneill 296 1.1 jmcneill d9 { 297 1.1 jmcneill label = "d9"; 298 1.1 jmcneill gpios = <&pioE 9 GPIO_ACTIVE_HIGH>; 299 1.1 jmcneill }; 300 1.1 jmcneill 301 1.1 jmcneill d10 { 302 1.1 jmcneill label = "d10"; 303 1.1 jmcneill gpios = <&pioE 8 GPIO_ACTIVE_LOW>; 304 1.1 jmcneill linux,default-trigger = "heartbeat"; 305 1.1 jmcneill }; 306 1.1 jmcneill }; 307 1.1 jmcneill 308 1.1 jmcneill sound { 309 1.1 jmcneill compatible = "atmel,asoc-wm8904"; 310 1.1 jmcneill pinctrl-names = "default"; 311 1.1 jmcneill pinctrl-0 = <&pinctrl_pck2_as_audio_mck>; 312 1.1 jmcneill 313 1.1 jmcneill atmel,model = "wm8904 @ SAMA5D4EK"; 314 1.1 jmcneill atmel,audio-routing = 315 1.1 jmcneill "Headphone Jack", "HPOUTL", 316 1.1 jmcneill "Headphone Jack", "HPOUTR", 317 1.1 jmcneill "IN1L", "Line In Jack", 318 1.1 jmcneill "IN1R", "Line In Jack"; 319 1.1 jmcneill 320 1.1 jmcneill atmel,ssc-controller = <&ssc0>; 321 1.1 jmcneill atmel,audio-codec = <&wm8904>; 322 1.1 jmcneill }; 323 1.1 jmcneill }; 324