1 1.1 jmcneill /* 2 1.1 jmcneill * Copyright (C) 2017 Broadcom 3 1.1 jmcneill * Author: Florian Fainelli <f.fainelli (at) gmail.com> 4 1.1 jmcneill * 5 1.1 jmcneill * Licensed under the ISC license. 6 1.1 jmcneill */ 7 1.1 jmcneill 8 1.1 jmcneill /dts-v1/; 9 1.1 jmcneill 10 1.1 jmcneill #include "bcm53573.dtsi" 11 1.1 jmcneill 12 1.1 jmcneill / { 13 1.1 jmcneill compatible = "brcm,bcm947189acdbmr", "brcm,bcm47189", "brcm,bcm53573"; 14 1.1 jmcneill model = "Broadcom BCM947189ACDBMR"; 15 1.1 jmcneill 16 1.1 jmcneill chosen { 17 1.1 jmcneill bootargs = "console=ttyS0,115200 earlycon"; 18 1.1 jmcneill }; 19 1.1 jmcneill 20 1.1.1.3 skrll memory@0 { 21 1.1.1.2 jmcneill device_type = "memory"; 22 1.1 jmcneill reg = <0x00000000 0x08000000>; 23 1.1 jmcneill }; 24 1.1 jmcneill 25 1.1 jmcneill leds { 26 1.1 jmcneill compatible = "gpio-leds"; 27 1.1 jmcneill 28 1.1 jmcneill wps { 29 1.1 jmcneill label = "bcm53xx:blue:wps"; 30 1.1 jmcneill gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; 31 1.1 jmcneill }; 32 1.1 jmcneill 33 1.1 jmcneill 5ghz { 34 1.1 jmcneill label = "bcm53xx:blue:5ghz"; 35 1.1 jmcneill gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; 36 1.1 jmcneill }; 37 1.1 jmcneill 38 1.1 jmcneill 2ghz { 39 1.1 jmcneill label = "bcm53xx:blue:2ghz"; 40 1.1 jmcneill gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; 41 1.1 jmcneill }; 42 1.1 jmcneill }; 43 1.1 jmcneill 44 1.1 jmcneill gpio-keys { 45 1.1 jmcneill compatible = "gpio-keys"; 46 1.1 jmcneill 47 1.1 jmcneill restart { 48 1.1 jmcneill label = "Reset"; 49 1.1 jmcneill linux,code = <KEY_RESTART>; 50 1.1 jmcneill gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; 51 1.1 jmcneill }; 52 1.1 jmcneill 53 1.1 jmcneill wps { 54 1.1 jmcneill label = "WPS"; 55 1.1 jmcneill linux,code = <KEY_WPS_BUTTON>; 56 1.1 jmcneill gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; 57 1.1 jmcneill }; 58 1.1 jmcneill }; 59 1.1 jmcneill 60 1.1 jmcneill spi { 61 1.1 jmcneill compatible = "spi-gpio"; 62 1.1 jmcneill num-chipselects = <1>; 63 1.1 jmcneill gpio-sck = <&chipcommon 21 0>; 64 1.1 jmcneill gpio-miso = <&chipcommon 22 0>; 65 1.1 jmcneill gpio-mosi = <&chipcommon 23 0>; 66 1.1 jmcneill cs-gpios = <&chipcommon 24 0>; 67 1.1 jmcneill #address-cells = <1>; 68 1.1 jmcneill #size-cells = <0>; 69 1.1 jmcneill 70 1.1 jmcneill /* External BCM6802 MoCA chip is connected */ 71 1.1 jmcneill }; 72 1.1 jmcneill }; 73 1.1 jmcneill 74 1.1 jmcneill &pcie0 { 75 1.1 jmcneill ranges = <0x00000000 0 0 0 0 0x00100000>; 76 1.1 jmcneill #address-cells = <3>; 77 1.1 jmcneill #size-cells = <2>; 78 1.1 jmcneill 79 1.1 jmcneill bridge@0,0,0 { 80 1.1 jmcneill reg = <0x0000 0 0 0 0>; 81 1.1 jmcneill ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; 82 1.1 jmcneill #address-cells = <3>; 83 1.1 jmcneill #size-cells = <2>; 84 1.1 jmcneill 85 1.1 jmcneill wifi@0,1,0 { 86 1.1 jmcneill reg = <0x0000 0 0 0 0>; 87 1.1 jmcneill ranges = <0x00000000 0 0 0 0x00100000>; 88 1.1 jmcneill #address-cells = <1>; 89 1.1 jmcneill #size-cells = <1>; 90 1.1 jmcneill }; 91 1.1 jmcneill }; 92 1.1 jmcneill }; 93 1.1 jmcneill 94 1.1 jmcneill &usb2 { 95 1.1 jmcneill vcc-gpio = <&chipcommon 8 GPIO_ACTIVE_HIGH>; 96 1.1 jmcneill }; 97