1 1.1.1.5 jmcneill // SPDX-License-Identifier: GPL-2.0 2 1.1 jmcneill /* 3 1.1 jmcneill * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards 4 1.1 jmcneill * device tree source 5 1.1.1.10 jmcneill */ 6 1.1 jmcneill 7 1.1 jmcneill #include <dt-bindings/sound/samsung-i2s.h> 8 1.1 jmcneill #include <dt-bindings/input/input.h> 9 1.1 jmcneill #include <dt-bindings/clock/maxim,max77686.h> 10 1.1 jmcneill #include "exynos4412.dtsi" 11 1.1 jmcneill #include "exynos4412-ppmu-common.dtsi" 12 1.1 jmcneill #include <dt-bindings/gpio/gpio.h> 13 1.1 jmcneill #include "exynos-mfc-reserved-memory.dtsi" 14 1.1 jmcneill 15 1.1 jmcneill / { 16 1.1 jmcneill chosen { 17 1.1 jmcneill stdout-path = &serial_1; 18 1.1 jmcneill }; 19 1.1 jmcneill 20 1.1.1.4 jmcneill firmware@204f000 { 21 1.1 jmcneill compatible = "samsung,secure-firmware"; 22 1.1 jmcneill reg = <0x0204F000 0x1000>; 23 1.1 jmcneill }; 24 1.1 jmcneill 25 1.1.1.10 jmcneill gpio_keys: gpio-keys { 26 1.1 jmcneill compatible = "gpio-keys"; 27 1.1 jmcneill pinctrl-names = "default"; 28 1.1 jmcneill pinctrl-0 = <&gpio_power_key>; 29 1.1 jmcneill 30 1.1.1.10 jmcneill power-key { 31 1.1 jmcneill gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; 32 1.1 jmcneill linux,code = <KEY_POWER>; 33 1.1 jmcneill label = "power key"; 34 1.1 jmcneill debounce-interval = <10>; 35 1.1 jmcneill wakeup-source; 36 1.1 jmcneill }; 37 1.1 jmcneill }; 38 1.1 jmcneill 39 1.1 jmcneill sound: sound { 40 1.1.1.6 jmcneill compatible = "hardkernel,odroid-xu4-audio"; 41 1.1 jmcneill 42 1.1.1.6 jmcneill cpu { 43 1.1 jmcneill sound-dai = <&i2s0 0>; 44 1.1 jmcneill }; 45 1.1 jmcneill 46 1.1.1.6 jmcneill codec { 47 1.1.1.6 jmcneill sound-dai = <&hdmi>, <&max98090>; 48 1.1 jmcneill }; 49 1.1 jmcneill }; 50 1.1 jmcneill 51 1.1 jmcneill emmc_pwrseq: pwrseq { 52 1.1.1.8 jmcneill pinctrl-0 = <&emmc_rstn>; 53 1.1 jmcneill pinctrl-names = "default"; 54 1.1 jmcneill compatible = "mmc-pwrseq-emmc"; 55 1.1 jmcneill reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>; 56 1.1 jmcneill }; 57 1.1 jmcneill 58 1.1 jmcneill fixed-rate-clocks { 59 1.1 jmcneill xxti { 60 1.1 jmcneill compatible = "samsung,clock-xxti"; 61 1.1 jmcneill clock-frequency = <0>; 62 1.1 jmcneill }; 63 1.1 jmcneill 64 1.1 jmcneill xusbxti { 65 1.1 jmcneill compatible = "samsung,clock-xusbxti"; 66 1.1 jmcneill clock-frequency = <24000000>; 67 1.1 jmcneill }; 68 1.1 jmcneill }; 69 1.1 jmcneill }; 70 1.1 jmcneill 71 1.1 jmcneill &bus_dmc { 72 1.1 jmcneill devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; 73 1.1 jmcneill vdd-supply = <&buck1_reg>; 74 1.1 jmcneill status = "okay"; 75 1.1 jmcneill }; 76 1.1 jmcneill 77 1.1 jmcneill &bus_acp { 78 1.1 jmcneill devfreq = <&bus_dmc>; 79 1.1 jmcneill status = "okay"; 80 1.1 jmcneill }; 81 1.1 jmcneill 82 1.1 jmcneill &bus_c2c { 83 1.1 jmcneill devfreq = <&bus_dmc>; 84 1.1 jmcneill status = "okay"; 85 1.1 jmcneill }; 86 1.1 jmcneill 87 1.1 jmcneill &bus_leftbus { 88 1.1 jmcneill devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; 89 1.1 jmcneill vdd-supply = <&buck3_reg>; 90 1.1 jmcneill status = "okay"; 91 1.1 jmcneill }; 92 1.1 jmcneill 93 1.1 jmcneill &bus_rightbus { 94 1.1 jmcneill devfreq = <&bus_leftbus>; 95 1.1 jmcneill status = "okay"; 96 1.1 jmcneill }; 97 1.1 jmcneill 98 1.1 jmcneill &bus_display { 99 1.1 jmcneill devfreq = <&bus_leftbus>; 100 1.1 jmcneill status = "okay"; 101 1.1 jmcneill }; 102 1.1 jmcneill 103 1.1 jmcneill &bus_fsys { 104 1.1 jmcneill devfreq = <&bus_leftbus>; 105 1.1 jmcneill status = "okay"; 106 1.1 jmcneill }; 107 1.1 jmcneill 108 1.1 jmcneill &bus_peri { 109 1.1 jmcneill devfreq = <&bus_leftbus>; 110 1.1 jmcneill status = "okay"; 111 1.1 jmcneill }; 112 1.1 jmcneill 113 1.1 jmcneill &bus_mfc { 114 1.1 jmcneill devfreq = <&bus_leftbus>; 115 1.1 jmcneill status = "okay"; 116 1.1 jmcneill }; 117 1.1 jmcneill 118 1.1.1.5 jmcneill &camera { 119 1.1.1.5 jmcneill status = "okay"; 120 1.1.1.5 jmcneill pinctrl-names = "default"; 121 1.1.1.5 jmcneill pinctrl-0 = <>; 122 1.1.1.5 jmcneill }; 123 1.1.1.5 jmcneill 124 1.1.1.6 jmcneill &clock { 125 1.1.1.10 jmcneill clocks = <&clock CLK_XUSBXTI>; 126 1.1.1.6 jmcneill assigned-clocks = <&clock CLK_FOUT_EPLL>; 127 1.1.1.6 jmcneill assigned-clock-rates = <45158401>; 128 1.1.1.6 jmcneill }; 129 1.1.1.6 jmcneill 130 1.1 jmcneill &clock_audss { 131 1.1 jmcneill assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, 132 1.1 jmcneill <&clock_audss EXYNOS_MOUT_I2S>, 133 1.1 jmcneill <&clock_audss EXYNOS_DOUT_SRP>, 134 1.1.1.6 jmcneill <&clock_audss EXYNOS_DOUT_AUD_BUS>, 135 1.1.1.6 jmcneill <&clock_audss EXYNOS_DOUT_I2S>; 136 1.1.1.6 jmcneill 137 1.1 jmcneill assigned-clock-parents = <&clock CLK_FOUT_EPLL>, 138 1.1.1.6 jmcneill <&clock_audss EXYNOS_MOUT_AUDSS>; 139 1.1.1.6 jmcneill 140 1.1.1.6 jmcneill assigned-clock-rates = <0>, <0>, 141 1.1.1.6 jmcneill <196608001>, 142 1.1.1.6 jmcneill <(196608001 / 2)>, 143 1.1.1.6 jmcneill <(196608001 / 8)>; 144 1.1 jmcneill }; 145 1.1 jmcneill 146 1.1 jmcneill &cpu0 { 147 1.1 jmcneill cpu0-supply = <&buck2_reg>; 148 1.1 jmcneill }; 149 1.1 jmcneill 150 1.1.1.10 jmcneill &cpu0_opp_table { 151 1.1.1.10 jmcneill opp-1000000000 { 152 1.1.1.10 jmcneill opp-suspend; 153 1.1.1.10 jmcneill }; 154 1.1.1.10 jmcneill opp-800000000 { 155 1.1.1.10 jmcneill /delete-property/opp-suspend; 156 1.1.1.10 jmcneill }; 157 1.1.1.10 jmcneill }; 158 1.1.1.10 jmcneill 159 1.1.1.10 jmcneill &cpu_thermal { 160 1.1.1.10 jmcneill cooling-maps { 161 1.1.1.10 jmcneill cooling_map0: map0 { 162 1.1.1.10 jmcneill /* Corresponds to 800MHz at freq_table */ 163 1.1.1.10 jmcneill cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, 164 1.1.1.10 jmcneill <&cpu2 7 7>, <&cpu3 7 7>; 165 1.1.1.10 jmcneill }; 166 1.1.1.10 jmcneill cooling_map1: map1 { 167 1.1.1.10 jmcneill /* Corresponds to 200MHz at freq_table */ 168 1.1.1.10 jmcneill cooling-device = <&cpu0 13 13>, <&cpu1 13 13>, 169 1.1.1.10 jmcneill <&cpu2 13 13>, <&cpu3 13 13>; 170 1.1.1.10 jmcneill }; 171 1.1.1.10 jmcneill }; 172 1.1.1.10 jmcneill }; 173 1.1.1.10 jmcneill 174 1.1 jmcneill &pinctrl_1 { 175 1.1.1.10 jmcneill gpio_power_key: power-key { 176 1.1 jmcneill samsung,pins = "gpx1-3"; 177 1.1 jmcneill samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 178 1.1 jmcneill }; 179 1.1 jmcneill 180 1.1 jmcneill max77686_irq: max77686-irq { 181 1.1 jmcneill samsung,pins = "gpx3-2"; 182 1.1 jmcneill samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; 183 1.1 jmcneill samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 184 1.1 jmcneill samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 185 1.1 jmcneill }; 186 1.1 jmcneill 187 1.1 jmcneill hdmi_hpd: hdmi-hpd { 188 1.1 jmcneill samsung,pins = "gpx3-7"; 189 1.1 jmcneill samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 190 1.1 jmcneill }; 191 1.1.1.8 jmcneill 192 1.1.1.8 jmcneill emmc_rstn: emmc-rstn { 193 1.1.1.8 jmcneill samsung,pins = "gpk1-2"; 194 1.1.1.8 jmcneill samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 195 1.1.1.8 jmcneill }; 196 1.1 jmcneill }; 197 1.1 jmcneill 198 1.1 jmcneill &ehci { 199 1.1 jmcneill status = "okay"; 200 1.1 jmcneill }; 201 1.1 jmcneill 202 1.1 jmcneill &exynos_usbphy { 203 1.1 jmcneill status = "okay"; 204 1.1 jmcneill }; 205 1.1 jmcneill 206 1.1 jmcneill &fimc_0 { 207 1.1 jmcneill status = "okay"; 208 1.1 jmcneill assigned-clocks = <&clock CLK_MOUT_FIMC0>, 209 1.1 jmcneill <&clock CLK_SCLK_FIMC0>; 210 1.1 jmcneill assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; 211 1.1 jmcneill assigned-clock-rates = <0>, <176000000>; 212 1.1 jmcneill }; 213 1.1 jmcneill 214 1.1 jmcneill &fimc_1 { 215 1.1 jmcneill status = "okay"; 216 1.1 jmcneill assigned-clocks = <&clock CLK_MOUT_FIMC1>, 217 1.1 jmcneill <&clock CLK_SCLK_FIMC1>; 218 1.1 jmcneill assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; 219 1.1 jmcneill assigned-clock-rates = <0>, <176000000>; 220 1.1 jmcneill }; 221 1.1 jmcneill 222 1.1 jmcneill &fimc_2 { 223 1.1 jmcneill status = "okay"; 224 1.1 jmcneill assigned-clocks = <&clock CLK_MOUT_FIMC2>, 225 1.1 jmcneill <&clock CLK_SCLK_FIMC2>; 226 1.1 jmcneill assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; 227 1.1 jmcneill assigned-clock-rates = <0>, <176000000>; 228 1.1 jmcneill }; 229 1.1 jmcneill 230 1.1 jmcneill &fimc_3 { 231 1.1 jmcneill status = "okay"; 232 1.1 jmcneill assigned-clocks = <&clock CLK_MOUT_FIMC3>, 233 1.1 jmcneill <&clock CLK_SCLK_FIMC3>; 234 1.1 jmcneill assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; 235 1.1 jmcneill assigned-clock-rates = <0>, <176000000>; 236 1.1 jmcneill }; 237 1.1 jmcneill 238 1.1.1.9 skrll &gpu { 239 1.1.1.9 skrll mali-supply = <&buck4_reg>; 240 1.1.1.9 skrll status = "okay"; 241 1.1.1.9 skrll }; 242 1.1.1.9 skrll 243 1.1 jmcneill &hdmi { 244 1.1 jmcneill hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; 245 1.1 jmcneill pinctrl-names = "default"; 246 1.1 jmcneill pinctrl-0 = <&hdmi_hpd>; 247 1.1 jmcneill vdd-supply = <&ldo8_reg>; 248 1.1 jmcneill vdd_osc-supply = <&ldo10_reg>; 249 1.1 jmcneill vdd_pll-supply = <&ldo8_reg>; 250 1.1 jmcneill ddc = <&i2c_2>; 251 1.1 jmcneill status = "okay"; 252 1.1 jmcneill }; 253 1.1 jmcneill 254 1.1 jmcneill &hdmicec { 255 1.1 jmcneill status = "okay"; 256 1.1 jmcneill }; 257 1.1 jmcneill 258 1.1 jmcneill &hsotg { 259 1.1 jmcneill status = "okay"; 260 1.1 jmcneill vusb_d-supply = <&ldo15_reg>; 261 1.1 jmcneill vusb_a-supply = <&ldo12_reg>; 262 1.1 jmcneill }; 263 1.1 jmcneill 264 1.1 jmcneill &i2c_0 { 265 1.1 jmcneill samsung,i2c-sda-delay = <100>; 266 1.1 jmcneill samsung,i2c-max-bus-freq = <400000>; 267 1.1 jmcneill status = "okay"; 268 1.1 jmcneill 269 1.1.1.10 jmcneill usb3503: usb-hub@8 { 270 1.1 jmcneill compatible = "smsc,usb3503"; 271 1.1 jmcneill reg = <0x08>; 272 1.1 jmcneill 273 1.1 jmcneill intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; 274 1.1 jmcneill connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; 275 1.1.1.10 jmcneill reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; 276 1.1 jmcneill initial-mode = <1>; 277 1.1 jmcneill }; 278 1.1 jmcneill 279 1.1.1.4 jmcneill max77686: pmic@9 { 280 1.1 jmcneill compatible = "maxim,max77686"; 281 1.1 jmcneill interrupt-parent = <&gpx3>; 282 1.1.1.10 jmcneill interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 283 1.1 jmcneill pinctrl-names = "default"; 284 1.1 jmcneill pinctrl-0 = <&max77686_irq>; 285 1.1.1.10 jmcneill wakeup-source; 286 1.1 jmcneill reg = <0x09>; 287 1.1 jmcneill #clock-cells = <1>; 288 1.1 jmcneill 289 1.1 jmcneill voltage-regulators { 290 1.1 jmcneill ldo1_reg: LDO1 { 291 1.1 jmcneill regulator-name = "VDD_ALIVE_1.0V"; 292 1.1 jmcneill regulator-min-microvolt = <1000000>; 293 1.1 jmcneill regulator-max-microvolt = <1000000>; 294 1.1 jmcneill regulator-always-on; 295 1.1 jmcneill }; 296 1.1 jmcneill 297 1.1 jmcneill ldo2_reg: LDO2 { 298 1.1 jmcneill regulator-name = "VDDQ_M1_2_1.8V"; 299 1.1 jmcneill regulator-min-microvolt = <1800000>; 300 1.1 jmcneill regulator-max-microvolt = <1800000>; 301 1.1 jmcneill regulator-always-on; 302 1.1 jmcneill }; 303 1.1 jmcneill 304 1.1 jmcneill ldo3_reg: LDO3 { 305 1.1 jmcneill regulator-name = "VDDQ_EXT_1.8V"; 306 1.1 jmcneill regulator-min-microvolt = <1800000>; 307 1.1 jmcneill regulator-max-microvolt = <1800000>; 308 1.1 jmcneill regulator-always-on; 309 1.1 jmcneill }; 310 1.1 jmcneill 311 1.1 jmcneill ldo4_reg: LDO4 { 312 1.1 jmcneill regulator-name = "VDDQ_MMC2_2.8V"; 313 1.1 jmcneill regulator-min-microvolt = <2800000>; 314 1.1 jmcneill regulator-max-microvolt = <2800000>; 315 1.1 jmcneill regulator-boot-on; 316 1.1 jmcneill }; 317 1.1 jmcneill 318 1.1 jmcneill ldo5_reg: LDO5 { 319 1.1 jmcneill regulator-name = "VDDQ_MMC1_3_1.8V"; 320 1.1 jmcneill regulator-min-microvolt = <1800000>; 321 1.1 jmcneill regulator-max-microvolt = <1800000>; 322 1.1 jmcneill regulator-always-on; 323 1.1 jmcneill regulator-boot-on; 324 1.1 jmcneill }; 325 1.1 jmcneill 326 1.1 jmcneill ldo6_reg: LDO6 { 327 1.1 jmcneill regulator-name = "VDD10_MPLL_1.0V"; 328 1.1 jmcneill regulator-min-microvolt = <1000000>; 329 1.1 jmcneill regulator-max-microvolt = <1000000>; 330 1.1 jmcneill regulator-always-on; 331 1.1 jmcneill }; 332 1.1 jmcneill 333 1.1 jmcneill ldo7_reg: LDO7 { 334 1.1 jmcneill regulator-name = "VDD10_XPLL_1.0V"; 335 1.1 jmcneill regulator-min-microvolt = <1000000>; 336 1.1 jmcneill regulator-max-microvolt = <1000000>; 337 1.1 jmcneill regulator-always-on; 338 1.1 jmcneill }; 339 1.1 jmcneill 340 1.1 jmcneill ldo8_reg: LDO8 { 341 1.1 jmcneill regulator-name = "VDD10_HDMI_1.0V"; 342 1.1 jmcneill regulator-min-microvolt = <1000000>; 343 1.1 jmcneill regulator-max-microvolt = <1000000>; 344 1.1 jmcneill }; 345 1.1 jmcneill 346 1.1 jmcneill ldo10_reg: LDO10 { 347 1.1 jmcneill regulator-name = "VDDQ_MIPIHSI_1.8V"; 348 1.1 jmcneill regulator-min-microvolt = <1800000>; 349 1.1 jmcneill regulator-max-microvolt = <1800000>; 350 1.1 jmcneill }; 351 1.1 jmcneill 352 1.1 jmcneill ldo11_reg: LDO11 { 353 1.1 jmcneill regulator-name = "VDD18_ABB1_1.8V"; 354 1.1 jmcneill regulator-min-microvolt = <1800000>; 355 1.1 jmcneill regulator-max-microvolt = <1800000>; 356 1.1 jmcneill regulator-always-on; 357 1.1 jmcneill }; 358 1.1 jmcneill 359 1.1 jmcneill ldo12_reg: LDO12 { 360 1.1 jmcneill regulator-name = "VDD33_USB_3.3V"; 361 1.1 jmcneill regulator-min-microvolt = <3300000>; 362 1.1 jmcneill regulator-max-microvolt = <3300000>; 363 1.1 jmcneill regulator-always-on; 364 1.1 jmcneill regulator-boot-on; 365 1.1 jmcneill }; 366 1.1 jmcneill 367 1.1 jmcneill ldo13_reg: LDO13 { 368 1.1 jmcneill regulator-name = "VDDQ_C2C_W_1.8V"; 369 1.1 jmcneill regulator-min-microvolt = <1800000>; 370 1.1 jmcneill regulator-max-microvolt = <1800000>; 371 1.1 jmcneill regulator-always-on; 372 1.1 jmcneill regulator-boot-on; 373 1.1 jmcneill }; 374 1.1 jmcneill 375 1.1 jmcneill ldo14_reg: LDO14 { 376 1.1 jmcneill regulator-name = "VDD18_ABB0_2_1.8V"; 377 1.1 jmcneill regulator-min-microvolt = <1800000>; 378 1.1 jmcneill regulator-max-microvolt = <1800000>; 379 1.1 jmcneill regulator-always-on; 380 1.1 jmcneill regulator-boot-on; 381 1.1 jmcneill }; 382 1.1 jmcneill 383 1.1 jmcneill ldo15_reg: LDO15 { 384 1.1 jmcneill regulator-name = "VDD10_HSIC_1.0V"; 385 1.1 jmcneill regulator-min-microvolt = <1000000>; 386 1.1 jmcneill regulator-max-microvolt = <1000000>; 387 1.1 jmcneill regulator-always-on; 388 1.1 jmcneill regulator-boot-on; 389 1.1 jmcneill }; 390 1.1 jmcneill 391 1.1 jmcneill ldo16_reg: LDO16 { 392 1.1 jmcneill regulator-name = "VDD18_HSIC_1.8V"; 393 1.1 jmcneill regulator-min-microvolt = <1800000>; 394 1.1 jmcneill regulator-max-microvolt = <1800000>; 395 1.1 jmcneill regulator-always-on; 396 1.1 jmcneill regulator-boot-on; 397 1.1 jmcneill }; 398 1.1 jmcneill 399 1.1 jmcneill ldo20_reg: LDO20 { 400 1.1 jmcneill regulator-name = "LDO20_1.8V"; 401 1.1 jmcneill regulator-min-microvolt = <1800000>; 402 1.1 jmcneill regulator-max-microvolt = <1800000>; 403 1.1 jmcneill }; 404 1.1 jmcneill 405 1.1 jmcneill ldo21_reg: LDO21 { 406 1.1 jmcneill regulator-name = "TFLASH_2.8V"; 407 1.1 jmcneill regulator-min-microvolt = <2800000>; 408 1.1 jmcneill regulator-max-microvolt = <2800000>; 409 1.1 jmcneill regulator-boot-on; 410 1.1 jmcneill }; 411 1.1 jmcneill 412 1.1 jmcneill ldo22_reg: LDO22 { 413 1.1 jmcneill /* 414 1.1 jmcneill * Only U3 uses it, so let it define the 415 1.1 jmcneill * constraints 416 1.1 jmcneill */ 417 1.1 jmcneill regulator-name = "LDO22"; 418 1.1 jmcneill regulator-boot-on; 419 1.1 jmcneill }; 420 1.1 jmcneill 421 1.1 jmcneill ldo25_reg: LDO25 { 422 1.1 jmcneill regulator-name = "VDDQ_LCD_1.8V"; 423 1.1 jmcneill regulator-min-microvolt = <1800000>; 424 1.1 jmcneill regulator-max-microvolt = <1800000>; 425 1.1 jmcneill regulator-always-on; 426 1.1 jmcneill regulator-boot-on; 427 1.1 jmcneill }; 428 1.1 jmcneill 429 1.1 jmcneill buck1_reg: BUCK1 { 430 1.1.1.10 jmcneill regulator-name = "VDD_MIF"; 431 1.1 jmcneill regulator-min-microvolt = <900000>; 432 1.1 jmcneill regulator-max-microvolt = <1100000>; 433 1.1 jmcneill regulator-always-on; 434 1.1 jmcneill regulator-boot-on; 435 1.1 jmcneill }; 436 1.1 jmcneill 437 1.1 jmcneill buck2_reg: BUCK2 { 438 1.1.1.10 jmcneill regulator-name = "VDD_ARM"; 439 1.1 jmcneill regulator-min-microvolt = <900000>; 440 1.1 jmcneill regulator-max-microvolt = <1350000>; 441 1.1 jmcneill regulator-always-on; 442 1.1 jmcneill regulator-boot-on; 443 1.1 jmcneill }; 444 1.1 jmcneill 445 1.1 jmcneill buck3_reg: BUCK3 { 446 1.1.1.10 jmcneill regulator-name = "VDD_INT"; 447 1.1 jmcneill regulator-min-microvolt = <900000>; 448 1.1 jmcneill regulator-max-microvolt = <1050000>; 449 1.1 jmcneill regulator-always-on; 450 1.1 jmcneill regulator-boot-on; 451 1.1 jmcneill }; 452 1.1 jmcneill 453 1.1 jmcneill buck4_reg: BUCK4 { 454 1.1.1.10 jmcneill regulator-name = "VDD_G3D"; 455 1.1 jmcneill regulator-min-microvolt = <900000>; 456 1.1 jmcneill regulator-max-microvolt = <1100000>; 457 1.1 jmcneill regulator-microvolt-offset = <50000>; 458 1.1 jmcneill }; 459 1.1 jmcneill 460 1.1 jmcneill buck5_reg: BUCK5 { 461 1.1 jmcneill regulator-name = "VDDQ_CKEM1_2_1.2V"; 462 1.1 jmcneill regulator-min-microvolt = <1200000>; 463 1.1 jmcneill regulator-max-microvolt = <1200000>; 464 1.1 jmcneill regulator-always-on; 465 1.1 jmcneill regulator-boot-on; 466 1.1 jmcneill }; 467 1.1 jmcneill 468 1.1 jmcneill buck6_reg: BUCK6 { 469 1.1 jmcneill regulator-name = "BUCK6_1.35V"; 470 1.1 jmcneill regulator-min-microvolt = <1350000>; 471 1.1 jmcneill regulator-max-microvolt = <1350000>; 472 1.1 jmcneill regulator-always-on; 473 1.1 jmcneill regulator-boot-on; 474 1.1 jmcneill }; 475 1.1 jmcneill 476 1.1 jmcneill buck7_reg: BUCK7 { 477 1.1 jmcneill regulator-name = "BUCK7_2.0V"; 478 1.1 jmcneill regulator-min-microvolt = <2000000>; 479 1.1 jmcneill regulator-max-microvolt = <2000000>; 480 1.1 jmcneill regulator-always-on; 481 1.1 jmcneill }; 482 1.1 jmcneill 483 1.1 jmcneill buck8_reg: BUCK8 { 484 1.1 jmcneill /* 485 1.1 jmcneill * Constraints set by specific board: X, 486 1.1 jmcneill * X2 and U3. 487 1.1 jmcneill */ 488 1.1 jmcneill regulator-name = "BUCK8_2.8V"; 489 1.1 jmcneill }; 490 1.1 jmcneill }; 491 1.1 jmcneill }; 492 1.1 jmcneill }; 493 1.1 jmcneill 494 1.1 jmcneill &i2c_1 { 495 1.1 jmcneill status = "okay"; 496 1.1.1.10 jmcneill max98090: audio-codec@10 { 497 1.1 jmcneill compatible = "maxim,max98090"; 498 1.1 jmcneill reg = <0x10>; 499 1.1 jmcneill interrupt-parent = <&gpx0>; 500 1.1.1.3 jmcneill interrupts = <0 IRQ_TYPE_NONE>; 501 1.1 jmcneill clocks = <&i2s0 CLK_I2S_CDCLK>; 502 1.1 jmcneill clock-names = "mclk"; 503 1.1 jmcneill #sound-dai-cells = <0>; 504 1.1 jmcneill }; 505 1.1 jmcneill }; 506 1.1 jmcneill 507 1.1 jmcneill &i2c_2 { 508 1.1 jmcneill status = "okay"; 509 1.1 jmcneill }; 510 1.1 jmcneill 511 1.1 jmcneill &i2c_8 { 512 1.1 jmcneill status = "okay"; 513 1.1 jmcneill }; 514 1.1 jmcneill 515 1.1 jmcneill &i2s0 { 516 1.1 jmcneill pinctrl-0 = <&i2s0_bus>; 517 1.1 jmcneill pinctrl-names = "default"; 518 1.1 jmcneill status = "okay"; 519 1.1.1.6 jmcneill assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; 520 1.1.1.6 jmcneill assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>; 521 1.1 jmcneill }; 522 1.1 jmcneill 523 1.1 jmcneill &mixer { 524 1.1 jmcneill status = "okay"; 525 1.1 jmcneill }; 526 1.1 jmcneill 527 1.1 jmcneill &mshc_0 { 528 1.1 jmcneill pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; 529 1.1 jmcneill pinctrl-names = "default"; 530 1.1 jmcneill vmmc-supply = <&ldo20_reg>; 531 1.1 jmcneill mmc-pwrseq = <&emmc_pwrseq>; 532 1.1 jmcneill status = "okay"; 533 1.1 jmcneill 534 1.1 jmcneill broken-cd; 535 1.1 jmcneill card-detect-delay = <200>; 536 1.1 jmcneill samsung,dw-mshc-ciu-div = <3>; 537 1.1 jmcneill samsung,dw-mshc-sdr-timing = <2 3>; 538 1.1 jmcneill samsung,dw-mshc-ddr-timing = <1 2>; 539 1.1 jmcneill bus-width = <8>; 540 1.1 jmcneill cap-mmc-highspeed; 541 1.1 jmcneill }; 542 1.1 jmcneill 543 1.1 jmcneill &rtc { 544 1.1 jmcneill status = "okay"; 545 1.1 jmcneill clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; 546 1.1 jmcneill clock-names = "rtc", "rtc_src"; 547 1.1 jmcneill }; 548 1.1 jmcneill 549 1.1 jmcneill &sdhci_2 { 550 1.1 jmcneill bus-width = <4>; 551 1.1 jmcneill pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; 552 1.1 jmcneill pinctrl-names = "default"; 553 1.1 jmcneill vmmc-supply = <&ldo21_reg>; 554 1.1 jmcneill vqmmc-supply = <&ldo4_reg>; 555 1.1.1.7 jmcneill cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>; 556 1.1 jmcneill status = "okay"; 557 1.1 jmcneill }; 558 1.1 jmcneill 559 1.1 jmcneill &serial_0 { 560 1.1 jmcneill status = "okay"; 561 1.1 jmcneill }; 562 1.1 jmcneill 563 1.1 jmcneill &serial_1 { 564 1.1 jmcneill status = "okay"; 565 1.1 jmcneill }; 566 1.1 jmcneill 567 1.1 jmcneill &tmu { 568 1.1 jmcneill vtmu-supply = <&ldo10_reg>; 569 1.1 jmcneill status = "okay"; 570 1.1 jmcneill }; 571